Power supply circuit for protecting SOC

Abstract

The utility model discloses a power supply circuit used for protecting SOC, comprising a control power switch input signal, four groups of resistors, a triode, an MOS tube, two groups of capacitors, a power supply inlet and a power supply outlet, the control power switch input signal is connected with a third resistor and a fourth resistor, the third resistor is connected with the triode, and the fourth resistor is connected with the MOS tube. The triode is connected with the first resistor and the second resistor, two groups of capacitors are connected between the power supply inlet and the first resistor, the second resistor is connected between the power supply inlet and the triode, and the power supply inlet is output to the MOS tube after being electrified. According to the power supply circuit for protecting the SOC, the design of a power supply for inhibiting surge current is provided, so that the impact of the surge current on the soc chip at the moment of power-on of the system is overcome, the soc chip and other components are protected, the delayed opening of the MOS tube is realized by utilizing the charging time of the two groups of capacitors, and the SOC is protected. And the function of suppressing the instant surge current impact is realized.

Description

TECHNICAL FIELD

[0001] The utility model relates to SOC protection circuit technical field, especially relate to a power supply circuit for protecting SOC. BACKGROUND

[0002] The power supply circuit for protecting SOC is a power module for inhibiting inrush current, in recent years, with the progress of science and technology, the CNC automation industry also ushered in rapid development, the emergence of numerical control system especially high-precision 5-axis numerical control system greatly improves production efficiency and engraving precision. High-precision control can be realized mainly because of the application of advanced chips such as DSP and SOU. However, the chip can realize normal function and must provide stable and clean power voltage. General power supply such as Figure 4 , 5V Vin represents the power end voltage, 5V Vout represents the soc chip power supply end, and Mcu control represents the MCU control end. When the soc chip needs power supply, the MCU control end outputs high level to make Q1 open. After Q1 opens, C, E pole is conducted to GND, so that the control end of Q2 obtains low level, at this time Q2 opens, and the voltage is connected from S end to D end, that is, from Vin to Vout to supply power to soc chip. According to the same principle, when the mcu control end is low, Q2 is turned off soc power supply. With the continuous development of science and technology, people's manufacturing process requirements for the power supply circuit for protecting SOC are also higher and higher.

[0003] The existing power supply circuit for protecting SOC has certain disadvantages in use. The existing method is simple and can realize normal power supply function of chip, but there is a great inrush current (up to 4 to 6 times of normal working) on soc chip power-on moment. The inrush current may make the power supply system unstable, and if the power is powered on too quickly, the sou chip and other components on the circuit may be damaged, which brings great loss and certain adverse effects to the actual use. Therefore, we provide a power supply circuit for protecting SOC. UTILITY MODEL CONTENTS

[0004] The technical problem solved by the utility model is that, in view of the defects of the prior art, the utility model provides a power supply circuit for protecting SOC, provides a design of a power supply for inhibiting inrush current, so as to overcome the impact of inrush current on soc chip in system power-on moment, so as to protect the sou chip and other components. The charging time of capacitors C1 and C2 is utilized to realize the delayed opening of MOS tube Q2, realize the function of inhibiting inrush current impact, and effectively solve the problems in the background art.

[0005] Technical solution: To achieve the above object, the technical scheme adopted by the utility model is: a power supply circuit for protecting SOC, including control power switch input signal Mcu control, resistance R1, resistance R2, resistance R3, resistance R4, triode Q1, MOS tube Q2, capacitor C1, capacitor C2, power import Vin and power export Vout, the control power switch input signal Mcu control is connected with resistance R3 and resistance R4, the resistance R3 is connected with triode Q1, the triode Q1 is connected with resistance R1 and resistance R2, the capacitor C1 and capacitor C2 are connected between the power import Vin and resistance R1, the resistance R1 and resistance R2 are connected between the power import Vin and triode Q1, the power import Vin is output to MOS tube Q2 after being powered on, the G pole of MOS tube Q2 is connected with power import Vin, the S pole of MOS tube Q2 is connected with power export Vout, the capacitor C1, capacitor C2, resistance R1 and resistance R2 are connected between MOS tube Q2 and triode Q1.

[0006] Preferably, in the first stage, when the control power switch input signal Mcu control is low and high resistance, the B pole of the triode Q1 is pulled to the ground and is low, the triode Q1 is not conducted, and then the Vgs of MOS tube Q2 is 0, the MOS tube Q2 is not conducted, and the resistance R4 is used to fix the base of triode Q1 at low level when the control power switch input signal Mcu control is high resistance, so that the base is not floating.

[0007] Preferably, in the second stage, when the power import Vin is powered on, the control power switch input signal Mcu control is low and high resistance, that is, the triode Q1 is closed, so that the MOS tube Q2 is closed, at this time, the power import Vin is not stable and cannot open the power supply to output.

[0008] Preferably, in the third stage, when the power import Vin is powered on, the G pole and S pole of MOS tube Q2 are both 5V, and Vgs is 0, at this time, the control power switch input signal Mcu control is high, that is, 3.3V, and then there are three paths of current.

[0009] Preferably, in the first path of current, the base of triode Q1 is 0.7V, and the base current Ibe is (3.3V-0.7V) / base resistance R3=0.26mA.

[0010] Preferably, the second path of current, the third tube Q1 is saturated, Vce is close to 0, the capacitor C1 and the capacitor C2 are charged through the resistance R1, that is, the voltage of the capacitor C1, the capacitor C2 and the G pole connected end is slowly decreased from 5V to 0V, and the Vgs voltage is gradually increased.

[0011] Preferably, the third path of current, the Vgs of the MOS tube Q2 is slowly increased, so that the MOS tube Q2 is delayed to open until completely open, and finally the Vgs of the MOS tube Q2 is -5V.

[0012] Beneficial effects: compared with the prior art, the power supply circuit for protecting the SOC has the following beneficial effects: the power supply circuit for protecting the SOC provides a design for suppressing inrush current, so as to overcome the impact of inrush current on the SOC chip at the power-on moment of the system, thereby protecting the SOC chip and other components, and the charging time of the capacitors C1 and C2 is utilized to realize the delayed opening of the MOS tube Q2 and the function of suppressing the inrush current impact, the power supply circuit for protecting the SOC has simple structure, convenient operation and better use effect than the traditional mode. BRIEF DESCRIPTION OF DRAWINGS

[0013] Figure 1 It is the overall principle schematic diagram of the power supply circuit for protecting the SOC of the utility model.

[0014] Figure 2 It is the inrush current impact waveform schematic diagram before improvement in the power supply circuit for protecting the SOC of the utility model.

[0015] Figure 3 It is the inrush current impact waveform schematic diagram after improvement in the power supply circuit for protecting the SOC of the utility model.

[0016] Figure 4 It is the prior art principle schematic diagram in the power supply circuit for protecting the SOC of the utility model. DETAILED DESCRIPTION

[0017] The technical scheme of the utility model will be described clearly and completely in combination with the drawings and specific embodiments, but those skilled in the art will understand that the following described embodiments are part of the embodiments of the utility model, not all the embodiments, and should not be regarded as limiting the scope of the utility model. Based on the embodiments in the utility model, all other embodiments obtained by those skilled in the art without creative labor belong to the scope protected by the utility model. The specific conditions not mentioned in the embodiments are carried out according to the conventional conditions or the conditions recommended by the manufacturer. The reagents or instruments not marked with the manufacturer are all conventional products that can be obtained by market purchase.

[0018] In the description of the utility model, it needs to explain, the term "center", "upper", "lower", "left", "right", "vertical", "horizontal", "internal", "external" and so on indicate the orientation or position relation based on the orientation or position relation shown in the drawing, only for the convenience of describing the utility model and simplifying the description, and not indicate or imply that the indicated device or element must have a particular orientation, construct and operate in a particular orientation, therefore, it cannot be understood as the limitation of the utility model. In addition, the term "first", "second", "third" is only for the purpose of description, and cannot be understood as indicating or implying relative importance.

[0019] In the description of the utility model, it needs to explain, unless otherwise explicitly specified and limited, the term "installation", "connection", "connection" should be broad sense, for example, it can be fixed connection, can be detachable connection, or integrally connected, can be mechanical connection, can be electrical connection, can be directly connected, can be indirectly connected through intermediate medium, can be the communication inside two elements. For ordinary skilled in the art, the specific meaning of the above-mentioned terms in the utility model can be understood according to the specific circumstances.

[0020] As Figures 1-4 As shown in a kind of power supply circuit for protecting SOC, including control power switch input signal Mcucontrol, resistance R1, resistance R2, resistance R3, resistance R4, triode Q1, MOS tube Q2, capacitor C1, capacitor C2, power import Vin and power export Vout, control power switch input signal Mcu control connects resistance R3 and resistance R4, resistance R3 connects triode Q1, triode Q1 connects resistance R1 and resistance R2, capacitor C1 and capacitor C2 are connected between power import Vin and resistance R1, resistance R1 and resistance R2 are connected between power import Vin and triode Q1, output to MOS tube Q2 after power import Vin is powered on, the G pole of MOS tube Q2 is connected with power import Vin, the S pole of MOS tube Q2 is connected with power export Vout, capacitor C1, capacitor C2, resistance R1 and resistance R2 are connected between MOS tube Q2 and triode Q1, provide a kind of design of the power supply of inhibiting inrush current, to overcome the impact of inrush current on soc chip during system power-on, to protect sou chip and other components, utilize the charging time of capacitor C1 and C2, the delay opening of MOS tube Q2 is realized, the function of inhibiting instantaneous inrush current impact is realized.

[0021] Further, the first stage, the control power switch input signal Mcu control is low, high resistance, the base of the transistor Q1 is pulled low to the ground, low, the transistor Q1 is not conductive, and the MOS tube Q2 Vgs = 0, Vgs is the voltage of the gate with respect to the source, MOS tube Q2 is not conductive resistor R4 in order to control the power switch input signal Mcu control is high resistance, the base of the transistor Q1 is fixed at low, do not let it float.

[0022] Further, the second stage: the power import Vin just power on, the control power switch input signal Mcu control is low, high resistance, that is, the transistor Q1 is closed, so that the MOS tube Q2 is closed, at this time the power import Vin is not stable, can not open the power output.

[0023] Further, the third stage, the power import Vin power OK, the MOS tube Q2 G and S are both 5V, Vgs = 0, at this time the control power switch input signal Mcu control is high, that is, 3.3V, then there are three paths of current.

[0024] Further, the first path of current, the base of the transistor Q1 is 0.7V, the base current Ibe is: (3.3V-0.7V) / base resistance R3=0.26mA.

[0025] Further, the second path of current, the transistor Q1 is saturated, Vce is close to 0, the capacitor C1 and the capacitor C2 charge through the resistor R1, that is, the voltage of the capacitor C1, the capacitor C2 and the G pole connected end from 5V slowly decreases to 0V, Vgs voltage gradually increases.

[0026] Further, the third path of current, the Vgs of the MOS tube Q2 increases slowly, which delays the opening until completely open, and finally the Vgs of the MOS tube Q2 is -5V.

[0027] As shown in Figure 2 , Figure 3 , through the design, the surge current of the sou chip is significantly reduced, and the rising edge is also relatively flat compared with the previous improvement. The circuit effectively suppresses the surge current, greatly improves the system stability, protects the circuit board components, and reduces unnecessary loss.

[0028] The working principle and working process of the design:

[0029] Phase 1: When the input signal MCUControl controlling the power switch is low or high impedance, the base of the transistor Q1 is pulled to ground, which is low, and the transistor Q1 is not conducting, and the MOS Q2 is not conducting either, and the +5V_OUT has no output. The resistor R4 is to fix the base of the transistor Q1 at low when the Control is high impedance, so that it does not float.

[0030] Phase 2: When the power +5V_IN is just powered on, the input signal MCUControl controlling the power switch is required to be low or high impedance, that is, the transistor Q1 is turned off, so that the MOS Q2 is turned off. At this time, the power cannot be turned on to output backward because +5V_IN is not stable.

[0031] Phase 3: After the power +5V_IN is powered on, the gate and source of the MOS Q2 are both 5V, and Vgs=0. At this time, the Control is set to high, that is, 3.3V, and there are three paths of current:

[0032] ① Assuming that the base of the transistor Q1 is 0.7V, the base current Ibe can be calculated as: (3.3V-0.7V) / base resistor R3=0.26mA

[0033] ② The transistor Q1 is saturated and conducting, and Vce≈0. The capacitors C1 and C2 charge through the resistor R1, that is, the voltage at the end connected to the gate of C1 and C2 decreases from 5V to 0V slowly, resulting in a gradual increase in Vgs voltage.

[0034] ③ The Vgs of the MOS Q2 increases slowly, which delays the opening of the MOS Q2 until it is fully opened. Finally, the Vgs of Q2 is -5V.

[0035] This design uses the charging time of capacitors C1 and C2 to achieve the delayed opening (slow conduction) of the MOS Q2, and realizes the function of suppressing the instantaneous inrush current.

[0036] It should be noted that in this text, relational terms such as first and second (one and two) are used only to distinguish one entity or operation from another, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. Moreover, the terms "include", "contain" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or equipment including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or equipment. Without more limitations, the element defined by the statement "including a…" does not exclude the presence of additional identical elements in the process, method, article or equipment including the element.

[0037] The basic principle and main features of the present application and the advantages of the present application are shown and described above. Those skilled in the art should understand that the present application is not limited by the above embodiments, and the above embodiments and descriptions in the specification are only to illustrate the principles of the present application. Without departing from the spirit and scope of the present application, various changes and improvements can be made to the present application, and these changes and improvements all fall within the scope of the present application.

Claims

1. A power supply circuit for protecting a System-on-a-Chip (SOC), comprising a control power switch input signal MCU control, resistors R1, R2, R3, and R4, a transistor Q1, a MOSFET Q2, capacitors C1 and C2, a power inlet Vin, and a power outlet Vout, characterized in that: The control power switch input signal Mcu control connects resistance R3 and resistance R4, the resistance R3 connects triode Q1, the triode Q1 connects resistance R1 and resistance R2, the power import Vin and resistance R1 between connect capacitor C1 and capacitor C2, the power import Vin and triode Q1 between connect resistance R1 and resistance R2, the power import Vin after power output to MOS tube Q2, the MOS tube Q2's G pole connects power import Vin, the MOS tube Q2's S pole connects power export Vout, the MOS tube Q2 and triode Q1 between connect capacitor C1, capacitor C2, resistance R1 and resistance R2.

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