Schottky diode assembly with multi-stage grooves

Abstract

The utility model relates to a Schottky diode assembly with multistage grooves, which belongs to the field of Schottky diodes and comprises a groove piece arranged at the top of a semiconductor substrate, the groove piece comprises an epitaxial layer arranged at the top of the semiconductor substrate and a plurality of groups of deep grooves arranged at the top of the epitaxial layer, sub-grooves are downwards formed in the inner walls of the deep grooves. According to the Schottky diode assembly with the multistage grooves, the multistage step-shaped sub-grooves are formed in the inner wall of the deep groove, and the low-doping-concentration semiconductor buffer layer is arranged at the bottom of the deep groove, so that electric field concentration is effectively reduced, electric field distribution is more uniform, and the voltage resistance of a device is improved; the multi-stage trench structure reduces the electric field intensity of a metal and semiconductor contact interface, improves the Schottky barrier height and reduces the reverse leakage current, and in addition, the multi-stage trench design reduces the JFET effect, optimizes the current transmission path, reduces the on-resistance, and enhances the thermal stability and long-term working reliability of the device.

Description

TECHNICAL FIELD

[0001] The utility model relates to the technical field of schottky diode, concretely is a kind of schottky diode assembly of multistage groove. BACKGROUND

[0002] Schottky diode, also known as Schottky barrier diode, is an electronic device based on metal-semiconductor contact, with unique electrical characteristics, widely used in various electronic circuits, Schottky diode is often used for rectification and voltage stabilization in power management circuit, such as switching power supply, DC-DC converter, etc., which can effectively reduce power consumption and improve power efficiency.

[0003] When Schottky diode is designed with multi-stage groove and not uniformly distributed, it may affect the voltage withstand performance of Schottky diode, because in high-voltage Schottky diode, the distribution of electric field at the bottom and sidewall of deep groove is uneven, which easily leads to electric field concentration, thus limiting the further improvement of device voltage withstand performance, and the electric field may be excessively concentrated in some areas, resulting in breakdown phenomenon of device under high voltage, therefore, a kind of schottky diode assembly of multistage groove is proposed to solve the above problems. SUMMARY

[0004] In view of the shortcomings of the prior art, the utility model provides a kind of schottky diode assembly of multistage groove, with the advantages of multistage groove uniform distribution, solves the problem of uneven distribution of electric field at the bottom and sidewall of deep groove in high-voltage Schottky diode, which easily leads to electric field concentration, thus limiting the further improvement of device voltage withstand performance, and the electric field may be excessively concentrated in some areas, resulting in breakdown phenomenon of device under high voltage.

[0005] To achieve the above purpose, the utility model provides the following technical scheme: a kind of schottky diode assembly of multistage groove, including semiconductor substrate, and groove piece being arranged at the top of semiconductor substrate;

[0006] The groove piece includes an epitaxial layer arranged at the top of the semiconductor substrate, a plurality of groups of deep grooves opened at the top of the epitaxial layer, the inner wall of each group of deep grooves is provided with a sub-groove, and the inner bottom wall of each group of sub-grooves is provided with a buffer layer, and the top of the epitaxial layer and inside a plurality of groups of deep grooves are provided with an anode.

[0007] The groove piece further includes a cathode arranged below the semiconductor substrate, and an insulating layer fixedly arranged between the cathode and the side opposite to the semiconductor substrate.

[0008] Further, a plurality of groups of deep grooves are uniformly distributed along the length direction of the epitaxial layer, and the inner wall of each group of deep grooves is provided with an insulating film.

[0009] Further, the buffer layer is arranged as a low-doped semiconductor layer for reducing the concentration of electric field at the bottom of the trench.

[0010] Further, the insulating layer is arranged as an insulating semiconductor layer for reducing the contact resistance between the cathode and the semiconductor substrate.

[0011] Further, the cross-sectional shape of the sub-trench is arranged as a multi-stage ladder shape extending downward for precisely controlling the electric field distribution.

[0012] Compared with the prior art, the technical scheme has the following beneficial effects:

[0013] The multi-stage trench Schottky diode assembly effectively reduces the concentration of electric field by arranging a multi-stage ladder-shaped sub-trench in the inner wall of the deep trench and arranging a low-doped semiconductor buffer layer at the bottom of the sub-trench, so that the electric field distribution is more uniform, the voltage resistance performance of the device is improved, at the same time, the multi-stage trench structure reduces the electric field strength of the metal and semiconductor contact interface, improves the Schottky barrier height, reduces the reverse leakage current, in addition, the multi-stage trench design reduces the JFET effect, optimizes the current transmission path, reduces the on-resistance, enhances the thermal stability and long-term working reliability of the device. BRIEF DESCRIPTION OF DRAWINGS

[0014] Figure 1 It is a structural schematic diagram of the utility model;

[0015] Figure 2 It is a schematic diagram of the upper half of the trench part of the utility model;

[0016] Figure 3 It is a schematic diagram of the lower half of the trench part of the utility model;

[0017] Figure 4 It is a structural schematic diagram of the utility model Figure 2 It is an enlarged schematic diagram of structure A of the utility model.

[0018] In the figure: 1, semiconductor substrate; 2, trench part; 21, epitaxial layer; 22, deep trench; 23, sub-trench; 24, buffer layer; 25, anode; 26, cathode; 27, insulating layer; 28, insulating film. DETAILED DESCRIPTION

[0019] The technical scheme in the embodiments of the utility model will be clearly and completely described below with reference to the drawings in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, rather than all the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the utility model.

[0020] Embodiment One: Please refer to Figures 1-4 The multi-stage trench Schottky diode assembly in this embodiment comprises a semiconductor substrate 1 and a trench member 2 arranged on the top of the semiconductor substrate 1.

[0021] The trench member 2 comprises an epitaxial layer 21 arranged on the top of the semiconductor substrate 1, and a plurality of groups of deep trenches 22 formed on the top of the epitaxial layer 21. A suitable semiconductor substrate 1 is selected and an epitaxial layer 21 is grown on the top of the semiconductor substrate 1. Then, a photoetching and etching process is performed on the top of the epitaxial layer 21 to form a plurality of groups of deep trenches 22 uniformly distributed along the length direction. The inner walls of the plurality of groups of deep trenches 22 are all downwardly provided with a plurality of groups of sub-trenches 23. The inner walls of the deep trenches 22 are etched downwardly to form the sub-trenches 23 with a multi-stage ladder-shaped cross section. Then, a low-doped semiconductor buffer layer 24 is deposited on the inner bottom walls of the plurality of groups of sub-trenches 23 to reduce the concentration of electric field. The inner bottom walls of the plurality of groups of sub-trenches 23 are all provided with the buffer layer 24. The top of the epitaxial layer 21 and inside the plurality of groups of deep trenches 22 are provided with an anode 25.

[0022] The trench member 2 further comprises a cathode 26 arranged below the semiconductor substrate 1 and an insulating layer 27 fixedly arranged between the cathode 26 and the side opposite to the semiconductor substrate 1.

[0023] Embodiment Two: Please refer to Figures 1-4 On the basis of Embodiment One, the plurality of groups of deep trenches 22 in this embodiment are arranged uniformly along the length direction of the epitaxial layer 21. The inner walls of the plurality of groups of deep trenches 22 are all provided with an insulating film 28. The buffer layer 24 is a low-doped semiconductor layer for reducing the concentration of electric field at the bottom of the trench. The insulating layer 27 is an insulating semiconductor layer for reducing the contact resistance between the cathode 26 and the semiconductor substrate 1. The cross-sectional shape of the sub-trench 23 is a multi-stage ladder shape extending downwardly for precisely controlling the distribution of electric field.

[0024] It should be noted that the anode 25 made of metal material is arranged on the top of the epitaxial layer 21 and inside the deep trench 22. The cathode 26 is arranged below the semiconductor substrate 1. The insulating semiconductor layer is fixedly arranged as the insulating layer 27 between the cathode 26 and the side opposite to the semiconductor substrate 1 to reduce the contact resistance.

[0025] Embodiment Three: Please refer to Figures 1-4 On the basis of Embodiments One and Two, the trench member 2 in this embodiment is arranged on the top of the semiconductor substrate 1.

[0026] The trench member 2 comprises an epitaxial layer 21 arranged on the top of the semiconductor substrate 1, and a plurality of groups of deep trenches 22 formed on the top of the epitaxial layer 21. A suitable semiconductor substrate 1 is selected and a layer of epitaxial layer 21 is grown on the top of the semiconductor substrate 1. Then, a photoetching and etching process is performed on the top of the epitaxial layer 21 to form a plurality of groups of deep trenches 22 which are uniformly distributed along the length direction. The inner walls of the plurality of groups of deep trenches 22 are all downwardly provided with sub-trenches 23, and the inner walls of the deep trenches 22 are etched downwardly to form the sub-trenches 23 which have a multi-stage ladder-shaped cross section. The inner bottom walls of the plurality of groups of sub-trenches 23 are all provided with a buffer layer 24. The top of the epitaxial layer 21 and inside the plurality of groups of deep trenches 22 are provided with an anode 25.

[0027] The trench member 2 further comprises a cathode 26 arranged below the semiconductor substrate 1, and an insulating layer 27 fixedly arranged between the cathode 26 and the side opposite to the semiconductor substrate 1.

[0028] In the embodiment, the plurality of groups of deep trenches 22 are uniformly distributed along the length direction of the epitaxial layer 21. The inner walls of the plurality of groups of deep trenches 22 are all provided with an insulating film 28. The buffer layer 24 is a low-doped semiconductor layer which is used to reduce the concentration of electric field at the bottom of the trench. The low-doped semiconductor buffer layer 24 is deposited on the inner bottom walls of the sub-trenches 23 to reduce the concentration of electric field. The insulating layer 27 is an insulating semiconductor layer which is used to reduce the contact resistance between the cathode 26 and the semiconductor substrate 1. The cross-sectional shape of the sub-trench 23 is a multi-stage ladder shape which extends downwardly and is used to accurately control the distribution of electric field. The anode 25 is made of metal material and arranged on the top of the epitaxial layer 21 and inside the deep trenches 22. The cathode 26 is arranged below the semiconductor substrate 1, and the insulating semiconductor layer is fixedly arranged between the cathode 26 and the side opposite to the semiconductor substrate 1 as the insulating layer 27 to reduce the contact resistance.

[0029] It should be noted that the completed assembly is packaged and tested to ensure that it has good electrical performance and reliability.

[0030] The working principle of the above embodiment is as follows:

[0031] Suitable semiconductor substrate 1 is selected and a layer of epitaxial layer 21 is grown on top of it; then, photolithography and etching process is carried out on the top of epitaxial layer 21 to form several groups of deep grooves 22 which are uniformly distributed along the length direction, and sub-grooves 23 with multi-stage cross-section are etched on the inner wall of deep grooves 22, then, semiconductor buffer layer 24 with low doping concentration is deposited on the inner bottom wall of sub-grooves 23 to reduce the electric field concentration, anode 25 made of metal material is arranged on the top of epitaxial layer 21 and inside deep grooves 22, at the same time, cathode 26 is arranged below semiconductor substrate 1, and insulating semiconductor layer is fixedly arranged as insulating layer 27 between the side of cathode 26 opposite to semiconductor substrate 1 to reduce the contact resistance, finally, the completed assembly is packaged and tested to ensure that it has good electrical performance and reliability.

[0032] It should be noted that the relational terms herein such as first and second and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any such actual relationship or order between such entities or actions. Moreover, the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element preceded by "comprises... a" does not, without more constraints, foreclose the existence of additional identical elements in the process, method, article, or apparatus that comprises the recited element.

[0033] If the present patent discloses or involves parts or structural members which are fixedly connected with each other, unless otherwise stated, the fixed connection can be understood as: detachable fixed connection (for example, connected by bolts or screws), or as: non-detachable fixed connection (for example, riveting, welding), of course, the fixed connection with each other can also be replaced by an integral structure (for example, manufactured by integral forming process) (obviously, integral forming process cannot be used).

[0034] Although the embodiments of the present application have been shown and described, it should be understood by those skilled in the art that various changes, modifications, substitutions and variations can be made to the embodiments without departing from the principles and spirit of the present application.

Claims

1. A multi-stage trench Schottky diode assembly characterized by: The device comprises a semiconductor substrate (1) and a groove element (2) arranged on the top of the semiconductor substrate (1). The groove element (2) comprises an epitaxial layer (21) arranged on the top of the semiconductor substrate (1), a plurality of groups of deep grooves (22) arranged on the top of the epitaxial layer (21), a plurality of groups of sub-grooves (23) arranged on the inner walls of the deep grooves (22), a plurality of groups of buffer layers (24) arranged on the inner bottom walls of the sub-grooves (23), and an anode (25) arranged on the top of the epitaxial layer (21) and inside the deep grooves (22). The groove element (2) further comprises a cathode (26) arranged below the semiconductor substrate (1) and an insulating layer (27) arranged between the cathode (26) and the side of the semiconductor substrate (1) opposite to the groove element (2).

2. A multi-level trench Schottky diode assembly as defined in claim 1, wherein: A plurality of groups of the deep grooves (22) are arranged uniformly along the length direction of the epitaxial layer (21), and the inner walls of the deep grooves (22) are provided with an insulating film (28).

3. A multi-level trench Schottky diode assembly as defined in claim 2, wherein: The buffer layer (24) is a low-doped semiconductor layer, which is used to reduce the concentration of electric field at the bottom of the groove.

4. A multi-level trench Schottky diode assembly as defined in claim 3, wherein: The insulating layer (27) is an insulating semiconductor layer, which is used to reduce the contact resistance between the cathode (26) and the semiconductor substrate (1).

5. A multi-level trench Schottky diode assembly as defined in claim 4, wherein: The cross-sectional shape of the sub-groove (23) is a multi-stage ladder shape extending downward, which is used to accurately control the distribution of electric field.

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