Chip packaging body and packaging structure

Abstract

The utility model provides a chip packaging body and a packaging structure. The chip packaging body comprises an intermediate layer; the plurality of chips are inversely arranged on the interposer, the front surfaces of the chips face the interposer, and a gap is formed between every two adjacent chips; the bottom filling glue is filled between the chips and the intermediate layer and between two adjacent chips and covers partial side walls of the chips, and at least partial areas of the bottom filling glue covering the side walls of the chips are provided with grooves; the plastic package layer covers the interposer, the chip and the underfill and fills the trench. In the chip packaging body provided by the utility model, the bottom filling adhesive and the plastic packaging layer form the composite structure, the thickness of the bottom filling adhesive is reduced by the composite structure, and the stress difference between the chip and the composite structure is smaller than that between the chip and the bottom filling adhesive, so that the defect that the side wall of the chip and the bottom filling adhesive are layered is overcome.

Description

Technical Field

[0001] This utility model relates to the field of semiconductor packaging, and in particular to a chip package and packaging structure. Background Technology

[0002] FC-BGA (Flip Chip Ball Grid Array) packaging is an advanced packaging technology that mounts chips onto a substrate in a flip-chip manner and uses ball-shaped solder as electrical connection points. Specifically, a large-chip FC-BGA package structure comprises a chip package formed by encapsulating multiple chips, which are then flip-chip bonded to the substrate.

[0003] The chip package formation process mainly includes the following steps: multiple chips are mounted on a substrate using a flip chip process. The chips can be chiplets or system-on-chips (SoCs), etc. Underfill is applied to the bottom of the chips, and then an encapsulation process is used to mold and protect the substrate and the chips. Figure 1 This is a schematic diagram of an existing packaging structure. Please refer to [link / reference]. Figure 1 The packaging structure includes a chip package 110 flip-chip disposed on a substrate 100. The chip package 110 includes a plurality of chips 111, and bottom filler 112 fills the bottom of the chip 111 and between adjacent chips 111.

[0004] In reliability testing of this type of packaging structure, common defects include delamination of the sidewall of the chip 111 and the bottom filler 112, and cracks in the bottom filler 112, which seriously affect the reliability of the packaging structure.

[0005] Therefore, improving the reliability of the packaging structure has become one of the issues that need to be studied. Summary of the Invention

[0006] The technical problem to be solved by this utility model is to provide a chip package and packaging structure with high reliability.

[0007] To address the aforementioned problems, this utility model provides a chip package comprising: an interposer; multiple chips flip-chip disposed on the interposer, with the front faces of the chips facing the interposer and a gap between adjacent chips; an underfill adhesive filled between the chips and the interposer, and between adjacent chips, covering a portion of the sidewalls of the chips, and at least a portion of the underfill adhesive covering the sidewalls of the chips having grooves; and a molding compound covering the interposer, the chips, and the underfill adhesive, and filling the grooves completely.

[0008] In one specific embodiment, the groove has a rectangular cross-section in the longitudinal direction.

[0009] In one specific embodiment, the width of the top of the trench is greater than the width of the bottom of the trench.

[0010] In one specific embodiment, the groove has a V-shaped cross-section in the longitudinal direction.

[0011] In one embodiment, the trench is divided into at least two regions in the longitudinal direction, and the width of the regions decreases segment by segment.

[0012] In one specific embodiment, the bottom of the trench is lower than the front side of the chip.

[0013] In one embodiment, the underfill adhesive includes an inner region and an edge region, wherein the underfill adhesive fills between two adjacent chips in the inner region, and the underfill adhesive covers the side of the chip that is not adjacent to other chips in the edge region, wherein the underfill adhesive has the groove in at least a portion of the inner region and / or at least a portion of the edge region.

[0014] In one specific embodiment, the bottom filler adhesive covers the chip sidewall to a height of 25% to 75% of the chip thickness.

[0015] In one specific embodiment, the spacing between two adjacent chips is 40 to 200 micrometers.

[0016] A specific embodiment of this utility model also provides a packaging structure, including: a substrate; a chip package as described above, wherein the chip package is flip-chip disposed on the substrate; and a protective adhesive filled between the substrate and the chip package. This utility model provides a packaging structure.

[0017] In the chip package provided by this utility model, at least a portion of the underfill adhesive has trenches, and the trenches are filled with a molding compound, forming a composite structure composed of the underfill adhesive and the molding compound. This composite structure reduces the thickness of the underfill adhesive (compared to...). Figure 1 The thickness of the underfill adhesive shown is greater than that of the encapsulation layer, and the coefficient of thermal expansion of the encapsulation layer is less than that of the underfill adhesive. The Young's modulus of the encapsulation layer is greater than that of the underfill adhesive, resulting in a stress difference between the chip and the composite structure that is less than the stress difference between the chip and the underfill adhesive. Figure 1The stress difference in the package structure shown overcomes the defects of delamination between the chip's sidewalls and the bottom filler, as well as cracks in the bottom filler, greatly improving the reliability of the package structure. Furthermore, the chip package provided by this invention utilizes the original molding layer of the chip package to form the composite structure, requiring minimal changes to the manufacturing process and facilitating widespread application. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the specific embodiments of this utility model, the accompanying drawings used in the description of the specific embodiments will be briefly introduced below. Obviously, the drawings described below are only some specific embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without any creative effort.

[0019] Figure 1 This is a schematic diagram of an existing packaging structure;

[0020] Figure 2 This is a schematic diagram of the chip package provided in the first specific embodiment of the present invention;

[0021] Figure 3 This is a schematic diagram of the chip package provided in the second specific embodiment of the present invention;

[0022] Figure 4 This is a schematic diagram of the chip package provided in the third specific embodiment of the present invention;

[0023] Figure 5 This is a schematic diagram of the chip package provided in the fourth specific embodiment of the present invention;

[0024] Figure 6 This is a schematic diagram of the packaging structure provided in the fifth specific embodiment of this utility model. Detailed Implementation

[0025] The specific embodiments of the chip package and packaging structure provided by this utility model will be described in detail below with reference to the accompanying drawings.

[0026] Figure 2 This is a schematic diagram of the chip package provided in the first specific embodiment of this utility model. Please refer to [the diagram]. Figure 2The chip package includes: an interposer 200; a plurality of chips 210 flip-chip disposed on the interposer 200, with the front side of each chip 210 facing the interposer 200 and a gap between adjacent chips 210; an underfill adhesive 220 filling the space between the chips 210 and the interposer 200 and between adjacent chips 210, and covering a portion of the sidewalls of the chips 210, with at least a portion of the underfill adhesive 220 covering the sidewalls of the chips 210 having a groove 221; and a molding compound 230 covering the interposer 200, the chips 210, and the underfill adhesive 220, and filling the groove 221 completely.

[0027] In the chip package provided by this utility model, at least a portion of the underfill adhesive 220 covering the sidewall of the chip 210 has a trench 221, and the trench 221 is filled with a molding compound 230, forming a composite structure composed of the underfill adhesive 220 and the molding compound 230. This composite structure reduces the thickness of the underfill adhesive 220 (compared to...). Figure 1 The thickness of the underfill adhesive 112 shown is such that the coefficient of thermal expansion of the molding layer 230 is less than that of the underfill adhesive 220, and the Young's modulus of the molding layer 230 is greater than that of the underfill adhesive 220, resulting in a stress difference between the chip 210 and the composite structure that is less than that between the chip 210 and the underfill adhesive 220. Figure 1 The stress difference in the package structure shown overcomes the defects of delamination between the sidewall of chip 210 and bottom filler 220, and cracking of the bottom filler 220, greatly improving the reliability of the package structure. Furthermore, the chip package provided by this invention utilizes the original molding layer 230 of the chip package to form the composite structure, requiring minimal changes to the manufacturing process and facilitating widespread application.

[0028] The interposer 200 has relatively flat upper and lower surfaces, with an electrically conductive circuit layer between the upper and lower surfaces. The upper and lower surfaces also have externally connected solder pads, which are interconnected through the circuit layer. In some embodiments, the interposer 200 is a silicon interposer or an organic interposer.

[0029] The chip 210 is flip-chip mounted on the interposer layer 200. Specifically, the chip 210 includes a front side and a back side disposed opposite to each other, with the front side of the chip 210 facing the interposer layer 200, and the pads on the front side of the chip 210 being soldered to the pads of the interposer layer 200 via microbumps.

[0030] Multiple chips 210 are distributed on the surface of the interposer layer 200. These chips 210 may be chips with the same function and structure, or chips with different functions and structures. In some embodiments, the chips 210 may be chiplets or system-on-chips (SoCs). There is a gap between adjacent chips 210. In some embodiments, the gap between adjacent chips 210 is 40–200 micrometers.

[0031] The underfill 220 fills the space between the chip 210 and the interposer 200, as well as between two adjacent chips 210, and covers a portion of the sidewalls of the chip 210. The underfill 220 fills the space between the chip 210 and the interposer 200, and rises along the sidewalls of the chip 210, thereby covering the sidewalls of the chip 210 that are not adjacent to other chips 210 and filling the spaces between two adjacent chips 210, thus achieving reinforcement. In one specific embodiment, the height to which the underfill 220 covers the sidewalls of the chip 210 is 25% to 75% of the thickness of the chip 210, and the underfill 220 only covers a portion of the sidewalls of the chip 210. In one specific embodiment, the underfill 220 is a chemical adhesive, the main component of which is epoxy resin.

[0032] The molding compound 230 covers the interposer 200, the chip 210, and the underfill 220, serving to isolate these components from the external environment and thus provide protection. In one specific embodiment, the molding compound 230 covers the upper surface of the interposer 200, the side of the chip 210 not covered by the underfill 220, and the surface of the underfill 220. The back side of the chip 210 is not covered by the molding compound 230 to improve its heat dissipation performance. In one specific embodiment, the material of the molding layer 230 can be epoxy molding compound (EMC). The coefficient of thermal expansion of the molding layer 230 is less than that of the underfill adhesive 220. The Young's modulus of the molding layer 230 is greater than that of the underfill adhesive 220 and is close to that of silicon. Therefore, the composite structure formed by the underfill adhesive 220 and the molding layer 230 reduces the thickness of the underfill adhesive 220, and the stress difference between the chip 210 and the composite structure is less than the stress difference between the chip 210 and the underfill adhesive 220. This overcomes the defects of delamination between the sidewall of the chip 210 and the underfill adhesive 220 and cracking of the underfill adhesive 220, greatly improving the reliability of the packaging structure.

[0033] At least a portion of the underfill adhesive 220 covering the sidewalls of the chip 210 has a groove 221. The underfill adhesive 220 includes an inner region A1 and an edge region A2. In the inner region A1, the underfill adhesive 220 fills between two adjacent chips 210, and in the edge region A2, the underfill adhesive 220 covers the sidewalls of the chip 210 not adjacent to other chips 210. That is, the area where the underfill adhesive 220 fills between two adjacent chips 210 is defined as the inner region A1 of the underfill adhesive 220, and the area where the underfill adhesive 220 covers the sidewalls of the chip 210 not adjacent to other chips 210 is defined as the edge region A2 of the underfill adhesive 220. The underfill adhesive 220 has the groove 221 in at least a portion of the inner region A1 and / or at least a portion of the edge region A2. Since the stress varies in different regions of the chip package, the grooves 221 can be selectively set in different regions of the underfill adhesive 220 based on the stress simulation results of the chip package, so as to balance stress and the strength of the underfill adhesive 220. For example, the grooves 221 can be set in regions with high stress to balance the stress, while the grooves 221 can be omitted in regions with low stress to improve the strength of the underfill adhesive 220.

[0034] In some embodiments, in at least a portion of the internal region A1, the underfill adhesive 220 has the groove 221, and the molding compound 230 fills the groove 221. For example, as... Figure 2 As shown, in this specific embodiment, the underfill adhesive 220 in the inner region A1 has the groove 221, that is, the underfill adhesive 220 filling between two adjacent chips 210 has the groove 221, and the molding compound 230 is filled in the groove 221. In some specific embodiments, the groove 221 is provided in the underfill adhesive 220 between all two adjacent chips 210; in other specific embodiments, the groove 221 is provided only in the underfill adhesive 220 between two adjacent chips 210 with higher stress, and the groove 221 is not provided in the underfill adhesive 220 between two adjacent chips 210 with lower stress.

[0035] In some specific embodiments, in at least a portion of the edge region A2, the bottom filler 220 has the groove 221, and the molding compound 230 fills the groove 221. For example... Figure 3 The diagram shows a schematic of a chip package according to a second embodiment of the present invention. In this embodiment, the bottom filler 220 in the edge region A2 has a groove 221, that is, the bottom filler 220 covering the side of the chip 210 that is not adjacent to other chips 210 has the groove 221, and the molding compound 230 is filled in the groove 221. In some embodiments, the groove 221 is provided in the bottom filler 220 in all edge regions A2. In other embodiments, the groove 221 is provided only in the edge regions A2 with higher stress, and the groove 221 is not provided in the edge regions A2 with lower stress. In a third embodiment, the bottom filler 220 in the inner region A1 also has the groove 221, that is, the bottom filler 220 filling between two adjacent chips 210 also has the groove 221.

[0036] It is understood that, in some specific embodiments, the groove 221 may be provided in both the edge region A2 and the inner region A1, depending on the stress distribution.

[0037] In the first and second embodiments, the trench 221 has a rectangular cross-sectional shape in the longitudinal direction, such as... Figure 2 and Figure 3As shown. The top and bottom of the groove 221 have the same width, thus providing uniform stress buffering. In some other embodiments, the top of the groove 221 is wider than the bottom of the groove 221, so that the molding compound 230 can fully fill the groove 221, avoiding gaps between the molding compound 230 and the bottom of the groove 221, further improving reliability.

[0038] For example, such as Figure 4 As shown, it is a schematic diagram of the chip package provided in the third specific embodiment of the present invention. In the third specific embodiment, the trench 221 has a V-shaped cross-section in the longitudinal direction, and the width of the top of the trench 221 is greater than the width of the bottom of the trench 221.

[0039] For example, in some embodiments, the trench 221 is divided into at least two longitudinal regions, and the width of the regions decreases progressively, with the top of the trench 221 having a wider width than the bottom. Figure 5 The diagram shown is a schematic of a chip package provided in the fourth embodiment of this utility model. In the fourth embodiment, the trench 221 is divided into two regions in the longitudinal direction, namely a first region 221A and a second region 221B, wherein the width of the first region 221A is greater than the width of the second region 221B. In other embodiments, the trench 221 may also be divided into three or more regions in the longitudinal direction.

[0040] In one specific embodiment, the bottom of the trench 221 is lower than the front side of the chip 210, such as... Figure 2 As shown, this further ensures that the area where the underfill adhesive 220 overlaps with the side of the chip 210 is filled by the composite structure formed by the underfill adhesive 220 and the molding layer 230, thus ensuring stress buffering and further improving the reliability of the chip package. In some other embodiments, the bottom of the trench 221 may also be higher than the front side of the chip 210 to balance stress and the strength of the underfill adhesive 220.

[0041] The chip package provided by this invention reduces the stress between the chip 210 and the underfill 220 by forming a composite structure composed of the underfill adhesive 220 and the molding compound 230. This overcomes the defects of delamination between the sidewall of the chip 210 and the underfill adhesive 220, and cracks in the underfill adhesive 220, greatly improving the reliability of the package structure. Furthermore, the chip package provided by this invention utilizes the original molding compound 230 of the chip package to form the composite structure, requiring minimal changes to the manufacturing process and facilitating widespread application.

[0042] Another specific embodiment of this utility model also provides a packaging structure. Please refer to [link / reference]. Figure 6 This is a schematic diagram of the packaging structure provided in the fifth specific embodiment of the present invention. The packaging structure includes a substrate 600; a chip package 610, wherein the chip package 610 is flip-chip mounted on the substrate 600; and a protective adhesive 620, which fills the space between the substrate 600 and the chip package 610 to reinforce and protect the chip package 610. The structure of the chip package 610 is as described above. Please refer to [link / reference]. Figures 2-5 .

[0043] The substrate 600 has an electrically conductive circuit layer between its upper and lower surfaces, and solder pads on both surfaces are interconnected via the circuit layer. The chip package 610 is flip-chip mounted on the substrate 600. The solder pads on the lower surface of the interposer layer 200 of the chip package 610 are soldered to the solder pads of the substrate 600 via a conductive connection structure 630. The conductive connection structure 630 includes, but is not limited to, a controllable collapse chip connection bump (C4). A support member 640 may also be provided on the substrate 600, which serves as a support structure when the package structure is mounted to an electronic device.

[0044] In the chip package 610 of the specific embodiment of this utility model, at least a portion of the bottom filler 220 covering the sidewall of the chip 210 has a groove 221, and the groove 221 is filled with a molding compound 230, forming a composite structure composed of the bottom filler 220 and the molding compound 230. This composite structure reduces the thickness of the bottom filler 220 (compared to...). Figure 1 The thickness of the underfill adhesive 112 shown is such that the coefficient of thermal expansion of the molding layer 230 is less than that of the underfill adhesive 220, and the Young's modulus of the molding layer 230 is greater than that of the underfill adhesive 220, resulting in a stress difference between the chip 210 and the composite structure that is less than that between the chip 210 and the underfill adhesive 220. Figure 1 The stress difference in the package structure shown overcomes the defects of delamination between the sidewall of chip 210 and bottom filler 220, and cracking of the bottom filler 220, greatly improving the reliability of the package structure. Furthermore, the chip package provided by this invention utilizes the original molding layer 230 of the chip package to form the composite structure, requiring minimal changes to the manufacturing process and facilitating widespread application.

[0045] It should be noted that the terms "comprising" and "having," and their variations, used in this utility model document are intended to cover non-exclusive inclusion. The terms "first," "second," etc., are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence, unless explicitly indicated by the context; such use of data should be understood to be interchangeable where appropriate. The term "one or more" depends at least in part on the context and can be used to describe features, structures, or characteristics in a singular sense, or in a plural sense to describe combinations of features, structures, or characteristics. The term "based on" can be understood as not necessarily intended to express an exclusive set of factors, but can instead, also depends at least in part on the context, allow for the presence of other factors that are not necessarily explicitly described. Furthermore, in the absence of conflict, specific embodiments and features in specific embodiments of this utility model can be combined with each other. In addition, descriptions of well-known components and technologies have been omitted in the above description to avoid unnecessarily obscuring the concepts of this utility model. In the various specific embodiments described above, each specific embodiment focuses on its differences from other specific embodiments; similar / identical parts between different specific embodiments can be referred to mutually.

[0046] The above description is only a preferred embodiment of the present utility model. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present utility model, and these improvements and modifications should also be considered within the protection scope of the present utility model.

Claims

1. A chip package, characterized in that, include: Intermediate layer; Multiple chips are flip-chip mounted on the interposer layer, with the front side of each chip facing the interposer layer and a gap between adjacent chips. An underfill adhesive is filled between the chip and the interposer layer and between two adjacent chips, and covers a portion of the sidewalls of the chip, and at least a portion of the underfill adhesive covering the sidewalls of the chip has grooves; A molding compound covers the interposer, the chip, and the underfill adhesive, and fills the trench completely; The underfill adhesive includes an inner region and an edge region, wherein the area where the underfill adhesive fills between two adjacent chips is defined as the inner region of the underfill adhesive, and the area where the underfill adhesive covers the side of the chip that is not adjacent to other chips is defined as the edge region of the underfill adhesive, and the underfill adhesive has the groove in at least a portion of the inner region and at least a portion of the edge region.

2. The chip package according to claim 1, characterized in that, The groove has a rectangular cross-section in the longitudinal direction.

3. The chip package according to claim 1, characterized in that, The width of the top of the trench is greater than the width of the bottom of the trench.

4. The chip package according to claim 3, characterized in that, The groove has a V-shaped cross-section in the longitudinal direction.

5. The chip package according to claim 3, characterized in that, The trench is divided into at least two sections in the longitudinal direction, and the width of the sections decreases segment by segment.

6. The chip package according to claim 1, characterized in that, The bottom of the trench is lower than the front of the chip.

7. The chip package according to claim 1, characterized in that, In the inner region, the underfill adhesive is filled between two adjacent chips, and in the edge region, the underfill adhesive covers the sides of the chip that are not adjacent to other chips.

8. The chip package according to claim 1, characterized in that, The bottom filler adhesive covers the chip sidewall to a height of 25% to 75% of the chip thickness.

9. The chip package according to claim 1, characterized in that, The spacing between two adjacent chips is 40 to 200 micrometers.

10. A packaging structure, characterized in that, include: Base; The chip package as described in any one of claims 1 to 9, wherein the chip package is flip-chip disposed on the substrate; A protective adhesive is filled between the substrate and the chip package.

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