Multi-voltage output power adapter

Abstract

The utility model relates to the technical field of power supplies, and discloses a multi-voltage output power adapter, which aims to solve the technical problem that various devices need different power adapters for different input voltages, and comprises a transformation circuit and a synchronous rectification circuit, the synchronous rectification circuit is arranged at the second end of the second secondary side coil, the first end of the second secondary side coil is matched with the synchronous rectification circuit to output a direct-current power supply, the direct-current power supply is connected with a first output interface, and the first end of the second secondary side coil is connected with a first protocol step-down transformer and a second protocol step-down transformer. The first protocol step-down transformer is connected with a first MOS circuit controlled by the first protocol step-down transformer, the second protocol step-down transformer is connected with a second MOS circuit controlled by the second protocol step-down transformer and a double-MOS module, the first MOS circuit is connected with a second output interface, and the double-MOS module is respectively connected with a third output interface and a fourth output interface. And by providing a plurality of output interfaces with different voltages and powers, the requirements of different devices are met.

Description

Technical Field

[0001] This utility model relates to the field of power supply technology, and in particular to a multi-voltage output power adapter. Background Technology

[0002] A power adapter, also known as an external power supply, is a power conversion device used for small portable electronic devices and appliances. It typically consists of a casing, transformer, rectifier components, capacitors, a control IC, and a PCB, and its working principle is to convert AC voltage input into DC voltage output.

[0003] Power adapters are widely used in electronic devices such as laptops, security cameras, set-top boxes, routers, and mobile phones. Existing power adapters typically have only one output port, providing a single power supply voltage. However, different appliances require different DC voltages, necessitating the purchase of multiple power adapters to meet the varying input voltage needs of various devices. This not only increases costs but also leads to a waste of resources. Summary of the Invention

[0004] The purpose of this invention is to provide a multi-voltage output power adapter to solve the technical problem that various devices require different power adapters for different input voltages.

[0005] To achieve the above objectives, the specific technical solution of this utility model for a multi-voltage output power adapter is as follows:

[0006] A multi-voltage output power adapter includes an EMC circuit for input filtering and surge current protection of input AC power, a rectifier and filter circuit for rectifying and filtering AC power, a transformer circuit for stepping down DC voltage, and a synchronous rectifier circuit for rectifying the transformed power. The transformer circuit includes a transformer, which includes a primary winding, a first secondary winding, and a second secondary winding. The synchronous rectifier circuit is located at the second end of the second secondary winding. The first end of the second secondary winding, in conjunction with the synchronous rectifier circuit, outputs a DC power supply VOUT2. The DC power supply VOUT2 is connected to a first output interface for providing a high DC voltage. The first end of the second secondary winding is connected to a first protocol step-down transformer and a second protocol step-down transformer. The first protocol step-down transformer is connected to a first MOS circuit controlled by it. The second protocol step-down transformer is connected to a second MOS circuit controlled by it and a dual MOS module. The first MOS circuit is connected to a second output interface, and the dual MOS module is connected to a third output interface and a fourth output interface.

[0007] The synchronous rectification circuit is located on the second secondary coil, which can improve rectification efficiency, reduce energy loss, and improve the overall efficiency of the power adapter, especially when providing high voltage output, it has higher conversion efficiency.

[0008] The EMC circuit, with its input filtering and surge current protection, ensures the stability and safety of the input AC power, prevents damage to the power adapter from input voltage fluctuations and surge currents, and improves system reliability.

[0009] The system is equipped with a first protocol step-down converter and a second protocol step-down converter, and controls the first MOS circuit and the dual MOS module respectively. This allows for flexible voltage adjustment and output control according to different protocol requirements, adapting to the voltage requirements of various devices and enhancing the flexibility and adaptability of the adapter.

[0010] By providing a first high-voltage DC output interface and multiple low-voltage output interfaces, it can simultaneously provide power to devices that require both high-voltage and low-voltage power supply, meeting the needs of various application scenarios.

[0011] Furthermore, the first MOS circuit includes a first upper combination MOS transistor and a first lower combination MOS transistor. The drain of the first upper combination MOS transistor is connected to the first end of the second secondary coil. The source of the first upper combination MOS transistor and the drain of the first lower combination MOS transistor are connected and connected to the switching terminal of the first protocol buck converter. The source of the first lower combination MOS transistor is grounded. The gates of the first upper combination MOS transistor and the first lower combination MOS transistor are respectively connected to the two driving terminals of the first protocol buck converter.

[0012] By employing a combined MOSFET design, the combined use of the first upper combined MOSFET and the first lower combined MOSFET enables more efficient voltage conversion and control, reduces power consumption, and improves the overall efficiency of the power adapter.

[0013] The first upper combination MOSFET and the first lower combination MOSFET are controlled by the two drive terminals of the first protocol buck converter, which can achieve more precise voltage and current control, adapt to the needs of different loads, and improve the stability and accuracy of power output.

[0014] The fast switching characteristics of MOSFETs enable power adapters to respond quickly to load changes and provide a stable output voltage, making them suitable for electronic devices that are sensitive to voltage variations.

[0015] By configuring the protocol step-down converter and combined MOSFETs, the output voltage and current can be flexibly adjusted to adapt to different types and specifications of electronic devices, thus enhancing the versatility of the power adapter.

[0016] Furthermore, the switching terminals of the first protocol step-down converter are connected to the second output interface in sequence through inductor L9 and first current sensing resistor R23, and the two ends of the first current sensing resistor R23 are connected to the first protocol step-down converter.

[0017] The first current sensing resistor R23 is used to detect the current passing through it. The voltage signal across its two ends is fed back to the first protocol step-down transformer, which enables precise current detection and control, improves the stability and accuracy of the output current, and ensures the normal operation of the load equipment.

[0018] By detecting the current, the first protocol step-down converter can monitor the output current in real time and make timely adjustments or protection actions to avoid circuit damage caused by overcurrent and improve the safety and reliability of the system.

[0019] Inductor L9 acts as an energy storage and filter during current conversion, reducing current fluctuations, improving power conversion efficiency, and decreasing output voltage ripple, thus providing a more stable DC power supply. The introduction of inductor L9 effectively smooths voltage changes, and combined with the regulation function of the first-protocol buck converter, enables the power adapter to respond quickly to load changes, maintain stable output voltage, and improve the dynamic performance of the system.

[0020] This multi-voltage output power adapter achieves efficient current detection and protection by introducing inductor L9 and first current sensing resistor R23, optimizes power conversion efficiency and voltage response speed, and enhances circuit stability and reliability.

[0021] Furthermore, the second MOS circuit includes a second upper combination MOS transistor and a second lower combination MOS transistor. The drain of the second upper combination MOS transistor is connected to the first end of the second secondary coil. The source of the second upper combination MOS transistor and the drain of the second lower combination MOS transistor are connected and connected to the switching terminal of the second protocol buck converter. The source of the second lower combination MOS transistor is grounded. The gates of the second upper combination MOS transistor and the second lower combination MOS transistor are respectively connected to the two driving terminals of the second protocol buck converter.

[0022] Furthermore, the switching terminals of the second protocol buck converter are connected to the first drain of the dual MOS module in sequence through inductor L10 and second current sensing resistor R25. The switching terminals of the second protocol buck converter are connected to the second drain of the dual MOS module in sequence through inductor L10 and third current sensing resistor R26. The first source of the dual MOS module is connected to the third output interface. The second source of the dual MOS module is connected to the fourth output interface. The two gates of the dual MOS module are respectively connected to the second protocol buck converter. The two ends of the second current sensing resistor R25 and the two ends of the second current sensing resistor R26 are respectively connected to the second protocol buck converter.

[0023] Furthermore, the synchronous rectification circuit includes an NMOS transistor Q1 and a rectifier controller U4. The drain of the NMOS transistor Q1 is connected to the second end of the second secondary winding coil, the source of the NMOS transistor Q1 is grounded, and the gate of the NMOS transistor Q1 is connected to the control terminal of the rectifier controller U4. The power output terminal of the rectifier controller U4 is connected to the first end of the second secondary winding coil, the ground terminal of the rectifier controller U4 is grounded, the speed setting terminal of the rectifier controller U4 is grounded through a resistor R75, the monitoring terminal of the rectifier controller U4 is connected to the drain of the NMOS transistor Q1 through a resistor R74, and the power input terminal of the rectifier controller U4 is grounded through a capacitor C39.

[0024] By adopting synchronous rectification technology, the NMOS transistor Q1 replaces the traditional rectifier diode, which reduces conduction losses and improves rectification efficiency. It is especially suitable for high-current applications and can significantly improve the overall efficiency of the power adapter.

[0025] Because the NMOS transistor Q1 has a low on-resistance, it can reduce the heat generated when current flows compared to ordinary diode rectification, thereby reducing the heat dissipation requirements of the circuit and improving the reliability and service life of the system.

[0026] The rectifier controller U4 precisely controls the NMOS transistor Q1. Through the connection between the monitoring and control terminals, it achieves rapid response to load changes and provides a stable output voltage, making it suitable for electronic devices with high voltage stability requirements. The power output terminal of the rectifier controller U4 is connected to the first terminal of the first secondary winding, providing a stable power supply and ensuring the stable operation of the rectifier controller and NMOS transistor Q1, thereby improving the overall system performance.

[0027] This multi-voltage output power adapter improves rectification efficiency and system stability by introducing a synchronous rectification circuit, reduces heat generation, and enhances the performance and reliability of the power adapter.

[0028] The multi-voltage output power adapter provided by this utility model has the following advantages:

[0029] Different output interfaces are set at different voltage generation stages. The power supply with relatively high output voltage and current through the transformer and synchronous rectification circuit can be used to connect to high-power laptops. The first output interface can be of the DCJACK type. Through the first protocol step-down transformer and the first MOS circuit, a slightly lower power voltage and current can be output for fast charging. The second output interface can be a TYPE-C interface. Through the second protocol step-down transformer, the second MOS circuit and the dual MOS module, the dual MOS module can divide the power supply into two types, which can generate a medium-power second fast charging interface and a low-power charging interface. The third output interface can be a TYPE-C interface and the fourth output interface can be a USB-A interface.

[0030] By providing a first high-voltage DC output interface and multiple low-voltage output interfaces, it can simultaneously provide power to devices that require both high-voltage and low-voltage power supply as well as devices with different power requirements, meeting the needs of various application scenarios, adapting to the voltage requirements of various devices, and enhancing the flexibility and adaptability of the adapter. Attached Figure Description

[0031] Figure 1 Functional structure block diagram of the multi-voltage output power adapter provided by this utility model;

[0032] Figure 2 The schematic diagram of the EMC circuit and the rectifier filter circuit provided by this utility model;

[0033] Figure 3 The schematic diagram of the transformer circuit and synchronous rectifier circuit provided by this utility model;

[0034] Figure 4 A schematic diagram of the PWM control circuit in the transformer circuit section provided by this utility model;

[0035] Figure 5 A schematic diagram of the gate protection circuit in the transformer circuit section provided by this utility model;

[0036] Figure 6 The schematic diagram of the peripheral circuit of the first protocol step-down transformer and the first MOS circuit provided for this utility model;

[0037] Figure 7 The schematic diagram of the peripheral circuit of the second protocol step-down transformer and the second MOS circuit provided for this utility model.

[0038] U1, PWM controller; U2, first rectifier bridge; U3, second rectifier bridge; U4, synchronous rectifier controller; U5, three-terminal regulator; U6, first lower combination MOSFET; U7, second upper combination MOSFET; U8, second protocol buck converter; U10, second lower combination MOSFET; U12, first protocol buck converter; U13, first upper combination MOSFET; U14, dual MOSFET module. Detailed Implementation

[0039] To make the objectives, technical solutions, and advantages of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this utility model and are not intended to limit this utility model.

[0040] See Figure 1A multi-voltage output power adapter includes an EMC circuit for input filtering and surge current protection of input AC power, a rectifier and filter circuit for rectifying and filtering AC power, a transformer circuit for stepping down DC voltage, and a synchronous rectifier circuit for rectifying the transformed power. The transformer circuit includes a transformer T1, which includes a primary winding, a first secondary winding, and a second secondary winding. The synchronous rectifier circuit is located at the second end of the second secondary winding. The first end of the second secondary winding, in conjunction with the synchronous rectifier circuit, outputs a DC power supply VOUT2. The DC power supply VOUT2 is connected to a first output interface for providing DC high voltage. The first end of the second secondary winding is connected to a first protocol step-down transformer U12 and a second protocol step-down transformer U8. The first protocol step-down transformer U12 is connected to a first MOS circuit controlled by it. The second protocol step-down transformer U8 is connected to a second MOS circuit controlled by it and a dual MOS module U14. The first MOS circuit is connected to a second output interface, and the dual MOS module U14 is connected to a third output interface and a fourth output interface.

[0041] See Figure 2 The EMC circuit includes a fuse F1 connected in series in the live wire L and a varistor connected in series in the neutral wire N. A common-mode inductor L3 is connected after the fuse F1 and the varistor. The two coils of the common-mode inductor L3 are connected in series in the live wire L and the neutral wire N, respectively. An X capacitor C31 is connected in parallel after the common-mode inductor L3. A common-mode inductor L5 is connected after the common-mode inductor L3.

[0042] The mains power is filtered and surge current protected by fuse F1, common mode inductor L3, common mode inductor L5 and varistor.

[0043] When AC power is connected, the current first flows through fuse F1. The function of F1 is to blow the fuse in case of overcurrent, protecting the subsequent circuits.

[0044] A varistor has a high resistance when the power is first turned on, which can limit surge current; under normal operating conditions, the resistance decreases, reducing the impact on the circuit.

[0045] A common-mode inductor consists of two windings and can simultaneously filter common-mode noise on both the live and neutral wires, improving the circuit's anti-interference capability.

[0046] The current flows through capacitor C31, which is connected in parallel between the live wire and the neutral wire to provide differential mode filtering, mainly to filter out high-frequency noise.

[0047] The current then flows through common-mode inductor L5, which works in conjunction with common-mode inductor L3 to form a two-stage common-mode filter circuit, further suppressing common-mode noise.

[0048] Through multi-stage filtering and surge protection, the subsequent circuits are ensured to operate in a clean and stable power supply environment, thereby improving the reliability and anti-interference capability of the entire power supply system.

[0049] The rectifier and filter circuit includes a rectifier section and a filter section. The rectifier section includes two parallel rectifier bridges, U2 and U3, which convert AC power into DC power to provide the DC voltage required by subsequent circuits. The two rectifier bridges improve the load capacity.

[0050] The filtering section includes inductors L7 and L8, resistor R51, two capacitors C32 and C33 connected in parallel, and two capacitors C34 and C35 connected in parallel. The two ends of capacitors C32 and C33, and capacitors C34 and C35 are connected to the positive and negative terminals of the DC power supply, respectively. Inductors L7 and L8 are connected in series with the negative and positive terminals of the DC power supply, respectively.

[0051] One end of capacitor C33 is connected to the first end of inductor L8, and the other end of capacitor C33 is connected to the first end of inductor L7. One end of capacitor C34 is connected to the second end of inductor L8, and the other end of capacitor C34 is connected to the second end of inductor L7.

[0052] Inductors L7 and L8, together with capacitors C32, C33, C34, and C35, form a π-type filter circuit, which helps to reduce ripple and noise in the DC output, making the output current smoother and more stable.

[0053] By connecting multiple capacitors in parallel (C32, C33 and C34, C35), the total capacitance is increased, further improving the filtering effect. This configuration can effectively filter out high-frequency interference and low-frequency noise.

[0054] The presence of inductors L7 and L8 creates impedance to the DC current, thereby reducing current spikes and rapid changes during the filtering process and maintaining the continuity and stability of the current.

[0055] Parallel capacitors (C32, C33 and C34, C35) can share the voltage and current, reducing the burden on a single capacitor, thereby extending the lifespan of the capacitor and improving the reliability of the circuit.

[0056] Multiple inductors and capacitors form a π-type filter circuit, which effectively improves the stability of the power supply, reduces power output fluctuations, and ensures that subsequent circuits operate in a stable power supply environment.

[0057] With the aforementioned inductor and capacitor configuration, this filter circuit effectively smooths the output current, improves filtering efficiency, reduces current spikes and rapid changes, shares the capacitor load, and increases the circuit's stability and reliability. This design results in a more stable and cleaner DC power output, making it suitable for electronic devices with high power quality requirements.

[0058] See Figure 5 The transformer circuit is equipped with an NMOS transistor Q3. The second end of the primary coil is connected to the drain of the NMOS transistor Q3. The source of the NMOS transistor Q3 is grounded through a current sensing resistor. A resistor R18 and a Zener diode Z4 are respectively placed between the gate and the source of the NMOS transistor Q3. The anode of the Zener diode Z4 is connected to the source of the NMOS transistor Q3, and the cathode of the Zener diode Z4 is connected to the gate of the NMOS transistor Q3.

[0059] The gate of the NMOS transistor is connected to the drive terminal DRV of the PWM controller U1 through resistors R19 and R20 in sequence. A diode D10 is also provided. The cathode of the diode D10 is connected to the drive terminal DRV of the PWM controller U1, and the anode of the diode D10 is connected to the gate of the NMOS transistor Q3 through resistor R21 and capacitor C10 in sequence.

[0060] The circuit consisting of diode D10, resistor R21, capacitor C10, resistor R20, resistor R19, Zener diode Z4, and resistor R18 mainly protects the gate of NMOS transistor Q3, regulates the drive signal, and limits the voltage, forming a gate protection circuit to ensure the stable operation of NMOS transistor Q3.

[0061] Regarding gate drive signal conditioning:

[0062] The RC network consisting of diode D10, resistor R21, and capacitor C10 is used to adjust the rise and fall times of the gate drive signal of NMOS transistor Q3, ensuring smooth switching of NMOS transistor Q3 and avoiding noise and oscillations generated during high-frequency switching.

[0063] D10 turns on when the PWM control signal changes from low to high, quickly charging C10. This causes the gate voltage to rise rapidly through R21, enabling Q3 to turn on quickly.

[0064] When the PWM control signal changes from high to low, D10 blocks, and the RC time constants of R21 and C10 control the rate at which the gate voltage drops, preventing oscillations or spikes during the turn-off process of Q3.

[0065] Regarding gate voltage protection and current limiting:

[0066] The anode of Zener diode Z4 is grounded, and its cathode is connected to the gate of NMOS transistor Q3. This connection method clamps the gate voltage, preventing it from exceeding its rated value. Zener diode Z4 protects the gate from excessive voltage, ensuring the NMOS transistor operates within a safe voltage range and preventing breakdown damage.

[0067] When the gate voltage exceeds the regulated value, Zener diode Z4 turns on, limiting the gate voltage to a safe range.

[0068] Resistor R18 serves as a current limiter to prevent large currents from directly impacting the gate, and works in conjunction with Zener diode Z4 for clamping protection.

[0069] The gate protection circuit achieves protection and optimization of the gate drive of NMOS transistor Q3 through reasonable resistor voltage division, current limiting and voltage regulation protection, as well as signal conditioning of RC network, ensuring its stable and efficient operation in high-frequency switching power supply control.

[0070] See Figure 4 The PWM controller U1 has the following pins: Pin 1 is the fault feedback pin, connected to the anode of Zener diode Z3, and the cathode of Zener diode Z3 is connected to power supply VCC2. Pin 1 is also grounded through a capacitor. Pin 2 is the maximum operating frequency setting pin, grounded through resistor R9. Pin 3 is the feedback pin, grounded through capacitor C5 and phototransistor Q8. Pin 5 is the current sampling pin, grounded through capacitor C3. Pin 6 is the ground pin. Pin 7 is the drive pin, outputting the PWM wave. Pin 8 is the power supply pin, connected to power supply VCC2 and grounded through capacitor C7. Pin 10 is the high-voltage pin. Pin 4 is the zero-crossing detection and over-power protection pin, grounded through capacitor C4 and resistor R8.

[0071] To power the PWM controller U1, an auxiliary power supply circuit is provided through the first secondary winding of transformer T1, including an NPN transistor Q9 and a Zener diode Z2. The emitter of transistor Q9 is used to output VCC2 power. The base of transistor Q9 is connected to the cathode of Zener diode Z2, and the anode of Zener diode Z2 is grounded. A resistor R10 is connected between the collector and emitter of transistor Q9. A capacitor C8 is connected between the collector of transistor Q9 and the anode of Zener diode Z2, and a capacitor C9 is connected between the emitter of transistor Q9 and the anode of Zener diode Z2. The first terminal of the first secondary winding of transformer T1 is connected to the collector of transistor Q9 through a resistor R11 and a diode D3. The anode of diode D3 is connected to resistor R11, and the cathode of diode D3 is connected to the collector of transistor Q9. The second terminal of the first secondary winding of transformer T1 is grounded.

[0072] The first end of the first secondary winding of transformer T1 is connected to the fourth terminal of PWM controller U1 through resistors R13 and R12 in sequence. A diode D4 is connected in parallel across resistor R12. The cathode of diode D4 is connected to the fourth terminal of PWM controller U1, and the anode of diode D4 is connected to the junction of resistors R13 and R12.

[0073] The transistor Q9, Zener diode Z2, capacitor C8, resistor R10, and capacitor C9 form a voltage regulator circuit to provide a stable VCC2 power supply. Transistor Q9 is primarily used for voltage regulation, serving as the control element for the output voltage. Zener diode Z2 provides a reference voltage, used to set the base voltage of transistor Q9, thereby controlling the output voltage. Capacitors C8 and C9 are used for filtering, smoothing the regulated output and reducing power supply noise. Resistor R10 provides a bias voltage.

[0074] The circuit consisting of diode D3 and resistor R11 is used to draw power from the secondary winding of the transformer to provide voltage to the collector of Q9; diode D3 converts the alternating current of the secondary winding of the transformer into direct current; resistor R11 ensures that the circuit and components are not affected by excessive current.

[0075] The circuit consisting of resistors R13 and R12, and diode D4 is connected to terminal 4 of the PWM controller U1 to implement zero-crossing detection and over-power protection. Through resistors R13 and R12 and diode D4, zero-crossing detection of the transformer secondary coil voltage is achieved, ensuring that the next switching cycle is driven when the secondary voltage drops to zero, and over-power protection is implemented to prevent power supply overload damage.

[0076] The circuit consisting of Zener diode Z3 and phototransistor Q8 is connected to terminal 1 of the PWM controller U1 for fault detection and protection. Zener diode Z3 sets the fault detection voltage threshold; phototransistor Q8 is used for feedback control, with isolated feedback achieved through an optocoupler. Through Zener diode Z3 and phototransistor Q8, fault conditions in the system are monitored. When the voltage exceeds the set value, the protection mechanism is triggered to prevent circuit damage.

[0077] See Figure 3 In the second secondary winding of transformer T1, one end of the second secondary winding serves as the positive terminal of DC power supply VOUT2, and the other end of the second secondary winding is equipped with a synchronous rectification circuit, including NMOS transistor Q1 and rectifier controller U4. The drain of NMOS transistor Q1 is connected to the other end of the second secondary winding, the source of NMOS transistor Q1 serves as the negative terminal of DC power supply VOUT2, and the gate of NMOS transistor Q1 is connected to the control terminal of rectifier controller U4.

[0078] The first terminal of the rectifier controller U4 is the high-voltage start terminal, which is connected to one end of the second secondary coil; the second terminal of the rectifier controller U4 is the ground terminal; the third terminal of the rectifier controller U4 is the speed setting terminal, which is grounded through resistor R75; the fourth terminal of the rectifier controller U4 is grounded through capacitor C39; the fifth terminal of the rectifier controller U4 is the control terminal, which controls the switching state of the external NMOS transistor Q1; the sixth terminal of the rectifier controller U4 is connected to the drain of the NMOS transistor Q1 through resistor R74.

[0079] Compared to traditional diode rectification, synchronous rectification uses an NMOS transistor Q1 as the rectifier element. The on-resistance of an NMOS transistor is much lower than the forward voltage drop of a diode, thus significantly reducing conduction losses and improving rectification efficiency. Synchronous rectification reduces power loss and improves the overall system efficiency. Due to the lower on-resistance of the NMOS transistor, conduction losses are reduced, resulting in less heat generation. This not only improves power conversion efficiency but also enhances heat dissipation, reducing the need for heat sinks and fans. By reducing heat loss, the temperature rise of the circuit is reduced, improving the lifespan and reliability of electronic components. The rectifier controller U4 optimizes the rectification process by precisely controlling the switching state of the NMOS transistor Q1, maintaining efficient and stable rectification performance under different load conditions. The rectifier controller can quickly respond to voltage and current changes, improving the system's dynamic response capability and ensuring the output stability and quality of the power supply.

[0080] A feedback circuit for feeding back to the PWM controller U1 is also provided, including an LED D18 and a three-terminal regulator U5. The cathode of the LED D18 is connected to the cathode of the three-terminal regulator U5, and the anode of the LED D18 is connected to one end of the second secondary coil through a resistor R7. The anode of the three-terminal regulator U5 is grounded. A series voltage divider circuit consisting of resistors R5 and R6 is provided. One end of resistor R5 is connected to one end of the second secondary coil, and the other end of resistor R5 is connected to one end of resistor R6. The other end of resistor R6 is grounded. The reference terminal of the three-terminal regulator U5 is connected to the voltage divider node (common node) of resistors R5 and R6. The LED D18 and the phototransistor Q8 form an optocoupler, used to feed back the voltage state of the second secondary coil to the PWM controller U1. Composed of the optocoupler and the three-terminal regulator U5, it is responsible for detecting the output voltage and feeding it back to the PWM controller to adjust the switching frequency and duty cycle.

[0081] An optocoupler consisting of an LED D18 and a phototransistor Q8 feeds back changes in the output voltage to the PWM controller U1 in real time. The PWM controller adjusts the switching frequency and duty cycle based on the feedback signal to ensure that the output voltage remains stable at the set value.

[0082] The three-terminal regulator U5 ensures the stability of the feedback signal, reduces the impact of voltage fluctuations on the system, and improves the stability of the entire power supply system.

[0083] The feedback circuit can dynamically monitor the output voltage and adjust the working state of the PWM controller in a timely manner, thereby improving the power conversion efficiency. Especially when the load changes, it can quickly respond and adjust the output to maintain high-efficiency operation.

[0084] The feedback circuit can monitor and provide feedback on the output voltage. When an overvoltage condition is detected, the output voltage is reduced by adjusting the PWM controller U1 to avoid damaging the load equipment and improve system reliability.

[0085] Electrical isolation is achieved through optocouplers, reducing noise interference, improving the purity of feedback signals, and ensuring that the PWM controller receives accurate feedback signals, thereby achieving stable output.

[0086] See Figure 6 The first MOS circuit includes a first upper combination MOS transistor U13 and a first lower combination MOS transistor U6. The drain of the first upper combination MOS transistor U13 is connected to the first end of the second secondary coil. The source of the first upper combination MOS transistor U13 and the drain of the first lower combination MOS transistor U6 are connected and connected to the switching terminal of the first protocol buck converter. The source of the first lower combination MOS transistor U6 is grounded. The gates of the first upper combination MOS transistor U13 and the first lower combination MOS transistor U6 are respectively connected to the two driving terminals of the first protocol buck converter.

[0087] The switching terminals of the first protocol step-down transformer U12 are connected to the second output interface in sequence through inductor L9 and first current sensing resistor R23. The two ends of the first current sensing resistor R23 are connected to the first protocol step-down transformer U12.

[0088] See Figure 7 The second MOS circuit includes a second upper combination MOS transistor U7 and a second lower combination MOS transistor U10. The drain of the second upper combination MOS transistor U7 is connected to the first end of the second secondary coil. The source of the second upper combination MOS transistor U7 and the drain of the second lower combination MOS transistor U10 are connected and connected to the switching terminal of the second protocol buck converter U8. The source of the second lower combination MOS transistor U10 is grounded. The gates of the second upper combination MOS transistor U7 and the second lower combination MOS transistor U10 are respectively connected to the two driving terminals of the second protocol buck converter U8.

[0089] The switching terminals of the second protocol buck converter U8 are connected to the first drain of the dual MOS module U14 in sequence through inductor L10 and second current sensing resistor R25. The switching terminals of the second protocol buck converter U8 are connected to the second drain of the dual MOS module U14 in sequence through inductor L10 and third current sensing resistor R26. The first source of the dual MOS module U14 is connected to the third output interface. The second source of the dual MOS module U14 is connected to the fourth output interface. The two gates of the dual MOS module U14 are respectively connected to the second protocol buck converter U8. The two ends of the second current sensing resistor R25 and the two ends of the second current sensing resistor R26 are respectively connected to the second protocol buck converter U8.

[0090] In summary, the multi-voltage output power adapter provided by this utility model, by providing a first high-voltage DC output interface and multiple low-voltage output interfaces, can simultaneously provide power to devices that require high-voltage and low-voltage power supply as well as devices with different power requirements, meet the needs of various application scenarios, adapt to the voltage requirements of various different devices, and enhance the flexibility and adaptability of the adapter.

[0091] The above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.

Claims

1. A multi-voltage output power adapter, comprising input filtering for input AC power and EMC circuits for surge current protection, rectifier and filter circuits for rectifying and filtering AC power, and so on. A transformer circuit for stepping down DC voltage, characterized in that, It also includes a method for transforming the power supply. The synchronous rectifier circuit performs rectification, and the transformer circuit includes a transformer (T1). The transformer (T1) includes a primary winding. The coil, the first secondary coil, and the second secondary coil, with the synchronous rectification circuit located on the second secondary coil. The second terminal, the first terminal of the second secondary coil, outputs a DC power supply VOUT2 in conjunction with the synchronous rectifier circuit. The DC power supply VOUT2 is connected to a first output interface for providing a high DC voltage, and the second secondary coil... The first end is connected to a first protocol step-down transformer (U12) and a second protocol step-down transformer (U8), respectively. The transformer (U12) is connected to a first MOS circuit controlled by it, and the second protocol buck converter (U8) is connected to a circuit controlled by it. The second MOS circuit and dual MOS module (U14) are controlled by the first MOS circuit, which is connected to the second output interface. The dual MOS module (U14) is connected to the third output interface and the fourth output interface respectively.

2. A multi-voltage output power adapter according to claim 1, characterized in that, Place The first MOS circuit includes a first upper combination MOS transistor (U13) and a first lower combination MOS transistor (U6). The drain of the upper combination MOSFET (U13) is connected to the first terminal of the second secondary coil. The first upper combination MOSFET... The source of transistor (U13) and the drain of the first lower combination MOSFET (U6) are connected and connected to the first protocol step-down transformer. With the switching terminals connected, the source of the first lower combination MOSFET (U6) is grounded, and the first upper combination MOSFET (U13) is connected... The gates of the first combined MOS transistor (U6) and the first lower combination MOS transistor are respectively connected to the two drive terminals of the first protocol buck converter.

3. A multi-voltage output power adapter according to claim 2, characterized in that, No. The switching terminals of a step-down transformer (U12) are connected in sequence to the second transformer via inductor L9 and the first current sensing resistor R23. The output interface has the first current sensing resistor R23 connected to the first protocol step-down transformer (U12).

4. A multi-voltage output power adapter according to claim 1, characterized in that, Place The second MOS circuit includes a second upper combination MOS transistor (U7) and a second lower combination MOS transistor (U10). The drain of the upper combination MOSFET (U7) is connected to the first terminal of the second secondary coil, and the second upper combination MOSFET... The source of (U7) is connected to the drain of the second combined MOSFET (U10) and then to the second protocol step-down transformer (U8). The switching terminals are connected, the source of the second lower combination MOSFET (U10) is grounded, and the second upper combination MOSFET (U7) is connected. The gates of the second combined MOSFET (U10) are respectively connected to the two drive terminals of the second protocol buck converter (U8). connect.

5. A multi-voltage output power adapter according to claim 4, characterized in that, The switching terminals of the second protocol step-down transformer (U8) are connected to the dual MOSFETs in sequence through inductor L10 and the second current sensing resistor R25. The first drain of module (U14) and the switching terminal of the second protocol step-down transformer (U8) are connected in sequence through inductor L10 and the second... The three current-sensing resistors R26 are connected to the second drain of the dual MOS module (U14), and the first drain of the dual MOS module (U14) is connected to the second drain of the dual MOS module (U14). The source is connected to the third output interface, and the second source of the dual MOS module (U14) is connected to the fourth output interface. The two gates of the dual MOS module (U14) are connected to the second protocol buck converter (U8) respectively, and the second current detector... The two ends of resistor R25 and the two ends of the second current sensing resistor R26 are respectively connected to the second protocol step-down transformer (U8).

6. A multi-voltage output power adapter according to claim 3 or 5, characterized in that, The synchronous rectification circuit includes an NMOS transistor Q1 and a rectifier controller U4. The drain of the NMOS transistor Q1 is connected to the second... The second end of the side coil is connected, the source of NMOS transistor Q1 is grounded, and the gate of NMOS transistor Q1 is connected to the rectification control. The control terminal of rectifier U4 is connected; the power output terminal of rectifier controller U4 is connected to the first terminal of the second secondary coil. The ground terminal of rectifier controller U4 is connected to ground, and the speed setting terminal of rectifier controller U4 is connected through resistor R75. Grounded, the monitoring terminal of the rectifier controller U4 is connected to the drain of the NMOS transistor Q1 through resistor R74, for rectification. The power input terminal of controller U4 is grounded through capacitor C39.

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