Integrated component and electronic equipment

Abstract

The utility model discloses an integrated component and electronic equipment. The integrated assembly includes: a substrate; the patterned conductive layer is located on one side of the substrate and at least comprises a first conductive pattern and a source conductive pattern; the power device is located on the side, opposite to the substrate, of the first conductive pattern, the power device comprises a drain electrode, a source electrode and a grid electrode, the drain electrode of the power device faces the first conductive pattern, and the source electrode and the grid electrode of the power device are opposite to the first conductive pattern; and the connecting sheet is connected with the source electrode of the power device and the source electrode conductive pattern. According to the embodiment of the invention, the stray inductance can be reduced, and the reliability of the power module is improved.

Description

Technical Field

[0001] This application relates to the field of power device integration technology, specifically to an integrated component and electronic device. Background Technology

[0002] Circuits employing power semiconductor devices can control current and voltage through frequency conversion, voltage conversion, and current conversion, thereby achieving the conversion and control of electrical energy. Therefore, power semiconductor devices are widely used in various power electronic systems, such as inverter systems, power conversion systems, and frequency conversion and voltage conversion systems. With advancements in the automotive, industrial, and power grid sectors, higher demands are being placed on power modules that incorporate multiple power semiconductor devices. Power modules are gradually evolving towards higher switching frequencies, lower stray inductance, higher integration, higher power density, and higher reliability.

[0003] The switching of power semiconductor devices causes rapidly changing voltages and currents in the power electronic system path, leading to problems such as voltage / current waveform oscillations and voltage overshoot spikes. This not only increases losses and reduces system efficiency but also increases the risk of failure. Lower stray inductance can mitigate this problem and improve the overall performance of the power module. Furthermore, stray inductance is also an important performance indicator for power modules, including stray parameters in the power and drive circuits, and is a key factor affecting their switching characteristics.

[0004] Therefore, how to reduce stray inductance is a research question for those skilled in the art. Utility Model Content

[0005] This application provides an integrated component and electronic device that can reduce stray inductance and improve the reliability of power modules.

[0006] In a first aspect, embodiments of this application provide an integrated component, the integrated component comprising: a substrate; a patterned conductive layer located on one side of the substrate, including at least a first conductive pattern and a source conductive pattern; a power device located on the side of the first conductive pattern facing away from the substrate, the power device including a drain, a source, and a gate, the drain of the power device facing the first conductive pattern, and the source and gate of the power device facing away from the first conductive pattern; and a connecting piece connecting the source of the power device and the source conductive pattern.

[0007] According to an embodiment of the first aspect of this application, the first conductive pattern includes a first conductive pattern A and a first conductive pattern B; the source conductive pattern includes a source conductive pattern A and a source conductive pattern B; the power device includes a power device A and a power device B, wherein the power device A is located on the side of the first conductive pattern A facing away from the substrate, and the power device B is located on the side of the first conductive pattern B facing away from the substrate; the connecting piece includes a connecting piece A and a connecting piece B, wherein the connecting piece A connects the source of the power device A and the source conductive pattern A, and the connecting piece A connects the first conductive pattern B, and the connecting piece B connects the source of the power device B and the source conductive pattern B.

[0008] According to any of the foregoing embodiments of the first aspect of this application, the patterned conductive layer further includes a gate resistor conductive pattern; the integrated component further includes a gate resistor, which is located on the side of the gate resistor conductive pattern facing away from the substrate, and the gate resistor is connected to the gate of the power device.

[0009] According to any of the foregoing embodiments of the first aspect of this application, power device A and power device B are arranged in a first direction, and power device A and power device B are spaced apart in the first direction.

[0010] According to any of the foregoing embodiments of the first aspect of this application, a plurality of power devices A are divided into a first power device group and a second power device group, each including at least one power device A, and arranged in a second direction intersecting the first direction; the patterned conductive layer further includes a gate conductive pattern A, which is located between the first power device group and the second power device group A in the second direction; and / or, a plurality of power devices B are divided into a first power device group B and a second power device group B, each including at least one power device B, and arranged in a second direction; the patterned conductive layer further includes a gate conductive pattern B, which is located between the first power device group B and the second power device group B in the second direction.

[0011] According to any of the foregoing embodiments of the first aspect of this application, a plurality of power devices A are spaced apart in a first direction, and a plurality of power devices A are spaced apart in a second direction, the second direction intersecting the first direction; and / or, a plurality of power devices B are spaced apart in a first direction, and a plurality of power devices B are spaced apart in a second direction.

[0012] According to any of the foregoing embodiments of the first aspect of this application, the patterned conductive layer further includes a gate resistor conductive pattern; the integrated component further includes a gate resistor, the gate resistor being located on the side of the gate resistor conductive pattern facing away from the substrate, the gate resistor being connected to the gate of a power device, and in the first direction, the gate resistor being located between two power devices; and / or, the patterned conductive layer further includes a gate resistor conductive pattern; the integrated component further includes a gate resistor, the gate resistor being located on the side of the gate resistor conductive pattern facing away from the substrate, the gate resistor being connected to the gate of a power device, and in the first direction, the gate resistor being located between two power devices.

[0013] According to any of the foregoing embodiments of the first aspect of this application, the patterned conductive layer further includes a second conductive pattern; the integrated component further includes a buffer circuit located on the side of the second conductive pattern facing away from the substrate, and the buffer circuit is connected to the power device.

[0014] According to any of the foregoing embodiments of the first aspect of this application, the patterned conductive layer further includes a third conductive pattern, and a temperature test terminal is provided on the side of the third conductive pattern facing away from the substrate.

[0015] Secondly, embodiments of this application provide an electronic device that includes integrated components as described in any of the first aspects.

[0016] This application provides an integrated component and electronic device. The technical concept of this application includes: setting a first conductive pattern and a source conductive pattern on the same substrate; placing a power device on the first conductive pattern; and connecting the source of the power device and the source conductive pattern using connecting tabs. Compared to connecting using bonding wires, using connecting tabs to achieve internal electrical interconnection of the module can achieve high current carrying capacity and high thermal conductivity, thus exhibiting characteristics such as low stray inductance, high heat dissipation capacity, and high current carrying capacity, which is beneficial for achieving higher performance and reliability.

[0017] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0018] Other features, objects, and advantages of this application will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings, in which the same or similar reference numerals denote the same or similar features, and the drawings are not drawn to scale.

[0019] Figure 1 This illustration shows a structural schematic diagram of a power device in an integrated component provided in an embodiment of this application;

[0020] Figure 2 This illustration shows an equivalent circuit structure diagram of a power device in an integrated component provided in an embodiment of this application;

[0021] Figure 3 This illustration shows a circuit diagram of power devices and buffer circuits in an integrated component provided in an embodiment of this application.

[0022] Figure 4 This illustration shows a structural diagram of a substrate and a patterned conductive layer in an integrated component provided in an embodiment of this application.

[0023] Figure 5 This illustration shows a schematic diagram of the distribution of components in an integrated component provided in an embodiment of this application;

[0024] Figure 6 This illustration shows an electrical connection diagram of components in an integrated assembly provided in an embodiment of this application;

[0025] Figure 7 This illustration shows another electrical connection diagram of the components in the integrated assembly provided in the embodiments of this application;

[0026] Figure 8 This illustration shows another electrical connection diagram of the components in the integrated assembly provided in the embodiments of this application.

[0027] Explanation of reference numerals in the attached figures:

[0028] 1. Substrate; 2. First conductive pattern A; 3. First conductive pattern B;

[0029] 4. Second conductive pattern; 5. Gate resistance conductive pattern; 6. Source conductive pattern;

[0030] 7. Gate B conductive pattern; 8. Third conductive pattern; 9. Second conductive pattern (Type A);

[0031] 10. Source conduction pattern (A); 11. Gate resistance conduction pattern (A); 12. Gate conduction pattern (A);

[0032] 13. Gate terminal conductive pattern (A); 14. Power device (B); 15. Power device (A);

[0033] 16. Buffer capacitor (Type A); 17. Buffer resistor (Type A); 18. Gate resistor (Type A);

[0034] 19. Gate resistor (B); 20. Buffer resistor (B); 21. Buffer capacitor (B);

[0035] 22. Connecting piece; 221. Connecting piece A; 222. Connecting piece B;

[0036] 23. Source terminal B; 24. Gate terminal B; 25. Temperature test terminal;

[0037] 26. Source terminal (A); 27. Gate terminal (A); 28. Drain terminal (A);

[0038] 29. First connecting line; 30. Second connecting line; 31. Third connecting line;

[0039] 32. Bond wire. Detailed Implementation

[0040] The features and exemplary embodiments of various aspects of this application will now be described in detail. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only configured to explain this application and are not configured to limit this application. For those skilled in the art, this application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this application by illustrating examples of this application.

[0041] It should be noted that in this paper, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations.

[0042] It should be noted that when a component is described as "connected" or "electrically connected" to another component, it can be directly connected to the other component, or there may be one or more intermediate components in between.

[0043] Various modifications and variations can be made to this application without departing from its spirit or scope, which will be apparent to those skilled in the art. Therefore, this application is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the embodiments provided in this application can be combined with each other without contradiction.

[0044] This application provides an integrated component and electronic device. The technical concept of this application includes: setting a first conductive pattern and a source conductive pattern on the same substrate; placing a power device on the first conductive pattern; and connecting the source of the power device and the source conductive pattern using connecting tabs. Compared to connecting using bonding wires, using connecting tabs to achieve internal electrical interconnection of the module can achieve high current carrying capacity and high thermal conductivity, thus exhibiting characteristics such as low stray inductance, high heat dissipation capacity, and high current carrying capacity, which is beneficial for achieving higher performance and reliability.

[0045] The embodiments of this application will be described below with reference to the accompanying drawings.

[0046] To facilitate understanding, the power devices in the integrated components provided in the embodiments of this application will be introduced first.

[0047] The power device can be a diode, an insulated gate bipolar transistor (IGBT), or a metal-oxide-semiconductor field-effect transistor (MOSFET). This application uses a MOSFET as an example for illustration. Figure 1 This illustration shows a schematic diagram of a power device in an integrated component provided in an embodiment of this application, such as... Figure 1 As shown, a MOSFET includes a source S, a gate G, and a drain D, wherein the gate G and the source S are located on one side of the drain D. Figure 2 yes Figure 1 The equivalent circuit diagram of a power device, specifically a MOSFET, is shown, with the gate (G), source (S), and drain (D) marked. During switching, power devices often experience voltage and current waveform oscillations and voltage overshoot spikes due to commutation. To mitigate voltage spikes during commutation, common methods include reducing parasitic inductance through metallization on the insulating substrate and adding buffer circuits to the system. Low parasitic inductance reduces voltage oscillations during turn-on and turn-off, thus reducing switching losses.

[0048] Due to limitations imposed by parasitic inductance and standardized external connection terminals of power modules, this embodiment of the application uses a resistor-capacitor snubber circuit (RC snubber circuit) for high parallel power modules, as shown in the schematic diagram below. Figure 3 As shown, S1 is the power device of the upper bridge arm, which may include one power device or multiple power devices connected in parallel. S2 is the power device of the lower bridge arm, which may include one power device or multiple power devices connected in parallel.

[0049] The buffer circuit can be an RC circuit, meaning it can include a buffer capacitor and a buffer resistor connected in series. The buffer capacitor includes a first capacitor C1 and a second capacitor C2. The buffer resistor includes a first resistor R1 and a second resistor R2. The first resistor R1 is connected in series with the first capacitor C1, and then connected in parallel with the power module S1 of the upper bridge arm between the positive bus connection structure DC+ and the neutral connection structure AC. The second resistor R2 is connected in series with the second capacitor C2, and then connected in parallel with the power module S2 of the lower bridge arm between the neutral connection structure AC and the negative bus connection structure DC-.

[0050] During the power device's turn-off process, the buffer circuit absorbs the reverse electromotive force generated by the parasitic inductance through the buffer capacitor; during the power device's turn-on process, the buffer resistor slows down the rate of current change, thereby effectively suppressing voltage and current oscillations, reducing losses during the power device's switching process, and improving the reliability of the power module.

[0051] For example, when the power device S1 of the upper bridge arm is turned off, the second capacitor C2 absorbs the reverse electromotive force generated by the parasitic inductance; when the power device S1 of the upper bridge arm is turned on, the second resistor R2 slows down the rate of current change.

[0052] based on Figure 3 The circuitry within a system is integrated into a module, which is called a power module. A power module encapsulates multiple power devices (IGBTs, MOSFETs, and power diodes) within the same module, forming a circuit topology that meets specific requirements. Power modules offer advantages such as high reliability, better heat dissipation, and high standardization; their high integration simplifies system design and assembly. Therefore, power modules are commonly used for current and voltage control in high-power power electronic systems. A power module typically includes power devices, a heat-dissipating metal base plate, an insulating substrate, electrical connection terminals, bonding wires, molding compound, and an external protective housing. Different metallization patterns on the insulating substrate create different circuit topologies to achieve the desired functions.

[0053] based on Figure 3 The schematic diagram is provided to illustrate the integrated components provided in the embodiments of this application.

[0054] Figure 4 This illustration shows a structural diagram of a substrate and a patterned conductive layer in an integrated component provided in an embodiment of this application, such as... Figure 4 As shown, the integrated component provided in this application embodiment includes a substrate 1, a patterned conductive layer, power devices, and connectors. The power devices and connectors are located in... Figure 4 The text is not shown in the provided text and can be combined with other text. Figure 5 and Figure 7 Let's take a look. Figure 5 This diagram illustrates a distribution of components in an integrated component provided in an embodiment of this application. Figure 7 This illustration shows another electrical connection diagram of the components in the integrated assembly provided in the embodiments of this application.

[0055] Substrate 1 is an insulating substrate.

[0056] A patterned conductive layer (which may include the patterns marked 2-13 in the figures) is located on one side of the substrate 1 and includes at least a first conductive pattern (which may include the patterns marked 2 and 3 in the figures) and a source conductive pattern (which may include the patterns marked 10 and 6 in the figures).

[0057] The patterned conductive layer is a metallized pattern on one side of the substrate 1, typically copper-clad. For example, the substrate 1 and the patterned conductive layer can be a double-sided copper-clad ceramic substrate, abbreviated as DBC.

[0058] Power devices (which may include power devices denoted as 14 and 15 in the reference numerals, where 14 represents eight power devices connected in parallel and 15 represents another eight power devices connected in parallel) are located on the side of the first conductive pattern (2 and 3) facing away from the substrate 1. The power devices (14 and 15) include a drain, a source, and a gate. The drain of the power devices faces the first conductive pattern (2 and 3), and the source and gate of the power devices (14 and 15) face away from the first conductive pattern (2 and 3).

[0059] Connector 22 connects the source of the power device to the source conductive patterns (10 and 6).

[0060] In some embodiments, the connecting piece 22 can be a copper clip. Using a copper clip can achieve lower package resistance, higher current density, and better thermal conductivity, which is beneficial for improving current carrying capacity, heat dissipation capacity, and thus improving the reliability of the power module.

[0061] An exemplary side view of source-to-source conductive pattern connection (10 and 6) of a power device achieved via copper clips, as shown below. Figure 8 As shown, it can be combined with Figure 4 , Figure 5 and Figure 7 Let's take a look Figure 8 The source of power device 14 is connected to the source conductive pattern 6 via a connecting piece 22, which spans the gate resistor 19. The source of power device 15 is connected to the source conductive pattern 10 via a connecting piece, which spans the gate resistor 18.

[0062] Reference Figure 4 , Figure 5 and Figure 7The technical concept of this application includes: setting a first conductive pattern (2 and 3) and a source conductive pattern (10 and 6) on the same substrate 1, placing power devices (14 and 15) on the first conductive pattern (2 and 3), and connecting the source of the power devices (14 and 15) and the source conductive pattern (10 and 6) using a connecting piece 22. Compared with connecting using bonding wires, using the connecting piece 22 to realize the internal electrical interconnection of the module can achieve high current carrying capacity and high thermal conductivity, thus having the characteristics of low stray inductance, high heat dissipation capacity, and high current carrying capacity, which is conducive to achieving higher performance and reliability.

[0063] Figure 8 The middle ceramic layer is substrate 1, the upper metal layer is a patterned conductive layer, and the lower metal layer is the metal layer on the other side of the substrate.

[0064] It should be understood that the integrated component may also include a housing and a metal heat sink. The accompanying drawings of this application only show one phase of the power module as a typical example, and do not show the housing and metal heat sink.

[0065] In some embodiments, the patterned conductive layer further includes a second conductive pattern (the second conductive pattern may include the patterns indicated by reference numerals 9 and 4).

[0066] The integrated component also includes a buffer circuit (which may include devices labeled 16, 17, 20 and 21 in the figures) located on the side of the second conductive pattern (9 and 4) facing away from the substrate 1, and the buffer circuit (16, 17, 20 and 21) is connected to the power device.

[0067] The buffer circuit may include buffer circuit A (including devices labeled 16 and 17 in the figure) and buffer circuit B (including devices labeled 20 and 21 in the figure). Buffer circuit A (16 and 17) is located on the side of the second conductive pattern 9 facing away from the substrate 1, and buffer circuit B (20 and 21) is located on the side of the second conductive pattern 4 facing away from the substrate 1. Buffer circuit A (16 and 17) is connected to power device 15, and buffer circuit B (20 and 21) is connected to power device 14.

[0068] Buffer circuit A may include buffer resistor 17 and buffer capacitor 16, which are connected in series. Buffer circuit B includes buffer resistor 20 and buffer capacitor 21, which are connected in series.

[0069] For example, the resistors and capacitors in the RC buffer circuit of this application can both be surface mount components (SMT), wherein the buffer capacitor 16 is located as shown in the figure. Figure 5 Its two pins are respectively on the first conductive pattern 2 and the second conductive pattern 9; the location of buffer resistor 17 is shown below. Figure 5Its two pins are on the second conductive pattern 9 and the source conductive pattern 10. That is, it is equivalent to the buffer resistor 20 and the buffer capacitor 16 being connected in series between the first conductive pattern 2 and the source conductive pattern 10.

[0070] The buffer capacitor 21 has its leads connected to the source conductive pattern 6 and the second conductive pattern 4, respectively. The buffer resistor 20 has its leads connected to the second conductive pattern 4 and the first conductive pattern 3, respectively. This is equivalent to the buffer resistor 20 and the buffer capacitor 21 being connected in series between the first conductive pattern 3 and the source conductive pattern 6.

[0071] The working principle of the RC snubber circuit is as follows: when a voltage spike occurs during the switching process of bridge arm A, it is absorbed by snubber capacitor 21 and then the energy is released by snubber resistor 20, while suppressing the oscillation generated by the capacitor and the circuit inductance; similarly, the voltage spike that occurs during the switching process of bridge arm B is absorbed by snubber capacitor 16 and then the energy is released by snubber resistor 17.

[0072] The placement of passive components in the buffer circuit of this application embodiment is not fixed; the positions of capacitors and resistors can be interchanged without affecting the buffer circuit effect. Furthermore, the passive components of this buffer circuit can also be left unmounted.

[0073] Since the overall process of power module manufacturing includes surface mount, soldering, and protection processes, the mounting of passive components in the buffer circuit follows the same process as the power components, without introducing any additional steps into the module production process. Furthermore, because the passive components are integrated within the power module, they have a better heat dissipation environment, allowing for a smaller package to achieve the buffering function.

[0074] In some embodiments, such as Figure 4 As shown, the first conductive pattern may include a first conductive pattern 2 (A) and a first conductive pattern 3 (B), and the source conductive pattern may include a source conductive pattern 10 (A) and a source conductive pattern 6 (B).

[0075] Reference Figure 4 and Figure 5 The power device may include power device A 15 and power device B 14. Power device A 15 is located on the side of the first conductive pattern 2 facing away from the substrate 1, and power device B 14 is located on the side of the first conductive pattern 3 facing away from the substrate 1.

[0076] Reference Figure 4 , Figure 5 and Figure 7The connecting piece 22 includes a connecting piece A 221 and a connecting piece B 222. Connecting piece A 221 is connected to the source of power device A 15 and the source conductive pattern A 10, and connecting piece A 221 is connected to the first conductive pattern B 3. Connecting piece B 222 is connected to the source of power device B 14 and the source conductive pattern B 6.

[0077] In this embodiment, the source of power device 15 in bridge arm A is connected to source conductive pattern 10 via connector 221, and the source of power device 14 in bridge arm B is connected to source conductive pattern 10 via connector 222. The use of connector 22 for both connections helps to reduce stray inductance.

[0078] In some embodiments, in conjunction with reference Figure 4 and Figure 7 The first conductive pattern 2 is connected to the positive busbar connection structure DC+ via the first connecting line 29. The second source conductive pattern 6 is connected to the negative busbar connection structure DC- via the second connecting line 30. The first source conductive pattern 10 is connected to the neutral line connection structure AC via the third connecting line 31. The positive busbar connection structure DC+ and the negative busbar connection structure DC- are located on the first side of the substrate 1 in the first direction X, and the neutral line connection structure AC is located on the second side of the substrate 1 in the first direction X. The first side can be the left side, and the second side can be the right side.

[0079] Reference Figure 4 , Figure 5 and Figure 7 Since power device 15 is placed on the first conductive pattern 2, and the first conductive pattern 2 is connected to the positive bus connection structure DC+ via the first connecting line 29, this is equivalent to the drain of power device 15 being connected to DC+. Since connecting piece 222 connects the source of power device 14 and the source conductive pattern 6, and the source conductive pattern 6 is connected to the negative bus connection structure DC- via the second connecting line 30, this is equivalent to the source of power device 14 being connected to DC-. Therefore, power device 15 corresponds to... Figure 3 In the schematic diagram, the power device S1 of the upper bridge arm corresponds to power device 14. Figure 3 The power device in the lower bridge arm of the schematic diagram.

[0080] To achieve high integration and high power density, current power module layouts typically employ multiple power semiconductor devices connected in parallel. This parallel connection places higher demands on current sharing and heat dissipation of the power semiconductor devices, making the layout design of high-parallel power modules crucial.

[0081] In some embodiments, such as Figure 5As shown, power device A 15 and power device B 14 are arranged in the first direction X, and power device A 15 and power device B 14 are spaced apart in the first direction X.

[0082] In this embodiment, separating the bridge arm A and the bridge arm B laterally can avoid mutual interference.

[0083] In some embodiments, combined with Figure 5 and Figure 4 The multiple Class A power devices are divided into a first Class A power device group and a second Class A power device group. Both the first Class A power device group and the second Class A power device group include at least one Class A power device 15. The first Class A power device group and the second Class A power device group are arranged in the second direction Y, which intersects with the first direction X.

[0084] The patterned conductive layer also includes a gate conductive pattern 11, which is located between the first power device group and the second power device group in the second direction Y.

[0085] And / or, the multiple power devices 14 are divided into a first power device group and a second power device group, each of which includes at least one power device 14, and the first power device group and the second power device group are arranged in the second direction Y.

[0086] The patterned conductive layer also includes a gate conductive pattern 7, which is located between the first power device group and the second power device group in the second direction Y.

[0087] In this embodiment, the multiple power devices of bridge arm A are divided into two groups along the second direction Y, and a gate conductive pattern 11 of bridge arm A is placed between the two groups; similarly, the multiple power devices of bridge arm B are divided into two groups along the second direction Y, and a gate conductive pattern 7 of bridge arm B is placed between the two groups. This allows the power devices of both bridge arm A and bridge arm to be connected to the gate conductive pattern in close proximity. In addition, dividing them into two groups vertically facilitates heat dissipation in the circuit.

[0088] In some embodiments, a plurality of power devices 15 are spaced apart in a first direction X, and the plurality of power devices 15 are spaced apart in a second direction Y, the second direction Y intersecting the first direction X.

[0089] And / or, a plurality of power devices 14 are spaced apart in the first direction X, and a plurality of power devices 14 are spaced apart in the second direction Y.

[0090] In this embodiment, the multiple power devices of bridge arm A are dispersed, and similarly, the multiple power devices of bridge arm B are dispersed, resulting in a highly symmetrical spacing distribution of all power devices. By connecting multiple highly symmetrical power devices in parallel, the requirements of consistent current paths and short loops can be met, which is beneficial for improving the current sharing characteristics of the parallel power module. Simultaneously, keeping the multiple power devices relatively separate can alleviate the thermal coupling problem caused by parallel connection, achieving thermal decoupling. This is beneficial for improving the uniformity of temperature distribution in the integrated component and ensuring stable operation of the power devices at the required junction temperature.

[0091] In some embodiments, such as Figure 4 As shown, the patterned conductive layer also includes a gate resistor conductive pattern (the gate resistor conductive pattern may include the patterns shown in reference numerals 5 and 11).

[0092] Reference Figures 4 to 6 The integrated component also includes gate resistors (which may include resistors denoted by reference numerals 18 and 19), which are located on the side of the gate resistor conductive patterns (5 and 11) facing away from the substrate 1, and are connected to the gates of the power devices (14 and 15). The gate resistors (18 and 19) are connected to the gates of the power devices (14 and 15) via bonding wire 32.

[0093] In this embodiment, a mounting gate resistor (18 and 19) is added near the gate of each parallel power device, which can alleviate the oscillation generated by the power device during switching to a certain extent. The main working principle is as follows: each power device can be regarded as a capacitor. Several capacitors connected in parallel through different inductors can easily resonate. Adding a resistor in front of each one can effectively dampen and attenuate the oscillation.

[0094] In some embodiments, in conjunction with reference Figure 4 and Figure 5 The patterned conductive layer also includes a gate resistor conductive pattern 11; the integrated component also includes a gate resistor 18, which is located on the side of the gate resistor conductive pattern 11 facing away from the substrate 1. The gate resistor 18 is connected to the gate of the power device 15 and is located between the two power devices 15 in the first direction X.

[0095] And / or, the patterned conductive layer further includes a gate resistor conductive pattern 5; the integrated component further includes a gate resistor 19, which is located on the side of the gate resistor conductive pattern 5 facing away from the substrate 1, the gate resistor 19 is connected to the gate of the power device 14, and in the first direction X, the gate resistor 19 is located between the two power devices 14.

[0096] In this embodiment, gate resistor 18 (A gate resistor) and gate resistor 19 (B gate resistor) are respectively provided on the power devices on bridge arm A and bridge arm B, which can more effectively dampen and attenuate oscillations. Furthermore, each gate resistor is located between two power devices, facilitating connection and allowing for better heat dissipation from the dispersed power devices. This more rational layout further reduces the total area occupied by the integrated component.

[0097] In some embodiments, in conjunction with reference Figure 4 and 7 The patterned conductive layer also includes a third conductive pattern 8, and a temperature test terminal 25 is provided on the side of the third conductive pattern 8 facing away from the substrate 1.

[0098] For example, the temperature test terminal 25 may include a thermistor test terminal, which can measure the temperature of the integrated component, thereby avoiding safety hazards caused by excessive circuit temperature.

[0099] In some embodiments, in conjunction with reference Figure 4 , Figure 6 and Figure 7 On the B-source conductive pattern 6, a B-source terminal 23 is provided. One or more B-source terminals 23 can be provided. On the B-gate conductive pattern 7, a B-gate terminal 24 is provided. The B-gate conductive pattern 7 and the B-gate resistor conductive pattern 5 are connected by bonding wires.

[0100] Reference Figure 4 , Figure 6 and Figure 7 A drain terminal 28 is disposed on the first conductive pattern 2. A source terminal 26 is disposed on the source conductive pattern 10; one or more source terminals 26 may be disposed. A gate terminal 27 is disposed on the gate terminal conductive pattern 13. The gate terminal conductive pattern 13 is connected to the gate conductive pattern 12 via bonding wires, and the gate conductive pattern 12 is connected to the gate resistor conductive pattern 11 via bonding wires.

[0101] It is important to note that the connection between power devices and the substrate, the connection between passive devices (resistors and capacitors) and the substrate, the connection between copper clips and power devices, and the connection between the substrate can be achieved using solder paste reflow soldering, silver sintering, or other mounting processes. The connection method between the upper surface of the power device and the substrate is not limited to copper clip soldering; wire bonding (aluminum wire, copper wire, aluminum strip) and other processes can also be used. The connection between the external copper busbar terminals and the patterned conductive layer of the insulating substrate corresponding to the DC+, DC-, and AC ports is achieved through the first connecting line 29, the second connecting line 30, and the third connecting line 31, respectively. Wire bonding can be used, with typical processes including but not limited to thick aluminum wire bonding, aluminum strip bonding, and copper wire bonding; direct soldering processes can also be used, with typical processes including but not limited to solder paste soldering, ultrasonic metal soldering, and laser soldering.

[0102] Based on the same inventive concept, embodiments of this application also provide an electronic device, which includes the integrated components of any of the foregoing embodiments. It is understood that the electronic device possesses the beneficial effects of the integrated components provided in the embodiments of this application. Specifically, the highly symmetrical spacing distribution improves temperature distribution uniformity and extends the lifespan of the power module; the introduction and reasonable placement of gate resistors effectively dampens and attenuates oscillations; and the use of a connecting chip package design reduces stray inductance.

[0103] It should be noted that in the embodiments shown in the figures above, the resistor is presented as a single resistor, and the capacitor as a single capacitor. In other embodiments, the resistor may be an integrated combination of series, parallel, or mixed resistors, and the capacitor may be an integrated combination of series, parallel, or mixed capacitors. The specific parameters of each device can be set according to actual needs, and this application does not limit this.

[0104] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other.

[0105] The embodiments described above are not exhaustive, nor do they limit the application to the specific embodiments described herein. Clearly, many modifications and variations can be made based on the above description. These embodiments are selected and specifically described in this specification to better explain the principles and practical applications of this application, thereby enabling those skilled in the art to effectively utilize this application and its modifications. This application is limited only by the claims and their full scope and equivalents.

Claims

1. An integrated component, characterized in that, include: substrate; A patterned conductive layer is located on one side of the substrate and includes at least a first conductive pattern and a source conductive pattern; A power device is located on the side of the first conductive pattern that faces away from the substrate. The power device includes a drain, a source, and a gate. The drain of the power device faces the first conductive pattern, while the source and gate of the power device face away from the first conductive pattern. A connecting piece connects the source of the power device to the source conductive pattern.

2. The integrated component according to claim 1, characterized in that, The first conductive pattern includes a first conductive pattern A and a first conductive pattern B, and the source conductive pattern includes a source conductive pattern A and a source conductive pattern B; The power device includes power device A and power device B. Power device A is located on the side of the first conductive pattern A that faces away from the substrate, and power device B is located on the side of the first conductive pattern B that faces away from the substrate. The connecting piece includes a connecting piece A and a connecting piece B. The connecting piece A connects to the source of the power device A and the conductive pattern of the source of the power device A, and the connecting piece A connects to the first conductive pattern of the power device B. The connecting piece B connects to the source of the power device B and the conductive pattern of the source of the power device B.

3. The integrated component according to claim 1, characterized in that, The patterned conductive layer also includes a gate resistor conductive pattern; The integrated component also includes a gate resistor located on the side of the gate resistor conductive pattern facing away from the substrate, and the gate resistor is connected to the gate of the power device.

4. The integrated component according to claim 2, characterized in that, The power device A and the power device B are arranged in a first direction, and the power device A and the power device B are spaced apart in the first direction.

5. The integrated component according to claim 4, characterized in that, The plurality of power devices are divided into a first power device group and a second power device group. Both the first power device group and the second power device group include at least one power device. The first power device group and the second power device group are arranged in a second direction, which intersects with the first direction. The patterned conductive layer further includes a gate conductive pattern, which is located between the first power device group and the second power device group in the second direction. And / or, the plurality of said power devices are divided into a first power device group and a second power device group, each of the first power device group and the second power device group including at least one said power device, and the first power device group and the second power device group are arranged in a second direction; The patterned conductive layer further includes a gate conductive pattern, which is located between the first power device group and the second power device group in the second direction.

6. The integrated component according to claim 4, characterized in that, The plurality of power devices A are spaced apart in the first direction, and the plurality of power devices A are spaced apart in the second direction, the second direction intersecting the first direction; And / or, a plurality of the B power devices are spaced apart in the first direction, and a plurality of the B power devices are spaced apart in the second direction.

7. The integrated component according to claim 4, characterized in that, The patterned conductive layer further includes a gate resistor conductive pattern; the integrated component further includes a gate resistor, the gate resistor being located on the side of the gate resistor conductive pattern facing away from the substrate, the gate resistor being connected to the gate of the power device, and in the first direction, the gate resistor being located between two power devices. And / or, the patterned conductive layer further includes a gate resistor conductive pattern; the integrated component further includes a gate resistor, the gate resistor being located on the side of the gate resistor conductive pattern facing away from the substrate, the gate resistor being connected to the gate of the power device, and in the first direction, the gate resistor being located between two power devices.

8. The integrated component according to any one of claims 1 to 7, characterized in that, The patterned conductive layer further includes a second conductive pattern; The integrated component further includes a buffer circuit located on the side of the second conductive pattern facing away from the substrate, and the buffer circuit is connected to the power device.

9. The integrated component according to any one of claims 1 to 7, characterized in that, The patterned conductive layer also includes a third conductive pattern, and a temperature test terminal is provided on the side of the third conductive pattern facing away from the substrate.

10. An electronic device, characterized in that, Includes the integrated components as described in any one of claims 1 to 9.

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