Novel circuit for absorbing reverse Vpeak voltage of switching tube

Abstract

The utility model relates to a novel circuit used for absorbing reverse Vpeak voltage of a switching tube. The novel circuit comprises a Vpeak absorption circuit, a PWM generator and a PID compensation circuit. The Vpeak absorption circuit is connected with the PID compensation circuit through a VPEAK network point, and the PID compensation circuit divides the voltage at the VPEAK network point and takes the voltage as a feedback value of the compensation circuit; the PID compensation circuit is connected with a VREF5V network point, and the VREF5V network point provides a reference target given voltage value for the PID compensation circuit; the output end of the PID compensation circuit is connected with the PWM generator and outputs to the PWM generator; and the PWM generator is connected with the Vpeak absorption circuit, and outputs a duty ratio to the Vpeak absorption circuit according to the voltage signal output by the PID compensation circuit, so that a VPEAK network point in the Vpeak absorption circuit discharges energy. According to the circuit, the Vpeak absorption circuit, the PWM generator and the PID compensation circuit are combined, so that a power switch tube is effectively protected, switching noise is reduced, and EMI of a whole machine is facilitated; the service life of a power device can be prolonged, and efficient, stable and reliable work of the switching power supply is realized.

Description

TECHNICAL FIELD

[0001] The utility model relates to a novel circuit for absorbing reverse Vpeak voltage of switch tube. BACKGROUND

[0002] In industrial power supply, power switch tube IGBT module and power MOSFET are often used in high-power switching power supply circuit, and power switch tube has the characteristics of high working frequency and fast switching speed, and can generate large di / dt, so that high peak Vpeak voltage is generated at both ends of the power switch tube.

[0003] Vpeak, usually represents the peak voltage. In alternating current (AC), the peak voltage refers to the voltage value at the highest point of the AC voltage waveform, that is, the voltage value when the waveform reaches the maximum amplitude. In contrast, the effective value (RMS, Root Mean Square) is the voltage value equivalent to the heat generated by alternating current in a period of time. For example, the Vpeak of an AC power supply may be 220V, which means that the highest point of the waveform reaches 220 volts. However, since the alternating current has a sinusoidal waveform, its effective value (RMS value) is usually less than the peak value, and for a sinusoidal wave, the effective value is times the peak value, about 70.7% of the peak value. Therefore, if 220V is the peak value, the effective value is about 155V. In direct current (DC), Vpeak may refer to the maximum value of the voltage, such as the maximum output voltage of a battery or power supply.

[0004] Engineers often use RC, RCD conventional circuits to absorb and suppress peak Vpeak voltage, but conventional absorption circuits have the defects of small absorption power and poor peak suppression ability, therefore, the utility model provides a novel circuit for absorbing reverse Vpeak voltage of switch tube. INVENTION CONTENTS

[0005] In view of the above situation, it is necessary to provide a novel circuit for solving at least one of the above problems.

[0006] A novel circuit for absorbing reverse Vpeak voltage of switch tube, comprising:

[0007] Vpeak absorption circuit, PWM generator and PID compensation circuit;

[0008] The Vpeak absorption circuit is connected to the PID compensation circuit through the V_PEAK network point, and the PID compensation circuit takes the voltage at the V_PEAK network point as the feedback value of the compensation circuit by dividing the voltage.

[0009] The PID compensation circuit is connected with a VREF_5V network point, and the VREF_5V network point provides a reference target given voltage value to the PID compensation circuit.

[0010] The output end of the PID compensation circuit is connected with the PWM generator, and outputs a voltage signal to the PWM generator.

[0011] The PWM generator is connected with the Vpeak absorption circuit, and outputs a duty ratio to the Vpeak absorption circuit according to the voltage signal output by the PID compensation circuit, so that the V_PEAK network point in the Vpeak absorption circuit releases energy.

[0012] As a further scheme of the utility model, the Vpeak absorption circuit comprises a power switch tube gate reverse recovery voltage generation point VMOS_D, and the VMOS_D is connected with the V_PEAK network point through a switch tube D1.

[0013] The output end of the switch tube D1 is also connected with the 2th pin of a MOS switch tube Q1, the 3th pin of the MOS switch tube Q1 is connected with the output end VOUT of the circuit, the 1th pin of the MOS switch tube Q1 is connected with the 6th pin and the 7th pin of a transformer T through a resistor R1 and a resistor R2 respectively, and a node between the resistor R1 and the 6th pin of the transformer T is connected with the output end VOUT.

[0014] The 2th pin and the 4th pin of the transformer T are connected with the 1th pin and the 2th pin of a switch diode D3 respectively, and the 3th pin of the switch diode D3 is connected with the PWM generator through a resistor R3.

[0015] As a further scheme of the utility model, the PWM generator comprises a PWM controller chip U1, the 6th pin of the PWM controller chip U1 is connected with the Vpeak absorption circuit, and the 2th pin is connected with the PID compensation circuit.

[0016] The smaller the voltage of the 2th pin of the PWM controller chip U1 is, the greater the duty ratio output by the 6th pin is.

[0017] As a further scheme of the utility model, the PWM generator further comprises an RC circuit, and the RC circuit is connected with the 4th pin of the PWM controller chip U1.

[0018] As a further scheme of the utility model, the PID compensation circuit comprises an operational amplifier U2, and the 1th pin of the operational amplifier U2 is connected with the PWM generator through a resistor R10.

[0019] The 3th pin of the operational amplifier U2 is connected with the VREF_5V network point, and the voltage at the 3th pin is the reference target given voltage value of the PID compensation circuit.

[0020] The pin 2 of the operational amplifier U2 is connected to the V_PEAK network point, and the voltage at the pin 2 is the voltage value as the feedback value of the compensation circuit.

[0021] The circuit combines the Vpeak absorption circuit, the PWM generator and the PID compensation circuit, effectively protects the power switch tube, reduces the switching noise, is beneficial to the EMI of the whole machine, can improve the service life of the power device, and realizes the efficient, stable and reliable work of the switching power supply. BRIEF DESCRIPTION OF DRAWINGS

[0022] Figure 1 It is the circuit principle diagram of the embodiment of the utility model. DETAILED DESCRIPTION

[0023] In order to make the purpose, technical scheme and advantages of the utility model more clearly and clearly, the utility model is further described in detail below by combining with the drawings and examples. It should be understood that the specific examples described here are only used to explain the utility model, and are not used to limit the utility model.

[0024] In the description of the utility model, unless otherwise specified, the meaning of "a plurality of" is two or more than two;The orientation or positional relationship indicated by the terms "center", "longitudinal", "transverse", "upper", "lower", "left", "right", "inner", "outer", "front end", "rear end", "head", "tail", "vertical", "horizontal", "top", "bottom", "inner", "outer" is based on the orientation or positional relationship shown in the drawing, which is only for the convenience of describing the utility model and simplifying the description, and is not used to indicate or imply that the indicated device or element must have a particular orientation, a particular orientation and operation, therefore, it cannot be understood as a limitation on the utility model. In addition, the terms "first", "second", "third" and the like are only for the purpose of description, and cannot be understood as indicating or implying relative importance.

[0025] In the description of the utility model, it should be pointed out that, unless otherwise specified and limited, the terms "mounting", "connecting", "connecting" should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected;It can be mechanical connection, or electrical connection;It can be directly connected, or indirectly connected through an intermediate medium, or the communication between two elements. For ordinary skilled in the art, the specific meaning of the above terms in the utility model can be understood through specific circumstances.

[0026] As Figure 1 shown, a novel circuit for absorbing reverse Vpeak voltage of a switch tube, comprising:

[0027] Vpeak absorption circuit 1, PWM generator 2 and PID compensation circuit 3;

[0028] The Vpeak absorption circuit 1 is connected with the PID compensation circuit 3 through a V_PEAK network point, and the PID compensation circuit 3 divides the voltage at the V_PEAK network point and takes it as a feedback value of the compensation circuit;

[0029] The PID compensation circuit 3 is connected with a VREF_5V network point, and the VREF_5V network point provides a reference target given voltage value to the PID compensation circuit 3;

[0030] The output end of the PID compensation circuit 3 is connected with the PWM generator 2 and outputs to the latter;

[0031] The PWM generator 2 is connected with the Vpeak absorption circuit 1, and the PWM generator 2 outputs a duty ratio to the Vpeak absorption circuit 1 according to the voltage signal output by the PID compensation circuit 3, so that the V_PEAK network point in the Vpeak absorption circuit 1 releases energy.

[0032] Further, the Vpeak absorption circuit 1 comprises a power switch tube gate reverse recovery voltage generation point VMOS_D, and the VMOS_D is connected with the V_PEAK network point through a switch tube D1;

[0033] The output end of the switch tube D1 is also connected with the 2 pin of a MOS switch tube Q1, the 3 pin of the MOS switch tube Q1 is connected with an output end VOUT of the circuit, the 1 pin of the MOS switch tube Q1 is connected with the 6 pin and the 7 pin of a transformer T through resistors R1 and R2 respectively, and a node between the resistor R1 and the 6 pin of the transformer T is connected with the output end VOUT;

[0034] The 2 pin and the 4 pin of the transformer T are connected with the 1 pin and the 2 pin of a switch diode D3 respectively, and the 3 pin of the switch diode D3 is connected with the PWM generator 2 through a resistor R3.

[0035] VMOS_D is the reverse recovery voltage generation point of the gate of the power switch tube D in the switch power supply mentioned in the application, which is the highest point of the reverse recovery voltage mentioned in the application, VMOS_D is obtained through reverse isolation of D1 and filtering of C1 to obtain V_PEAK, V_PEAK is connected to R15, and a voltage divided by R14 and R16 is used as a feedback value (pin 2 of U2) of the compensation circuit, when V_PEAK is greater than a reference target given voltage value (pin 3 of U2) of the PID compensation circuit, the output duty ratio of pin 6 of U1 is greater, the on-off duty ratio of Q1 is greater, and the energy discharged by V_PEAK is greater, so that the peak of VMOS_D can be quickly absorbed and pulled down, and vice versa, when V_PEAK is smaller than the reference target given voltage value (pin 3 of U2) of the PID compensation circuit, the output voltage of pin 1 of U2 is higher, the output duty ratio of pin 6 of U1 is smaller, and the on-off duty ratio of Q1 is smaller, the positive and negative dynamic closed-loop regulation ensures that the voltage value of V_PEAK is dynamically stabilized near the set value of VREF_5V, and V_PEAK is smoothed to a relatively stable direct-current voltage, therefore, the practical effect of the application can effectively protect the power switch tube, reduce switching noise, be beneficial to EMI of the whole machine, improve the service life of the power device, and realize efficient, stable and reliable work of the switch power supply.

[0036] Further, the PWM generator 2 comprises a PWM controller chip U1, pin 6 of the PWM controller chip U1 is connected to the Vpeak absorption circuit 1, and pin 2 is connected to the PID compensation circuit 3.

[0037] The smaller the voltage at pin 2 of the PWM controller chip U1 is, the greater the output duty ratio at pin 6 is.

[0038] Further, the PWM generator 2 further comprises an RC circuit, and the RC circuit is connected to pin 4 of the PWM controller chip U1.

[0039] The PWM generator composed of the U1 chip and the peripheral circuit, the RC circuit connected to pin 4 of U1 determines the frequency of the output PWM, the smaller the voltage at pin 2 of U1 is, the greater the output duty ratio at pin 6 of U1 is, and the circuit has the advantages of simplicity, low cost, high efficiency and the like.

[0040] Further, the PID compensation circuit 3 comprises an operational amplifier U2, pin 1 of the operational amplifier U2 is connected to the PWM generator 2 through a resistor R10.

[0041] Pin 3 of the operational amplifier U2 is connected to the VREF_5V network point, and the voltage at pin 3 is a reference target given voltage value of the PID compensation circuit 3.

[0042] The 2-pin of the operational amplifier U2 is connected to the V_PEAK network point, and the voltage at the 2-pin is the voltage value as the feedback value of the compensation circuit.

[0043] The hardware PID compensation circuit composed of the operational amplifier U2 and the peripheral circuit of R11 and C9, the voltage value obtained by voltage division of VREF_5V through R12 and R13 is the reference target given voltage value (the 3-pin of U2) of the PID compensation circuit, the voltage value obtained by voltage division of V_PEAK through R14, R15 and R16 is the feedback value (the 2-pin of U2) of the compensation circuit, and the output of the 1-pin of U2 is the output of the hardware PID compensation circuit, and the output value is dynamically and linearly smoothly changed according to the high and low of V_PEAK, and the output control quantity is given to the 2-pin of U1, so that the duty cycle of the power tube Q1 of the absorption circuit is not suddenly changed, the V_PEAK value reaches the closed-loop control, and the precise and automatic absorption power tube V_PEAK value is realized.

[0044] The above is only a preferred embodiment of the present application, and does not limit the present application in any form. Although the present application has been disclosed as above with a preferred embodiment, it is not intended to limit the present application. Any skilled person in the art can make some changes or modifications to the above disclosed technical content to obtain equivalent embodiments with equivalent changes, but as long as the changes do not deviate from the technical solution of the present application, any simple modification, equivalent change and modification of the above embodiments according to the technical essence of the present application are still within the scope of the technical solution of the present application.

Claims

1. A novel circuit for absorbing the reverse peak voltage of a switching transistor, characterized in that: include: Vpeak absorption circuit (1), PWM generator (2) and PID compensation circuit (3); The Vpeak absorption circuit (1) is connected to the PID compensation circuit (3) through the V_PEAK network point. The PID compensation circuit (3) divides the voltage at the V_PEAK network point and uses it as the feedback value of the compensation circuit. The PID compensation circuit (3) is connected to the VREF_5V network point, and the VREF_5V network point provides the PID compensation circuit (3) with a reference target given voltage value. The output terminal of the PID compensation circuit (3) is connected to the PWM generator (2) and outputs to the latter; The PWM generator (2) is connected to the Vpeak absorption circuit (1). The PWM generator (2) outputs a duty cycle to the Vpeak absorption circuit (1) based on the voltage signal output by the PID compensation circuit (3), so that the V_PEAK network point in the Vpeak absorption circuit (1) releases energy.

2. The novel circuit for absorbing the reverse Vpeak voltage of the switching transistor as described in claim 1, characterized in that: The Vpeak absorption circuit (1) includes a power switch gate reverse recovery voltage generation point VMOS_D, which is connected to the V_PEAK network point through the switch D1; The output terminal of the switching transistor D1 is also connected to pin 2 of the MOS switching transistor Q1. Pin 3 of the MOS switching transistor Q1 is connected to the output terminal VOUT of the circuit. Pin 1 of the MOS switching transistor Q1 is connected to pins 6 and 7 of the transformer T through resistors R1 and R2 respectively. The node between resistor R1 and pin 6 of the transformer T is connected to the output terminal VOUT. Pins 2 and 4 of the transformer T are connected to pins 1 and 2 of the switching diode D3, respectively, and pin 3 of the switching diode D3 is connected to the PWM generator (2) through resistor R3.

3. The novel circuit for absorbing the reverse Vpeak voltage of the switching transistor as described in claim 1, characterized in that: The PWM generator (2) includes a PWM controller chip U1, with pin 6 of the PWM controller chip U1 connected to the Vpeak absorption circuit (1) and pin 2 connected to the PID compensation circuit (3); The lower the voltage at pin 2 of the PWM controller chip U1, the higher the duty cycle of the output at pin 6.

4. The novel circuit for absorbing the reverse Vpeak voltage of the switching transistor as described in claim 3, characterized in that: The PWM generator (2) also includes an RC circuit, which is connected to pin 4 of the PWM controller chip U1.

5. The novel circuit for absorbing the reverse Vpeak voltage of the switching transistor as described in claim 1, characterized in that: The PID compensation circuit (3) includes an operational amplifier U2, and pin 1 of the operational amplifier U2 is connected to the PWM generator (2) through a resistor R10; The operational amplifier U2 has its pin 3 connected to the VREF_5V network point, and the voltage at pin 3 is the reference target given voltage value of the PID compensation circuit (3). Pin 2 of the operational amplifier U2 is connected to the V_PEAK network point, and the voltage at pin 2 is used as the feedback value of the compensation circuit.

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