Input switching circuit and chip
By using a single-stage high-voltage comparison unit and a switching unit for voltage comparison in the current sensing chip, the problem of slow response during rapid switching is solved, enabling fast power supply switching and improving the response speed of the current sensing chip.
Patent Information
- Application Number
- CN202520321402.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-26
- Publication Date
- 2026-02-27
- Estimated Expiration
- 2035-02-26
AI Technical Summary
Existing current detection chips are slow to respond when faced with rapid and large changes in the input signal, and cannot keep up with the changes in the input signal quickly, resulting in abnormal output.
A single-stage high-voltage comparator unit is used for voltage comparison, and the control switching unit is used for power supply switching. This avoids the RC delay caused by resistor voltage division and cascaded comparators, and achieves fast response.
It shortens the response time and enables fast power output response in fast-switching applications, avoiding the slow response problem caused by RC delay and cascading delay in existing technologies.
Smart Images
Figure CN223957535U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model belongs to integrated circuit technical field, concretely relates to an input switching circuit and chip. BACKGROUND
[0002] As Figure 1 As shown in some current detection chips, the chip power supply will be switched with the input signal: when the input signal is low, the low-voltage power supply is used for power supply; when the input signal is high, the power supply will be switched to the input signal, through such switching, the range of chip input voltage can be widened.
[0003] Usually, the switching of power supply is completed by comparing the power supply voltage with the input signal through the comparator, and then controlling the opening and closing of the switch by the output signal of the comparator.
[0004] In the existing design, since the input signal enters the high-voltage domain, the input signal and the power supply voltage cannot be directly compared, and the input signal needs to be divided by a resistor string first, and then compared by a low-voltage comparator. Among them, the resistor string needs to take a larger resistance value to reduce the leakage current.
[0005] Current detection is often applied to the scene of input fast large amplitude jump, in the face of such scene, the existing design usually responds slowly due to the influence of large resistance and multi-stage cascade, which cannot follow the jump of input signal, resulting in abnormal output.
[0006] The information disclosed in this BACKGROUND section is only for the purpose of increasing the understanding of the background of the present utility model and should not be regarded as an acknowledgment or any form of suggestion that this information forms prior art that is publicly known. CONTENT OF THE UTILITY MODEL
[0007] The utility model aims at providing an input switching circuit and chip, which can quickly respond to input fast jump.
[0008] In order to realize the above purpose, an embodiment of the utility model provides an input switching circuit, which comprises a comparison unit and a switch unit.
[0009] The comparison unit comprises a first input tube, a second input tube and a bias unit, the control end of the first input tube is used for receiving a first voltage, the control end of the second input tube is used for receiving a second voltage, the first end of the first input tube and the first end of the second input tube are connected with the bias unit, and the first input tube and the second input tube adjust the voltage on the second end of the first input tube and the second end of the second input tube based on the size of the first voltage and the second voltage.
[0010] The switch unit has a first end, a second end and an output end, the first end of the switch unit is used for receiving a first voltage, the second end of the switch unit is used for receiving a second voltage, and the switch unit is connected with the second end of the first input tube and the second end of the second input tube at the same time to control the on-off of the first end and the output end of the switch unit and the on-off of the second end and the output end of the switch unit based on the voltages on the second end of the first input tube and the second end of the second input tube.
[0011] In one or more embodiments of the utility model, the bias unit includes a current branch, a first current source and a second current source, the first current source is connected with the first end of the first input tube to provide the first input tube with a first bias current, the second current source is connected with the second end of the second input tube to provide the second input tube with a second bias current, and the current branch is connected with the first voltage, the second voltage, the first end of the first input tube and the first end of the second input tube to generate an adjustment current for adjusting the currents on the first input tube and the second input tube based on the magnitude of the first voltage and the second voltage.
[0012] In one or more embodiments of the utility model, the current branch includes a first transistor and a second transistor, the control end of the first transistor is used for receiving the first voltage, the second end of the second transistor is used for receiving the second voltage, the first end of the first transistor is connected with the first end of the first input tube and the first current source, the first end of the second transistor is connected with the first end of the second input tube and the second current source, and the second end of the first transistor is connected with the second end of the second transistor.
[0013] In one or more embodiments of the utility model, the bias unit includes a high-voltage-resistant unit and a third current source, and the first end of the first transistor is connected with the first end of the first input tube through the high-voltage-resistant unit and the third current source.
[0014] In one or more embodiments of the utility model, the high-voltage-resistant unit includes a first diode and a second diode, the anode of the first diode is connected with the first end of the first input tube, the cathode of the first diode is connected with the cathode of the second diode and the third current source, and the anode of the second diode is connected with the first end of the second input tube.
[0015] In one or more embodiments of the utility model, the switch unit includes a third transistor and a fourth transistor, the first end of the third transistor forms the first end of the switch unit, the first end of the fourth transistor forms the second end of the switch unit, the second end of the third transistor is connected with the second end of the fourth transistor to form the output end of the switch unit, the control end of the third transistor is connected with the second end of the first input tube, and the control end of the fourth transistor is connected with the second end of the second input tube.
[0016] In one or more embodiments of the present application, the third transistor and the fourth transistor are high-voltage-resistant tubes.
[0017] In one or more embodiments of the present application, the first input tube and the second input tube are LDMOS tubes.
[0018] In one or more embodiments of the present application, the first transistor and the second transistor are LDMOS tubes.
[0019] The utility model discloses a chip, including, the input switching circuit of the input switching circuit.
[0020] Compared with the prior art, the input switching circuit and the chip of the utility model, by using single-stage high-voltage comparison unit to carry out voltage comparison to control switch unit to carry out power supply switching, avoid the power supply switching response slow that the RC delay and cascade delay brought by the resistance voltage division of prior art match low voltage comparator, thereby shorten the response time, realized the quick response of power supply output under the quick jump application. BRIEF DESCRIPTION OF DRAWINGS
[0021] In order to more clearly illustrate the technical scheme in the embodiments of the present application or the prior art, the drawings needed to be used in the embodiment or the prior art description will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments described in the present application, and for those skilled in the art, other drawings can also be obtained without creative labor on the basis of these drawings.
[0022] Figure 1 It is the circuit principle diagram of the input switching circuit in the prior art.
[0023] Figure 2 It is the circuit principle diagram of the input switching circuit in the embodiment one.
[0024] Figure 3 It is the circuit principle diagram of the input switching circuit in the embodiment two. DETAILED DESCRIPTION
[0025] In order to make the person in the art better understand the technical scheme in the present application, the technical scheme in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, not all. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor should belong to the scope of protection of the present application.
[0026] "connected" or "coupled" in the specification include both direct and indirect connections. Indirect connections are connections through intervening media, such as through intervening electrical conductors, which can have parasitic inductance or parasitic capacitance, and can include connections through other active or passive devices, such as connections through switches, follower circuits, or other circuits or components that serve the same or a similar function. In addition, terms such as "first", "second", and the like used in the context of the application are primarily used to distinguish one component from another and do not necessarily imply a physical or chronological order or a specific spatial arrangement.
[0027] In the detailed description of the application, reference is made to the accompanying drawings, which form a part hereof, and in which are shown by way of illustration various embodiments by which the application can be practiced. It is to be understood that other embodiments can be utilized and structural or logical changes can be made without departing from the scope of the present disclosure. The following detailed description, therefore, is not to be taken in a limiting sense, as the scope of the application is defined by the appended claims.
[0028] Various operations can be described as multiple discrete actions or operations in a manner that is most helpful in understanding the claimed subject matter. However, the order of description should not be construed as to imply that these operations are necessarily order dependent. In particular, these operations can not be performed in the order of presentation. Operations described can be performed in a different order than the described embodiment. Various additional operations can be performed and / or described operations can be omitted in additional embodiments.
[0029] For purposes of the present disclosure, the phrase "A and / or B" means (A), (B), or (A and B). For purposes of the present disclosure, the phrase "A, B, and / or C" means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C).
[0030] Various components, devices, etc. can be referred to herein in singular form, but this is not intended to exclude plural arrangements unless specifically stated otherwise. For example, a single processor or other unit can be used in place of a plurality of such units, and vice versa.
[0031] The description uses the phrases "one embodiment", "another embodiment", or "some embodiments" which can each refer to the same or different embodiment(s). Furthermore, the terms "comprise", "contain", "include", "have", etc. used in the description are synonymous with each other.
[0032] Embodiment One
[0033] As Figure 2As shown, the input switching circuit in the embodiment of the utility model, including: comparison unit 10 and switch unit 20.
[0034] Comparison unit 10 includes: first input tube M1, second input tube M2 and bias unit, the control end of first input tube M1 is used to receive first voltage Vin1, the control end of second input tube M2 is used to receive second voltage Vin2.In an embodiment, first voltage Vin1 is power voltage, and second voltage Vin2 is external input voltage (input signal).
[0035] The first end of first input tube M1 and the first end of second input tube M2 are connected with bias unit, and bias unit is used to provide bias current for first input tube M1 and second input tube M2, and first input tube M1 and second input tube M2 adjust the voltage on the second end of first input tube M1 and the second end of second input tube M2 based on the size of first voltage Vin1 and second voltage Vin2.
[0036] Switch unit 20 has first end, second end and output end Out, and the first end of switch unit 20 is used to receive first voltage Vin1, and the second end of switch unit 20 is used to receive second voltage Vin2, and the output end Out of switch unit 20 is connected with internal circuit 100, and switch unit 20 is connected with the second end of first input tube M1 and the second end of second input tube M2 simultaneously, to control the on-off of the first end and output end Out of switch unit 20 and the on-off of the second end and output end Out of switch unit 20 based on the voltage on the second end of first input tube M1 and the second end of second input tube M2.
[0037] In an embodiment, first input tube M1, second input tube M2, first transistor M3 and second transistor M4 are all LDMOS tubes (full name is lateral diffusion metal oxide semiconductor field effect transistor).
[0038] Wherein, bias unit includes current branch, first current source A1 and second current source A2, first current source A1 is connected with the first end of first input tube M1 to provide first bias current for first input tube M1, second current source A2 is connected with the second end of second input tube M2 to provide second bias current for second input tube M2, and current branch is connected with first voltage Vin1, second voltage Vin2, the first end of first input tube M1 and the first end of second input tube M2, to generate adjustment current for adjusting the current on first input tube M1 and second input tube M2 based on the size of first voltage Vin1 and second voltage Vin2.
[0039] Specifically, the current branch includes the first transistor M3 and the second transistor M4, the control end of the first transistor M3 is configured to receive the first voltage Vin1, the second end of the second transistor M4 is configured to receive the second voltage Vin2, the first end of the first transistor M3 is connected with the first end of the first input tube M1 and the first current source A1, the first end of the second transistor M4 is connected with the first end of the second input tube M2 and the second current source A2, and the second end of the first transistor M3 is connected with the second end of the second transistor M4.
[0040] In an embodiment, the switch unit 20 includes the third transistor M5 and the fourth transistor M6, the first end of the third transistor M5 forms the first end of the switch unit 20, the first end of the fourth transistor M6 forms the second end of the switch unit 20, the second end of the third transistor M5 is connected with the second end of the fourth transistor M6 to form the output end Out of the switch unit 20, the control end of the third transistor M5 is connected with the second end of the first input tube M1, and the control end of the fourth transistor M6 is connected with the second end of the second input tube M2. The third transistor M5 and the fourth transistor M6 are high-voltage-resistant tubes.
[0041] In an embodiment, the first input tube M1, the second input tube M2, the first transistor M3 and the second transistor M4 are N-channel MOS tubes, and the third transistor M5 and the fourth transistor M6 are P-channel MOS tubes. The first end of the first input tube M1, the first end of the second input tube M2, the first end of the first transistor M3, the first end of the second transistor M4, the first end of the third transistor M5 and the first end of the fourth transistor M6 are sources, the second end of the first input tube M1, the second end of the second input tube M2, the second end of the first transistor M3, the second end of the second transistor M4, the second end of the third transistor M5 and the second end of the fourth transistor M6 are drains, and the control end of the first input tube M1, the control end of the second input tube M2, the control end of the first transistor M3, the control end of the second transistor M4, the control end of the third transistor M5 and the control end of the fourth transistor M6 are gates. In other embodiments, the first input tube M1, the second input tube M2, the first transistor M3 and the second transistor M4 can be set as P-channel MOS tubes, and the third transistor M5 and the fourth transistor M6 can be set as N-channel MOS tubes.
[0042] When the first voltage Vin1 > the second voltage Vin2, the voltages at the control terminals of the first input transistor M1 and the first transistor M3 are higher than the voltages at the control terminals of the second input transistor M2 and the second transistor M4. At this time, the voltages at the first terminals of the first input transistor M1 and the first terminals of the first transistor M3 are greater than the voltages at the first terminals of the second input transistor M2 and the second transistor M4, forming a current path from the first terminal of the first transistor M3 to the first terminal of the first input transistor M1. The second terminal of the second transistor M4 can withstand an absolute high voltage between the first voltage Vin1 and the second voltage Vin2. Therefore, the current flowing through the first input transistor M1 will be the first bias current on the first current source A1 plus the current in the current branch, while the current flowing through the second input transistor M2 will be the second bias current on the second current source A2 minus the current in the current branch. When the current flowing through the first input transistor M1 is greater than the current flowing through the second input transistor M2, that is, when the voltage at the second terminal of the first input transistor M1 is less than the voltage at the second terminal of the second input transistor M2, the third transistor M5 will be turned on and the fourth transistor M6 will be turned off. Thus, when the first voltage Vin1 > the second voltage Vin2, the power supply of the internal circuit 100 is provided by the first voltage Vin1.
[0043] Conversely, when the second voltage Vin2 > the first voltage Vin1, a current path will be formed from the first terminal of the second transistor M4 to the first terminal of the first transistor M3. The second terminal of the first transistor M3 can withstand the absolute high voltage between the second voltage Vin2 and the first terminal. The current flowing through the second input transistor M2 will be greater than the current flowing through the first input terminal M1. That is, the voltage at the second terminal of the first input terminal M1 is greater than the voltage at the second terminal of the second input transistor M2. This will control the fourth transistor M6 to turn on and the third transistor M5 to turn off, thereby realizing that when the second voltage Vin2 > the first voltage Vin1, the power supply of the internal circuit 100 is provided by the second voltage Vin2.
[0044] The above control method directly compares through a single-stage high-voltage comparison unit 10, without resistor series RC delay or cascade delay, which can ensure a fast response during rapid switching while realizing the power supply switching function.
[0045] This embodiment also discloses a chip, including the above-described input switching circuit.
[0046] Example 2
[0047] like Figure 3 As shown, based on Embodiment 1, the bias unit in one embodiment includes a high-voltage resistant unit and a third current source A3. The first terminal of the first transistor M3 and the first terminal of the first input transistor M1 are connected to the third current source A3 through the high-voltage resistant unit.
[0048] Specifically, the high-voltage-resistant unit comprises a first diode D1 and a second diode D2, the anode of the first diode D1 is connected with the first end of the first input tube M1, the cathode of the first diode D1 is connected with the cathode of the second diode D2 and the third current source A3, and the anode of the second diode D2 is connected with the first end of the second input tube M2.
[0049] When the first voltage Vin1 is greater than the second voltage Vin2, the first input tube M1 is turned on, the second diode D2 bears the absolute high voltage between the first voltage Vin1 and the second voltage Vin2, the third transistor M5 is turned on, and the power supply of the internal circuit 100 is provided by the first voltage Vin1.
[0050] When the second voltage Vin2 is greater than the first voltage Vin1, the second input tube M2 is turned on, the first diode D1 bears the absolute high voltage between the second voltage Vin2 and the first voltage Vin1, the fourth transistor M6 is turned on, and the power supply of the internal circuit 100 is provided by the second voltage Vin2.
[0051] The embodiment also discloses a chip comprising the input switching circuit.
[0052] It is apparent for those skilled in the art that the present application is not limited to the details of the above exemplary embodiments, but can be implemented in other concrete forms without departing from the spirit or essential characteristics of the present application. Therefore, the embodiments should be considered as exemplary and non-restrictive, and the scope of the present application is defined by the appended claims rather than the above description, and all changes falling within the meaning and range of equivalent elements of the claims are intended to be embraced therein. Any reference signs in the claims should not be considered as limiting the claims involved.
[0053] In addition, it should be understood that, although the present specification is described in terms of embodiments, not every embodiment contains only one independent technical solution, and the description of the specification is only for the sake of clarity, and those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can be properly combined to form other embodiments which can be understood by those skilled in the art.
Claims
1. An input switching circuit, characterized by comprising: The application relates to a voltage comparator. The voltage comparator comprises a comparison unit and a switch unit. The comparison unit comprises a first input tube, a second input tube and a bias unit, a control end of the first input tube is used for receiving a first voltage, a control end of the second input tube is used for receiving a second voltage, a first end of the first input tube and a first end of the second input tube are connected with the bias unit, and the first input tube and the second input tube adjust voltages on a second end of the first input tube and a second end of the second input tube based on sizes of the first voltage and the second voltage.
2. The input switching circuit of claim 1, wherein, The switch unit has a first end, a second end and an output end, the first end of the switch unit is used for receiving the first voltage, the second end of the switch unit is used for receiving the second voltage, and the switch unit is simultaneously connected with the second end of the first input tube and the second end of the second input tube to control on-off of the first end and the output end of the switch unit and on-off of the second end and the output end of the switch unit based on the voltages on the second end of the first input tube and the second end of the second input tube.
3. The input switching circuit of claim 2, wherein, The bias unit comprises a current branch, a first current source and a second current source, the first current source is connected with the first end of the first input tube to provide a first bias current for the first input tube, the second current source is connected with the second end of the second input tube to provide a second bias current for the second input tube, and the current branch is connected with the first voltage, the second voltage, the first end of the first input tube and the first end of the second input tube to generate an adjusting current for adjusting currents on the first input tube and the second input tube based on the sizes of the first voltage and the second voltage.
4. The input switching circuit of claim 1, wherein, The current branch comprises a first transistor and a second transistor, a control end of the first transistor is used for receiving the first voltage, a second end of the second transistor is used for receiving the second voltage, a first end of the first transistor is connected with the first end of the first input tube and the first current source, a first end of the second transistor is connected with the first end of the second input tube and the second current source, and a second end of the first transistor is connected with a second end of the second transistor.
5. The input switching circuit of claim 4, wherein, The bias unit comprises a high-voltage-resistant unit and a third current source, and the first end of the first input tube and the first end of the second input tube are connected with the third current source through the high-voltage-resistant unit.
6. The input switching circuit of claim 1, wherein, The high-voltage-resistant unit comprises a first diode and a second diode, an anode of the first diode is connected with the first end of the first input tube, a cathode of the first diode is connected with a cathode of the second diode and the third current source, and an anode of the second diode is connected with the first end of the second input tube.
7. The input switching circuit of claim 6, wherein, The switch unit comprises a third transistor and a fourth transistor, a first end of the third transistor forms the first end of the switch unit, a first end of the fourth transistor forms the second end of the switch unit, a second end of the third transistor and a second end of the fourth transistor are connected to form the output end of the switch unit, a control end of the third transistor is connected with the second end of the first input tube, and a control end of the fourth transistor is connected with the second end of the second input tube.
8. The input switching circuit of claim 1, wherein, The third transistor and the fourth transistor are high-voltage-resistant tubes.
9. The input switching circuit of claim 3, wherein, The first input tube and the second input tube are LDMOS tubes. The first transistor and the second transistor are LDMOS tubes.
10. A chip, characterized by The input switching circuit according to any one of claims 1 to 9.