High-density integrated ceramic packaging structure

Abstract

The utility model discloses a high-density integrated ceramic packaging structure, belongs to the technical field of semiconductor packaging, and aims to solve the problems of low integration level, poor process compatibility and insufficient expansibility of a traditional packaging structure. The structure adopts a multi-layer ceramic integrated molding substrate, and comprises a bottom deep cavity layer, a middle platform layer, a metal bonding pad layer, a metal circuit layer, a sealing layer and a ceramic cover plate structure, and various chips such as a flip BGA chip, a normal chip and a cover plate back-mounted flip chip are respectively integrated on each layer; the normal chip is connected with the metal bonding pad layer through a bonding wire, the flip chip is directly mounted through a bonding pad, and airtight packaging and three-dimensional circuit interconnection are achieved between the ceramic cover plate and the tube shell through metal bonding. According to the utility model, the compatibility of flip mounting and lead bonding processes is realized, the integration density is improved and the process difficulty is reduced through three-dimensional layout, and the chip has good expansibility and practicability, and can be widely applied to packaging of various electronic devices.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor packaging technology, specifically a high-density integrated ceramic packaging structure. Background Technology

[0002] As electronic technology rapidly advances towards miniaturization, high performance, and multifunctionality, the market demands higher integration density, process compatibility, and functional scalability from packaging structures. Traditional packaging structures often have significant limitations: some packages only support a single mounting process, or can only accommodate flip chips, or can only meet the mounting requirements of wire-bonded chips, making it difficult to simultaneously accommodate the packaging requirements of different types of chips. This leads to the need for multiple independent packages or complex adapter structures when integrating multiple chips, which not only increases the overall size and cost but may also introduce additional signal loss and reliability risks.

[0003] While some packaging structures attempt to integrate multiple mounting methods, they suffer from unreasonable spatial layout issues. For example, improper chip mounting position design leads to difficulties in wire bonding processes and poor wire arc stability; or they lack effective multi-layer interconnect design, failing to fully utilize three-dimensional space for high-density integration, resulting in excessively large package sizes that are difficult to adapt to the miniaturization trend of electronic devices. Furthermore, the shortcomings of traditional packaging structures in chip interconnect reliability and structural scalability further limit their application in complex multi-chip systems, failing to simultaneously meet the requirements of device integration, performance stability, and cost control. Utility Model Content

[0004] To address the shortcomings of existing technologies, this invention provides a high-density integrated ceramic packaging structure. By optimizing the structural layout and interconnect design, it achieves compatibility with various mounting processes and efficient utilization of three-dimensional space, solving the problems of low integration, poor process compatibility, and insufficient scalability of traditional packaging structures.

[0005] To achieve the above objectives, the technical solution of this utility model is as follows:

[0006] The casing substrate, from bottom to top, comprises a bottom deep cavity layer, a middle platform layer, a metal pad layer, a metal circuit layer, and a sealing layer, which, together with a ceramic cover plate, form a complete package shell. The back of the ceramic cover plate has a ceramic cover plate circuit layer and ceramic cover plate metal pads, and the edge has a ceramic cover plate sealing layer. The bottom deep cavity layer has an array of deep cavity pads for mounting flip-chip BGA chips. The middle platform layer mounts a standard chip on its surface and connects to the metal pads of the metal pad layer via bonding wires. The ceramic cover plate metal pads are used for mounting flip-chip chips, and the ceramic cover plate sealing layers are sealed together. The ceramic cover plate circuit layer and the metal circuit layer form an electrical interconnect. The structure also includes a through-hole for signal transmission, allowing electrical connection between the internal circuitry and external leads.

[0007] The ceramic cover plate is sealed to the tube shell through the ceramic cover plate sealing layer, and electrically interconnected through the ceramic cover plate circuit layer and the metal circuit layer. Both the sealing and electrical interconnection adopt Au-Au bonding or Au-Sn eutectic bonding. The bonding interface between the ceramic cover plate sealing layer and the sealing layer forms a continuous metal sealing ring, which has both hermetic sealing and mechanical fixing functions. The bonding interface between the ceramic cover plate circuit layer and the metal circuit layer forms a stable conductive channel to ensure signal transmission.

[0008] The size of the flip chip is smaller than the cavity size of the bottom deep cavity layer, so that the flip chip can be completely embedded in the deep cavity when the cover is closed, realizing a three-dimensional stacked layout.

[0009] The metal pads of the metal pad layer are connected to the deep cavity pads and the metal circuit layer respectively through internal wiring. The metal circuit layer is electrically interconnected with the ceramic cover plate circuit layer, and the ceramic cover plate circuit layer is conductive with the ceramic cover plate metal pads. The outer shell signal transmission hole is connected to the metal circuit layer, forming a complete interconnection channel between the flip chip, the upright chip and the external circuit. Beneficial effects

[0010] The beneficial effects achieved by the present invention through the above scheme are as follows: (1) High integration density and excellent space utilization: The present invention utilizes the three-dimensional layout design of the bottom deep cavity, the middle step and the embedded chip in the ceramic cover plate to make full use of the upper and lower space to achieve multi-chip integration, breaking the space limitation of traditional planar packaging, and accommodating more chips in a limited package volume, thus greatly improving the integration density. (2) Strong process compatibility and wide adaptability: The structure supports both flip chip mounting process and wire bonding chip mounting process. The mounting method can be flexibly selected according to the chip type (such as high frequency / high power core chip, low frequency auxiliary chip), without the need for additional adapter structure design, and adapts to the chip integration needs of different functions and different packaging requirements. (3) Reduced process difficulty and improved connection reliability: The stepped structure formed by the middle platform layer and the bottom deep cavity raises the upright chip. Compared with the traditional deep cavity direct chip mounting design, it significantly reduces the process difficulty of wire bonding, and at the same time makes the bonding wire arc more stable, reducing the risk of wire arc breakage, poor contact and other risks, thus improving the interconnection reliability. (4) Well-designed interconnection and good expandability: The ceramic cover plate and the shell are stably interconnected through metal bonding to form a complete internal circuit, which not only ensures the signal transmission between chips, but also allows for connection with external systems through the signal transmission holes in the shell; in addition, based on the modular structural design, the number, size and layout of chips can be adjusted according to actual needs, and it has good expandability. (5) Stable structure and strong practicality: Ceramic material is used as the base material for the cover plate and the shell, which has good insulation, mechanical strength and thermal stability. Combined with the stepped structure and metal bonding fixing method, the overall packaging structure is stable and reliable, which can adapt to different working environments and meet the practical needs of various electronic devices. Attached Figure Description

[0011] Figure 1 This is a schematic diagram of the ceramic tube shell of this utility model.

[0012] Figure 2 This is a schematic diagram of the overall packaging structure of the ceramic substrate of this utility model.

[0013] Figure 3 This is a top view of the overall structure of the ceramic substrate encapsulation of this utility model.

[0014] Figure 4 This is a schematic diagram of the overall encapsulation structure of the ceramic cover plate of this utility model.

[0015] Figure 5 This is a top view of the overall encapsulation structure of the ceramic cover plate of this utility model.

[0016] Figure 6 This is a schematic diagram of the ceramic tube shell and ceramic substrate after sealing.

[0017] The meanings of some of the reference numerals in the attached diagrams are as follows: 100-bottom deep cavity layer, 200-middle platform layer, 300-metal pad layer, 310-metal pad, 400-metal circuit layer, 410-sealing layer, 500-bonding wire, 600-flush chip, 700-casing signal transmission hole, 800-flip BGA chip, 110-deep cavity pad, 900-flip chip, 1000-ceramic cover plate, 1100-ceramic cover plate metal pad, 1200-ceramic cover plate circuit layer, 1300-ceramic cover plate sealing layer. Detailed Implementation

[0018] To more clearly illustrate the specific embodiments of this utility model or the technical solutions in the prior art, the specific embodiments will be briefly introduced below. Obviously, those skilled in the art can obtain other solutions based on these methods without creative effort.

[0019] Alumina is selected as the substrate material for the casing. An integral ceramic substrate comprising a bottom deep cavity layer 100, a middle platform layer 200, a metal circuit layer 400, and a sealing layer 410 is prepared through a molding process to ensure a stable connection between each layer. The step height, cavity size, and width of the sealing layer 410 are designed according to the preset chip specifications and bonding process requirements. The wiring pattern of the metal circuit layer 400 is precisely matched with the ceramic cover plate circuit layer 1200, and the metallization interface of the sealing layer 410 is perfectly matched with the ceramic cover plate sealing layer 1300.

[0020] Metallization is performed on the deep cavity pad area, metal pad area, metal circuit layer area, sealing layer area, and external circuit area of ​​the casing substrate. A metal conductive layer is deposited using sputtering and electroplating processes to form the metallized sealing interface of the deep cavity pad 110, metal pad 310, metal circuit layer 400, and sealing layer 410, as well as the outer casing signal transmission hole 700. This ensures that the metal layer is tightly bonded to the ceramic substrate and has good conductivity. The conductivity accuracy of the metal circuit layer 400 and the flatness and thickness of the metallized interface of the sealing layer 410 meet the requirements of electrical interconnection and sealing processes.

[0021] A ceramic cover plate 1000 is fabricated using an insulating ceramic material identical to that of the casing substrate. A ceramic cover plate circuit layer 1200 and a ceramic cover plate metal pad 1100 are sequentially fabricated on its back side using a high-precision metallization process. A ceramic cover plate sealing layer 1300 is fabricated at the edge of the cover plate to ensure that the wiring pattern of the ceramic cover plate circuit layer 1200 corresponds to that of the casing metal circuit layer 400, thus ensuring the reliability of their electrical interconnection. The positional accuracy of the ceramic cover plate metal pad 1100 is ensured to match the pins of the flip chip 900. The dimensions and metallization interface of the ceramic cover plate sealing layer 1300 are ensured to be fully compatible with the casing sealing layer 410, thus ensuring the sealing effect.

[0022] A suitable solder or adhesive material is applied to the deep cavity pad 110 of the bottom deep cavity layer 100, and the flip-chip BGA chip 800 is precisely aligned and mounted. The chip is fixed and electrically connected to the deep cavity pad through curing or reflow soldering processes.

[0023] Chip adhesive is applied to the mounting area of ​​the middle platform layer 200 to fix the mounting chip 600. After the adhesive cures, the pins of the mounting chip 600 are connected to the metal pads 310 of the metal pad layer 300 through bonding leads 500 using a bonding process.

[0024] Solder is applied to the ceramic cover metal pads 1100 of the ceramic cover plate 1000, and the flip chip 900 is precisely aligned, mounted, and cured to ensure electrical conductivity between the chip and the ceramic cover plate circuit layer 1200. Subsequently, the ceramic cover plate sealing layer 1300 of the ceramic cover plate 1000 is precisely aligned with the sealing layer 410 of the casing, while ensuring accurate docking of the conductive areas of the ceramic cover plate circuit layer 1200 and the metal circuit layer 400. The two are connected by metal bonding process, which not only achieves reliable sealing between the ceramic cover plate sealing layer 1300 and the sealing layer 410, but also completes stable electrical interconnection between the ceramic cover plate circuit layer 1200 and the metal circuit layer 400, and finally achieves full interconnection and fixation between the cover plate and the casing.

[0025] Furthermore, the substrate material, metal layer material, bonding method, structural dimensions and layout of this utility model can be adjusted according to the needs of actual application scenarios. As long as they do not deviate from the core structural design of this utility model, they all fall within the protection scope of this utility model.

[0026] The above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Any person skilled in the art can make corresponding changes and modifications to the technical solution of the present utility model by utilizing the methods and techniques disclosed above without departing from the spirit and scope of the present utility model. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present utility model without departing from the content of the technical solution of the present utility model shall fall within the protection scope of the technical solution of the present utility model.

Claims

1. A high-density integrated ceramic package structure, characterized by, The application relates to a ceramic material integrated tube shell base body, which is sequentially provided with a bottom deep cavity layer (100), a middle platform layer (200), a metal pad layer (300), a metal circuit layer (400) and a sealing layer (410) from bottom to top, and cooperates with a ceramic cover plate (1000) to form a complete packaging shell; the back surface of the ceramic cover plate (1000) is provided with a ceramic cover plate circuit layer (1200) and a ceramic cover plate metal pad (1100), and the edge is provided with a ceramic cover plate sealing layer (1300); the bottom deep cavity layer (100) is provided with array-distributed deep cavity pads (110) for mounting flip BGA chips (800); the middle platform layer (200) is provided with surface-mounted normal chips (600), and the normal chips (600) are connected with the metal pads (310) of the metal pad layer (300) through bonding wires (500); the ceramic cover plate metal pad (1100) is used for mounting flip chips (900), the ceramic cover plate sealing layer (1300) is sealed with the sealing layer (410), and the ceramic cover plate circuit layer (1200) is electrically interconnected with the metal circuit layer (400); the structure is further provided with a shell signal transmission hole (700) penetrating through the tube shell and used for electrically connecting the internal circuit with the external lead wire.

2. The high density integrated ceramic package structure of claim 1, wherein, The sealing of the ceramic cover plate (1000) and the tube shell is realized through the ceramic cover plate sealing layer (1300), and the electrical interconnection is realized through the ceramic cover plate circuit layer (1200) and the metal circuit layer (400); the sealing and the electrical interconnection are realized through Au-Au bonding or Au-Sn eutectic bonding, the bonding interface of the ceramic cover plate sealing layer (1300) and the sealing layer (410) forms a continuous metal sealing ring, and the ceramic cover plate circuit layer (1200) and the metal circuit layer (400) form a stable conductive channel, thereby guaranteeing signal transmission.

3. The high density integrated ceramic package structure of claim 1, wherein, The size of the flip chip (900) is smaller than the size of the cavity of the bottom deep cavity layer (100), so that the flip chip (900) can be completely embedded into the deep cavity when the cover plate is closed, and three-dimensional stacking layout is realized.

4. The high density integrated ceramic package structure of claim 1, wherein, The metal pads (310) of the metal pad layer (300) are connected with the deep cavity pads (110) and the metal circuit layer (400) through internal wiring, the metal circuit layer (400) is electrically interconnected with the ceramic cover plate circuit layer (1200), the ceramic cover plate circuit layer (1200) is conductive with the ceramic cover plate metal pad (1100), the shell signal transmission hole (700) is connected with the metal circuit layer (400), and a complete interconnection channel between the flip chip, the normal chip and the external circuit is formed.

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