Connector circuit board

Abstract

The utility model discloses a connector circuit board, and relates to a printed circuit board, the connector circuit board comprises a circuit board substrate, an Ethernet bonding pad group and a universal serial bus bonding pad group, the Ethernet bonding pad group comprises a plurality of through hole bonding pads, and the universal serial bus bonding pad group comprises a plurality of surface mounting bonding pads; the plurality of through hole bonding pads are arranged in a first area on the circuit board substrate, and the plurality of surface mounting bonding pads are arranged in a second area in the first area; the vertical projection of at least one of the plurality of through hole bonding pads on the circuit board substrate coincides with the distribution area of at least one of the plurality of surface mounting bonding pads, so that the technical problems of low space utilization rate of the circuit board and the like are solved, and the technical effect of improving the space utilization rate of the circuit board is achieved.

Description

TECHNICAL FIELD

[0001] The utility model relates to printed wiring board, specifically, relate to a connector circuit board. BACKGROUND

[0002] In the related art, in order to meet the connection demand of electronic equipment and external network or external device, the connector pad set of Ethernet interface and the connector pad set of universal serial bus (Universal Serial Bus, USB) interface are designed as mutually independent packaging modules, and are arranged in different physical areas on the circuit board substrate respectively, so that the Ethernet connector, the USB connector or both connectors can be installed flexibly according to customer demand. However, the above scheme can only make full use of the reserved space of the circuit board when the customer needs to install two kinds of connectors, and when the customer's application scenario only needs to configure one kind of connector, the independent installation area reserved for another kind of connector is idle, causing the problem of waste of circuit board wiring area.

[0003] For the technical problems such as low space utilization rate of connector circuit board in the related art, no effective solution has been proposed. UTILITY MODEL CONTENTS

[0004] The utility model provides a kind of connector circuit board, to at least solve the technical problems such as low space utilization rate of circuit board in the related art.

[0005] According to one embodiment of the utility model, a kind of connector circuit board is provided, comprising: circuit board substrate, Ethernet pad set and universal serial bus pad set, Ethernet pad set includes multiple via pads, universal serial bus pad set includes multiple surface mount pads;

[0006] Wherein, multiple via pads are arranged on the first area on the circuit board substrate, and multiple surface mount pads are arranged in the second area in the first area;

[0007] Wherein, the vertical projection of at least one via pad in multiple via pads on the circuit board substrate coincides with the distribution area of at least one surface mount pad in multiple surface mount pads.

[0008] By the utility model, since multiple via pads included by Ethernet pad set are arranged in the first area of circuit board substrate, and multiple surface mount pads included by universal serial bus pad set are arranged in the second area in the first area, and the vertical projection of at least one via pad in multiple via pads on the circuit board substrate coincides with the distribution area of at least one surface mount pad in multiple surface mount pads.

[0009] The connector circuit board provided by the utility model utilizes the physical size difference of the Ethernet pad group and the universal serial bus pad group and the structure difference of the surface mount pad and the through-hole pad, sets the second area where the universal serial bus pad group is located in the first area where the Ethernet pad group is located, constitutes the space multiplexing structure of two different connector pads on the same physical position, makes the same physical position on the connector circuit board compatible with the installation of the Ethernet connector or the universal serial bus connector, thereby avoiding the situation that the reserved area of the other connector and the panel position are idle and wasted when only one kind of connector is configured in the related art, effectively solving the technical problems such as low space utilization rate of the connector circuit board in the related art, and realizing the technical effect of improving the space utilization rate of the circuit board. BRIEF DESCRIPTION OF DRAWINGS

[0010] In order to more clearly illustrate the embodiments of the utility model, the drawings needed to be used in the embodiments will be simply introduced below, and obviously, the drawings in the following description are only some embodiments of the utility model, and other drawings can be obtained according to these drawings without creative labor for the ordinary skilled in the art.

[0011] Figure 1 It is a kind of application scene schematic diagram of connector circuit board according to related art;

[0012] Figure 2 It is a kind of structure schematic diagram of connector circuit board according to the utility model embodiments Figure One ;

[0013] Figure 3 It is a kind of application scene schematic diagram of connector circuit board according to the utility model embodiments;

[0014] Figure 4 It is a kind of pad group layout schematic diagram according to the utility model embodiments;

[0015] Figure 5 It is a kind of structure schematic diagram of connector circuit board according to the utility model embodiments Figure Two ;

[0016] Figure 6 It is a kind of structure schematic diagram of connector circuit board according to the utility model embodiments Figure Three ;

[0017] Figure 7 It is a kind of structure schematic diagram of connector circuit board according to the utility model embodiments Figure Four ;

[0018] Figure 8 It is a kind of structure schematic diagram of connector circuit board according to the utility model embodiments Figure Five ;

[0019] Figure 9 is a structural diagram of a connector circuit board according to an embodiment of the present application Figure Six ;

[0020] Figure 10 is a structural diagram of a connector circuit board according to an embodiment of the present application Figure Seven .

[0021] Among them, the above-mentioned drawings include the following reference signs:

[0022] 100, circuit board substrate; 101, first surface; 102, second surface;

[0023] 200, Ethernet pad group; 210, multiple through-hole pads; 212, first through-hole pad; 213, second through-hole pad; 214, multiple signal through-holes;

[0024] 300, universal serial bus pad group; 310, multiple surface mount pads; 310-A, first main area; 310-B, first notch area; 312, first ground pad; 313, second ground pad; 314, multiple signal pads;

[0025] 401, first area; 402, second area;

[0026] 500, insulating patch;

[0027] 610, first configuration device; 620, second configuration device;

[0028] 710, internal circuit; 720, surface circuit;

[0029] D1, first direction; L1, first center line; L2, second center line; B1, first boundary line; B2, second boundary line. DETAILED DESCRIPTION

[0030] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the protection scope of the present application.

[0031] It should be noted that in the description of the present application, the terms "comprising", "containing" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or equipment including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or equipment. The terms "first", "second" and the like are used to distinguish similar objects, not to describe a specific order or sequence. The orientation or positional relationship indicated by the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, therefore it cannot be understood as a limitation on the present application. The terms "mounting", "connecting", "connecting" should be understood broadly, for example, it can be fixed connection, or detachable connection, or integral connection; it can be mechanical connection, or electrical connection; it can be directly connected, or indirectly connected through intermediate medium, or the communication between two elements. The terms "parallel", "perpendicular", "equal" include the described case and the similar case to the described case, and the similar case is within the acceptable deviation range, wherein the acceptable deviation range is determined by the ordinary skilled in the art considering the measurement being discussed and the error related to the measurement of the specific quantity (i.e. the limitation of the measurement system). For example, "parallel" includes absolute parallel and approximate parallel, wherein the acceptable deviation range of approximate parallel can be within 5°, for example; "perpendicular" includes absolute perpendicular and approximate perpendicular, wherein the acceptable deviation range of approximate perpendicular can also be within 5°, for example. "Equal" includes absolute equality and approximate equality, wherein the acceptable deviation range of approximate equality can be, for example, less than or equal to 5% of the difference between the two equalities. For the ordinary skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0032] In order for those skilled in the art to better understand the present application, the present application will be further described in detail below in conjunction with the drawings and specific embodiments.

[0033] The present application provides a connector circuit board, before describing the optional embodiments of the present application, in order to better understand the concept of the present application and the creativity of the present application, first, the related art is described: Figure 1is a schematic diagram of an application scenario of a connector circuit board according to the related art, as shown in Figure 1 A universal serial bus interface and an Ethernet interface are provided on a panel of an electronic device, and a connector circuit board is installed on an inner side of the panel to provide electrical connection of the universal serial bus interface and the Ethernet interface. In the related art, a connector pad group of the Ethernet interface and a connector pad group of the USB interface are designed as independent packaging modules, and are arranged in different physical areas on a circuit board substrate, so as to flexibly select installation of the Ethernet connector, the USB connector or both according to customer needs. However, the above scheme can only make full use of the reserved space of the circuit board when the customer needs to install both connectors, and when the customer's application scenario only needs to configure one of the connectors, the independent installation area reserved for the other connector is idle, causing a problem of waste of circuit board wiring area.

[0034] To solve the above problem, embodiments of the present application provide a connector circuit board, Figure 2 is a structural schematic diagram of a connector circuit board according to an embodiment of the present application, Figure One as shown in Figure 2 The connector circuit board includes a circuit board substrate 100, an Ethernet pad group 200 and a universal serial bus pad group 300. The Ethernet pad group 200 includes a plurality of through-hole pads 210, and the universal serial bus pad group 300 includes a plurality of surface mount pads 310.

[0035] Among them, the plurality of through-hole pads 210 are arranged on a first area 401 on the circuit board substrate 100, and the plurality of surface mount pads 310 are arranged on a second area 402 in the first area 401.

[0036] Among them, the vertical projection of at least one through-hole pad in the plurality of through-hole pads 210 on the circuit board substrate 100 coincides with the distribution area of at least one surface mount pad in the plurality of surface mount pads 310.

[0037] Optionally, in the present embodiment, the connector circuit board can be but is not limited to a physical structure taking a printed circuit board (PCB) as a carrier, used for carrying electronic connection components and providing electrical connection functions. The form of the connector circuit board can be but is not limited to including an independent interface adapter card composed of a PCB substrate, a PCB interface area at the edge of a network device mainboard, etc. For example, an input / output (I / O) interface daughter card applied to an enterprise-level switch, a router or a server mainboard, a PCB connector adapter plate integrated at the tail of a smart network card, etc. all belong to the application form of the connector circuit board in the present embodiment.

[0038] Optionally, in the embodiment, the circuit board substrate 100 can be, but is not limited to, a layered insulating support structure constituting the circuit board body, for providing physical attachment surface and electrical insulation protection for conductive circuits and electronic components. The material of the circuit board substrate 100 can be selected from FR-4 (Flame Retardant-4, glass fiber reinforced epoxy resin copper clad plate) grade insulating plate material, CEM-3 (Composite Epoxy Material-3, epoxy glass cloth core material copper clad plate) composite substrate, or ceramic substrate suitable for high-frequency high-speed circuit scenarios. The thickness of the circuit board substrate 100 can be flexibly designed according to the connector plugging strength, internal space layout of the device, heat dissipation requirements, and component load weight, etc. For example, in a conventional application scenario, the thickness can be designed to be between 1.6mm and 2.0mm to meet the repeated plugging strength and structural stability requirements of most connectors.

[0039] Optionally, in the embodiment, the Ethernet pad group 200 can be, but is not limited to, a set of welding point positions suitable for Ethernet connectors, for realizing physical layer conduction and connection of Ethernet signals. For example, RJ45 (Registered Jack 45) connector packaging pads conforming to IEEE (Institute of Electrical and Electronics Engineers) 802.3 standard. The Ethernet pad group 200 can include, but is not limited to, signal pin holes for transmitting differential signals (TX+ (Transmit Positive) / TX- (Transmit Negative), RX+ (Receive Positive) / RX- (Receive Negative)), and metal shielding shell fixing holes for grounding and enhancing electromagnetic shielding effect, to ensure the stability and anti-interference ability of signal transmission.

[0040] Optionally, in the embodiment, the plurality of through-hole pads 210 can be, but are not limited to, a plurality of welding units penetrating through all levels of the circuit board substrate 100, for fixing and electrically connecting the inserted components. The plurality of through-hole pads 210 are adapted to the insertion requirements of the pins of the Ethernet connector (such as the RJ45 female seat). For example, plated through holes (PTH) with a hole diameter range of 0.8mm to 1.8mm can be used to realize the conduction of the upper and lower layers and the inner layer circuit of the circuit board through inner wall metallization processing.

[0041] Optionally, in the embodiment, the universal serial bus pad set 300 can be, but is not limited to, a set of pad positions of a universal serial bus connector, used to realize data interaction and power supply between the electronic device and external peripherals. For example, a USB A type interface female connector package pad conforming to the USB 2.0 or USB 3.0 protocol standard. The universal serial bus pad set 300 can include, but is not limited to, a VBUS (Voltage Bus) power supply pad, a D+ (Data Positive) / D- (Data Negative) differential data line pad, a ground pad, and a metal shell fixing pad for enhancing the stability of the connector installation.

[0042] Optionally, in the embodiment, the plurality of surface mount pads 310 can be, but are not limited to, a plurality of welding units arranged on the surface layer of the circuit board substrate 100, which realize the fixation and connection of components by using the surface mount technology (SMT), can effectively reduce the occupation of the inner layer space of the circuit board, and adapt to the SMT pin installation of the USB connector. For example, the surface mount pad can be designed as a rectangular bare copper area coated with a solder resist ink opening, and the reliable connection with the USB connector pin is completed through the solder paste printing and reflow soldering process.

[0043] Optionally, in the embodiment, the first area 401 can be, but is not limited to, a space range planned on the circuit board substrate 100 for arranging an Ethernet connector (such as an RJ45 female seat) package, to adapt to a rectangular area surrounded by the physical outer contour of the Ethernet connector, and the width thereof is usually designed to be between 19 mm and 20 mm to meet the overall installation requirements of the Ethernet connector.

[0044] Optionally, in the embodiment, the second area 402 can be, but is not limited to, a space range planned on the circuit board substrate 100 for arranging a universal serial bus connector package, to adapt to a rectangular area surrounded by the physical outer contour of the universal serial bus connector (such as a USB A type interface female seat), and the width thereof is usually designed to be between 18 mm and 19 mm to accurately match the outer dimensions of the USB connector.

[0045] Optionally, in the embodiment, the layout of the plurality of through-hole pads 210 and the plurality of surface mount pads 310 can be, but is not limited to, a complete wrapping relationship based on physical dimensions. For example, the plurality of surface mount pads 310 of the universal serial bus pad group 300 is completely placed within the physical outline of the Ethernet pad group 200 by taking advantage of the size characteristics of the Ethernet connector (corresponding to the first area 401) being larger than the USB connector (corresponding to the second area 402) in both width and height directions, and keeping the center lines of the two on the circuit board substrate 100 coincide, ensuring that the layout is regular and the space multiplexing rate is maximized.

[0046] In another embodiment, the layout of the plurality of through-hole pads 210 and the plurality of surface mount pads 310 can be, but is not limited to, an embodiment of layout based on panel interface alignment. For example, the socket plane of the Ethernet connector and the socket plane of the USB connector are set on the same vertical plane, and the coordinate positions of the two types of pads on the circuit board substrate 100 are calibrated according to the alignment relationship, so that the plurality of surface mount pads 310 naturally fall within the area surrounded by the plurality of through-hole pads 210, thereby realizing the multiplexing of the panel opening position, ensuring the convenience of plugging operation and the beauty of the panel.

[0047] Optionally, in the embodiment, the distribution area of the surface mount pad can be, but is not limited to, the area surrounded by the outer contour of the vertical projection of the surface mount pad on the circuit board substrate 100.

[0048] Optionally, in the embodiment, the vertical projection of at least one of the plurality of through-hole pads 210 on the circuit board substrate 100 coincides with the distribution area of at least one of the plurality of surface mount pads 310, and the above-mentioned coincidence design can be, but is not limited to, realized by the through-shared physical structure. For example, in the universal serial bus pad group 300, a rectangular surface mount pad (usually designed as GND (ground) attribute) for fixing the metal shell of the USB connector is selected, and a through-hole is directly provided at the corresponding position of the surface mount pad to form a through-hole pad adapted to the shielding foot of the Ethernet connector. Thus, the position is physically multiplexed as a paster welding area of the USB connector and a plug-in mounting hole of the Ethernet connector. In actual assembly, if the USB connector is selected to be assembled, the solder paste is printed on the solid copper foil part of the surface mount pad (avoiding the drilling area of the through-hole pad), and the fixation is completed by reflow soldering; if the Ethernet connector is selected to be assembled, the shielding foot thereof is directly inserted into the through-hole pad, and reliable connection is realized by wave soldering.

[0049] With this invention, the Ethernet pad group 200 includes a plurality of through-hole pads 210 disposed in the first region 401 of the circuit board substrate, while the Universal Serial Bus pad group 300 includes a plurality of surface mount pads 310 disposed in the second region 402 of the first region 401, and the vertical projection of at least one of the through-hole pads 210 on the circuit board substrate coincides with the distribution area of ​​at least one of the surface mount pads 310.

[0050] Figure 3 This is a schematic diagram illustrating an application scenario of a connector circuit board according to an embodiment of the present utility model, such as... Figure 3 As shown, the electronic device's panel has an area labeled "Compatible Interface" and an area labeled "Ethernet Interface." The "Compatible Interface" corresponds to the area on the circuit board substrate that employs the spatial multiplexing design described in this invention (i.e., the overlap of the aforementioned first and second areas). In this "Compatible Interface" area, because the circuit board integrates a multiplexed structure of Ethernet pad groups and Universal Serial Bus pad groups, this single physical location can flexibly select between installing a Universal Serial Bus connector (such as a USB female connector) or an Ethernet connector (such as an RJ45 female connector) according to actual assembly requirements.

[0051] The connector circuit board provided by this utility model utilizes the physical size differences between the Ethernet pad group 200 and the Universal Serial Bus (USB) pad group 300, as well as the structural differences between the multiple through-hole pads 210 included in the Ethernet pad group 200 and the multiple surface mount pads 310 included in the USB pad group 300, to set the second region 402 where the USB pad group 300 is located within the first region 401 where the Ethernet pad group 200 is located. This constitutes a space reuse structure for the two different connector pads in the same physical location, enabling the same physical location on the connector circuit board to be compatible with the installation of either an Ethernet connector or a USB connector. This avoids the situation in related technologies where only one type of connector is configured, leaving the reserved area and panel position of the other connector idle and wasted. It effectively solves the technical problem of low space utilization of connector circuit boards in related technologies and achieves the technical effect of improving the space utilization of the circuit board.

[0052] As an alternative solution, Figure 4 This is a schematic diagram of a pad group layout according to an embodiment of the present utility model, as shown below. Figure 4 As shown, the first center line L1 of the first region 401 in the first direction D1 coincides with the second center line L2 of the second region 402 in the first direction D1, and the first boundary line B1 coincides with the second boundary line B2.

[0053] The first direction D1 is a plugging direction of the Ethernet connector 800 and the universal serial bus connector 900, the first boundary line B1 is a boundary line on the first area 401 located at the entrance side of the Ethernet connector 800, and the second boundary line B2 is a boundary line on the second area 402 located at the entrance side of the universal serial bus connector 900.

[0054] Optionally, in the embodiment, the plugging direction can be flexibly designed according to the actual installation scene, for example, it can be a direction parallel to the surface of the circuit board substrate 100 and perpendicular to the plane of the cabinet panel, or it can be a direction perpendicular to the surface of the circuit board substrate 100 in a vertical installation scene; in the embodiment, the horizontal plugging direction of the horizontally installed connector female seat is taken as an example for description, so as to match the panel interface layout habit of conventional electronic equipment and ensure user operation convenience.

[0055] Optionally, in the embodiment, the first direction D1 can be but is not limited to an axis direction of a moving track when the connector assembly is plugged with an external cable or an external device. In a standard rack-mounted server or network switch, the first direction D1 can be but is not limited to a horizontal vector direction parallel to the surface of the circuit board substrate 100 and perpendicular to the plane of the equipment cabinet panel. In a conventional network switch or server mainboard design, the first direction D1 is the feeding direction of a network crystal head (RJ45 plug) or a USB data line plug inserted into a built-in port, which is usually defined as the Y-axis direction in the PCB coordinate system (assuming that the board edge of the connector circuit board is parallel to the X-axis).

[0056] Optionally, in the embodiment, the center line can be but is not limited to a symmetry axis or bisector of a planar graph in a certain dimension, used to represent the central position of the planar graph in the spatial layout. The first center line L1 coincides with the middle axis of the first area 401 in the width direction perpendicular to the first direction D1, and also coincides with the projection line of the middle vertical plane of the left and right side walls of the metal shielding shell of the Ethernet connector 800 on the circuit board substrate 100. The second center line L2 coincides with the middle axis of the second area 402 in the width direction perpendicular to the first direction D1, and also coincides with the projection line of the middle vertical line of the left and right side walls of the metal shielding shell of the universal serial bus connector 900 on the circuit board substrate 100. In the PCB design, the first center line L1 and the second center line L2 can correspond to the X-coordinate center line of the component packaging in the PCB layout software.

[0057] Optionally, in the present embodiment, the Ethernet connector 800 can be, but is not limited to, a physical interface component for accessing computer Local Area Network (LAN), such as an 8P8C (8 Positions, 8 Contacts) modular jack in compliance with IEC (International Electrotechnical Commission) 60603-7 standard, which is usually structurally provided with a metal shielding shell and LED (Light-Emitting Diode) status indicator, relatively large in size, and capable of providing a space basis for embedding other small interfaces inside.

[0058] Optionally, in the present embodiment, the USB connector 900 can be, but is not limited to, a standardized serial interface component for data transmission and power supply, such as a standard USB 2.0 or USB 3.0 Type-A interface straight or side plug-in socket, which has a flat rectangular interface feature, a width of about 12mm to 16mm, and a height of about 5mm to 7mm, and can be wrapped within the projection range of the Ethernet connector.

[0059] Optionally, in the present embodiment, the entrance side of the Ethernet connector 800 can be, but is not limited to, the side end face of the Ethernet connector 800 for receiving an external network cable plug, and the entrance side of the USB connector 900 can be, but is not limited to, the side end face of the USB connector 900 for receiving an external USB plug, which sides are usually directed towards the outside of the chassis and are the direct action surface of the plug-in and plug-out operation. Correspondingly, the first boundary line B1 can be, but is not limited to, the contour edge line of the first area 401 on the entrance side, representing the physical front end position after installation of the Ethernet connector 800 (such as an RJ45 socket); the second boundary line B2 can be, but is not limited to, the contour edge line of the second area 402 on the entrance side, representing the physical front end position after installation of the USB connector 900 (such as a USB socket). The above-mentioned contour edge line can be represented by the front end outer frame line marked on the silk screen layer or the assembly layer of the connector, or the projection line of the front end of the connector metal shell on the PCB, and is usually kept a certain distance from the board edge of the PCB to adapt to the thickness requirement of the chassis panel.

[0060] Optionally, in the embodiment, the layout operation that the first center line L1 coincides with the second center line L2 and the first boundary line B1 coincides with the second boundary line B2 can be, but is not limited to, an implementation of coordinate parameterization alignment based on computer-aided design (CAD) software. For example, in the PCB layout design (Layout) stage, first, a unified Cartesian coordinate system is established, the X-axis coordinate of the first center line L1 of the first area 401 (the area of the RJ45 package) is set to a specific value (for example, X=100.00 mm), and at the same time, the X-axis coordinate of the second center line L2 of the second area 402 (the area of the USB package) is also set to the specific value (X=100.00 mm), so as to strictly guarantee the coincidence of the first center line L1 and the second center line L2 at the data level. Subsequently, the board frame edge of the circuit board substrate 100 is locked as the Y-axis reference (for example, Y=0.00 mm), and the front-end silk screen boundary line of the RJ45 package (corresponding to the first boundary line B1) and the front-end silk screen boundary line of the USB package (corresponding to the second boundary line B2) are both set to the same offset amount (for example, Y=-2.00 mm, indicating that the board edge is 2 mm) relative to the board edge. Through the above-mentioned implementation of coordinate parameterization alignment, the alignment error caused by manual visual inspection or manual dragging can be eliminated, and it is ensured that in subsequent automated production, no matter which connector is mounted, the hole center position (X-axis) and the extension depth (Y-axis) of the connector on the case panel are kept highly consistent, thereby realizing the normalization of the case panel design.

[0061] The connector circuit board provided by the utility model utilizes the double layout design of center line alignment and inlet side boundary line coincidence, so that the first area 401 where the Ethernet pad group 200 is located and the second area 402 where the universal serial bus pad group 300 is located are kept highly consistent in the spatial coordinates relative to the case panel. Therefore, when the customer needs to configure the universal serial bus connector or the Ethernet connector, the corresponding area can be directly packaged, and the circuit board layout waste is not caused.

[0062] As an optional solution, Figure 5 is a structural diagram of a connector circuit board according to an embodiment of the utility model Figure Two As shown in Figure 5 The plurality of surface mount pads 310 include a first ground pad 312 and a second ground pad 313, and the plurality of through-hole pads 210 include a first through-hole pad 212 and a second through-hole pad 213.

[0063] The first ground pad 312 is arranged on the first side of the second area 402, the second ground pad 313 is arranged on the second side of the second area 402, and the first side and the second side are two sides adjacent to the inlet side of the universal serial bus connector 900 on the second area 402.

[0064] The first via pad 212 is arranged on the third side of the first area 401, and the second via pad 213 is arranged on the fourth side of the first area 401. The third side and the fourth side are two sides of the first area 401 adjacent to the entry side of the Ethernet connector 800.

[0065] The vertical projection of the first via pad 212 on the circuit board substrate 100 coincides with the distribution area of the first ground pad 312.

[0066] The vertical projection of the second via pad 213 on the circuit board substrate 100 coincides with the distribution area of the second ground pad 313.

[0067] Optionally, in the embodiment, the first ground pad 312 and the second ground pad 313 can be, but are not limited to, copper foil areas in the universal serial bus pad group 300 for fixing the metal shielding shell of the universal serial bus connector and providing a ground loop. For example, the first ground pad 312 and the second ground pad 313 described above can be, but are not limited to, rectangular surface mount pads adapted to the metal bent feet on both sides of the USB A type interface female seat. The size of the first ground pad 312 and the second ground pad 313 described above can be flexibly designed according to the specifications of the USB connector shell fixing feet, for example, designed as a rectangular solid copper sheet with a length and width of about 2 mm to 4 mm.

[0068] Optionally, in the embodiment, the first side and the second side correspond to the left wing and the right wing on the second area 402 distributed along the first direction D1 (insertion direction) perpendicular to the first direction D1, respectively, with the entry direction of the universal serial bus connector 900 as the reference. In the PCB design coordinate system (assuming that the first direction D1 is the Y axis, consistent with the connector insertion trajectory axis), the first side corresponds to the X axis negative direction side of the second area 402, and the second side corresponds to the X axis positive direction side of the second area 402, and the first side and the second side are strictly symmetrically distributed with the second center line L2 of the second area 402. This symmetrical layout design can ensure that the metal shell fixing feet on both sides of the universal serial bus connector 900 form uniform force contact with the first ground pad 312 and the second ground pad 313 after installation, effectively dispersing the mechanical stress generated during the insertion operation, avoiding the problems of pad welding falling off or local deformation of the circuit board substrate 100 caused by unilateral force concentration, and improving the structural stability and service life of the connector after assembly.

[0069] Optionally, in the embodiment, the first and second through-hole pads 212 and 213 can be, but are not limited to, through-holes in the Ethernet pad set 200 for accommodating connector shield shell pins or plastic positioning posts. For example, the first and second through-hole pads 212 and 213 can be, but are not limited to, PTHs adapted to fit the metal shield shell pins on both sides of the Ethernet connector. The hole diameter of the first and second through-hole pads 212 and 213 is generally designed to be between 1.2 mm and 1.8 mm, the hole wall is plated with a copper layer, and is connected to the system ground plane. When the Ethernet connector is inserted, the metal pins on both sides pass through the two through-holes and form a firm electrical and mechanical connection with the circuit board through the wave soldering process.

[0070] Optionally, in the embodiment, the third side and the fourth side correspond to the left and right wings of the first region 401 distributed perpendicular to the first direction D1 (insertion direction) based on the inlet direction of the Ethernet connector 800. In the PCB design coordinate system, the third side and the fourth side correspond to the negative direction side and the positive direction side of the X axis of the first region 401, respectively, and are symmetrically distributed with the first center line L1 of the first region 401. Since the first center line L1 of the first region 401 coincides with the second center line L2 of the second region 402, the third side and the first side, and the fourth side and the second side correspond to each other in the coordinate position of the X axis.

[0071] Optionally, in the embodiment, the vertical projection of the first through-hole pad 212 on the circuit board substrate 100 coincides with the distribution area of the first ground pad 312, which can be, but is not limited to, that the vertical projection of the first through-hole pad 212 on the circuit board substrate 100 partially coincides with the distribution area of the first ground pad 312. The partial coincidence design needs to control the coincidence ratio to avoid the problem of solder leakage when welding the universal serial bus connector 900 due to complete coincidence.

[0072] Optionally, in the embodiment, the operation of arranging each pad on the above-mentioned specific side can be, but is not limited to, the coordinate positioning process in the PCB packaging library stage. For example, taking the connector inlet center line as the Y axis, the center coordinates of the first ground pad 312 and the first through-hole pad 212 are set in the negative direction of the X axis (first side / third side), and the center coordinates of the second ground pad 313 and the second through-hole pad 213 are set in the positive direction of the X axis (second side / fourth side). Through this layout, it is ensured that whether the USB is surface mounted or the RJ45 is inserted, the force fulcrum is uniformly distributed on both sides of the connector, ensuring the balance of the structure.

[0073] Optionally, in the embodiment, the coinciding of the first via pad 212 with the first ground pad 312 and the coinciding of the second via pad 213 with the second ground pad 313 can be, but are not limited to, realized by a physical structure design that the pads are drilled. Specifically, the first ground pad 312 is a larger rectangular copper foil area (distribution area) itself, and the first via pad 212 is designed to overlap the rectangular copper foil area. In actual PCB manufacturing, this coinciding design is manifested as: at the position of the rectangular SMT pad belonging to the USB fixed, a drill belonging to the RJ45 fixed is placed, that is, the copper foil of the rectangular pad is hollowed out at the drill position to form a special pad structure with a metalized hole ring. This structure has both the flatness characteristics of surface mounting (except for the hole) and the through characteristics of through-hole mounting. By controlling the proportion of the drill area to the entire rectangular pad area (for example, less than a certain threshold), it can be ensured that during the reflow soldering process, the melted solder paste mainly adheres to the remaining copper foil, and a large amount of solder paste does not flow into the through hole to cause solder voids or insufficient solder amount.

[0074] The connector circuit board provided by the utility model makes full use of the characteristic that the ground pad area of the universal serial bus connector is larger, hides the through hole pad of the Ethernet connector in the pad of the universal serial bus connector, avoids opening an area on the PCB for placing the fixing hole of the Ethernet connector, and greatly saves wiring space. Secondly, this coinciding design also solves the compatibility problem: when the USB connector needs to be welded, although part of the area of the pad is a through hole, the remaining pad area is still sufficient to support the welding of the USB paster foot, and by controlling the steel mesh opening to avoid the through hole, solder loss can be prevented; when the Ethernet connector needs to be welded, the through hole is directly used as a pin insertion hole, and a good conductive connection is formed with the surrounding copper foil (i.e. the original USB pad).

[0075] As an optional solution, Figure 6 is a structural diagram of a connector circuit board according to an embodiment of the utility model Figure Three As shown in Figure 6 At least one surface mount pad includes: a first main body area 310-A and a first notch area 310-B;

[0076] The first notch area 310-B is an area in which the vertical projection of the at least one through hole pad on the circuit board substrate 100 coincides with the distribution area of the at least one surface mount pad, and the first main body area 310-A is an area of the at least one surface mount pad other than the first notch area 310-B.

[0077] wherein the area of the first cutout region 310-B is less than or equal to an area threshold.

[0078] Optionally, in the present embodiment, the first cutout region 310-B can be but is not limited to a region on the surface mount pad that is physically removed of copper foil or defined as a non-soldering plane due to the presence of a through-hole pad. As shown in Figure 6 the first cutout region 310-B physically manifests as the portion of at least one of the through-hole pads 210 (corresponding to Ethernet connector pins) that overlaps with the surface mount pad 310 (corresponding to USB connector pins). When soldering the USB connector, the first cutout region 310-B is occupied by the through-hole and is not covered by a complete copper foil, thus cannot be used to carry SMT solder paste and only serves as a passage for the Ethernet connector pins.

[0079] Optionally, in the present embodiment, the first main region 310-A can be but is not limited to a region on the surface mount pad that retains a complete metal copper foil, is capable of carrying solder and providing mechanical connection strength. As shown in Figure 6 the first main region 310-A is the remaining complete rectangular copper foil region on the right side and the upper and lower sides of the surface mount pad 310 (corresponding to USB connector pins) after the left side portion is occupied by at least one of the through-hole pads 210 (corresponding to Ethernet connector pins). The first main region 310-A is the effective working surface for SMT soldering, used to apply solder paste during reflow soldering and form alloy solder joints with the USB connector pins, providing the main mechanical pull force and electrical conduction path.

[0080] Optionally, in the present embodiment, the area threshold can be but is not limited to the maximum hollowed-out area upper limit (usually in square millimeters) allowed to ensure the reliability of surface mount component soldering. The area threshold is not a fixed constant, but an area value calculated based on the total area of the surface mount pad. For example, the area threshold can be calculated according to the formula wherein is the total area of the surface mount pad, is a safety factor determined based on solder joint mechanical simulation and experimental data.

[0081] Optionally, in the present embodiment, the setting of the area threshold is intended to balance the requirements of both connectors: if the actual area of the first cutout region 310-B is too large (exceeds the calculated area threshold), the remaining first body region 310-A will not provide sufficient solder adhesion, resulting in the USB connector being prone to falling off; if the actual area of the first cutout region 310-B is too small (less than the area threshold), while it is beneficial for the USB connector to be soldered, it can limit the through-hole size of the Ethernet connector pins, resulting in difficult insertion.

[0082] Optionally, in the present embodiment, the partitioning operation of the first cutout region 310-B and the first body region 310-A can be but not limited to implemented based on Boolean operations of computer-aided design software. For example, first define the original contour set of the surface mount pad as (e.g. a solid rectangle), and define the drilling contour set of the through-hole pad as (e.g. a solid circle). Determine the region of as the first cutout region 310-B through logical intersection operation; and determine the region of as the first body region 310-A through logical difference operation.

[0083] Optionally, in the present embodiment, the operation of controlling the area of the first cutout region 310-B to be less than or equal to the area threshold can be but not limited to implemented based on parametric modeling. For example, after determining the fixed pad size of the USB connector (assuming the total area is ), first calculate the maximum cutout area threshold allowed for the specific pad according to a predetermined safety factor (such as 0.15). Then, set an inequality constraint that must be satisfied: the area of the first cutout region 310-B is less than or equal to the maximum cutout area threshold. If the selected Ethernet connector pin is thick, resulting in the area of the first cutout region 310-B exceeding the area threshold, take compensatory measures. The compensatory measures can be but not limited to include: expanding the external contour of the USB pad outward (i.e. increasing ) as long as the PCB space allows, so that the originally excessive area of the first cutout region 310-B falls within the safe range. Alternatively, in another implementation, a model of Ethernet connector with thinner pins is selected to reduce the area of the first cutout region 310-B.

[0084] In another implementation, the above control operation can also be but not limited to implemented by optimizing the position of the first cutout region. For example, as Figure 6As shown in the middle, at least one of the plurality of through-hole pads 210 is arranged at the edge position of the surface mount pad 310 instead of the center position, so that the first notch area only cuts off a corner or a side of the surface mount pad. This edge cutting method can generally retain a more continuous and complete first main body area 310-A, which is conducive to the continuous spreading of the solder paste and the formation of surface tension, thereby further improving the welding quality while meeting the area threshold constraint.

[0085] The connector circuit board provided by the utility model, by dividing the surface mount pad into a first main body area and a first notch area, and strictly limiting the upper limit of the area of the first notch area (area threshold), realizes the smooth passing of the Ethernet connector pin while retaining a sufficient proportion of the complete copper foil (first main body area) for the SMT welding of the USB connector. Thus, the contradiction between space multiplexing and welding quality in the compatibility design is effectively solved, the problem of insufficient welding strength of the USB connector and easy falling caused by too large notch is avoided, the problem of the Ethernet connector being unable to be installed caused by too small notch is avoided, the efficient multiplexing of the circuit board wiring space is realized without sacrificing the mechanical reliability and electrical performance of the connector, and the technical effects of improving product yield and long-term reliability are achieved.

[0086] As an optional solution, the area threshold is 15% of the total area of the at least one surface mount pad.

[0087] Optionally, in the embodiment, the total area of the at least one surface mount pad can be but is not limited to the theoretical copper foil coverage area of the USB connector fixed pad. For example, for a standard USB A type interface female seat, the fixed pad on the side is usually designed as a rectangle. If the design length of the rectangular pad is L (for example, 4.0 mm), and the design width is W (for example, 3.5 mm), the total area of the surface mount pad is that is, The above total area represents the maximum available copper skin range for carrying solder paste and providing mechanical adhesion in an ideal state. When performing compatibility design calculation, the total area is used as the denominator to evaluate the damage degree of the through-hole pad to the integrity of the surface mount pad.

[0088] Optionally, in this embodiment, 15% is a safety factor determined based on solder joint mechanical simulation and experimental data, that is, the maximum allowable value of the ratio of the notch area of ​​the surface mount pad to the total area. Choosing 15% as the threshold is based on several engineering considerations: First, from a soldering quality perspective, when the missing area of ​​the solder pad is less than 15%, the remaining 85% of the copper foil area is still sufficient to form a continuous and full solder fillet, meeting the requirements for solder joint wetting area in electronic acceptance standards such as IPC-A-610 (Association Connecting Electronics Industries - Acceptability of Electronic Assemblies). Second, from a mechanical strength perspective, USB interfaces need to withstand frequent insertion and removal stresses. Experimental data shows that retaining more than 85% of the effective soldering area can ensure that the solder joint does not peel or break within the specified insertion and removal life cycle (such as 5000 times). Finally, from a fluid dynamics perspective, controlling the gap to within 15% in conjunction with the stencil mesh clearance design can effectively utilize the surface tension of the molten solder to prevent excessive solder flow to the via area, thereby avoiding insufficient solder defects.

[0089] Optionally, in this embodiment, the operation of verifying the area ratio of the notch region can be, but is not limited to, an implementation method based on geometric calculation and verification. For example, assuming the diameter of the shielding pin through-hole of the selected Ethernet connector (RJ45 female) is... (For example, 1.6mm), then the area of ​​the resulting gap region The total area of ​​the USB pads is known. for Now, let's perform the calculations: .because The design has been verified and determined to meet reliability requirements.

[0090] In another implementation, verifying the area percentage of the notch region can also be done, but is not limited to, using a design implementation based on dynamic compensation. If the initial calculation shows that the percentage exceeds 15% (e.g., due to the selection of a thicker RJ45 female connector, resulting in an increased via area), then the total area must be compensated in reverse. For example, keeping the via size constant, the area can be increased by increasing the length or width of the surface mount pads. Assume the area of ​​the through hole is... To meet the 15% requirement, the adjusted total area of ​​the solder pads should be at least [area missing]. Based on this, designers modified the dimensions of the USB pads, for example, increasing the length from 4.0mm to 4.8mm (assuming the width remains at 3.5mm), thereby enabling... , meet the condition of less than or equal to 15%. In addition, those skilled in the art can understand that the way to achieve the verification and control is not limited to the above two. For example, the area ratio can also be reduced by adjusting the shape of the through hole (such as changing to an oval hole to reduce the area), optimizing the drilling position (so that only a corner of the pad edge is cut off), and the like.

[0091] The connector circuit board provided by the utility model quantifies the area threshold value as 15% of the total area of the at least one surface-mounted pad, so that the risk of the compatible scheme can be quantitatively evaluated in the design stage, and it is ensured that each design can meet the high-strength plug-in requirement, and the problem of uneven design quality caused by the lack of quantitative standards is effectively solved.

[0092] As an optional solution, Figure 7 is a structural diagram of a connector circuit board according to an embodiment of the utility model Figure Four As shown in Figure 7 The connector circuit board further comprises an insulating patch 500.

[0093] The insulating patch 500 is arranged on the surface of the at least one surface-mounted pad.

[0094] The vertical projection of the insulating patch 500 on the circuit board substrate 100 covers the first main body area 310-A.

[0095] Optionally, in the embodiment, the insulating patch 500 can be but is not limited to a sheet-shaped insulating medium composed of a polyester film (Polyester Film, commonly known as Mylar in the art), a polyimide (Polyimide) tape or a high-strength insulating paint. For example, in actual production, black or yellow Mylar with a thickness of 0.05mm to 0.1mm is often selected. The material of the insulating patch has excellent insulating properties (breakdown voltage is usually greater than 5kV / mm), can effectively block the current path, and has good heat resistance and can withstand the residual heat effect in the wave soldering or reflow soldering process without deformation or melting. In addition, one side of the insulating patch 500 can also be coated with an acrylic or silicone pressure-sensitive adhesive, so as to be firmly attached to the surface of the circuit board and not to fall off for a long time.

[0096] Optionally, in the present embodiment, the operation of disposing the insulating patch 500 on at least one surface mount pad surface can be implemented by, but not limited to, manual assisted pasting or automated labeling equipment. For example, in the assembly process of the connector circuit board, when it is determined that the batch of products is configured as an Ethernet interface (i.e., an Ethernet connector is installed, and a USB connector is not installed), the operator or labeling machine accurately covers the pre-cut insulating patch 500 in the shape on the idle universal serial bus pad group 300. This operation usually occurs before the plug-in process, ensuring that the conductive surface of the USB pad is completely shielded before the Ethernet connector is inserted into the through hole.

[0097] In another embodiment, the above-mentioned setting operation can also be implemented by, but not limited to, screen printing insulating ink. For example, instead of using physical adhesive tape patches, a layer of peelable blue glue or permanent insulating green oil is covered on the position of the surface mount pad through the silk screen printing process in the post-processing stage or assembly stage of the PCB manufacturing.

[0098] Optionally, in the present embodiment, the operation of the vertical projection of the insulating patch 500 on the circuit board substrate 100 covering the first main body area 310-A can be implemented by, but not limited to, full coverage size design. For example, the physical size (length and width) of the insulating patch 500 is designed to be slightly larger than the corresponding size of the first main body area 310-A of the surface mount pad. Specifically, if the outer contour range of the first main body area 310-A is 4mm x 8mm, the size of the insulating patch 500 can be designed as 6mm x 10mm. When pasting, the edge of the insulating patch 500 is ensured to completely exceed the copper foil edge of the first main body area 310-A based on the center of the pad.

[0099] In another embodiment, the above-mentioned covering operation can also be implemented by, but not limited to, targeted local shielding. For example, the high-risk area that may come into contact with the metal shell of the Ethernet connector (RJ45 female seat) is covered. In the case that the metal shielding shell at the bottom of the Ethernet connector is not completely flat and may only protrude downward at a few specific support points or bending points, the insulating patch 500 only needs to cover the part of the first main body area 310-A corresponding to the position of these protruding points. By accurately measuring the spatial position relationship between the geometric characteristics of the bottom of the Ethernet connector and the USB pad, the shape and pasting position of the insulating patch 500 are customized, which not only achieves the technical effect of preventing short circuit, but also saves the amount of insulating material.

[0100] The connector circuit board provided by the utility model, through setting the insulating patch 500 on the surface mounting pad of the universal serial bus pad group 300, and making it vertically project to cover the first main body area 310-A, a physical isolation barrier is constructed between the metal shielding shell bottom surface of the Ethernet connector and the USB pad of the circuit board surface layer, the possible electrical contact path between the two is effectively blocked, and the hidden dangers such as power short circuit, signal interference or electrochemical corrosion caused by the crimping of the Ethernet connector metal shell on the idle USB pad under the compatibility layout are solved.

[0101] As an optional solution, Figure 8 is a structural diagram of a connector circuit board according to an embodiment of the utility model Figure Five As shown in Figure 8 , the connector circuit board further comprises: a first configuration device 610 and a second configuration device 620.

[0102] Among them, the first configuration device 610 is arranged on the first surface 101 of the circuit board substrate 100, and the second configuration device 620 is arranged on the second surface 102 of the circuit board substrate 100, wherein the first surface 101 is a surface of the circuit board substrate 100 on which a plurality of surface mounting pads 310 are arranged, and the second surface 102 is a surface of the circuit board substrate 100 opposite to the first surface 101.

[0103] Optionally, in the embodiment, the first configuration device 610 can be but is not limited to an electrostatic discharge protection diode, a power filter capacitor or an impedance matching resistor required by a universal serial bus interface circuit. As shown in Figure 8 , the first configuration device 610 is arranged on the same side plane as the surface mounting pad 310. For example, for the USB 3.0 high-speed signal line, a low-capacitance transient voltage suppressor (TVS) is usually needed to be placed near the interface to prevent electrostatic breakdown of the internal chip caused by human body contact.

[0104] Optionally, in the embodiment, the second configuration device 620 can be but is not limited to a signal transformer (if not integrated in the connector), common mode inductor, terminal resistance network or high-voltage isolation capacitor required by an Ethernet interface circuit. As shown in Figure 8 , the second configuration device 620 is located at the bottom of the circuit board substrate, and its horizontal position can be opposite to the projection area of the upper connector.

[0105] Optionally, in the present embodiment, the first surface 101 can be, but is not limited to, the top layer of the physical interface where the plurality of surface mount pads 310 are provided, i.e. the top layer of the circuit board substrate 100. In a multi-layer board structure, the top layer of the circuit board substrate 100 is usually marked as Layer 1, which is covered with solder mask ink and character silk screen for guiding the mounting of the connector and the first configuration device 610. The second surface 102 can be, but is not limited to, the bottom layer of the circuit board substrate 100 where the Ethernet connector pins are penetrated and wave soldered.

[0106] Optionally, in the present embodiment, the operation of deploying the first configuration device 610 on the first surface 101 and the second configuration device 620 on the second surface 102 can be, but is not limited to, implemented in a three-dimensional spatial stacking layout. For example, considering that the Ethernet connector is a three-dimensional device, when the RJ45 is not installed and the USB connector is installed, the USB connector only occupies the space of the first surface 101. At this time, the back of the circuit board substrate 100 in this area (i.e. the second surface 102) is physically free, and the resistance and capacitance originally belonging to part of the RJ45 circuit (i.e. the second configuration device 620) can be arranged directly below the USB connector on the back. For example, in a PCB design, the protection circuit of the USB is placed on the top layer; at the same time, the protection circuit of the RJ45 is placed on the bottom layer within the connector projection range. When the production is configured as a USB interface, the second configuration device 620 on the bottom layer can be selected not to be mounted (empty mounting), or even if it is mounted, it will not cause electrical conflict with the USB on the top layer (because the network is isolated); when the production is configured as an RJ45 interface, although the Ethernet connector body is inserted on the top layer, the pins at the bottom thereof just penetrate the board layer and form a shortest path connection with the second configuration device 620 on the bottom layer.

[0107] In another embodiment, the above deployment operation can also be, but is not limited to, implemented in a signal integrity priority wiring manner. For Ethernet differential signals, vias will introduce parasitic inductance and impedance discontinuity. Since the RJ45 is a through-hole device, the signal is transmitted from the top layer to the bottom layer. Therefore, placing the passive device that processes the Ethernet signal directly on the bottom layer (the second surface 102) can avoid the signal repeatedly shuttling between layers and reduce the number of unnecessary vias. At the same time, the USB is a surface mount device, and the signal is mainly transmitted on the surface layer, so placing its supporting device on the top layer (the first surface 101) realizes the shortest return circuit of the microstrip line.

[0108] The connector circuit board provided by the utility model, by means of the physical space difference of the first surface and the second surface of the circuit board substrate, the first configuration device serving the universal serial bus pad group is arranged on the first surface, and the second configuration device serving the Ethernet pad group is arranged on the second surface, so that the spatial resources of the connector circuit board are fully developed, layout conflicts and wiring congestion caused by the too dense two sets of peripheral circuit devices on a single surface are avoided, the problem of space limitation when two complex circuits are compatible in the same physical interface position is effectively solved, and the three-dimensional compatible layout technical effect of high density and miniaturization is realized.

[0109] As an optional solution, Figure 9 The structure diagram of a connector circuit board according to an embodiment of the utility model Figure Six As shown in Figure 9 The connector circuit board further comprises internal lines 710, and the plurality of through-hole pads 210 further comprises a plurality of signal through-holes 214.

[0110] The internal lines 710 are arranged between the first surface 101 and the second surface 102.

[0111] The plurality of signal through-holes 214 are connected with the second configuration device 620 through the internal lines 710.

[0112] Optionally, in the embodiment, the internal lines 710 can be but are not limited to conductive lines distributed in the inner layer (such as Layer 2, Layer 3, etc.) of the circuit board substrate 100. For example, in a four-layer or six-layer PCB structure, if the first surface 101 is Layer 1 and the second surface 102 is Layer 4, the internal lines 710 are distributed in Layer 2 or Layer 3. A stripline structure is usually adopted to provide better electromagnetic shielding performance.

[0113] Optionally, in the embodiment, the plurality of signal through-holes 214 can be but are not limited to through-hole pads adapted to the eight signal pins (Pin 1 to Pin 8) of the Ethernet connector. Unlike the shielding pin through-holes used for grounding described above, the plurality of signal through-holes 214 bear key data streams such as TX+, TX-, RX+, RX-, etc. The hole wall of each signal through-hole is plated with a continuous copper layer, which not only connects the top layer and the bottom layer of the PCB, but also makes electrical contact with the internal lines passing through the hole position.

[0114] Optionally, in the embodiment, the operation of arranging the internal circuit 710 between the first surface 101 and the second surface 102 can be, but is not limited to, implemented by a multilayer board pressing process. For example, in the manufacturing process, the core board of the inner layer is first etched to form a pattern of the internal circuit 710, and then the internal circuit 710 is pressed into a whole by stacking the semi-solid sheet and the outer layer copper foil under high temperature and high pressure. The structure design makes the internal circuit 710 physically isolated from the outside world and does not occupy the surface layer space of the connector circuit board.

[0115] Optionally, in the embodiment, the operation of connecting the plurality of signal through holes 214 to the second configuration device 620 through the internal circuit 710 can be, but is not limited to, implemented by an inner layer fan-out wiring. For example, the long pin of the Ethernet connector is inserted into the plurality of signal through holes 214 and penetrates through the whole board thickness. Although the signal is physically accessible on the top layer and the bottom layer, the designer intentionally selects to draw a lead (i.e., the internal circuit 710) from the through hole wall on the inner layer (such as Layer 3). The internal circuit extends for a distance in the dielectric layer, reaches the vicinity of the second configuration device 620 (located on the bottom layer), and then is electrically connected to the through hole pin of the second configuration device 620 (if the configuration device is also a plug-in) through a blind hole or a buried hole.

[0116] In another embodiment, the above connection operation can also be, but is not limited to, implemented by a full inner layer interconnection cooperation via hole drop line. For example, the second configuration device 620 is a surface mounted component (such as a resistor array or a transformer module) located on the bottom layer (the second surface 102). The signal is conducted from the plurality of signal through holes 214 of the RJ45 to the internal circuit 710, which extends to a position above or near the pad of the second configuration device 620 after avoiding the USB wiring area on the top layer, and then penetrates to the bottom layer through a via hole to be connected to the pad of the second configuration device 620. This way also avoids the plane intersection of the USB signal line on the top layer and the structural interference that may be faced by long distance wiring on the bottom layer.

[0117] The connector circuit board provided by the utility model fully utilizes the PCB inner layer space to arrange the Ethernet signal line, fully utilizes the wiring advantage of the Ethernet connector as a through hole device, hides the network signal in the middle of the board layer, effectively solves the wiring channel blockage and electromagnetic crosstalk problem caused by the two kinds of interface signal lines on the same physical layer (especially the top layer), and realizes the signal transmission technology of layered mutual non-interference and maximum resource utilization.

[0118] As an optional solution, Figure 10 is a structural diagram of a connector circuit board according to an embodiment of the utility model Figure Seven For example, Figure 10As shown, the connector board further includes surface traces 720, and the plurality of surface mount pads 310 further includes a plurality of signal pads 314;

[0119] The surface traces 720 are disposed on the first surface 101.

[0120] The plurality of signal pads 314 are connected to the first configuration device 610 through the surface traces 720.

[0121] Optionally, in the present embodiment, the surface traces 720 can be, but are not limited to, conductive traces distributed on the first surface 101 (top layer) of the board substrate 100, typically in a microstrip structure.

[0122] Optionally, in the present embodiment, the plurality of signal pads 314 in the USB pad set 300 can be, but are not limited to, rectangular copper foil areas adapted to the USB connector female core pin definitions. For example, for a standard 4-pin USB interface, the plurality of signal pads 314 include: Pin 1 (VBUS positive power supply), Pin 2 (D- negative data), Pin 3 (D+ positive data), and Pin 4 (GND power supply ground). It is noted that the plurality of signal pads 314 are electrically different from the aforementioned first and second ground pads 312 and 313, which are mainly responsible for mechanical fixation and shielding ground, while the plurality of signal pads 314 carry core business flows.

[0123] Optionally, in the present embodiment, the plurality of signal pads 314 are connected to the first configuration device 610 through the surface traces 720, which can be, but are not limited to, a near-end protection connection implementation. For example, the first configuration device 610 is a TVS or a common-mode inductor. In terms of layout, these devices are placed in close proximity to the plurality of signal pads 314 (typically less than 5 mm apart). The surface traces 720 are drawn from the plurality of signal pads 314 and directly connected to the input terminals of the first configuration device 610 with the shortest straight-line distance. For example, the microstrip line drawn from the D+ pad is directly connected to one pin of the TVS tube, and then extended to the subsequent circuit. In this way, when an electrostatic discharge event occurs (such as a user touching the USB interface with his finger), the high-voltage pulse can be quickly bypassed to the ground through the extremely short surface traces, without being coupled to other sensitive circuits through long conductive lines.

[0124] In another embodiment, the connection operation described above can also, but not limited to, adopt the implementation of impedance matching short line. For example, the first configuration device 610 is a series resistor (usually 22 ohms or 33 ohms) for impedance matching. The surface line 720 connects the plurality of signal pads 314 with the resistor. In this embodiment, the width of the surface line 720 and the distance from the pad to the resistor are precisely calculated to ensure that the impedance of this short line is consistent with the characteristic impedance of the USB cable. Unlike the inner layer wiring which needs to be connected after being fanned out through the via, the surface layer connection allows the resistor to be directly arranged on the signal path, or to be arranged close to the connector pin in a compact manner.

[0125] The connector circuit board provided by the utility model realizes the installation of standard devices in non-standard compatible packaging by strictly following the standard pin position distribution of the Ethernet connector and the universal serial bus connector for the through-hole pads and the surface mount pads. This design strategy ensures that although a new spatial multiplexing layout is adopted, no special connector with pin bending or structural special shape needs to be customized, and standard materials in the supply chain can be directly used. Therefore, the material procurement cost and inventory management difficulty are greatly reduced, the universality and replaceability of the product in the mass production stage are ensured, and the technical effects of low cost, high universality and standardized compatible design are realized.

[0126] As an optional solution, the plurality of through-hole pads 210 are arranged according to a first position distribution in the first area 401, and the first position distribution matches the pin position distribution of the Ethernet connector 800.

[0127] The plurality of surface mount pads 310 are arranged according to a second position distribution in the second area 402, and the second position distribution matches the pin distribution of the universal serial bus connector 900.

[0128] Optionally, in the embodiment, the first position distribution can be, but is not limited to, an array of pins adapted to the Ethernet connector. For example, for a standard gigabit network socket, the signal pins at the bottom are usually arranged in an alternating front and back manner, divided into a front row of 6 pins and a rear row of 6 pins (including signal pins and LED control pins), and the pitch can be 1.27mm or 2.03mm; or a standard 8P8C structure, 8 signal pins are distributed in a zigzag manner. In addition to the signal pins, the first position distribution also includes coordinates of large aperture shielding pins located on both sides and at the back of the connector.

[0129] Optionally, in this embodiment, the second position distribution may be, but is not limited to, a pin array adapted to a USB 2.0 or 3.0 Type-A female connector. For example, for USB 2.0, its four core signal pins (VBUS, D-, D+, GND) are typically arranged in a horizontal linear "I" shape at the rear of the connector, with a pin center-to-center spacing of 2.0mm or 2.5mm. For USB 3.0, in addition to the above four pins, a row of five high-speed differential signal pins is added at the front or rear.

[0130] Optionally, in this embodiment, the arrangement of multiple through-hole pads 210 within the first region 401 according to a first position distribution, and the matching of this arrangement with the pin position distribution of the Ethernet connector 800, can be implemented, but is not limited to, using a package-based library approach. For example, firstly, the center coordinate data of the actual pins is extracted according to the specifications provided by the Ethernet connector manufacturer. For example, with the center of the front surface of the connector as the origin, the coordinates of Pin 1 are (x1, y1), the coordinates of Pin 2 are (x2, y2), and so on. Then, in the PCB design software, the through-hole pads are placed according to these precise coordinates. Matching the first position distribution with the pin position distribution of the Ethernet connector 800 can, but is not limited to, the through-hole pad diameter being slightly larger than the actual pin diameter (usually 0.1mm~0.2mm larger to ensure smooth insertion), and the relative position error of all pads being controlled within the tolerance range (e.g., ±0.05mm). Although these through-hole pads may overlap or nest with USB pads in space, they serve as a standard, compliant mounting base for Ethernet connectors, allowing any qualified standard Ethernet connector to be inserted and soldered without obstruction.

[0131] Optionally, in this embodiment, the arrangement of multiple surface mount pads 310 within the second region 402 according to a second positional distribution, and the matching of the pin distribution of the Universal Serial Bus connector 900, can be implemented, but is not limited to, using a standard-compliant design. For example, a standard USB pad group (second positional distribution) is first placed on the PCB. If, for RJ45 compatibility, a hole needs to be drilled on a USB pad (forming the aforementioned notch area), it must be ensured that the position of this hole does not disrupt the overall architecture of the second positional distribution. That is, although the width and length of the USB pad are somewhat eroded, its geometric center of gravity and electrical contact surface as a USB solder point still meet the mounting requirements of the USB connector. When the pick-and-place machine picks up a standard USB female connector for mounting, its pins can accurately fall on the remaining effective area (first main region) of these surface mount pads, achieving precise alignment.

[0132] The connector circuit board provided by the utility model is strictly matched with the pin definition of the industry standard connector in the position distribution of the pad group, that is, the compatible design of the utility model is realized based on the standard part instead of the customized part. Therefore, the production and manufacturing party can directly purchase the universal and low-cost RJ45 and USB connectors for assembly, and does not need to customize special special-shaped interfaces from the connector manufacturer, thereby effectively solving the problems of high supply chain risk and high cost caused by the use of non-standard materials.

[0133] The above describes the connector circuit board provided by the utility model in detail. The principle and implementation mode of the utility model are described by applying specific examples in this paper, and the description of the above examples is only applicable to helping understand the method and core idea of the utility model. It should be pointed out that, for ordinary skilled persons in the technical field, some improvements and modifications can be made to the utility model without departing from the principle of the utility model, and these improvements and modifications also fall within the protection scope of the utility model claims.

Claims

1. A connector circuit board, characterized in that, include: The circuit board substrate (100), the Ethernet pad group (200) and the Universal Serial Bus pad group (300) include a plurality of through-hole pads (210) and the Universal Serial Bus pad group (300) include a plurality of surface mount pads (310). The plurality of through-hole pads (210) are disposed in a first region (401) on the circuit board substrate (100), and the plurality of surface mount pads (310) are disposed in a second region (402) in the first region (401). Wherein, the vertical projection of at least one of the plurality of through-hole pads (210) on the circuit board substrate (100) coincides with the distribution area of ​​at least one of the plurality of surface mount pads (310).

2. The connector circuit board according to claim 1, characterized in that, The first centerline (L1) of the first region (401) in the first direction (D1) coincides with the second centerline (L2) of the second region (402) in the first direction (D1), and the first boundary line (B1) coincides with the second boundary line (B2). Wherein, the first direction (D1) is the insertion and removal direction of the Ethernet connector (800) and the Universal Serial Bus connector (900), the first boundary line (B1) is the boundary line on the first region (401) located on the entrance side of the Ethernet connector (800), and the second boundary line (B2) is the boundary line on the second region (402) located on the entrance side of the Universal Serial Bus connector (900).

3. The connector circuit board according to claim 2, characterized in that, The plurality of surface mount pads (310) include: a first ground pad (312) and a second ground pad (313); the plurality of through-hole pads (210) include: a first through-hole pad (212) and a second through-hole pad (213). Wherein, the first grounding pad (312) is disposed on the first side of the second region (402), and the second grounding pad (313) is disposed on the second side of the second region (402). The first side and the second side are the two sides of the second region (402) adjacent to the entrance side of the universal serial bus connector (900). Wherein, the first through-hole pad (212) is disposed on the third side of the first region (401), and the second through-hole pad (213) is disposed on the fourth side of the first region (401). The third side and the fourth side are the two sides of the first region (401) adjacent to the entrance side of the Ethernet connector (800). The vertical projection of the first through-hole pad (212) on the circuit board substrate (100) coincides with the distribution area of ​​the first ground pad (312); The vertical projection of the second through-hole pad (213) on the circuit board substrate (100) coincides with the distribution area of ​​the second ground pad (313).

4. The connector circuit board according to claim 1, characterized in that, The at least one surface mount pad includes: a first body region (310-A) and a first notch region (310-B). Wherein, the first notch area (310-B) is the area where the vertical projection of the at least one through-hole pad on the circuit board substrate (100) coincides with the distribution area of ​​the at least one surface mount pad, and the first main area (310-A) is the area on the at least one surface mount pad other than the first notch area (310-B). Wherein, the area of ​​the first gap region (310-B) is less than or equal to the area threshold.

5. The connector circuit board according to claim 4, characterized in that, The area threshold is 15% of the total area of ​​the at least one surface mount pad.

6. The connector circuit board according to claim 4, characterized in that, The connector circuit board also includes: an insulating patch (500). The insulating patch (500) is disposed on the surface of the at least one surface mount pad; The insulating patch (500) has its vertical projection on the circuit board substrate (100) covering the first main body area (310-A).

7. The connector circuit board according to any one of claims 1 to 6, characterized in that, The connector circuit board further includes: a first configuration device (610) and a second configuration device (620); The first configuration device (610) is deployed on the first surface (101) of the circuit board substrate (100), and the second configuration device (620) is deployed on the second surface (102) of the circuit board substrate (100). Wherein, the first surface (101) is the surface on the circuit board substrate (100) on which the plurality of surface mount pads (310) are disposed, and the second surface (102) is the surface on the circuit board substrate (100) opposite to the first surface (101).

8. The connector circuit board according to claim 7, characterized in that, The connector circuit board also includes internal circuitry (710), and the plurality of through-hole pads (210) also include a plurality of signal through-holes (214). The internal circuitry (710) is disposed between the first surface (101) and the second surface (102); The plurality of signal vias (214) are connected to the second configuration device (620) via the internal lines (710).

9. The connector circuit board according to claim 7, characterized in that, The connector circuit board also includes surface wiring (720), and the plurality of surface mount pads (310) also include a plurality of signal pads (314). The surface circuit (720) is disposed on the first surface (101). The plurality of signal pads (314) are connected to the first configuration device (610) via the surface line (720).

10. The connector circuit board according to claim 1, characterized in that, The plurality of through-hole pads (210) are arranged in a first position distribution within the first region (401), the first position distribution matching the pin position distribution of the Ethernet connector (800); The plurality of surface mount pads (310) are arranged in a second position distribution within the second region (402), the second position distribution matching the pin distribution of the universal serial bus connector (900).

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