Transistor device and manufacturing apparatus
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-23
- Publication Date
- 2026-04-03
AI Technical Summary
In the HEMT manufacturing process, existing technologies are slow in manufacturing transistor devices, making it difficult to improve production efficiency while ensuring high quality.
A method combining two deposition techniques is employed: first, a polycrystalline aluminum nitride layer is rapidly deposited, followed by a single-crystal aluminum nitride layer, and then the quality of the first aluminum nitride layer is improved by annealing. Finally, molecular beam epitaxy is used to enhance the quality of the buffer layer.
While ensuring the high quality of the buffer layer, the manufacturing time was significantly shortened and the production efficiency of transistor devices was improved.
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Figure CN224083953U_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the technical field of transistor device manufacturing, and more specifically, to a transistor device and manufacturing equipment. Background Technology
[0002] With technological advancements, High Electron Mobility Transistors (HEMTs) have found widespread applications in various fields. For example, in wireless communication, HEMTs are used in high-frequency power amplifiers and RF front-end modules; in the field of photodetectors, HEMTs have attracted significant attention due to their high sensitivity and fast response capabilities. The operating principle of HEMTs is based on their unique heterojunction design. When a negative voltage is applied, electrons in the 2DEG can be driven away from the channels, thereby achieving a switching function. This mechanism enables HEMTs to operate at high frequencies and features low noise and high efficiency.
[0003] The fabrication process of HEMTs is complex, typically requiring molecular beam epitaxy (MBE) or metal-organic chemical vapor deposition (MOCVD) techniques to precisely control the atomic layer thickness of the heterojunction. These techniques ensure high quality and high performance of the devices, but when using transistor device fabrication equipment to fabricate the substrate into a transistor device, a single-crystal buffer layer is created on the substrate to form the transistor device, which slows down the manufacturing speed of the transistor device. Summary of the Invention
[0004] The purpose of this disclosure is to provide a transistor device and manufacturing equipment to solve the above-mentioned technical problems.
[0005] To achieve the above objectives, this disclosure provides a transistor device, comprising: a substrate, an aluminum nitride stacked layer, and a material stacked layer sequentially grown along a growth direction, wherein the aluminum nitride stacked layer comprises;
[0006] The first aluminum nitride layer is obtained by depositing aluminum nitride on the surface of the substrate using a first deposition technique, and the first aluminum nitride layer has a polycrystalline structure.
[0007] The second aluminum nitride layer is obtained by depositing aluminum nitride using a second deposition technique after annealing the surface of the first aluminum nitride layer. The second aluminum nitride layer has a single crystal structure, wherein the typical deposition rate of the first deposition technique is greater than the typical deposition rate of the second deposition technique.
[0008] Optionally, the thickness of the first aluminum nitride layer is greater than that of the second aluminum nitride layer.
[0009] Optionally, the material stack layer includes, along the growth direction:
[0010] A channel layer, the channel layer being located above the second aluminum nitride layer;
[0011] A barrier layer, which is located above the channel layer;
[0012] An isolation layer is located above the barrier layer.
[0013] To achieve the above objectives, this disclosure provides a transistor device manufacturing apparatus for manufacturing the transistor device proposed in this disclosure, comprising a first deposition apparatus, an annealing apparatus, and a second deposition apparatus, wherein the typical deposition rate of the first deposition apparatus is greater than the typical deposition rate of the second deposition apparatus.
[0014] Optionally, the first deposition apparatus includes a physical vapor deposition apparatus or a chemical vapor deposition apparatus, and the second deposition apparatus is a molecular beam epitaxy (MBE) apparatus.
[0015] Optionally, the material stack is formed by the second deposition apparatus.
[0016] The above technical solution employs two deposition techniques to deposit aluminum nitride layers. First, a first deposition technique is used to rapidly deposit a first aluminum nitride layer on the substrate, and then a second deposition technique is used to slowly deposit a second aluminum nitride layer on the substrate. Compared to directly using the second deposition technique to deposit an aluminum nitride layer on the substrate, the deposition speed of the aluminum nitride layer on the substrate is faster.
[0017] Other features and advantages of this disclosure will be described in detail in the following detailed description section. Attached Figure Description
[0018] The accompanying drawings are provided to further illustrate the present disclosure and form part of the specification. They are used together with the following detailed description to explain the present disclosure, but do not constitute a limitation thereof. In the drawings:
[0019] Figure 1 This is a schematic cross-sectional view of a transistor device according to an exemplary embodiment.
[0020] Figure 2 This is a schematic diagram of a transistor device according to an exemplary embodiment.
[0021] Figure 3 This is a schematic diagram of a first deposition apparatus according to an exemplary embodiment.
[0022] Figure 4 This is a schematic diagram of an annealing apparatus according to an exemplary embodiment.
[0023] Figure 5 This is a schematic diagram of a second deposition apparatus according to an exemplary embodiment.
[0024] 1-First deposition apparatus; 2-Annealing apparatus; 3-Second deposition apparatus. Detailed Implementation
[0025] The specific embodiments of this disclosure will be described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustration and explanation only and are not intended to limit this disclosure.
[0026] It should be noted that all actions involving the acquisition of signals, information, or data in this disclosure are carried out in compliance with the relevant data protection laws and policies of the country where the location is situated, and with authorization from the owner of the relevant device.
[0027] For transistor devices, this transistor device can be a high electron mobility transistor (HEMT). Please refer to [link to relevant documentation]. Figure 1 and Figure 2 As shown, Figure 1 This is a schematic cross-sectional view of a transistor device according to an exemplary embodiment. Figure 2 This is a schematic diagram of a transistor device according to an exemplary embodiment. The transistor device includes a substrate, a first aluminum nitride layer (AIN-1) and a second aluminum nitride layer (AIN-2) stacked along a growth direction, and a material stack layer.
[0028] The substrate can be a material with high resistivity and high thermal conductivity, exhibiting good lattice matching or lattice mismatch with aluminum nitride. Substrate materials include sapphire, silicon, and silicon carbide, as well as gallium arsenide and indium phosphide. Substrate sizes can also include two inches, four inches, six inches, eight inches, and twelve inches, and transistor device manufacturing equipment can fabricate and transport substrates of different sizes.
[0029] When a substrate is used as the object to be deposited in a transistor device manufacturing apparatus, i.e., a substrate, the substrate may be, but is not limited to, a sapphire substrate, a silicon substrate, a silicon carbide substrate, a diamond-on-silicon substrate, a quartz substrate, a glass substrate, a zinc oxide substrate, a magnesium oxide substrate, and a lithium aluminum oxide substrate. Substrate selection criteria may include lattice matching to reduce defect formation and thermal expansion coefficient matching to reduce thermal stress.
[0030] The first aluminum nitride layer is obtained by depositing aluminum nitride on a substrate using a first deposition technique. The first aluminum nitride layer is primarily a polycrystalline structure, comprising aluminum and nitrogen (e.g., aluminum nitride). After the first deposition technique deposits aluminum nitride on the substrate, the first aluminum nitride layer on the substrate forms a polycrystalline structure. Because the first deposition technique produces the first aluminum nitride layer relatively quickly, defects may exist in the first aluminum nitride layer. To reduce these defects, the background contaminants (e.g., oxygen, carbon) in the first aluminum nitride layer can be set to approximately 1 × 10^18 cm^-3, the hydrogen content should be below approximately 1 × 10^18 cm^-3, and the deposition temperature of the first aluminum nitride layer should be less than or equal to 800 degrees Celsius or greater than or equal to 1200 degrees Celsius.
[0031] Specifically, the first deposition technique can be either physical vapor deposition (PVD) or chemical vapor deposition (CVD).
[0032] After growing the first aluminum nitride layer on the substrate using the first deposition technique, it needs to be annealed. The annealing temperature is greater than or equal to 1200 degrees Celsius, thereby improving the quality defects caused by the polycrystalline structure of the first aluminum nitride layer.
[0033] The second aluminum nitride layer is obtained by depositing aluminum nitride on the first aluminum nitride layer using a second deposition technique. The second aluminum nitride layer is primarily a single-crystal structure, consisting of aluminum and nitrogen (e.g., aluminum nitride). After the second deposition technique deposits aluminum nitride on the first aluminum nitride layer, the second aluminum nitride layer deposited on top of the first aluminum nitride layer forms a single-crystal structure. Furthermore, the second deposition technique results in a slower deposition rate for the second aluminum nitride layer, leading to fewer defects. The deposition temperature of the second aluminum nitride layer is less than or equal to 800 degrees Celsius.
[0034] Specifically, the second deposition technique is molecular beam epitaxy (MBE).
[0035] The material stack can include a channel layer (GaN), a barrier layer (AlGaN), and an isolation layer (SiN). The channel layer contains materials such as aluminum, gallium, and nitrides (e.g., AlxGa(1-x)N), but can also be gallium nitride (GaN) without aluminum. The thickness of the channel layer is approximately 10 to 500 nanometers. The barrier layer contains materials such as aluminum, gallium, and nitrides (e.g., AllyGa(1-y)N), but can also be gallium nitride (GaN) without aluminum. The thickness of the barrier layer is approximately 10 to 200 nanometers. The isolation layer contains materials such as aluminum, gallium, and nitrides (e.g., AlzGa(1-z)N), but can also be gallium nitride (GaN) without aluminum. The thickness of the isolation layer is approximately 5 to 100 nanometers.
[0036] The aluminum nitride buffer layer disclosed herein differs from existing buffer layers in the following ways:
[0037] (1) The first aluminum nitride layer in this disclosure is obtained by depositing aluminum nitride on a substrate using a first deposition technique, and the second aluminum nitride layer is obtained by depositing aluminum nitride on the annealed first aluminum nitride layer using a second deposition technique. The deposition rate of aluminum nitride using the first deposition technique is greater than that using the second deposition technique. Thus, the first aluminum nitride layer can be deposited quickly on the substrate, while the second aluminum nitride layer can be deposited slowly on the first aluminum nitride layer. The rapid deposition of the first aluminum nitride layer can shorten the deposition time, while the slow deposition of the second aluminum nitride layer can improve the quality of the aluminum nitride layer and enhance the buffering effect. The two complement each other, achieving the buffering effect while shortening the deposition time.
[0038] (2) After annealing the first aluminum nitride layer, the defect density of the first aluminum nitride layer is less than a preset density, for example, 1×10^10 cm^-2. The entire transistor device can be connected to the light-emitting device. When the defect density of the first aluminum nitride layer is large, electrons in the light-emitting device will leak through the first aluminum nitride layer, resulting in insufficient light emission from the light-emitting device. By annealing the defect density of the first aluminum nitride layer to be less than the preset density, the density of the first aluminum nitride layer is reduced, thereby hindering the flow of electrons, reducing the leakage of electrons in the light-emitting device through the first aluminum nitride layer, and ensuring the light emission performance of the light-emitting device.
[0039] (3) Since the first deposition technology such as PVD or CVD is used, the material grown is polycrystalline, which is insufficient to achieve a high quality of the first aluminum nitride layer deposited on the substrate, i.e., it cannot achieve a high crystal quality and dislocation density. Therefore, the quality of the buffer layer can be improved by growing a single-crystal aluminum nitride layer with a second deposition technology such as molecular beam epitaxy (MBE) or hydride vapor phase epitaxy (HVPE). The growth interface of the buffer layer generated in this disclosure is a single-crystal material, which can meet the growth requirements of transistor devices under the premise of rapid growth.
[0040] The beneficial effects of the embodiments of this application are as follows: By using the above technical solution, two deposition techniques are used to deposit the aluminum nitride layer. First, the first deposition technique is used to quickly deposit the first aluminum nitride layer on the substrate, and then the second deposition technique is used to slowly deposit the second aluminum nitride layer on the substrate. Compared with directly using the second deposition technique to deposit the aluminum nitride layer on the substrate, the deposition speed of the aluminum nitride layer on the substrate is faster while ensuring the same high quality effect of the buffer layer.
[0041] In some embodiments of this application, the material stack layer also includes other semiconductor structures, such as light-emitting devices composed of aluminum gallium nitride materials; lasers composed of aluminum gallium nitride materials; lasers composed of aluminum gallium nitride materials; or microelectromechanical systems (MEMS) devices with piezoelectric effects induced by aluminum gallium nitride materials.
[0042] In some embodiments of this application, the thickness of the first aluminum nitride layer can be greater than the thickness of the second aluminum nitride layer. For example, the thickness of the first aluminum nitride layer is 1 to 5 micrometers, and the thickness of the second aluminum nitride layer is 10 to 200 nanometers. The total thickness of the first and second aluminum nitride layers is in the range of several nanometers to several micrometers. Because the first deposition technique deposits the first aluminum nitride layer faster, it can be controlled to deposit a thicker first aluminum nitride layer; while the second deposition technique deposits the second aluminum nitride layer slower, it can be controlled to deposit a thinner second aluminum nitride layer.
[0043] For transistor device manufacturing equipment, the equipment is used to sequentially sputter a first aluminum nitride layer, a second aluminum nitride layer, and a material stack layer onto a substrate. (See also...) Figure 2 As shown, the transistor device manufacturing equipment includes a first deposition apparatus, an annealing apparatus, and a second deposition apparatus.
[0044] See Figure 3 As shown, Figure 3 This is a schematic diagram of a first deposition apparatus according to an exemplary embodiment. The first deposition apparatus may be a PVD deposition chamber 1. The first deposition apparatus is used to grow a first aluminum nitride layer on a substrate. For example, it employs a first deposition technique to deposit aluminum nitride on the substrate to form the first aluminum nitride layer. During the deposition of aluminum nitride on the substrate using the first deposition technique, processes such as hydride vapor phase epitaxy, atomic layer deposition, liquid phase epitaxy, physical vapor deposition, sputtering, and solid source solution epitaxy are used to deposit the first aluminum nitride layer on the substrate. The growth temperature at which the first deposition apparatus deposits aluminum nitride on the substrate can be below 800°C for low-temperature deposition, or above 1200°C for high-temperature deposition.
[0045] See Figure 4 As shown, Figure 4 This is a schematic diagram of an annealing apparatus according to an exemplary embodiment. During the annealing process of the first aluminum nitride layer within the annealing apparatus 2, at least one of the following annealing devices can be used: an induction heating rapid annealing furnace, a resistance heating rapid annealing furnace, a laser heating rapid annealing furnace, and a plasma heating rapid annealing furnace. The operating temperature of these annealing devices is greater than or equal to 1200°C. An appropriate amount of nitrogen or other gas can be introduced into the annealing apparatus to improve the crystal quality of the first aluminum nitride layer.
[0046] See Figure 5 As shown, Figure 5This is a schematic diagram of a second deposition apparatus according to an exemplary embodiment. The second deposition apparatus may be an MBE deposition chamber 3. The second deposition apparatus is used to fabricate a second aluminum nitride layer on an annealed first aluminum nitride layer. For example, aluminum nitride is deposited on the annealed first aluminum nitride layer using a second deposition technique. During the deposition of aluminum nitride on the annealed first aluminum nitride layer using the second deposition technique, a molecular beam epitaxy process is employed to deposit the second aluminum nitride layer on the annealed first aluminum nitride layer. The growth temperature at which the second deposition apparatus deposits the second aluminum nitride layer on the first aluminum nitride layer is less than 950°C.
[0047] Currently, a single layer of aluminum nitride is commonly used as a buffer layer between the channel layer and the substrate. Because the channel layer and other III-nitride materials have small lattice mismatch and thermal expansion coefficient mismatch, stress will be generated during the growth of the channel layer. This stress will act on the substrate and may cause the substrate to crack. By adding a buffer layer between the channel layer and the substrate, this stress can be absorbed and buffered, thereby avoiding substrate cracking.
[0048] Based on this, this disclosure proposes to use two deposition techniques to deposit the aluminum nitride layer. First, a first deposition technique is used to rapidly deposit the first aluminum nitride layer on the substrate, and then a second deposition technique is used to slowly deposit the second aluminum nitride layer on the substrate. The first aluminum nitride layer is annealed to improve the bonding between the first and second aluminum nitride layers. Finally, the first and second aluminum nitride layers are combined to buffer the stress generated by the channel layer.
[0049] In this process, producing an aluminum nitride layer of the same thickness, using the second deposition technique throughout might take 8 hours. However, combining the first and second deposition techniques, due to the typically faster deposition rate of the first technique, can reduce the time by 3 hours, bringing the overall time down to 5 hours. This significantly improves the speed of transistor device fabrication. The 3, 5, and 8 hours mentioned above are merely examples and can be adjusted based on actual production conditions.
[0050] As can be seen from the above description of transistor devices and manufacturing equipment, this disclosure proposes a transistor device manufacturing equipment. By stacking a first aluminum nitride layer and a second aluminum nitride layer, the stress generated in the channel layer is buffered, which can reduce the growth time of the buffer layer and significantly improve the productivity of transistor devices while ensuring the same quality of the buffer layer.
[0051] The preferred embodiments of this disclosure have been described in detail above with reference to the accompanying drawings. However, this disclosure is not limited to the specific details of the above embodiments. Within the scope of the technical concept of this disclosure, various simple modifications can be made to the technical solutions of this disclosure, and these simple modifications all fall within the protection scope of this disclosure.
[0052] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, this disclosure will not describe the various possible combinations separately.
[0053] Furthermore, various different embodiments of this disclosure can be combined in any way, as long as they do not violate the spirit of this disclosure, they should also be regarded as the content disclosed in this disclosure.
Claims
1. A transistor device, characterized by, Comprise: a substrate, an aluminum nitride stack and a material stack grown in sequence along a growth direction, the aluminum nitride stack comprising: a first aluminum nitride layer, the first aluminum nitride layer being deposited on a surface of the substrate by a first deposition technique, the first aluminum nitride layer being polycrystalline; a second aluminum nitride layer, the second aluminum nitride layer being deposited on a surface of the first aluminum nitride layer by a second deposition technique after annealing the first aluminum nitride layer, the second aluminum nitride layer being monocrystalline, wherein a typical deposition rate of the first deposition technique is greater than a typical deposition rate of the second deposition technique.
2. The transistor device of claim 1, wherein, The first aluminum nitride layer has a thickness greater than the second aluminum nitride layer.
3. The transistor device of claim 1, wherein, The material stack comprises, along the growth direction: a channel layer, the channel layer being located above the second aluminum nitride layer; a barrier layer, the barrier layer being located above the channel layer; an isolation layer, the isolation layer being located above the barrier layer.
4. A transistor manufacturing apparatus for manufacturing the transistor device according to any one of claims 1 to 3, characterized by Comprise a first deposition device, an annealing device and a second deposition device, wherein a typical deposition rate of the first deposition device is greater than a typical deposition rate of the second deposition device.
5. The transistor manufacturing apparatus according to claim 4, wherein The first deposition device comprises a physical vapor deposition device or a chemical vapor deposition device, and the second deposition device is a molecular beam epitaxy deposition device.
6. The transistor manufacturing apparatus according to claim 5, wherein The material stack is prepared by the second deposition device.