Packaging structure

Abstract

The utility model discloses a packaging structure, and the structure comprises a DBC substrate which is provided with a first surface and a second surface, the power device is located on the second surface of the DBC substrate; the DBC substrate and the power device are coated with the plastic package body, and the plastic package body comprises a first side edge and a second side edge which are opposite to each other; one end of each pin extends out of the side edge of the plastic package body; wherein the DBC substrate is located at the top of the plastic package body, at least part of the first surface of the DBC substrate is exposed out of the plastic package body, and the multiple pins are led out from the first side edge and the second side edge of the plastic package body respectively. By internally integrating the insulated gate bipolar transistors and the fast recovery diodes, the packaging structure occupies a smaller area on a circuit board and is more flexible to place, and the copper-clad layer of the packaging structure is insulated from the inside, so that when the packaging structure is connected with a radiator, an insulating spacer does not need to be arranged between the packaging structure and the radiator, and a better radiating effect is obtained.

Description

TECHNICAL FIELD

[0001] The utility model relates to the technical field of semiconductor packaging, more particularly to a power device packaging structure. BACKGROUND

[0002] In modern air conditioning systems, the air conditioner outdoor unit controller as a core component plays a key role in the stable operation and performance of the air conditioner. The installation and connection process of many key electronic devices on its electronic control board directly affects production efficiency and product quality.

[0003] At present, the intelligent power module, insulated gate bipolar transistor, fast recovery diode and rectifier bridge on the traditional air conditioner outdoor unit electronic control board all adopt straight insertion packaging form. These straight insertion packaged devices need to be supported and fixed by a support frame. During the processing of the electronic control board, these straight insertion packaged devices need to be inserted one by one on the circuit board by manual operation, and then the welding process is completed by wave soldering.

[0004] However, this traditional process has significant drawbacks. On the one hand, the process involves high manual participation, requiring more manpower, which not only increases production costs but also limits the improvement of production efficiency to some extent. On the other hand, since the operator directly contacts these straight insertion packaged devices during operation, and these devices are sensitive to static electricity, there is inevitably a certain risk of static breakdown. Once static breakdown occurs, the device will be damaged, thereby affecting the performance and quality of the entire air conditioner outdoor unit, increasing the product failure rate, and causing economic losses to the production enterprise. Further, the insulated gate bipolar transistor and fast recovery diode are designed as single units, which occupy a large space and are difficult to meet the requirements of miniaturization.

[0005] Therefore, it is urgent to develop a new circuit packaging structure with power factor correction function to solve the problems faced by the traditional design and improve product stability and product quality. SUMMARY

[0006] In view of the above problems, the purpose of the utility model is to provide a packaging structure of an air conditioner power device to improve the performance and reliability of the product and improve the heat dissipation capacity and integration of the product.

[0007] The utility model provides a kind of packaging structure, comprising: DBC substrate, with opposite first surface and second surface;Lead frame, located the second surface of the DBC substrate;Power device, on the lead frame on DBC substrate;Plastic package, the DBC substrate, lead frame and the power device are covered, the plastic package includes opposite first side and second side;The one end of the plurality of pins is electrically connected with the power device, the other end of the plurality of pins is stretched from the side of the plastic package;Wherein, the DBC substrate is located at the top of the plastic package, at least part of the DBC substrate first surface is exposed from the plastic package, and the plurality of pins includes gate pin, collector pin, positive pole pin, negative pole pin and emitter pin.

[0008] Optionally, the plurality of pins are respectively led out from the first side and the second side of the plastic package.

[0009] Optionally, the DBC substrate includes ceramic substrate and copper clad layer which are stacked up and down.

[0010] Optionally, the power device includes a first fast recovery diode, a second fast recovery diode and an insulated gate bipolar transistor, the collector of the insulated gate bipolar transistor is electrically connected with the negative pole of the second fast recovery diode, and the emitter of the insulated gate bipolar transistor is electrically connected with the positive pole of the second fast recovery diode.

[0011] Optionally, the gate of the insulated gate bipolar transistor is electrically connected with the gate pin, the collector of the insulated gate bipolar transistor is electrically connected with the collector pin, the positive pole of the first fast recovery diode is electrically connected with the positive pole pin, the emitter of the insulated gate bipolar transistor is electrically connected with the emitter pin, and the negative pole of the first fast recovery diode is electrically connected with the negative pole pin.

[0012] Optionally, the lead frame includes a plurality of base islands, the plurality of base islands include a first base island, a second base island, a third base island, a fourth base island and a fifth base island, the second fast recovery diode and the insulated gate bipolar transistor are located on the first base island, the first fast recovery diode is located on the second base island, at least part of the first base island and at least part of the second base island extend to the side of the plastic package, and the third base island to the fifth base island are arranged close to the side of the plastic package.

[0013] Optionally, the first base island extends to the first side edge, the second base island extends to the second side edge, the third base island and the fourth base island are close to the first side edge of the plastic package, and the fifth base island is close to the second side edge of the plastic package; the gate of the insulated gate bipolar transistor is connected to the third base island through a bonding wire, and the gate pin is led out from the first side edge of the plastic package; the collector of the insulated gate bipolar transistor is connected to the first base island, the negative electrode of the second fast recovery diode is connected to the first base island, the first base island is connected to the collector pin, and the collector pin is led out from the first side edge of the plastic package; the emitter of the insulated gate bipolar transistor is connected to the positive electrode of the second fast recovery diode and the fifth base island respectively through bonding wires, the fifth base island is connected to the emitter pin, and the emitter pin is led out from the second side edge of the plastic package; the positive electrode of the first fast recovery diode is connected to the fourth base island through a bonding wire, the fourth base island is connected to the positive electrode pin, and the positive electrode pin is led out from the first side edge of the plastic package; the negative electrode of the first fast recovery diode is connected to the second base island, the second base island is connected to the negative electrode pin, and the negative electrode pin is led out from the second side edge of the plastic package; wherein the collector pin is located between the gate pin and the positive electrode pin, the emitter pin is arranged opposite to the gate pin, and the negative electrode pin is arranged opposite to the positive electrode pin.

[0014] Optionally, the first base island extends to the second side edge, the second base island extends to the second side edge, the third base island and the fourth base island are close to the first side edge of the plastic package, and the fifth base island is close to the second side edge of the plastic package; the gate of the insulated gate bipolar transistor is connected to the third base island through a bonding wire and is led out from the first side edge of the plastic package through the gate pin; the collector of the insulated gate bipolar transistor is connected to the first base island, the negative electrode of the second fast recovery diode is connected to the first base island, the first base island is connected to the collector pin, and the collector pin is led out from the second side edge of the plastic package; the emitter of the insulated gate bipolar transistor is connected to the positive electrode of the second fast recovery diode and the fifth base island through bonding wires respectively, the fifth base island is connected to the emitter pin, and the emitter pin is led out from the first side edge of the plastic package; the positive electrode of the first fast recovery diode is connected to the fourth base island through a bonding wire, the fourth base island is connected to the positive electrode pin, and the positive electrode pin is led out from the second side edge of the plastic package through the positive electrode pin; the negative electrode of the first fast recovery diode is connected to the second base island, the second base island is connected to the negative electrode pin, and the negative electrode pin is led out from the second side edge of the plastic package; wherein the second fast recovery diode is located between the insulated gate bipolar transistor and the first fast recovery diode, the positive electrode pin is located between the collector pin and the negative electrode pin, the gate pin is arranged opposite to the collector pin, and the emitter pin is arranged opposite to the negative electrode pin.

[0015] Optionally, the first base island extends to the second side edge, the second base island extends to the second side edge, the third base island and the fifth base island are close to the first side edge of the plastic package, and the fourth base island is close to the second side edge of the plastic package; the gate of the insulated gate bipolar transistor is connected to the fifth base island through a bonding wire, and the gate pin is led out from the first side edge of the plastic package; the collector of the insulated gate bipolar transistor is connected to the first base island, the negative electrode of the second fast recovery diode is connected to the first base island, the first base island is connected to the collector pin, and the collector pin is led out from the second side edge of the plastic package; the emitter of the insulated gate bipolar transistor is connected to the positive electrode of the second fast recovery diode and the fifth base island respectively through bonding wires, the fifth base island is connected to the emitter pin, and the emitter pin is led out from the first side edge of the plastic package through the emitter pin; the positive electrode of the first fast recovery diode is connected to the fourth base island through a bonding wire, the fourth base island is connected to the positive electrode pin, and the positive electrode pin is led out from the second side edge of the plastic package; the negative electrode of the first fast recovery diode is connected to the second base island, the second base island is connected to the negative electrode pin, and the negative electrode pin is led out from the second side edge of the plastic package; wherein the insulated gate bipolar transistor is located between the second fast recovery diode and the first fast recovery diode, the positive electrode pin is located between the collector pin and the negative electrode pin, the gate pin is arranged opposite to the collector pin, and the emitter pin is arranged opposite to the negative electrode pin.

[0016] Optionally, the width of the gate pin, the collector pin, the emitter pin, the positive electrode pin and the negative electrode pin is 0.6mm-2.6mm.

[0017] Optionally, the minimum distance between the end of each pin away from the plastic package and the plastic package is 0.2mm-3mm.

[0018] Optionally, the gap between the gate pin and the collector pin is 2mm-4mm.

[0019] Optionally, the gap between the collector pin and the positive electrode pin is 2mm-4mm.

[0020] Optionally, the gap between the emitter pin and the negative electrode pin is 3mm-8mm.

[0021] Optionally, the length of the plastic package is 10mm-20mm, the width of the plastic package is 8mm-18mm, and the thickness of the plastic package is 2mm-6mm.

[0022] Optionally, the longitudinal distance between the top surface of the plastic package and the end of the plurality of pins is 1-4mm.

[0023] According to the packaging structure, the insulated gate bipolar transistor and the fast recovery diode are integrated inside, compared with the insulated gate bipolar transistor and the fast recovery diode which are separately packaged on the circuit board, the packaging structure occupies smaller area, is placed more flexibly, has appropriate electrical clearance between pins, and can effectively save the area of the circuit board and the area of the heat sink.

[0024] The packaging structure is a patch type packaging, can be attached to the circuit board by using surface mount technology (SMT), does not need to be pre-processed by bending, length trimming and the like, no longer needs manual plug-in operation, can not only reduce production cost, but also reduce electrostatic failure risk and improve yield rate of the production line.

[0025] Further, the copper layer of the packaging structure is insulated from the inside, so that when the packaging structure is connected with the heat sink, no insulating gasket needs to be arranged between the two, the copper layer at the top of the packaging structure can be directly in contact with the heat sink, so that better heat dissipation effect is obtained, and the power specification of the power device inside the packaging structure is further reduced. BRIEF DESCRIPTION OF DRAWINGS

[0026] The above and other objects, features and advantages of the present application will become more apparent from the following description of embodiments of the present application with reference to the accompanying drawings, in which:

[0027] Figure 1 A circuit schematic diagram of the packaging structure of the first embodiment of the present application is shown;

[0028] Figure 2 A top view of the packaging structure of the first embodiment of the present application is shown;

[0029] Figure 3 A longitudinal arrangement inside the packaging structure of the first embodiment of the present application is shown;

[0030] Figure 4 A bottom view of the inside of the packaging structure of the first embodiment of the present application is shown;

[0031] Figure 5 A top view of the packaging structure of the second embodiment of the present application is shown;

[0032] Figure 6 A bottom view of the inside of the packaging structure of the second embodiment of the present application is shown;

[0033] Figure 7 A bottom view of the inside of the packaging structure of the third embodiment of the present application is shown. DETAILED DESCRIPTION

[0034] The present application will be described in greater detail by reference to the drawings. For the purpose of clarity, each of the drawings has not been drawn to scale. In addition, some of the drawings can not be to scale. There are numerous specific details indicated in order to provide a thorough description understanding of the application. However, it will be apparent to one skilled in the art that the application can be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form.

[0035] The present application can be presented in various forms, some examples of which will be described below.

[0036] Figure 1 A circuit schematic diagram of the packaging structure of the first embodiment of the present application is shown; the packaging structure comprises a first fast recovery diode FRD1, an insulated gate bipolar transistor Q1 and a second fast recovery diode FRD2, wherein the anode of the first fast recovery diode FRD1 is connected with the anode pin A, the cathode of the first fast recovery diode FRD1 is connected with the cathode pin K, the anode of the second fast recovery diode FRD2 is connected with the emitter of the insulated gate bipolar transistor Q1, and the cathode of the second fast recovery diode FRD2 is connected with the collector of the insulated gate bipolar transistor Q1; the gate of the insulated gate bipolar transistor Q1 is connected with the gate pin G, the collector of the insulated gate bipolar transistor Q1 is connected with the collector pin C, and the emitter of the insulated gate bipolar transistor Q1 is connected with the emitter pin E. The first fast recovery diode FRD1 and the insulated gate bipolar transistor Q1 are not connected inside the packaging structure.

[0037] Figure 2 A top view of the packaging structure of the first embodiment of the present application is shown; from Figure 2 It can be seen that the packaging structure comprises a DBC substrate 100, a plastic package 200 and a plurality of pins, the first fast recovery diode FRD1, the insulated gate bipolar transistor Q1 and the second fast recovery diode FRD2 of the packaging structure are all located in the plastic package 200, specifically, each of the above devices is located on a lead frame, the lead frame is on the second surface of the DBC substrate 100, at least part of the first surface of the DBC substrate 100 is exposed from the top surface of the plastic package 200 to obtain better heat dissipation effect, the plastic package 200 is for example rectangular, comprising a first side edge 201 and a second side edge 202 opposite to the first side edge 201, the gate pin G, the collector pin C and the anode pin A are for example all extended from the first side edge 201 of the plastic package 200, the emitter pin E and the cathode pin K are extended from the second side edge 202 of the plastic package 200, the collector pin C is located between the gate pin G and the anode pin A, the emitter pin E is arranged opposite to the gate pin G, and the cathode pin K is arranged opposite to the anode pin A. The length a of the plastic package 200 is 10-20mm, preferably 14mm; the width b of the plastic package 200 is 8-18mm, preferably 12mm, and the thickness of the plastic package 200 is 2-6mm.

[0038] Figure 3 This diagram shows the internal longitudinal arrangement of the packaging structure according to the first embodiment of the present invention; from Figure 3 As can be seen, the DBC substrate 100 includes a ceramic substrate 101, a copper-clad layer 102 on the upper surface of the ceramic substrate 101, and a lead frame 103 on the lower surface of the ceramic substrate 101. The lead frame 103 has multiple base islands, with a first fast recovery diode FRD1, an insulated-gate bipolar transistor Q1, and a second fast recovery diode FRD2 located on their respective base islands. One end of a lead 300 extending from the side of the molding compound 200 is connected to the lead frame 103, and the other end extends from the side of the molding compound 200. Bonding wires 104 are provided between devices within the molding compound 200, and between devices and base islands, to achieve electrical connections. Specifically, the thickness H of the molding compound 200 is, for example, 2mm-6mm, and preferably, 4mm. The lateral distance D between the edge of the molding compound 200 and the outermost end of the pin 300 is 0.2mm-3mm, preferably 1mm; the longitudinal distance h1 between the top surface of the molding compound 200 and the end of the pin 300 is 1-4mm.

[0039] Figure 4 This diagram shows an internal bottom view of the packaging structure according to the first embodiment of the present invention; from Figure 4 As can be seen, the lead frame 103 of the encapsulation structure includes a first base island 1031, a second base island 1032, a third base island 1033, a fourth base island 1034, and a fifth base island 1035. The first base island 1031 and the second base island 1032 are, for example, L-shaped, and the third base island 1033 to the fifth base island 1035 are, for example, rectangular. The protruding portions of the third base island 1033 and the first base island 1031 and the fourth base island 1034 are located near the first side 201 of the molding compound 200, and the fifth base island 1035 and the second base island 1032 are located near the second side 202. An insulated-gate bipolar transistor (IGBT) Q1 and a second fast recovery diode (FRD2) are located on the first base island 1031, and a first fast recovery diode (FRD1) is located on the second base island 1032. The first base island 1031 is connected to the collector pin C, the second base island 1032 is connected to the negative pin K, the third base island 1033 is connected to the gate pin G, the fourth base island 1034 is connected to the positive pin A, and the fifth base island 1035 is connected to the emitter pin E. There are gaps between the different base islands, which are filled with a molding compound 200. The base islands are bonded to the DBC substrate and dissipate heat through a copper layer on the opposite side of the DBC substrate.

[0040] The gate of the insulated gate bipolar transistor Q1 is connected with the third base island 1033 through a bonding wire, the gate pin G is led out from the first side edge 201 of the plastic package 200, the collector of the insulated gate bipolar transistor Q1 is connected with the first base island 1031, the negative electrode of the second fast recovery diode FRD2 is connected with the first base island 1031, the first base island 1031 is connected with the collector pin C, the collector pin C is led out from the first side edge 201 of the plastic package 200, the emitter of the insulated gate bipolar transistor Q1 is connected with the positive electrode of the second fast recovery diode FRD2 and the fifth base island 1035 respectively through bonding wires, the fifth base island 1035 is connected with the emitter pin E, and the emitter pin E is led out from the second side edge 202 of the plastic package 200.

[0041] The positive electrode of the first fast recovery diode FRD1 is connected with the fourth base island 1034, the fourth base island 1034 is connected with the positive electrode pin A and led out from the first side edge 201 of the plastic package 200 through the positive electrode pin A, the negative electrode of the first fast recovery diode FRD1 is connected with the second base island 1032 and connected with the negative electrode pin K through the second base island 1032, and the negative electrode pin K is led out from the second side edge 202 of the plastic package 200.

[0042] The collector pin C is located between the gate pin G and the positive electrode pin A, the emitter pin E is oppositely arranged with the gate pin G, and the negative electrode pin K is oppositely arranged with the positive electrode pin A.

[0043] The width d1 of the gate pin G is, for example, 0.6mm-2.6mm, preferably 2mm; the widths of the collector pin C, the positive electrode pin A, the emitter pin E and the negative electrode pin K are, for example, all 1.2mm-2.6mm, preferably 2mm; the gap d3 between the gate pin G and the collector pin C is, for example, 2mm-4mm, preferably 3mm; the gap d4 between the collector pin C and the positive electrode pin A is, for example, 2mm-4mm, preferably 3mm; and the gap d5 between the emitter pin E and the negative electrode pin K is, for example, 3mm-8mm, preferably 8mm.

[0044] Figure 5 A top view of the packaging structure of the second embodiment of the utility model is shown; the packaging structure of the second embodiment is similar to the first embodiment, and the difference lies in that the emitter pin E and the gate pin G are located at the first side edge 201 of the plastic package 200, the negative electrode pin K, the positive electrode pin A and the collector pin C are located at the second side edge 202 of the plastic package 200, the positive electrode pin A is located between the negative electrode pin K and the collector pin C, the emitter pin E is oppositely arranged with the negative electrode pin K, and the gate pin G is oppositely arranged with the collector pin C.

[0045] Figure 6The internal bottom view schematic diagram of the packaging structure of the second embodiment of the utility model is shown; the packaging structure comprises a first base island 1031, a second base island 1032, a third base island 1033, a fourth base island 1034 and a fifth base island 1035, the first base island 1031 and the second base island 1032 are L-shaped for example, the third base island 1033 to the fifth base island 1035 are rectangular for example; the third base island 1033 and the fifth base island 1035 are close to the first side edge 201 of the plastic package 200, the first base island 1031, the fourth base island 1034 and the second base island 1032 are arranged close to the second side edge 202. The insulated gate bipolar transistor Q1 and the second fast recovery diode FRD2 are located on the first base island 1031, the first fast recovery diode FRD1 is located on the second base island 1032, the first base island 1031 is connected with the collector pin C, the second base island 1032 is connected with the negative pin K, the third base island 1033 is connected with the gate pin G, the fifth base island 1035 is connected with the emitter pin E, and the fourth base island 1034 is connected with the positive pin A. There is a gap between different base islands and the plastic package 200 fills the gap, the base island is bonded with the DBC substrate and dissipates heat outward through the copper layer on the opposite side. The second fast recovery diode FRD2 is located between the first fast recovery diode FRD1 and the insulated gate bipolar transistor Q1.

[0046] The gate of the insulated gate bipolar transistor Q1 is connected with the third base island 1033 through a bonding wire and is led out from the first side edge 201 of the plastic package 200 through the gate pin G; the collector of the insulated gate bipolar transistor Q1 is connected with the first base island 1031, the negative electrode of the second fast recovery diode FRD2 is connected with the first base island 1031, the first base island 1031 is connected with the collector pin C, and the collector pin C is led out from the second side edge 202 of the plastic package 200. The emitter of the insulated gate bipolar transistor Q1 is connected with the positive electrode of the second fast recovery diode FRD2 and the fifth base island 1035 through bonding wires respectively, the fifth base island 1035 is connected with the emitter pin E, and the emitter pin E is led out from the first side edge 201 of the plastic package 200.

[0047] The positive electrode of the first fast recovery diode FRD1 is connected with the fourth base island 1034 through a bonding wire, the fourth base island 1034 is connected with the positive pin A, and the positive pin A is led out from the second side edge 202 of the plastic package 200;

[0048] The negative electrode of the first fast recovery diode FRD1 is connected with the second base island 1032, the second base island 1032 is connected with the negative pin K, and the negative pin K is led out from the second side edge 202 of the plastic package 200.

[0049] Figure 7 The internal bottom view schematic diagram of the packaging structure of the third embodiment of the utility model is shown, the third embodiment is similar to the second embodiment, the third embodiment is similar to the second embodiment along theFigure 6 The structure after mirroring the center dotted line up and down, the third embodiment is different from the structure after mirroring the second embodiment, the arrangement position of the insulated gate bipolar transistor Q1 and the second fast recovery diode FRD2 in the first base island 1031, in the third embodiment, the insulated gate bipolar transistor Q1 is located between the first fast recovery diode FRD1 and the second fast recovery diode FRD2.

[0050] The packaging structure is integrated with the insulated gate bipolar transistor and the fast recovery diode inside, compared with the insulated gate bipolar transistor and the fast recovery diode which are separately packaged on the circuit board, the packaging structure occupies smaller area, is placed more flexibly, has appropriate electrical clearance between pins, and can effectively save the area of the circuit board and the area of the heat sink.

[0051] The packaging structure is a patch type packaging, can be mounted on the circuit board using surface mount technology (SMT), does not need to be pre-processed by bending, length trimming and other processes, and no longer needs manual plug-in operation, which can not only reduce production cost, but also reduce electrostatic failure risk and improve yield.

[0052] Further, the copper layer of the packaging structure is insulated from the inside, so that when the packaging structure is connected with the heat sink, an insulating gasket does not need to be arranged between the two, the copper layer at the top of the packaging structure can be directly in contact with the heat sink, so that better heat dissipation effect is obtained, and the power specification of the power device inside the packaging structure is further reduced.

[0053] It should be noted that in this document, the relationship terms such as first and second are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between the entities or operations. Moreover, the terms "include", "contain" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. Without more limitations, the element defined by the statement "including a" does not exclude the presence of another identical element in the process, method, article or device including the element.

[0054] In accordance with the embodiments of the present application as described above, these embodiments do not describe all the details, nor limit the present application to only the specific embodiments described. Obviously, many modifications and variations are possible in light of the above teachings. The description of these embodiments was chosen and described in order to provide the best illustration of the principles of the application and its practical application, and to thereby enable one of ordinary skill in the art to utilize the application and with modifications as appropriate for the particular use contemplated. The present application is thus not intended to be limited to the particular embodiments described and is only limited by the scope of the appended claims and equivalents thereof.

Claims

1. A package structure, characterized by, The application relates to a power device, comprising: a DBC substrate having opposite first and second surfaces; a lead frame on the second surface of the DBC substrate; a power device on the lead frame on the DBC substrate; a plastic package covering the DBC substrate, the lead frame and the power device, the plastic package comprising opposite first and second sides; a plurality of pins electrically connected to the power device at one end, the other end of the plurality of pins extending from the sides of the plastic package; wherein the DBC substrate is on top of the plastic package, at least part of the first surface of the DBC substrate is exposed from the plastic package, and the plurality of pins comprises a gate pin, a collector pin, a positive pin, a negative pin and an emitter pin.

2. The package structure of claim 1, wherein, The plurality of pins are respectively led out from the first and second sides of the plastic package.

3. The package structure of claim 1, wherein, The DBC substrate comprises a ceramic substrate and a copper clad layer stacked one above the other.

4. The package structure of claim 1, wherein, The power device comprises a first fast recovery diode, a second fast recovery diode and an insulated gate bipolar transistor, the collector of the insulated gate bipolar transistor is electrically connected to the negative electrode of the second fast recovery diode, and the emitter of the insulated gate bipolar transistor is electrically connected to the positive electrode of the second fast recovery diode.

5. The package structure of claim 4, wherein, The gate of the insulated gate bipolar transistor is electrically connected to the gate pin, the collector of the insulated gate bipolar transistor is electrically connected to the collector pin, the positive electrode of the first fast recovery diode is electrically connected to the positive pin, the emitter of the insulated gate bipolar transistor is electrically connected to the emitter pin, and the negative electrode of the first fast recovery diode is electrically connected to the negative pin.

6. The package structure of claim 4 or 5, wherein, The lead frame comprises a plurality of base islands, the plurality of base islands comprises a first base island, a second base island, a third base island, a fourth base island and a fifth base island, the second fast recovery diode and the insulated gate bipolar transistor are located on the first base island, the first fast recovery diode is located on the second base island, at least part of the first base island and at least part of the second base island extend to the sides of the plastic package, and the third base island to the fifth base island are arranged close to the sides of the plastic package.

7. The package structure of claim 6, wherein, The first base island extends to the first side, the second base island extends to the second side, the third base island and the fourth base island are close to the first side of the plastic package, and the fifth base island is close to the second side of the plastic package. The gate of the insulated gate bipolar transistor is connected to the third base island through a bonding wire, and the gate pin is led out from the first side of the plastic package. The collector of the insulated gate bipolar transistor is connected to the first base island, the negative electrode of the second fast recovery diode is connected to the first base island, the first base island is connected to the collector pin, and the collector pin is led out from the first side of the plastic package. The emitter of the insulated gate bipolar transistor is connected to the positive electrode of the second fast recovery diode and the fifth base island through a bonding wire respectively, the fifth base island is connected to the emitter pin, and the emitter pin is led out from the second side of the plastic package. The anode of the first fast recovery diode is connected with the fourth base island through a bonding wire, the fourth base island is connected with the anode pin, and the anode pin is led out from the first side edge of the plastic package body; The cathode of the first fast recovery diode is connected with the second base island, the second base island is connected with the cathode pin, and the cathode pin is led out from the second side edge of the plastic package body; The collector pin is located between the gate pin and the anode pin, the emitter pin is arranged opposite to the gate pin, and the cathode pin is arranged opposite to the anode pin.

8. The package structure of claim 6, wherein, The first base island extends to the second side edge, the second base island extends to the second side edge, the third base island and the fifth base island are close to the first side edge of the plastic package body, and the fourth base island is close to the second side edge of the plastic package body; The gate of the insulated gate bipolar transistor is connected with the third base island through a bonding wire and led out from the first side edge of the plastic package body through the gate pin; The collector of the insulated gate bipolar transistor is connected with the first base island, the cathode of the second fast recovery diode is connected with the first base island, the first base island is connected with the collector pin, and the collector pin is led out from the second side edge of the plastic package body; The emitter of the insulated gate bipolar transistor is connected with the anode of the second fast recovery diode and the fifth base island through bonding wires respectively, the fifth base island is connected with the emitter pin, and the emitter pin is led out from the first side edge of the plastic package body; The anode of the first fast recovery diode is connected with the fourth base island through a bonding wire, the fourth base island is connected with the anode pin, and the anode pin is led out from the second side edge of the plastic package body through the anode pin; The cathode of the first fast recovery diode is connected with the second base island, the second base island is connected with the cathode pin, and the cathode pin is led out from the second side edge of the plastic package body; The second fast recovery diode is located between the insulated gate bipolar transistor and the first fast recovery diode, the anode pin is located between the collector pin and the cathode pin, the gate pin is arranged opposite to the collector pin, and the emitter pin is arranged opposite to the cathode pin.

9. The package structure of claim 6, wherein, The first base island extends to the second side edge, the second base island extends to the second side edge, the third base island and the fifth base island are close to the first side edge of the plastic package body, and the fourth base island is close to the second side edge of the plastic package body; The gate of the insulated gate bipolar transistor is connected with the fifth base island through a bonding wire, and the gate pin is led out from the first side edge of the plastic package body; The collector of the insulated gate bipolar transistor is connected with the first base island, the cathode of the second fast recovery diode is connected with the first base island, the first base island is connected with the collector pin, and the collector pin is led out from the second side edge of the plastic package body; The emitter of the insulated gate bipolar transistor is connected with the anode of the second fast recovery diode and the fifth base island respectively through bonding wires, the fifth base island is connected with the emitter pin, and the emitter pin is led out from the first side edge of the plastic package body through the emitter pin; The anode of the first fast recovery diode is connected with the fourth base island through a bonding wire, the fourth base island is connected with the anode pin, and the anode pin is led out from the second side edge of the plastic package body; The cathode of the first fast recovery diode is connected with the second base island, the second base island is connected with the cathode pin, and the cathode pin is led out from the second side edge of the plastic package body; The insulated gate bipolar transistor is located between the second fast recovery diode and the first fast recovery diode, the anode pin is located between the collector pin and the cathode pin, the gate pin is arranged opposite to the collector pin, and the emitter pin is arranged opposite to the cathode pin.

10. The package structure of claim 5, wherein, The width of the gate pin, the collector pin, the emitter pin, the anode pin and the cathode pin is 0.6mm-2.6mm.

11. The package structure of claim 1, wherein, The minimum distance between the end of each pin away from the plastic package body and the plastic package body is 0.2mm-3mm.

12. The package structure of claim 7, wherein, The gap between the gate pin and the collector pin is 2mm-4mm.

13. The package structure of claim 5, wherein, The gap between the collector pin and the anode pin is 2mm-4mm.

14. The package structure of claim 5, wherein, The gap between the emitter pin and the cathode pin is 3mm-8mm.

15. The package structure of claim 1, wherein, The length of the plastic package body is 10mm-20mm, the width of the plastic package body is 8mm-18mm, and the thickness of the plastic package body is 2mm-6mm.

16. The package structure of claim 1, wherein, The longitudinal distance between the top surface of the plastic package body and the end of the plurality of pins is 1-4mm.

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