Semiconductor strain gauge and pressure sensor
By designing a semiconductor substrate as a silicon island and a supporting beam structure, the temperature drift problem of semiconductor strain gauges and pressure sensors was solved, achieving higher sensitivity and small-range pressure measurement capabilities.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- WUHAN HUAGONG XINGAOLI ELECTRON
- Filing Date
- 2025-01-20
- Publication Date
- 2026-04-17
AI Technical Summary
Existing semiconductor strain gauges and pressure sensors suffer from large temperature drift, mainly due to thermal stress caused by thermal mismatch between the stainless steel elastic diaphragm and the glass, which affects the varistor.
The semiconductor substrate is designed as a structure including a silicon island, a support beam, and two supports. The silicon island is located between the supports, and the support surface of the support beam is connected to the silicon island and the supports. The varistor is located on the support beam and is attached to the elastic diaphragm through an adhesive layer, so that only the supports and the silicon island are in contact with the diaphragm. The support beam is suspended to reduce the impact of thermal stress.
This effectively reduces the impact of medium temperature on the varistor, lowers thermal stress and temperature drift issues, and improves the sensor's sensitivity and ability to measure small pressure ranges.
Smart Images
Figure CN224136763U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of sensor technology using surface MEMS processing technology, and particularly to a semiconductor strain gauge and pressure sensor. Background Technology
[0002] Glass micro-fused pressure sensors have a wide range of applications, including petrochemical, hydraulic, food, pharmaceutical, machinery, mining, electrical, and medical instrument industries. Typically, a layer of micro-fused glass is used as the substrate material, with a semiconductor strain gauge, fabricated using surface MEMS technology, bonded to a stainless steel elastic diaphragm. The diaphragm and strain gauge are then fused together at high temperature. However, existing semiconductor strain gauges usually have a sheet-like substrate, and this substrate is typically directly bonded to the stainless steel elastic diaphragm via glass. Therefore, the temperature of the stainless steel diaphragm and the glass often affects the piezoresistor because thermal mismatch between the different materials generates thermal stress, leading to temperature drift.
[0003] Therefore, an improvement is needed to an existing semiconductor strain gauge and pressure sensor to reduce temperature drift. Utility Model Content
[0004] The purpose of this invention is to provide a semiconductor strain gauge and pressure sensor to solve the problem of large temperature drift in existing semiconductor strain gauges and pressure sensors.
[0005] To solve the above-mentioned technical problems, this utility model provides a semiconductor strain gauge, including a semiconductor substrate, an insulating layer, an isolation layer, an electrode, and a varistor. The semiconductor substrate includes a silicon island, a support beam, and two supports. The silicon island is located between the two supports. The support surface of the support beam is connected to the silicon island and the two supports respectively. The mounting surface of the support beam is opposite to the support surface of the support beam. The insulating layer is disposed on the mounting surface of the support beam. The varistor is located on the support beam between the supports and the silicon island. The isolation layer covers the varistor. The electrode is connected to the varistor.
[0006] Optionally, the number of silicon islands is one, and the number of varistors is four. The four varistors are sequentially and spaced apart on the insulating layer along the direction from one support to another, with two varistors located on one side of the silicon island and the other two varistors located on the other side of the silicon island.
[0007] Optionally, the two supports are arranged symmetrically about the silicon island.
[0008] Optionally, a plurality of glass substrates are disposed on the support and the silicon island, respectively, and are located on the side of the support away from the support beam.
[0009] This utility model also provides a pressure sensor, including an elastic diaphragm, an adhesive layer, and the aforementioned semiconductor strain gauge, wherein the semiconductor strain gauge is attached to the elastic diaphragm via the adhesive layer.
[0010] Optionally, the elastic diaphragm includes an elastic plate and a base, the base being annular, the elastic plate being connected to the base, and the semiconductor strain gauge being mounted on the side of the elastic plate away from the base.
[0011] Optionally, the support of the semiconductor strain gauge is aligned with the base, and the silicon island is located in the middle of the elastic plate.
[0012] Optionally, the elastic diaphragm further includes a reinforcing portion, which is mounted on the elastic plate and located on the same side of the elastic plate as the base. The reinforcing portion is located in the middle of the base and is disposed opposite to the silicon island.
[0013] The semiconductor strain gauge and pressure sensor provided by this utility model have the following beneficial effects:
[0014] By designing the semiconductor substrate to include a silicon island, a support beam, and two supports, with the silicon island located between the two supports and the support surfaces of the support beams connected to the silicon island and the two supports respectively, when the semiconductor strain gauge is bonded to the elastic diaphragm, only the supports and the silicon island are in contact with the elastic diaphragm. That is, only the portion of the support beam connected to the supports and the silicon island indirectly contacts the glass, while the portion of the support beam located in the gap between the silicon island and the support body, or in the gap between two silicon islands, is not in contact with the glass. In this way, the varistor is located on the suspended support beam, which can effectively reduce the influence of the dielectric temperature on the varistor located on the support beam between the supports and the silicon island, as well as the thermal stress and temperature drift problems caused by thermal mismatch between different materials. Attached Figure Description
[0015] Figure 1 This is a schematic diagram of the pressure sensor structure in an embodiment of this utility model;
[0016] Figure 2 This is a schematic diagram of the structure of the semiconductor sensor in an embodiment of this utility model;
[0017] Figure 3 This is a circuit diagram of the varistor in an embodiment of this utility model;
[0018] Figure 4 This is a schematic diagram of the structure of the SOI single-crystal silicon wafer after processing in an embodiment of this utility model;
[0019] Figure 5 This is a top view of the semiconductor strain gauge in an embodiment of this utility model;
[0020] Figure 6 This is an isometric view of the semiconductor strain gauge in an embodiment of this utility model;
[0021] Figure 7 This is a schematic diagram of the SOI single-crystal silicon wafer after cleaning in an embodiment of this utility model;
[0022] Figure 8 This is a schematic diagram of a lightly doped SOI single-crystal silicon wafer in an embodiment of this utility model;
[0023] Figure 9 This is a schematic diagram of the SOI single-crystal silicon wafer after the isolation layer has been fabricated in an embodiment of this utility model;
[0024] Figure 10 This is a schematic diagram of obtaining a varistor after photolithography of an SOI single-crystal silicon wafer in an embodiment of this utility model;
[0025] Figure 11 This is a schematic diagram of the contact holes obtained after photolithography on an SOI single-crystal silicon wafer in an embodiment of this utility model;
[0026] Figure 12 This is a schematic diagram of the SOI single-crystal silicon wafer after the passivation layer has been fabricated in an embodiment of this utility model;
[0027] Figure 13 This is a schematic diagram of the SOI single-crystal silicon wafer after electrode leads have been fabricated in this embodiment of the present invention;
[0028] Figure 14 This is a schematic diagram of the silicon substrate of the SOI single crystal silicon wafer after thinning in an embodiment of this utility model;
[0029] Figure 15 This is a schematic diagram of the SOI single-crystal silicon wafer after the through-groove is fabricated in an embodiment of this utility model;
[0030] Figure 16 This is a schematic diagram of the structure of the SOI single crystal silicon wafer bonded to the glass substrate in an embodiment of this utility model;
[0031] Figure 17 This is a schematic diagram of a semiconductor strain gauge formed after cutting an SOI single-crystal silicon wafer in an embodiment of this utility model.
[0032] Explanation of reference numerals in the attached figures:
[0033] 100-Semiconductor strain gauge;
[0034] 110 - Semiconductor substrate; 111 - Silicon island; 112 - Support beam; 113 - Support body;
[0035] 120 - Insulating layer; 130 - Isolating layer; 140 - Electrode; 150 - Varistor; 160 - Glass substrate;
[0036] 200 - Elastic diaphragm; 210 - Elastic plate; 220 - Base; 230 - Reinforcing part;
[0037] 300 - Adhesive layer;
[0038] a1-Device layer; a2-Insulating layer; a3-Silicon substrate; a4-Varistor layer; a5-Isolation layer; a6-Varistor; a7-Electrode connector; a8-Passivation layer; a9-Electrode lead; a10-Through groove; a11-Glass substrate; a12-Support beam; a13-Silicon island. Detailed Implementation
[0039] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. The components of the embodiments of this utility model described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.
[0040] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.
[0041] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.
[0042] In the description of this utility model, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product of this utility model is in use. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model. In addition, the terms "first," "second," and "third," etc., are only used to distinguish descriptions and should not be construed as indicating or implying relative importance.
[0043] Furthermore, terms such as "horizontal" and "vertical" do not imply that components must be absolutely horizontal or suspended, but rather that they can be slightly tilted. For example, "horizontal" simply means that its direction is more horizontal than "vertical," and does not mean that the structure must be completely horizontal, but can be slightly tilted.
[0044] In the description of this utility model, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.
[0045] refer to Figure 1 , Figure 1 This is a schematic diagram of the structure of a pressure sensor in an embodiment of the present invention. This embodiment provides a semiconductor strain gauge 100, including a semiconductor substrate 110, an insulating layer 120, an isolation layer 130, an electrode 140, and a piezoresistive resistor 150. The semiconductor substrate 110 includes a silicon island 111, a support beam 112, and two supports 113. The silicon island 111 is located between the two supports 113. The support surface of the support beam 112 is connected to the silicon island 111 and the two supports 113 respectively. The mounting surface of the support beam 112 is disposed opposite to the support surface of the support beam 112. The insulating layer 120 is disposed on the mounting surface of the support beam 112. The piezoresistive resistor 150 is located on the support beam 112 between the supports 113 and the silicon island 111. The isolation layer 130 covers the piezoresistive resistor 150. The electrode 140 is connected to the piezoresistive resistor 150.
[0046] By designing the semiconductor substrate 110 to include a silicon island 111, a support beam 112, and two supports 113, with the silicon island 111 located between the two supports 113, and the support surface of the support beam 112 connected to the silicon island 111 and the two supports 113 respectively, when the semiconductor strain gauge 100 is bonded to the elastic diaphragm 200, only the supports 113 and the silicon island 111 are in contact with the elastic diaphragm 200; that is, only the portions connected to the supports 113 and the silicon island 111 are in contact. The support beam 112 is indirectly in contact with the glass, while the part of the support beam 112 located in the gap between the silicon island 111 and the support body 113 or in the gap between two silicon islands 111 is not in contact with the glass. In this way, the varistor 150 is located on the suspended support beam 112, which can effectively reduce the influence of the medium temperature on the varistor 150 located on the support beam 112 between the support body 113 and the silicon island 111, as well as the thermal stress and temperature drift problems caused by thermal mismatch between different materials.
[0047] Preferably, there is one silicon island 111 and four varistor 150s. The four varistor 150s are sequentially spaced along a direction from one support 113 to another on the insulating layer 120, with two varistor 150s located on one side of the silicon island 111 and the other two on the other side. Thus, when the pressure of the measured medium acts on the elastic diaphragm 200, the force and pressure are amplified by the silicon island 111. Displacement is transmitted to the semiconductor strain gauge 100, and the two side supports 113 of the semiconductor strain gauge 100 are bonded to the elastic diaphragm 200. The support beam 112 bends and strains, and a pair of piezoresistors 150 near the silicon island 111 generate tensile stress, while a pair of piezoresistors 150 near the two side supports generate compressive stress. The resistance changes of the two piezoresistors 150 are equal in magnitude and opposite in direction. This structure can obtain a larger pressure transmission ratio, making the semiconductor strain gauge 100 more sensitive and enabling pressure measurement of a smaller range.
[0048] In this embodiment, reference Figure 2 and Figure 3 , Figure 2 This is a schematic diagram of the structure of the semiconductor sensor in an embodiment of this utility model. Figure 3 This is a circuit diagram of the varistor 150 in this embodiment of the present invention. The four varistors 150 form a Wheatstone circuit.
[0049] Preferably, the semiconductor substrate 110 is integrally formed.
[0050] The semiconductor substrate 110 is preferably a silicon substrate a3.
[0051] The semiconductor strain gauge 100 is preferably elongated, which allows it to have higher sensitivity.
[0052] The silicon island 111 is preferably rectangular in shape, which facilitates processing.
[0053] The support 113 is preferably rectangular, which facilitates processing.
[0054] The two supports 113 are preferably arranged symmetrically about the silicon island 111, which facilitates processing and gives the semiconductor strain gauge 100 higher sensitivity, enabling pressure measurement over a smaller range.
[0055] The semiconductor strain gauge 100 preferably includes a plurality of glass substrates 160, which are respectively disposed on the support 113 and the silicon island 111, and located on the side of the support 113 away from the support beam 112. This increases the height of the support 113 and the silicon island 111, further improving the temperature drift problem, and allows the semiconductor strain gauge 100 to achieve a larger pressure transmission ratio, resulting in higher sensitivity and enabling pressure measurement over a smaller range.
[0056] refer to Figure 1 This embodiment also provides a pressure sensor, including an elastic diaphragm 200, an adhesive layer 300, and a semiconductor strain gauge 100 as described in the above embodiment. The semiconductor strain gauge 100 is attached to the elastic diaphragm 200 via the adhesive layer 300.
[0057] The elastic diaphragm 200 includes an elastic plate 210 and a base 220. The base 220 is annular. The elastic plate 210 is connected to the base 220, and the semiconductor strain gauge 100 is mounted on the side of the elastic plate 210 away from the base 220.
[0058] Preferably, the elastic diaphragm 200 is integrally formed.
[0059] Preferably, the elastic diaphragm 200 is a stainless steel elastic diaphragm 200.
[0060] The elastic plate 210 is preferably in the shape of a circular plate. The base 220 is preferably in the shape of a ring.
[0061] Preferably, the support 113 of the semiconductor strain gauge 100 is aligned with the base 220, and the silicon island 111 is located in the middle of the elastic plate 210.
[0062] Furthermore, the elastic diaphragm 200 also includes a reinforcing portion 230, which is mounted on the elastic plate 210 and located on the same side of the elastic plate 210 as the base 220. The reinforcing portion 230 is located in the middle of the base 220 and is disposed opposite to the silicon island 111. Thus, when the pressure of the measured medium acts on the elastic diaphragm 200, it strengthens the axial displacement, and transmits the force and displacement to the semiconductor strain gauge 100 through the silicon island 111. The two side supports 113 of the semiconductor strain gauge 100 are fixed to the base 220 of the elastic diaphragm 200. The support beam 112 bends and strains, and a pair of piezoresistors 150 near the silicon island 111 generate tensile stress, while a pair of piezoresistors 150 near the two side supports generate compressive stress. The resistance changes of the two piezoresistors 150 are equal in magnitude and opposite in direction. In this way, the uniform pressure acting on the elastic diaphragm 200 is converted into a concentrated force through the silicon island 111 and the force is transmitted. This structure can obtain a larger pressure transmission ratio, making the semiconductor strain gauge 100 more sensitive and realizing pressure measurement for a smaller range. In addition, the reinforcing part 230 also increases the strength of the elastic diaphragm 200. This allows the elastic diaphragm 200 to be thinned, improving the sensitivity of the pressure sensor while ensuring the strength of the elastic diaphragm 200. At the same time, it avoids stress at the contact point between the semiconductor strain gauge 100 and the elastic diaphragm 200, which would affect the measurement accuracy of the pressure sensor.
[0063] Preferably, the reinforcing part 230 is a boss. In other embodiments, the reinforcing part 230 may also be other reinforcing structures that increase the strength of the elastic sheet and prevent stress from being generated at the contact point between the elastic sheet and the silicon island 111.
[0064] refer to Figure 4 , Figure 5 , Figure 6 , Figure 7 , Figure 8 , Figure 9 , Figure 10 , Figure 11 , Figure 12 , Figure 13 , Figure 14 , Figure 15 and Figure 16 , Figure 4 This is a schematic diagram of the structure of the SOI single-crystal silicon wafer after processing in an embodiment of this utility model. Figure 5 This is a top view of the semiconductor strain gauge 100 in this embodiment of the present invention. Figure 6 This is an isometric view of the semiconductor strain gauge 100 in this embodiment of the present invention. Figure 7 This is a schematic diagram of the SOI single-crystal silicon wafer after cleaning in an embodiment of this utility model. Figure 8 This is a schematic diagram of a lightly doped SOI single-crystal silicon wafer in an embodiment of this utility model. Figure 9 This is a schematic diagram of the SOI single-crystal silicon wafer after the isolation layer a5 has been fabricated in this embodiment of the present invention. Figure 10 This is a schematic diagram of the varistor a6 obtained after photolithography of an SOI single-crystal silicon wafer in this embodiment of the present invention. Figure 11 This is a schematic diagram of the contact holes obtained after photolithography on an SOI single-crystal silicon wafer in an embodiment of this utility model. Figure 12 This is a schematic diagram of the SOI single-crystal silicon wafer after the passivation layer a8 has been fabricated in this embodiment of the present invention. Figure 13 This is a schematic diagram of the SOI single-crystal silicon wafer after electrode lead a9 has been fabricated in this embodiment of the present invention. Figure 14 This is a schematic diagram of the thinned silicon substrate a3 of the SOI single-crystal silicon wafer in an embodiment of this utility model. Figure 15 This is a schematic diagram of the SOI single-crystal silicon wafer after the through-slot a10 is fabricated in an embodiment of this utility model. Figure 16 This is a schematic diagram of the structure of the SOI single-crystal silicon wafer bonded to the glass substrate 160a11 in an embodiment of this utility model. Figure 17 This is a schematic diagram of a semiconductor strain gauge 100 formed after cutting an SOI single-crystal silicon wafer in this embodiment of the present invention. This embodiment also provides a method for manufacturing a pressure sensor, including:
[0065] The device layer a1 of the SOI single crystal silicon wafer is lightly doped to obtain the varistor layer a4;
[0066] An isolation layer a5 is fabricated on the varistor layer a4;
[0067] Photolithography is performed on insulating layer a2 and varistor layer a4 to obtain varistor a6 with isolation layer a5 covering the side of insulating layer a2 away from SOI single crystal silicon wafer.
[0068] Photolithography is performed on the isolation layer a5 to obtain contact holes;
[0069] Doping is performed on the varistor a6 at the corresponding contact hole to obtain the electrode connector a7;
[0070] An electrode lead a9 electrically connected to an electrode connector a7 is fabricated on an isolation layer a5 to obtain an electrode 140 having an electrode connector a7 and an electrode lead a9.
[0071] The silicon substrate a3 of the SOI single crystal silicon wafer is etched to create parallel through-slots a10, and the varistor a6 is positioned exactly above the through-slots a10.
[0072] The processed SOI single crystal silicon wafer is cut to obtain semiconductor strain gauges 100, each of which has two through slots a10.
[0073] The semiconductor strain gauge 100 is bonded to the elastic diaphragm 200 by the adhesive layer 300.
[0074] Since the varistor a6 is located directly above the through slot a10, and each semiconductor strain gauge 100 has two through slots a10, a silicon island a13 is formed between the two through slots a10, and a support is formed on both sides of the two through slots a10, when the semiconductor strain gauge 100 is bonded to the elastic diaphragm 200, only the support and the silicon island a13 are in contact with the elastic diaphragm 200. That is, only the part of the support beam a12 connected to the support and the silicon island a13 is indirectly in contact with the glass, while the part of the support beam a12 located in the gap between the silicon island a13 and the support or in the gap between the silicon island a13 is not in contact with the glass. In this way, the varistor a6 is located on the suspended support beam a12, which can effectively reduce the influence of the medium temperature on the varistor a6 located on the support beam a12 between the support and the silicon island a13, as well as the thermal stress and temperature drift problems caused by thermal mismatch between different materials.
[0075] The isolation layer a5 is formed by high-temperature oxidation.
[0076] The electrode lead a9 is manufactured using a magnetron sputtering coating process.
[0077] Before fabricating the parallel through-slot a10, the silicon substrate a3 of the SOI single crystal silicon wafer is thinned by grinding and etching.
[0078] The method for manufacturing the pressure sensor further includes fabricating a passivation layer a8 on an insulating layer a2 before fabricating the electrode lead a9, and a portion of the electrode lead a9 is located on the passivation layer a8.
[0079] The passivation layer a8 is fabricated by low-pressure chemical vapor deposition.
[0080] The method for manufacturing the pressure sensor further includes cleaning the SOI single-crystal silicon wafer before doping the device layer a1 of the SOI single-crystal silicon wafer.
[0081] The manufacturing method of the pressure sensor further includes bonding a glass substrate a11 to the silicon substrate a3 of the SOI single crystal silicon wafer before cutting the processed SOI single crystal silicon wafer, and the glass substrate a11 is located between two adjacent through slots a10.
[0082] refer to Figure 4 The SOI single-crystal silicon wafer is cut along the indicated directions A1, A2 and B1, B2.
[0083] The above description is only a description of the preferred embodiment of the present utility model and is not intended to limit the scope of the present utility model in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.
Claims
1. A semiconductor strain gauge comprising a semiconductor substrate, an insulating layer, an isolation layer, an electrode and a piezoresistor, characterized in that, The semiconductor substrate includes a silicon island, a support beam, and two supports. The silicon island is located between the two supports. The support surface of the support beam is connected to the silicon island and the two supports, respectively. The mounting surface of the support beam is opposite to the support surface of the support beam. The insulating layer is disposed on the mounting surface of the support beam. The varistor is located on the support beam between the supports and the silicon island. The isolation layer covers the varistor. The electrode is connected to the varistor.
2. The semiconductor strain gauge of claim 1, wherein, The number of silicon islands is one, and the number of varistors is four. The four varistors are arranged sequentially and spaced apart on the insulating layer along the direction from one support to another, with two varistors located on one side of the silicon island and the other two varistors located on the other side of the silicon island.
3. The semiconductor strain gauge of claim 1, wherein, The two supports are symmetrically arranged about the silicon island.
4. The semiconductor strain gauge of claim 1, wherein, Multiple glass substrates are disposed on the support and the silicon island, respectively, and are located on the side of the support away from the support beam.
5. A pressure sensor, characterized by It includes an elastic diaphragm, an adhesive layer, and a semiconductor strain gauge as described in any one of claims 1 to 4, wherein the semiconductor strain gauge is attached to the elastic diaphragm by the adhesive layer.
6. The pressure sensor of claim 5, wherein, The elastic diaphragm includes an elastic plate and a base. The base is annular, the elastic plate is connected to the base, and the semiconductor strain gauge is mounted on the side of the elastic plate away from the base.
7. The pressure sensor of claim 6, wherein, The support of the semiconductor strain gauge is aligned with the base, and the silicon island is located in the middle of the elastic plate.
8. The pressure sensor of claim 7, wherein, The elastic diaphragm further includes a reinforcing portion, which is mounted on the elastic plate and located on the same side of the elastic plate as the base. The reinforcing portion is located in the middle of the base and is disposed opposite to the silicon island.