GIP cascade circuit and display device

Abstract

The utility model discloses a GIP cascade circuit and a display device. The GIP cascade circuit comprises a plurality of GIP circuit modules, a rapid detection line and a detection pad. The GIP circuit modules are cascaded in sequence; each GIP circuit module comprises a first key point, a second key point, a first outgoing line and a second outgoing line; the first outgoing line is electrically connected with the first key point and is used for leading out the first key point; the second outgoing line is electrically connected with the second key point and is used for leading out the second key point; the rapid detection line is overlapped with each first outgoing line and each second outgoing line, and is electrically connected with the detection pad. When a test is needed, the waveform and the voltage of the key point can be rapidly detected through laser short circuit, so that the display abnormity reason of the display device can be rapidly found, the response processing can be rapidly carried out, and the user experience is improved.

Description

Technical Field

[0001] This utility model relates to the field of rapid testing technology for display panels, and in particular to a GIP cascade circuit and display device. Background Technology

[0002] The GIP (Gate In Panel) circuit in a display device is an important circuit architecture. GIP circuitry is a technology that integrates traditional gate drive circuitry into the display panel. Its main function is to generate and transmit control signals to precisely control the on / off state of pixels in the display panel, thereby achieving correct image display.

[0003] The GIP circuit operates through a series of clock and control signals. Utilizing the principle of a shift register, it processes and transmits the input clock and control signals, sequentially applying gate signals row by row or column by column to the pixels of the display panel. This causes the pixels to charge and discharge according to a predetermined sequence and time, thereby controlling the brightness and color of the pixels.

[0004] GIP (Gateway In-Place) circuitry integrates the gate drive circuitry into the panel, reducing the use of external drive chips and thus saving space on the printed circuit board, which is beneficial for achieving thinner and smaller display devices. Reducing external chips and interconnects lowers material costs and manufacturing process complexity. It also allows for more precise control over the transmission and timing of gate signals, reducing signal transmission delay and distortion, and improving the stability and clarity of the displayed image.

[0005] When a GIP (Gate Injection Proof) fails in an existing display device, especially an LTPS product, the cause of the failure needs to be analyzed. However, existing GIP circuits can often only test one GOUT (Gate Out) and cannot directly test the waveform and voltage of the intermediate key points inside the GIP.

[0006] In summary, a method is needed to solve the above problems and quickly detect abnormal phenomena on the display screen, thereby improving product competitiveness. Utility Model Content

[0007] Existing display devices cannot directly test the waveform and voltage data of key points in GIP circuits, thus making it impossible to quickly identify the problem.

[0008] To address the aforementioned issues, a GIP cascade circuit and display device are proposed. By leading out the first and second key points of the GIP circuit of the display device through the first and second leads respectively, and overlapping with the fast detection line, the waveform and voltage of the key points can be quickly detected by laser shorting when testing is required. This allows for rapid identification of the cause of display abnormalities in the display device, enabling quick response and improvement of the user experience.

[0009] Firstly, a GIP cascade circuit includes:

[0010] Multiple GIP circuit modules;

[0011] Rapid testing line;

[0012] Test pad;

[0013] The GIP circuit modules are cascaded in sequence;

[0014] Each of the GIP circuit modules includes a first key point, a second key point, a first lead, and a second lead;

[0015] The first lead wire is electrically connected to the first key point and is used to lead out the first key point;

[0016] The second lead wire is electrically connected to the second key point and is used to lead out the second key point;

[0017] The rapid detection line overlaps with each of the first lead and the second lead, and is electrically connected to the detection pad.

[0018] In the first possible implementation of the GIP cascaded fast detection circuit described in this utility model, each of the first lead and the second lead is parallel to each other, and the fast detection line overlaps perpendicularly with one end of the first lead and the second lead, forming multiple overlap points.

[0019] In conjunction with the first possible embodiment of this utility model, and in the second possible embodiment, the GIP circuit module includes:

[0020] Multiple GIP boot modules;

[0021] Multiple start signal lines;

[0022] The start signal line is electrically connected to the corresponding GIP start module to input a start signal. The GIP start module and the corresponding gate GIP module are cascaded in sequence. The gate GIP module is electrically connected to its respective gate line and is used to drive the gate line according to the driving timing.

[0023] In conjunction with the second possible embodiment of this utility model, and in the third possible embodiment, the GIP cascade circuit further includes:

[0024] Multiple clock signal lines;

[0025] The clock signal lines are electrically connected to the corresponding GIP circuit modules for inputting drive timing.

[0026] In conjunction with the third and fourth possible embodiments of this utility model, the GIP cascade circuit further includes:

[0027] Driver IC;

[0028] The driver IC is electrically connected to the clock signal line, the start signal line, and the GIP circuit module.

[0029] In conjunction with the fourth and fifth possible embodiments of this utility model, the overlapping point is used to short-circuit the fast detection line with the first lead and / or the second lead by laser during detection, so that the detection pad is electrically connected to the first key point and / or the second key point.

[0030] In a second aspect, a display device includes the GIP cascade circuit described in the first aspect.

[0031] By implementing the GIP cascade circuit and display device described in this utility model, the first and second key points of the GIP circuit of the display device are led out through the first and second leads respectively, and overlapped with the fast detection line. When testing is required, the waveform and voltage of the key points can be quickly detected by shorting them with a laser, thereby quickly finding the cause of the display abnormality of the display device, so as to quickly respond and improve the user experience. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 This is a schematic diagram of a GIP cascade circuit in the prior art;

[0034] Figure 2 This is a schematic diagram of the GIP cascade circuit in this application;

[0035] Figure 3 This is a schematic diagram of the overlapping GIP cascade circuit in this application. Detailed Implementation

[0036] The technical solutions of this utility model will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this utility model, and not all of them. Based on the embodiments of this utility model, other embodiments obtained by those skilled in the art without creative effort are all within the scope of protection of this utility model.

[0037] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0038] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0039] It should be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0040] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0041] Existing display devices cannot directly test the waveform and voltage data of key points in GIP circuits, thus hindering the rapid identification of problems. Figure 1 , Figure 1 This is a schematic diagram of a GIP cascade circuit in the prior art.

[0042] To address the above problems, a GIP cascade circuit and display device 100 are proposed.

[0043] Firstly, a GIP cascade circuit, such as Figure 2 ,and Figure 3 , Figure 2 This is a schematic diagram of the GIP cascade circuit in this application. Figure 3This is a schematic diagram of the overlapping GIP cascaded circuit in this application, including: multiple GIP circuit modules 110, a fast detection line 120, and a detection pad 130; the GIP circuit modules 110 are cascaded in sequence; each GIP circuit module 110 includes a first key point (P), a second key point (A), a first lead-out line, and a second lead-out line; the first lead-out line is electrically connected to the first key point (P) for leading out the first key point (P); the second lead-out line is electrically connected to the second key point (A) for leading out the second key point (A); the fast detection line 120 overlaps with each first lead-out line and the second lead-out line, and is electrically connected to the detection pad 130. By leading out the first key point (P) and the second key point (A) of the GIP circuit of the display device 100 through the first lead and the second lead respectively, and overlapping with the fast detection line 120, when testing is required, the waveform and voltage of the key point can be quickly detected by laser shorting, thereby quickly finding the cause of the display abnormality of the display device 100, so as to quickly deal with it and improve the user experience.

[0044] like Figure 2 The first key point (point P): the key point in the GP circuit when pulling GOUT high; the second key point (point A): the key point in the GP circuit when pulling GOUT low; GOUT point: the output signal point of the GP.

[0045] Preferred, such as Figure 3 Each first lead and second lead is parallel to each other, and the fast detection line 120 intersects perpendicularly with one end of the first lead and the second lead, forming multiple intersection points.

[0046] Furthermore, the GIP circuit module 110 includes multiple GIP startup modules; multiple startup signal lines; the startup signal lines are electrically connected to the corresponding GIP startup modules to input startup signals; the GIP startup modules and the corresponding gate GIP modules are cascaded in sequence; the gate GIP modules are electrically connected to their respective gate lines to drive the gate lines according to the driving timing sequence.

[0047] like Figure 2 The GIP start-up modules (DUMMY1, DUMMY2, DUMMY3) are electrically connected to their respective start-up signal lines, and their outputs are Gout DUMMY1, Gout DUMMY2, and Gout DUMMY3, respectively. Their respective gate GIP modules (SN1, SN3, SN5) are electrically connected. The subsequent gate GIP modules are cascaded to transmit the start-up signal.

[0048] Furthermore, such as Figure 2The GIP cascade circuit also includes: multiple clock signal lines (CLK1, CLK2, CLK3, CLK1B, CLK2B, CLK3B); the clock signal lines (CLK1, CLK2, CLK3, CLK1B, CLK2B, CLK3B) are electrically connected to the corresponding GIP circuit module 110 for input driving timing.

[0049] Furthermore, the GIP cascade circuit also includes a driver IC; the driver IC is electrically connected to the clock signal line, the start signal line, and the GIP circuit module 110.

[0050] Furthermore, the overlap point is used during detection to short-circuit the fast detection line 120 with the first lead and the second lead via laser, so that the detection pad 130 is electrically connected to the first key point (P) or the second key point (A).

[0051] like Figure 2 When a GPIO outputs abnormally, finding the cause requires checking the output of the GPIO level that is malfunctioning. This can be done by turning on the display screen and examining it under a microscope. Then, by sending corresponding display data, if only the corresponding row displays a bright white line, and the display is normal, then that row is normal; if the display is abnormal, then that row has a problem. Alternatively, a laser can be used to short-circuit point P or A to the fast-test PAD, using laser technology to connect point P or A to the fast-test line, and then the fast-test line can be used for testing.

[0052] By analyzing the waveforms and voltage data at points A or P, it's possible to theoretically determine which signal is corrupted, causing the GOUT signal to malfunction. This allows for identification of different problems from a circuit analysis perspective. Previously, testing only stopped at the point of GP failure where the GOUT output was absent or abnormal. This new method allows for the collection of more data, greatly aiding analysis and resolving many GP problems where the root cause could not be found.

[0053] Compared to existing technologies, this proposed technology can extract some key internal signals of GIP that were previously impossible to test, and test the analytical data we need, thereby improving product competitiveness and perfecting existing testing solutions.

[0054] In a second aspect, a display device 100 includes the GIP cascade circuit of the first aspect.

[0055] The GIP cascade circuit and display device 100 of this utility model are implemented by leading out the first key point (P) and the second key point (A) of the GIP circuit of the display device 100 through the first lead and the second lead respectively, and overlapping with the fast detection line 120. When testing is required, the waveform and voltage of the key point can be quickly detected by shorting it with a laser, thereby quickly finding the cause of the display abnormality of the display device 100, so as to quickly deal with it and improve the user experience.

[0056] The above are merely preferred embodiments of the present utility model and are not intended to limit the present utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present utility model shall be included within the protection scope of the present utility model.

Claims

1. A GIP cascade circuit, characterized by, include: Multiple GIP circuit modules; Rapid testing line; Test pad; The GIP circuit modules are cascaded in sequence; Each of the GIP circuit modules includes a first key point, a second key point, a first lead, and a second lead; The first lead wire is electrically connected to the first key point and is used to lead out the first key point; The second lead wire is electrically connected to the second key point and is used to lead out the second key point; The rapid detection line overlaps with each of the first lead and the second lead, and is electrically connected to the detection pad.

2. The GIP cascade circuit according to claim 1, characterized in that Each of the first lead and the second lead is parallel to each other, and the fast detection line intersects perpendicularly with one end of the first lead and the second lead, forming multiple intersection points.

3. The GIP cascade circuit according to claim 2, characterized in that The GIP circuit module includes: Multiple GIP boot modules; Multiple start signal lines; The start signal line is electrically connected to the corresponding GIP start module to input a start signal. The GIP start module and the corresponding gate GIP module are cascaded in sequence. The gate GIP module is electrically connected to its respective gate line and is used to drive the gate line according to the driving timing.

4. The GIP cascade circuit according to claim 3, characterized in that The GIP cascade circuit also includes: Multiple clock signal lines; The clock signal lines are electrically connected to the corresponding GIP circuit modules for inputting drive timing.

5. The GIP cascade circuit according to claim 4, characterized in that The GIP cascade circuit also includes: Driver IC; The driver IC is electrically connected to the clock signal line, the start signal line, and the GIP circuit module.

6. The GIP cascade circuit according to claim 5, characterized in that The overlapping point is used to short-circuit the fast detection line with the first lead and / or the second lead during detection by laser, so that the detection pad is electrically connected to the first key point and / or the second key point.

7. A display device, characterized by comprising: Includes the GIP cascade circuit as described in any one of claims 1-6.

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