Photoelectric chip three-dimensional packaging structure

Abstract

The utility model discloses a photoelectric chip three-dimensional packaging structure, and particularly relates to the technical field of three-dimensional packaging, the photoelectric chip three-dimensional packaging structure comprises a plurality of single pieces packaged in a main piece, a chip body is arranged in each single piece, and an auxiliary piece used for improving heat dissipation performance is arranged outside each single piece; the auxiliary part comprises a heat conduction shell arranged outside the single part in a sleeving mode, a plurality of heat dissipation strips are installed outside the heat conduction shell, and the heat dissipation strips are evenly distributed at intervals. And a plurality of heat conduction columns which are distributed at intervals are mounted in four corners of the heat conduction shell. According to the utility model, heat generated during operation of the chip body is absorbed through the heat conduction shell and conducted to the heat dissipation strip, heat at the two adjacent heat conduction rods is absorbed through the heat conduction columns, and then the heat is sequentially conducted to the heat conduction shell and the heat dissipation strip, so that heat dissipation can be carried out on the chip body and the joint of the adjacent chip body, and the heat dissipation efficiency is improved. Therefore, the connection stability and the use performance of the chip body can be effectively ensured.

Description

Technical Field

[0001] This utility model relates to the field of three-dimensional packaging technology, and more specifically to a three-dimensional packaging structure for an optoelectronic chip. Background Technology

[0002] Optoelectronic chips, as core components of modern communication networks, are fundamental elements for realizing photoelectric signal conversion. Through semiconductor material processing and microfabrication technology, they excite the electrical energy injected by current, thereby achieving resonant amplification, mode selection, and output of laser light, completing the electro-optical conversion process.

[0003] 3D packaging technology, also known as stacked chip packaging technology, is a packaging technology that stacks two or more chips vertically within the same package without changing the package size. Compared to traditional 2D packaging, 3D packaging can significantly shorten the signal transmission distance between chips, reduce signal delay, and support heterogeneous integration, integrating components with different processes, such as logic chips and memory, into the same package.

[0004] As shown in the prior art disclosed in CN216288392U, although the chip in this prior art can be quickly packaged using metal connectors and is suitable for packaging chips of different sizes, it also facilitates the horizontal or vertical side-by-side packaging of multiple chips, minimizing the overall size and improving applicability. When multiple package units are stacked, the second metal connector can be adjusted to fit the chip size within the first encapsulation, and the second metal connector of the lower package unit can be quickly connected and soldered to the re-metal wiring layer in the upper package unit via connector two, without being limited by chip size. The upper and lower ends of several package units are respectively encapsulated by a surface protective layer and a reinforcing carrier, improving protection performance. Connector one on the surface protective layer can be connected to the second metal connector in the uppermost package unit via a wiring metal layer one, facilitating connection after stacking. Furthermore, the connection between the socket and connector two, and between the socket and the first metal connector, improves the stability of the connection between multiple package units. This highly adaptable three-dimensional stacked packaging structure is easy to package, suitable for packaging chips of different sizes, and highly practical. However, in the operation of the chip in this prior art, the internal electronic components generate a lot of heat when performing power conversion and signal processing. If this heat is not dealt with in time, it will cause the chip temperature to be too high, thereby affecting the chip's performance and stability. Utility Model Content

[0005] To overcome the aforementioned deficiencies in the prior art, this utility model provides a three-dimensional packaging structure for an optoelectronic chip. The heat generated during chip operation is absorbed by a heat-conducting shell and conducted to a heat sink. Simultaneously, heat is absorbed by heat-conducting pillars at adjacent heat-conducting rods, and then transferred sequentially to the heat-conducting shell and heat sink. This allows for heat dissipation at the connection points between the chip body and adjacent chip bodies, effectively ensuring the connection stability and performance of the chip body, thus solving the problems mentioned in the background art.

[0006] To achieve the above objectives, the present invention provides the following technical solution: a three-dimensional packaging structure for an optoelectronic chip, comprising multiple individual components packaged within a main component, wherein each individual component contains a chip body, and the external part of each individual component is provided with auxiliary components for improving heat dissipation performance;

[0007] The auxiliary component includes a heat-conducting shell sleeved on the outside of the single component, and multiple heat dissipation strips are installed on the outside of the heat-conducting shell, with the multiple heat dissipation strips evenly spaced apart.

[0008] Multiple spaced heat-conducting pillars are installed inside each of the four corners of the heat-conducting shell, and the end of the heat-conducting pillar away from the heat-conducting shell extends into the interior of the single piece.

[0009] In a preferred embodiment, multiple sets of operating components are provided on the outside of the heat-conducting shell;

[0010] Each set of operating components includes two through holes, which are respectively opened at the top and bottom of the heat-conducting shell.

[0011] In a preferred embodiment, the main component includes a carrier substrate and a molding layer, the molding layer being disposed on top of the carrier substrate, and the heat-conducting shell, heat-conducting pillars, and heat dissipation strips being disposed between the carrier substrate and the molding layer.

[0012] In a preferred embodiment, the single component includes a substrate and a packaging plate disposed between a carrier substrate and a molding layer, the substrate being disposed at the bottom of the packaging plate, and a metal plate and a metal connecting plate respectively mounted on the side of the substrate and the packaging plate that are close to each other, the metal plate being mounted at the top of the substrate, and the metal connecting plate being disposed at the bottom of the packaging plate.

[0013] The chip body is located on top of the metal connecting plate, and the heat-conducting shell is fitted outside the packaging plate.

[0014] In a preferred embodiment, conductive plates are provided on both sides of the chip body, the conductive plates are installed inside the packaging board, and a conductive rod is installed on the side of the conductive plate away from the chip body, the cross-section of the conductive rod being T-shaped.

[0015] In a preferred embodiment, a connecting frame is installed on the top of the encapsulation plate and the bottom of the substrate, the top and bottom ends of the conductive rod extend into the two connecting frames respectively, and the end of the heat-conducting column away from the heat-conducting shell is located inside the connecting frame.

[0016] The technical effects and advantages of this utility model are as follows:

[0017] The heat generated by the chip body during operation is absorbed by the heat-conducting shell and conducted to the heat sink. The heat sink increases the contact area with the air, thereby improving heat dissipation performance and preventing heat accumulation that could affect the chip body's performance. At the same time, the heat-conducting pillars absorb the heat from the two adjacent heat-conducting rods and then transfer the heat to the heat-conducting shell and heat sink in sequence. This can dissipate heat at the connection points between the chip body and adjacent chip bodies, thus effectively ensuring the connection stability and performance of the chip body. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the overall structure of this utility model;

[0019] Figure 2 This is a front view of the heat-conducting shell of this utility model;

[0020] Figure 3 This is a top view of the heat-conducting shell of this utility model;

[0021] Figure 4 This is a single-piece front view of the present invention;

[0022] Figure 5 This is a cross-sectional view of a single component of this utility model.

[0023] The attached figures are labeled as follows: 1. Chip body; 2. Thermal shell; 3. Heat sink; 4. Thermal pillar; 5. Through hole; 6. Supporting substrate; 7. Molding layer; 8. Substrate; 9. Packaging board; 10. Metal plate; 11. Metal connecting plate; 12. Conductive plate; 13. Conductive rod; 14. Connecting frame; 15. Single piece. Detailed Implementation

[0024] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0025] Refer to the instruction manual appendix Figure 1-5This utility model provides a three-dimensional packaging structure for an optoelectronic chip, including multiple individual components 15 packaged within a main component, and each individual component 15 contains a chip body 1. The main component includes a carrier substrate 6 and a molding compound 7. The molding compound 7 is disposed on the top of the carrier substrate 6, and a heat-conducting shell 2, a heat-conducting pillar 4, and a heat dissipation strip 3 are all disposed between the carrier substrate 6 and the molding compound 7. Through the cooperation of the molding compound 7 and the carrier substrate 6, multiple individual components 15 can be easily packaged and fixed, thereby achieving the effect of three-dimensional packaging.

[0026] The single component 15 includes a substrate 8 and a packaging plate 9 disposed between the carrier substrate 6 and the molding layer 7. The substrate 8 is disposed at the bottom of the packaging plate 9. A metal plate 10 and a metal connecting plate 11 are respectively installed on the side of the substrate 8 and the packaging plate 9 that are close to each other. The metal plate 10 is installed at the top of the substrate 8, and the metal connecting plate 11 is disposed at the bottom of the packaging plate 9. The chip body 1 is disposed at the top of the metal connecting plate 11, and the heat-conducting shell 2 is sleeved on the outside of the packaging plate 9, so that the chip body 1 can be fixed to the inside of the packaging plate 9 by means of the metal connecting plate 11 and the metal plate 10. Furthermore, conductive plates 12 are provided on both sides of the chip body 1. The conductive plates 12 are installed inside the packaging plate 9, and a conductive rod 13 is installed on the side of the conductive plate 12 away from the chip body 1. The cross-section of the conductive rod 13 is T-shaped. Thus, multiple chip bodies 1 can be connected through the contact of two adjacent conductive rods 13. A connecting frame 14 is installed on the top of the packaging plate 9 and the bottom of the substrate 8. The top and bottom ends of the conductive rod 13 extend into the two connecting frames 14 respectively, and the end of the heat-conducting column 4 away from the heat-conducting shell 2 is located inside the connecting frame 14, so that two adjacent conductive rods 13 are located inside the connecting frame 14. In this way, the heat at the conductive rod 13 can be absorbed by the heat-conducting column 4, thereby ensuring the transmission stability of two adjacent conductive rods 13.

[0027] like Figure 1-3 As shown, the single piece 15 is provided with an auxiliary component for improving heat dissipation performance; the auxiliary component includes a heat-conducting shell 2 sleeved on the outside of the single piece 15, and multiple heat dissipation strips 3 are installed on the outside of the heat-conducting shell 2, which are evenly spaced apart; multiple heat-conducting columns 4 are installed at intervals inside the four corners of the heat-conducting shell 2, and the end of the heat-conducting column 4 away from the heat-conducting shell 2 extends into the interior of the single piece 15.

[0028] In use, the heat generated by the chip body 1 during operation is absorbed by the heat-conducting shell 2 and conducted to the heat sink 3. The heat sink 3 increases the contact area with the air, thereby improving heat dissipation performance and preventing heat accumulation that could affect the performance of the chip body 1. At the same time, the heat-conducting pillars 4 absorb the heat from the two adjacent heat-conducting pillars and then transfer the heat to the heat-conducting shell 2 and the heat sink 3 in sequence. This dissipates heat at the connection points between the chip body 1 and adjacent chip bodies 1, effectively ensuring the connection stability and performance of the chip body 1. The heat-conducting shell 2 has multiple sets of operating components on its exterior; each set of operating components includes two through holes 5, located at the top and bottom of the heat-conducting shell 2 respectively. This facilitates the welding and fixing of two packaging boards 9 together through the corresponding through holes 5, expanding the operating space and improving operational convenience.

[0029] Finally: The above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.

Claims

1. A three-dimensional packaging structure of optoelectronic chips, characterized in that: It includes multiple individual components (15) encapsulated within a main component, and each individual component (15) has a chip body (1) inside, and the individual component (15) has auxiliary components on the outside for improving heat dissipation performance; The auxiliary component includes a heat-conducting shell (2) sleeved on the outside of the single piece (15), and multiple heat dissipation strips (3) are installed on the outside of the heat-conducting shell (2), with the multiple heat dissipation strips (3) evenly spaced apart. Multiple spaced heat-conducting columns (4) are installed inside the four corners of the heat-conducting shell (2), and the end of the heat-conducting column (4) away from the heat-conducting shell (2) extends into the interior of the single piece (15). 2.The three-dimensional packaging structure of optoelectronic chips according to claim 1, wherein: Multiple sets of operating components are provided on the outside of the heat-conducting shell (2); Each set of operating components includes two through holes (5), which are respectively opened at the top and bottom of the heat-conducting shell (2). 3.The three-dimensional packaging structure of optoelectronic chip according to claim 1, wherein: The main component includes a carrier substrate (6) and a molding layer (7). The molding layer (7) is disposed on the top of the carrier substrate (6), and the heat-conducting shell (2), heat-conducting pillar (4) and heat dissipation strip (3) are all disposed between the carrier substrate (6) and the molding layer (7).

4. The three-dimensional packaging structure of optoelectronic chips according to claim 1, wherein: The single component (15) includes a substrate (8) and a packaging plate (9) disposed between the carrier substrate (6) and the molding layer (7). The substrate (8) is disposed at the bottom of the packaging plate (9). A metal plate (10) and a metal connecting plate (11) are respectively installed on the side of the substrate (8) and the packaging plate (9) that are close to each other. The metal plate (10) is installed on the top of the substrate (8), and the metal connecting plate (11) is disposed at the bottom of the packaging plate (9). The chip body (1) is located on top of the metal connecting plate (11), and the heat-conducting shell (2) is sleeved on the outside of the packaging plate (9).

5. The three-dimensional packaging structure of optoelectronic chips according to claim 4, wherein: The chip body (1) has conductive plates (12) on both sides. The conductive plates (12) are installed inside the packaging board (9), and a conductive rod (13) is installed on the side of the conductive plate (12) away from the chip body (1). The cross section of the conductive rod (13) is T-shaped.

6. The three-dimensional packaging structure of optoelectronic chips according to claim 5, wherein: The top of the encapsulation plate (9) and the bottom of the substrate (8) are both equipped with connecting frames (14). The top and bottom ends of the conductive rod (13) extend into the two connecting frames (14) respectively, and the end of the heat-conducting column (4) away from the heat-conducting shell (2) is located inside the connecting frame (14).

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