Signal detection circuit and vehicle

Abstract

The utility model relates to the technical field of vehicle electronics, in particular to a signal detection circuit and a vehicle, and the signal detection circuit comprises a first branch circuit and a second branch circuit; the first branch comprises a first power supply end, a voltage division module, a grounding end and a detection signal input end; the second branch comprises a second power supply end, a switch module, a grounding end and a detection signal output end; the first power supply end, the grounding end and the detection signal input end are electrically connected with the voltage dividing module, a voltage dividing node of the voltage dividing module is electrically connected with a control end of the switch module, and the switch module is connected in series between the second power supply end and the grounding end; wherein the detection signal input end receives a low level signal, the switch module is in a first state, and the detection signal output end outputs a first detection signal; the detection signal input end receives the high-level signal or is suspended, the switch module is in a second state, and the detection signal output end outputs a second detection signal. According to the invention, the detection of the low-level signal is more accurate.

Description

Technical Field

[0001] This disclosure relates to the field of vehicle electronics technology, and more particularly to a signal detection circuit and a vehicle. Background Technology

[0002] The vehicle is equipped with multiple switches, which rely on switching signals to function. If a low-level signal is not detected correctly, it may cause these switches to malfunction or misoperate, thus affecting driving safety. Therefore, it is necessary to detect the low-level signal.

[0003] In related technologies, the signal to be detected is usually directly transmitted to an MCU (Microcontroller Unit) for detection. Due to voltage deviations on the automotive ground wire and voltage fluctuations on the power line, when the signal to be detected is a low-level signal, it will be pulled high. This causes the signal transmitted to the MCU to also be pulled high, potentially exceeding the MCU's set threshold for low-level signals. In this case, the MCU cannot detect the low-level signal, resulting in inaccurate low-level signal detection. Utility Model Content

[0004] To address the aforementioned technical problems, this disclosure provides a signal detection circuit and vehicle that enables more accurate detection of low-level signals.

[0005] In a first aspect, this disclosure provides a signal detection circuit, comprising: a first branch and a second branch; the first branch includes a first power supply terminal, a voltage divider module, a ground terminal, and a detection signal input terminal; the second branch includes a second power supply terminal, a switch module, a ground terminal, and a detection signal output terminal; the first power supply terminal, the ground terminal, and the detection signal input terminal are all electrically connected to the voltage divider module, the voltage divider node of the voltage divider module is electrically connected to the control terminal of the switch module, and the switch module is connected in series between the second power supply terminal and the ground terminal; wherein, when the detection signal input terminal receives a low-level signal, the switch module is in a first state, and the detection signal output terminal outputs a first detection signal; when the detection signal input terminal receives a high-level signal or is left floating, the switch module is in a second state, and the detection signal output terminal outputs a second detection signal.

[0006] In some embodiments, the first branch further includes a first diode connected in series between the first power supply terminal and the voltage divider module, wherein the anode of the first diode is electrically connected to the first power supply terminal and the cathode of the first diode is electrically connected to the voltage divider module.

[0007] In some embodiments, the first branch further includes a control module, which is connected in series between the first power supply terminal and the voltage divider module. The control terminal of the control module receives an enable signal; when the enable signal is a valid signal, the control module is turned on.

[0008] In some embodiments, the switching module includes a first transistor, which is an NPN transistor; the base of the first transistor is electrically connected to the voltage divider node of the voltage divider module, the collector of the first transistor is electrically connected to the second power supply terminal, and the emitter of the first transistor is electrically connected to the ground terminal; the detection signal output terminal is electrically connected to the collector of the first transistor.

[0009] In some embodiments, the voltage divider module includes a first resistor, a second resistor, and a third resistor; one end of the first resistor is electrically connected to a first power supply terminal, and the other end of the first resistor is electrically connected to a ground terminal and a detection signal input terminal; one end of the second resistor is electrically connected to a ground terminal and a detection signal input terminal, and the other end of the second resistor is electrically connected to the base of a first transistor; one end of the third resistor is electrically connected to the base of the first transistor, and the other end of the third resistor is electrically connected to a ground terminal.

[0010] In some embodiments, the switching module includes a first transistor, which is a PNP transistor; the base of the first transistor is electrically connected to the voltage divider node of the voltage divider module, the emitter of the first transistor is electrically connected to the second power supply terminal, and the collector of the first transistor is electrically connected to the ground terminal; the detection signal output terminal is electrically connected to the collector of the first transistor.

[0011] In some embodiments, the voltage divider module includes a first resistor, a second resistor, and a third resistor; one end of the first resistor is electrically connected to a first power supply terminal, and the other end of the first resistor is electrically connected to a ground terminal and a detection signal input terminal; one end of the second resistor is electrically connected to a ground terminal and a detection signal input terminal, and the other end of the second resistor is electrically connected to the base of a first transistor; one end of the third resistor is electrically connected to the base of the first transistor, and the third resistor is electrically connected to a second power supply terminal.

[0012] In some embodiments, the second branch further includes a fourth resistor and a fifth resistor; the fourth resistor is connected in series between the collector of the first transistor and the detection signal output terminal; when the collector of the first transistor is electrically connected to the second power supply terminal, the fifth resistor is connected in series between the collector of the first transistor and the second power supply terminal; when the collector of the first transistor is electrically connected to the ground terminal, the fifth resistor is connected in series between the collector of the first transistor and the ground terminal.

[0013] In some embodiments, the first branch further includes a second diode connected in series between the detection signal input terminal and the second resistor, wherein the anode of the second diode is electrically connected to the second resistor and the cathode of the second diode is electrically connected to the detection signal input terminal.

[0014] Secondly, this disclosure provides a vehicle, including: a microcontroller and a signal detection circuit electrically connected to the microcontroller, wherein the signal detection circuit is the aforementioned signal detection circuit.

[0015] The technical solution provided in this disclosure has the following advantages compared with the prior art:

[0016] In the signal detection circuit provided in this disclosure, the signal to be detected received at the detection signal input terminal is divided by a voltage divider module and transmitted to the control terminal of the switching module, thereby controlling the state of the switching module. This allows the detection signal output terminal to output a high-level signal via electrical connection to the second power supply terminal or a low-level signal via electrical connection to the ground terminal. Thus, the microcontroller can determine the signal at the detection signal input terminal after receiving the signal output from the detection signal output terminal. Even if the low-level signal input to the detection signal input terminal is pulled high, after being divided by the voltage divider module, it will not affect the normal conduction or shutdown of the switching module. Therefore, the detection signal output terminal can normally output a high-level signal via electrical connection to the second power supply terminal or a low-level signal via electrical connection to the ground terminal, unaffected by the pull-high low-level signal input to the detection signal input terminal. This avoids the microcontroller detecting unreliable voltage values, making the detection of low-level signals more accurate. Meanwhile, the voltage divider node of the voltage divider module is electrically connected to the control terminal of the switch module. That is, the signal of the voltage divider node of the voltage divider module controls the state of the switch module. By setting the voltage divider module, the state of the switch module is the same when a normal low-level signal and a low-level signal pulled high are received at the detection signal input terminal, thereby making the detection of low-level signals more accurate. Attached Figure Description

[0017] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure.

[0018] To more clearly illustrate the technical solutions in the embodiments of this disclosure or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the structure of a signal detection circuit provided in this disclosure;

[0020] Figure 2 This is a circuit diagram of a signal detection circuit provided in this disclosure;

[0021] Figure 3 This is a circuit diagram of another signal detection circuit provided in this disclosure. Detailed Implementation

[0022] To better understand the above-mentioned objectives, features, and advantages of this disclosure, the solutions disclosed herein will be further described below. It should be noted that, unless otherwise specified, the embodiments and features described herein can be combined with each other.

[0023] Numerous specific details are set forth in the following description in order to provide a full understanding of this disclosure, but this disclosure may also be implemented in other ways different from those described herein; obviously, the embodiments in the specification are only some, and not all, of the embodiments of this disclosure.

[0024] Figure 1 This is a schematic diagram of a signal detection circuit provided in this disclosure, for reference. Figure 1 This disclosure provides a signal detection circuit, which includes a first branch 10 and a second branch 20.

[0025] The first branch 10 includes a first power supply terminal VDD, a voltage divider module 11, a ground terminal GND, and a detection signal input terminal A;

[0026] The second branch 20 includes a second power supply terminal VCC, a switching module 21, a ground terminal GND, and a detection signal output terminal B;

[0027] The first power supply terminal VDD, the ground terminal GND, and the detection signal input terminal A are all electrically connected to the voltage divider module 11. The voltage divider node N1 of the voltage divider module 11 is electrically connected to the control terminal of the switch module 21. The switch module 21 is connected in series between the second power supply terminal VCC and the ground terminal GND.

[0028] Among them, the detection signal input terminal A receives a low-level signal, the switch module 21 is in the first state, and the detection signal output terminal B outputs the first detection signal.

[0029] When the detection signal input terminal A receives a high-level signal or is left floating, the switch module 21 is in the second state, and the detection signal output terminal B outputs the second detection signal.

[0030] Specifically, the signal detection circuit includes a first branch 10 and a second branch 20. The first branch 10 includes a first power supply terminal VDD, a voltage divider module 11, a ground terminal GND, and a detection signal input terminal A. The detection signal input terminal A is used to receive the signal to be detected. The first power supply terminal VDD, the ground terminal GND, and the detection signal input terminal A are all electrically connected to the voltage divider module 11. That is, after the detection signal input terminal A receives the signal to be detected, the voltage divider module 11 can divide the signal to be detected and then transmit the divided signal to the voltage divider node N1 of the voltage divider module 11. The second branch 20 includes a second power supply terminal VCC, a switch module 21, a ground terminal GND, and a detection signal output terminal B. The switch module 21 is connected in series between the second power supply terminal VCC and the ground terminal GND. The voltage divider node N1 of the voltage divider module 11 is electrically connected to the control terminal of the switch module 21. The signal from the voltage divider node N1 of the voltage divider module 11 is transmitted to the control terminal of the switch module 21, thereby controlling the state of the switch module 21, that is, the signal from the voltage divider node N1 of the voltage divider module 11 can control the switch module 21 to be turned on or off. When the switch module 21 is in different states, the detection signal output terminal B outputs different signals. The detection signal output terminal B is electrically connected to the microcontroller, that is, the signal output by the detection signal output terminal B is transmitted to the microcontroller. The microcontroller can detect and determine the signal to be detected based on the signal output by the detection signal output terminal B, thereby realizing the detection of the signal to be detected.

[0031] When the detection signal input terminal A receives a low-level signal, the switch module 21 is in the first state, and the detection signal output terminal B outputs the first detection signal. When the detection signal input terminal A receives a high-level signal or is left floating, the switch module 21 is in the second state, and the detection signal output terminal B outputs the second detection signal. The first state and the second state are different. That is, when the first state is on, the second state is off, and when the first state is off, the second state is on. The first detection signal and the second detection signal are also different. That is, when the first detection signal is a high-level signal, the second detection signal is a low-level signal, and when the first detection signal is a low-level signal, the second detection signal is a high-level signal.

[0032] For example, when the detection signal input terminal A receives a low-level signal, the switch module 21 is turned off, the detection signal output terminal B is disconnected from the ground terminal GND, and the detection signal output terminal B is only electrically connected to the second power supply terminal VCC, thus the first detection signal output by the detection signal output terminal B is a high-level signal. When the detection signal input terminal A receives a high-level signal or is left floating, the switch module 21 is turned on, and the detection signal output terminal B is electrically connected to the ground terminal GND, thus the second detection signal output by the detection signal output terminal B is a low-level signal. When the microcontroller receives a high-level signal, it can determine that the signal to be detected is a low-level signal, thereby realizing the detection of a low-level signal. Of course, in other embodiments of this disclosure, the control of the state of the switch module 21 can also be the opposite of the above embodiments, which will not be described in detail here.

[0033] In the signal detection circuit provided in this embodiment, the signal to be detected received at the detection signal input terminal A is divided by the voltage divider module 11 and transmitted to the control terminal of the switch module 21, thereby controlling the state of the switch module 21. This allows the detection signal output terminal B to output a high-level signal through electrical connection with the second power supply terminal VCC, or to output a low-level signal through electrical connection with the ground terminal GND. Thus, the microcontroller can determine the signal at the detection signal input terminal A after receiving the signal output from the detection signal output terminal B. Even if the low-level signal input at the detection signal input terminal A is pulled high, after being divided by the voltage divider module 11, it will not affect the normal conduction or shutdown of the switch module 21. Therefore, the detection signal output terminal B can normally output a high-level signal through electrical connection with the second power supply terminal VCC, or output a low-level signal through electrical connection with the ground terminal GND, unaffected by the low-level signal input at the detection signal input terminal A being pulled high. This avoids the microcontroller detecting unreliable voltage values, making the detection of low-level signals more accurate.

[0034] Meanwhile, the voltage divider node N1 of the voltage divider module 11 is electrically connected to the control terminal of the switch module 21. That is, the signal of the voltage divider node N1 of the voltage divider module 11 controls the state of the switch module 21. The voltage divider module 11 can be configured so that when the detection signal input terminal A receives a normal low-level signal and a low-level signal that has been pulled up, the state of the switch module 21 is the same, thereby making the detection of the low-level signal more accurate.

[0035] In some alternative embodiments, the first power supply terminal VDD can be connected to the vehicle battery, that is, the vehicle battery directly supplies power to the first power supply terminal VDD without conversion, which helps to reduce energy loss and improve the service life of the vehicle battery.

[0036] In some alternative embodiments, the second power supply terminal VCC is connected to the microcontroller, meaning the microcontroller supplies power to the second power supply terminal VCC. Since the detection signal output terminal B outputs a high-level signal to the microcontroller through electrical connection with the second power supply terminal VCC, and the microcontroller supplies power to the second power supply terminal VCC, the high-level signal output by the detection signal output terminal B is kept within the voltage range allowed by the microcontroller's pins, preventing the microcontroller from being burned out.

[0037] Figure 2 This is a circuit diagram of a signal detection circuit provided in this disclosure, for reference. Figure 2 In some embodiments, the first branch 10 further includes a first diode D1 connected in series between the first power supply terminal VDD and the voltage divider module 11. The anode of the first diode D1 is electrically connected to the first power supply terminal VDD, and the cathode of the first diode D1 is electrically connected to the voltage divider module 11.

[0038] Specifically, in the first branch 10, a first diode D1 is connected in series between the first power supply terminal VDD and the voltage divider module 11. The anode of the first diode D1 is electrically connected to the first power supply terminal VDD, and the cathode of the first diode D1 is electrically connected to the voltage divider module 11. This prevents the detection signal input terminal A from receiving an abnormal level signal and then having it reverse-connected to the first power supply terminal VDD and its related pins, thereby protecting other pins and circuit components connected to the first power supply terminal VDD. Furthermore, since the first diode D1 is connected in series between the first power supply terminal VDD and the voltage divider module 11, the signal collected by the detection signal input terminal A is not transmitted to the voltage divider module 11 through the first diode D1, avoiding the forward voltage drop of the first diode D1 from causing the signal collected by the detection signal input terminal A to be raised, thus affecting the accuracy of low-level signal detection.

[0039] Continue to refer to Figure 2 In some embodiments, the first branch 10 further includes a control module 12, which is connected in series between the first power supply terminal VDD and the voltage divider module 11. The control terminal EN of the control module 12 receives an enable signal.

[0040] When the enable signal is valid, the control module 12 is turned on.

[0041] Specifically, the microcontroller can operate in an intermittent mode for detecting the signal to be detected, including non-working periods and working periods. During the working period, the microcontroller detects the signal to be detected; during the non-working period, the microcontroller does not detect the signal to be detected. The first branch 10 also includes a control module 12 connected in series between the first power supply terminal VDD and the voltage divider module 11. The control terminal EN of the control module 12 receives an enable signal. When the enable signal is valid, the control module 12 is turned on, so that the signal from the first power supply terminal VDD can be transmitted to the voltage divider module 11. For example, when the enable signal is high, the control module 12 is turned on; when the enable signal is low, the control module 12 is turned off.

[0042] During the operating period, the enable signal is valid, the control module 12 is turned on, and the signal from the first power supply terminal VDD can be transmitted to the voltage divider module 11. The signal detection circuit operates normally, and the microcontroller detects the signal to be detected. During non-operating periods, the microcontroller does not need to detect the signal to be detected, the enable signal is invalid, and the control module 12 is turned off. Correspondingly, the enable signal can be a PWM signal, and the on-time of the module 12 can be controlled by changing the duty cycle of the PWM signal. The first power supply terminal VDD does not need to be continuously powered, thereby reducing circuit power consumption.

[0043] Optionally, the power consumption of the first power supply terminal VDD can be adjusted by changing the duty cycle of the PWM signal.

[0044] Optionally, the control module 12 may include a second transistor Q2. The emitter of the second transistor Q2 may be electrically connected to the first power supply terminal VDD, and the collector of the second transistor Q2 may be electrically connected to the voltage divider module 11. The base of the second transistor Q2 receives an enable signal. When the base of the second transistor Q2 receives a valid signal, the second transistor Q2 is turned on, and the signal at the first power supply terminal VDD can be transmitted to the voltage divider module 11. When the base of the second transistor Q2 does not receive a valid signal, the second transistor Q2 is turned off, and the signal at the first power supply terminal VDD cannot be transmitted to the voltage divider module 11.

[0045] Optionally, the control module 12 may further include a third transistor Q3. The collector of the third transistor Q3 is electrically connected to the base of the second transistor Q2, and the emitter of the third transistor Q3 is electrically connected to the ground terminal GND. The base of the third transistor Q3 receives an enable signal. When the base of the third transistor Q3 receives a valid signal, the third transistor Q3 is turned on, and the base of the second transistor Q2 is electrically connected to the ground terminal GND, thereby turning on the second transistor Q2, and the signal at the first power supply terminal VDD can be transmitted to the voltage divider module 11. When the base of the third transistor Q3 does not receive a valid signal, the third transistor Q3 is turned off, and the base of the second transistor Q2 cannot be electrically connected to the ground terminal GND, thereby turning off the second transistor Q2.

[0046] Optionally, the control module 12 may also include a sixth resistor R6. One end of the sixth resistor R6 is electrically connected to the base of the third transistor Q3, and the other end of the sixth resistor R6 receives an enable signal. The sixth resistor R6 can protect the third transistor Q3 and prevent the third transistor Q3 or other components in the control module 12 from being damaged due to excessive voltage or current of the enable signal.

[0047] Optionally, the control module 12 may also include a seventh resistor R7, one end of which is electrically connected to the base of the third transistor Q3, and the other end of which is electrically connected to the emitter of the third transistor Q3. The seventh resistor R7 can limit current and divide voltage to prevent the voltage or current of the enable signal from being too large and damaging the third transistor Q3 or other components in the control module 12.

[0048] Optionally, the control module 12 may also include an eighth resistor R8. One end of the eighth resistor R8 is electrically connected to the emitter of the second transistor Q2, and the other end of the eighth resistor R8 is electrically connected to the base of the second transistor Q2. The eighth resistor R8 can limit current and divide voltage to prevent the voltage or current of the signal at the first power supply terminal VDD from being too large and damaging the second transistor Q2 or other components in the control module 12.

[0049] Optionally, the control module 12 may also include a ninth resistor R9, one end of which is electrically connected to the collector of the third transistor Q3, and the other end of which is electrically connected to the base of the second transistor Q2. The ninth resistor R9 can limit current and divide voltage, preventing excessive current or voltage between the second transistor Q2 and the third transistor Q3, and thus protecting the second transistor Q2 and the third transistor Q3.

[0050] It should be noted that, Figure 2 The example shows that the second transistor Q2 is a PNP transistor and the third transistor Q3 is an NPN transistor. In other embodiments of this disclosure, the second transistor Q2 and the third transistor Q3 may also be combinations of other types of transistors. Furthermore, in other embodiments of this disclosure, the control module 12 may also have other circuit structures, which will not be elaborated upon here.

[0051] In some alternative embodiments, the first branch 10 further includes a first capacitor C1, the first end of the first capacitor C1 being electrically connected to the detection signal input terminal A, and the second end of the first capacitor C1 being electrically connected to the ground terminal GND. The first capacitor C1 can smooth the fluctuations of the signal transmitted through the detection signal input terminal A and can suppress static electricity.

[0052] Continue to refer to Figure 2 In some embodiments, the switching module 21 includes a first transistor Q1, which is an NPN transistor;

[0053] The base of the first transistor Q1 is electrically connected to the voltage divider node N1 of the voltage divider module 11, the collector of the first transistor Q1 is electrically connected to the second power supply terminal VCC, and the emitter of the first transistor Q1 is electrically connected to the ground terminal GND.

[0054] The detection signal output terminal B is electrically connected to the collector of the first transistor Q1.

[0055] Specifically, the switching module 21 includes a first transistor Q1, which is an NPN transistor. The base of the first transistor Q1 is electrically connected to the voltage divider node N1 of the voltage divider module 11, the collector of the first transistor Q1 is electrically connected to the second power supply terminal VCC, the emitter of the first transistor Q1 is electrically connected to the ground terminal GND, and the detection signal output terminal B is electrically connected to the collector of the first transistor Q1.

[0056] When the detection signal input terminal A receives a low-level signal, it is divided by the voltage divider module 11. The voltage divider node N1 of the voltage divider module 11 outputs a low-level signal, the switch module 21 is turned off, and the detection signal output terminal B is disconnected from the ground terminal GND. The detection signal output terminal B is only electrically connected to the second power supply terminal VCC, thus the first detection signal output by the detection signal output terminal B is a high-level signal. When the detection signal input terminal A receives a high-level signal, it is divided by the voltage divider module 11. The voltage divider node N1 of the voltage divider module 11 outputs a high-level signal, the first transistor Q1 is turned on, and the detection signal output terminal B is electrically connected to the ground terminal GND, thus the second detection signal output by the detection signal output terminal B is a low-level signal. When the detection signal input terminal A is left floating, the signal from the first power supply terminal VDD is divided by the voltage divider module 11. The voltage divider node N1 of the voltage divider module 11 also outputs a high-level signal, the first transistor Q1 is turned on, and the detection signal output terminal B is electrically connected to the ground terminal GND, thus the second detection signal output by the detection signal output terminal B is also a low-level signal. When a microcontroller receives a high-level signal, it can determine that the signal to be detected is a low-level signal, thereby realizing the detection of low-level signals.

[0057] When the voltage of the signal received at the detection signal input terminal A is between low and high levels, if the signal output by the voltage divider node N1 of the voltage divider module 11 is greater than the base voltage required for the saturation channel of the first transistor Q1, the first transistor Q1 will conduct; if the signal output by the voltage divider node N1 of the voltage divider module 11 is less than or equal to the base voltage required for the saturation channel of the first transistor Q1, the first transistor Q1 will turn off. Thus, the signal output by the voltage divider node N1 of the voltage divider module 11 can be reasonably adjusted so that when the low-level signal received at the detection signal input terminal A is pulled high, the signal output by the voltage divider node N1 of the voltage divider module 11 can still control the first transistor Q1 to turn off. The detection signal output terminal B is disconnected from the ground terminal GND and is only electrically connected to the second power supply terminal VCC. Therefore, the first detection signal output by the detection signal output terminal B is a high-level signal, making the detection of low-level signals more accurate.

[0058] Continue to refer to Figure 2 In some embodiments, the voltage divider module includes a first resistor R1, a second resistor R2, and a third resistor R3;

[0059] One end of the first resistor R1 is electrically connected to the first power supply terminal VDD, and the other end of the first resistor R1 is electrically connected to the ground terminal GND and the detection signal input terminal A.

[0060] One end of the second resistor R2 is electrically connected to the ground terminal GND and the detection signal input terminal A, and the other end of the second resistor R2 is electrically connected to the base of the first transistor Q1.

[0061] One end of the third resistor R3 is electrically connected to the base of the first transistor Q1, and the other end of the third resistor R3 is electrically connected to the ground terminal GND.

[0062] Specifically, the voltage divider module includes a first resistor R1. One end of the first resistor R1 is electrically connected to the first power supply terminal VDD, and the other end of the first resistor R1 is electrically connected to the ground terminal GND and the detection signal input terminal A. The first resistor R1 plays the role of current limiting and voltage division, preventing the voltage or current of the signal at the first power supply terminal VDD from being too large and causing circuit burnout.

[0063] The voltage divider module also includes a second resistor R2. One end of the second resistor R2 is electrically connected to the ground terminal GND and the detection signal input terminal A. The other end of the second resistor R2 is electrically connected to the base of the first transistor Q1. The second resistor R2 can protect the first transistor Q1 and prevent the voltage or current of the signal at the detection signal input terminal A from being too large and damaging the first transistor Q1 or other components.

[0064] The voltage divider module also includes a third resistor R3. One end of the third resistor R3 is electrically connected to the base of the first transistor Q1, and the other end of the third resistor R3 is electrically connected to the ground terminal GND. The third resistor R3 can limit current and divide voltage to prevent the voltage or current of the signal transmitted to the base of the first transistor Q1 from being too large and damaging the first transistor Q1.

[0065] When the detection signal input terminal A receives a low-level signal, after being divided by the second resistor R2 and the third resistor R3, the voltage divider node N1 of the voltage divider module 11 outputs a low-level signal, the switch module 21 is turned off, the detection signal output terminal B is disconnected from the ground terminal GND, and the detection signal output terminal B is only electrically connected to the second power supply terminal VCC. Therefore, the first detection signal output by the detection signal output terminal B is a high-level signal. When the detection signal input terminal A receives a high-level signal, after being divided by the second resistor R2 and the third resistor R3, the voltage divider node N1 of the voltage divider module 11 outputs a high-level signal, the first transistor Q1 is turned on, and the detection signal output terminal B is electrically connected to the ground terminal GND. Therefore, the second detection signal output by the detection signal output terminal B is a low-level signal. With the detection signal input terminal A left floating, the signal from the first power supply terminal VDD is divided by the first resistor R1, the second resistor R2, and the third resistor R3. The voltage divider node N1 of the voltage divider module 11 also outputs a high-level signal, turning on the first transistor Q1. The detection signal output terminal B is electrically connected to the ground terminal GND, thus the second detection signal output from the detection signal output terminal B is also a low-level signal. When the microcontroller receives a high-level signal, it can determine that the signal to be detected is a low-level signal, thereby achieving the detection of a low-level signal.

[0066] When the voltage of the signal received at the detection signal input terminal A is between low and high levels, if the signal output by the voltage divider node N1 of the voltage divider module 11 is greater than the base voltage required for the saturation channel of the first transistor Q1, the first transistor Q1 will conduct. If the signal output by the voltage divider node N1 of the voltage divider module 11 is less than or equal to the base voltage required for the saturation channel of the first transistor Q1, the first transistor Q1 will turn off. Therefore, by properly adjusting the resistance values ​​of the first resistor R1, the second resistor R2, and the third resistor R3, when the low-level signal received at the detection signal input terminal A is pulled high, the signal output by the voltage divider node N1 of the voltage divider module 11 can still control the first transistor Q1 to turn off. The detection signal output terminal B is disconnected from the ground terminal GND and is only electrically connected to the second power supply terminal VCC. Thus, the first detection signal output by the detection signal output terminal B is a high-level signal, making the detection of low-level signals more accurate.

[0067] Figure 3 This is a circuit diagram of another signal detection circuit provided in this disclosure, see reference. Figure 2 and Figure 3 In some embodiments, the switching module 21 includes a first transistor Q1, which is a PNP transistor;

[0068] The base of the first transistor Q1 is electrically connected to the voltage divider node N1 of the voltage divider module 11, the emitter of the first transistor Q1 is electrically connected to the second power supply terminal VCC, and the collector of the first transistor Q1 is electrically connected to the ground terminal GND.

[0069] The detection signal output terminal B is electrically connected to the collector of the first transistor Q1.

[0070] Specifically, the switching module 21 includes a first transistor Q1, which is a PNP transistor. The base of the first transistor Q1 is electrically connected to the voltage divider node N1 of the voltage divider module 11, the emitter of the first transistor Q1 is electrically connected to the second power supply terminal VCC, the collector of the first transistor Q1 is electrically connected to the ground terminal GND, and the detection signal output terminal B is electrically connected to the collector of the first transistor Q1.

[0071] When the detection signal input terminal A receives a low-level signal, it is divided by the voltage divider module 11. The voltage divider node N1 of the voltage divider module 11 outputs a low-level signal, the switch module 21 is turned on, and the detection signal output terminal B is electrically connected to the second power supply terminal VCC. Therefore, the first detection signal output by the detection signal output terminal B is a high-level signal. When the detection signal input terminal A receives a high-level signal, it is divided by the voltage divider module 11. The voltage divider node N1 of the voltage divider module 11 outputs a high-level signal, the first transistor Q1 is turned off, and the detection signal output terminal B is disconnected from the second power supply terminal VCC. The detection signal output terminal B is only electrically connected to the ground terminal GND. Therefore, the second detection signal output by the detection signal output terminal B is a low-level signal. When the detection signal input terminal A is left floating, the signal from the second power supply terminal VCC is divided by the voltage divider module 11. The voltage divider node N1 of the voltage divider module 11 also outputs a high-level signal. The first transistor Q1 is turned off, and the detection signal output terminal B is only electrically connected to the ground terminal GND. Therefore, the second detection signal output by the detection signal output terminal B is also a low-level signal. When a microcontroller receives a high-level signal, it can determine that the signal to be detected is a low-level signal, thereby realizing the detection of low-level signals.

[0072] When the voltage of the signal received at the detection signal input terminal A is between low and high levels, if the signal output by the voltage divider node N1 of the voltage divider module 11 is greater than the base voltage required for the saturation channel of the first transistor Q1, the first transistor Q1 will conduct; if the signal output by the voltage divider node N1 of the voltage divider module 11 is less than or equal to the base voltage required for the saturation channel of the first transistor Q1, the first transistor Q1 will turn off. Thus, the signal output by the voltage divider node N1 of the voltage divider module 11 can be reasonably adjusted so that when the low-level signal received at the detection signal input terminal A is pulled high, the signal output by the voltage divider node N1 of the voltage divider module 11 can still control the first transistor Q1 to turn off. The detection signal output terminal B is disconnected from the ground terminal GND and is only electrically connected to the second power supply terminal VCC. Therefore, the detection signal output by the detection signal output terminal B is a high-level signal, making the detection of low-level signals more accurate.

[0073] Continue to refer to Figure 2 In some embodiments, the voltage divider module 11 includes a first resistor R1, a second resistor R2, and a third resistor R3;

[0074] One end of the first resistor R1 is electrically connected to the first power supply terminal VDD, and the other end of the first resistor R1 is electrically connected to the ground terminal GND and the detection signal input terminal A.

[0075] One end of the second resistor R2 is electrically connected to the ground terminal GND and the detection signal input terminal A, and the other end of the second resistor R2 is electrically connected to the base of the first transistor Q1.

[0076] One end of the third resistor R3 is electrically connected to the base of the first transistor Q1, and the third resistor R3 is electrically connected to the second power supply terminal VCC.

[0077] Specifically, the voltage divider module includes a first resistor R1. One end of the first resistor R1 is electrically connected to the first power supply terminal VDD, and the other end of the first resistor R1 is electrically connected to the ground terminal GND and the detection signal input terminal A. The first resistor R1 plays the role of current limiting and voltage division, preventing the voltage or current of the signal at the first power supply terminal VDD from being too large and causing circuit burnout.

[0078] The voltage divider module also includes a second resistor R2. One end of the second resistor R2 is electrically connected to the ground terminal GND and the detection signal input terminal A. The other end of the second resistor R2 is electrically connected to the base of the first transistor Q1. The second resistor R2 can protect the first transistor Q1 and prevent the voltage or current of the signal at the detection signal input terminal A from being too large and damaging the first transistor Q1 or other components.

[0079] The voltage divider module also includes a third resistor R3. One end of the third resistor R3 is electrically connected to the base of the first transistor Q1, and the third resistor R3 is electrically connected to the second power supply terminal VCC. The third resistor R3 can limit current and divide voltage to prevent the voltage or current of the signal at the second power supply terminal VCC from being too large and damaging the first transistor Q1.

[0080] When the detection signal input terminal A receives a low-level signal, after being divided by the second resistor R2 and the third resistor R3, the voltage divider node N1 of the voltage divider module 11 outputs a low-level signal, the switch module 21 is turned on, and the detection signal output terminal B is electrically connected to the second power supply terminal VCC. Therefore, the first detection signal output by the detection signal output terminal B is a high-level signal. When the detection signal input terminal A receives a high-level signal, after being divided by the second resistor R2 and the third resistor R3, the voltage divider node N1 of the voltage divider module 11 outputs a high-level signal, the first transistor Q1 is turned off, the detection signal output terminal B is disconnected from the second power supply terminal VCC, and the detection signal output terminal B is only electrically connected to the ground terminal GND. Therefore, the second detection signal output by the detection signal output terminal B is a low-level signal. With the detection signal input terminal A floating, the signal from the first power supply terminal VDD is divided by the first resistor R1, the second resistor R2, and the third resistor R3. The voltage divider node N1 of the voltage divider module 11 also outputs a high-level signal, turning on the first transistor Q1. The detection signal output terminal B is disconnected from the second power supply terminal VCC and is only electrically connected to the ground terminal GND. Therefore, the second detection signal output from the detection signal output terminal B is a low-level signal. When the microcontroller receives a high-level signal, it can determine that the signal to be detected is a low-level signal, thus achieving low-level signal detection.

[0081] When the voltage of the signal received at the detection signal input terminal A is between low and high levels, if the signal output by the voltage divider node N1 of the voltage divider module 11 is less than the base voltage required for the saturation channel of the first transistor Q1, the first transistor Q1 will conduct. If the signal output by the voltage divider node N1 of the voltage divider module 11 is greater than or equal to the base voltage required for the saturation channel of the first transistor Q1, the first transistor Q1 will turn off. Therefore, by properly adjusting the resistance values ​​of the first resistor R1, the second resistor R2, and the third resistor R3, when the low-level signal received at the detection signal input terminal A is pulled high, the signal output by the voltage divider node N1 of the voltage divider module 11 can still control the first transistor Q1 to conduct. The detection signal output terminal B is electrically connected to the second power supply terminal VCC, so the detection signal output by the detection signal output terminal B is a high-level signal, thus making the detection of low-level signals more accurate.

[0082] Continue to refer to Figure 2 In some embodiments, the second branch further includes a fourth resistor R4 and a fifth resistor R5;

[0083] The fourth resistor R4 is connected in series between the collector of the first transistor Q1 and the detection signal output terminal B;

[0084] When the collector of the first transistor Q1 is electrically connected to the second power supply terminal VCC, the fifth resistor R5 is connected in series between the collector of the first transistor Q1 and the second power supply terminal VCC.

[0085] Specifically, the second branch also includes a fourth resistor R4 and a fifth resistor R5. The fourth resistor R4 is connected in series between the collector of the first transistor Q1 and the detection signal output terminal B, and the fifth resistor R5 is connected in series between the collector of the first transistor Q1 and the second power supply terminal VCC. The fourth resistor R4 and the fifth resistor R5 serve to limit current and divide voltage, preventing excessive base current of the first transistor Q1 and protecting it. In addition, the fourth resistor R4 and the fifth resistor R5 can improve the stability of the circuit, reduce the fluctuation of the signal output from the detection signal output terminal B, and improve the detection accuracy.

[0086] Continue to refer to Figure 2 In some embodiments, the second branch further includes a fourth resistor R4 and a fifth resistor R5;

[0087] The fourth resistor R4 is connected in series between the collector of the first transistor Q1 and the detection signal output terminal B;

[0088] When the collector of the first transistor Q1 is electrically connected to the ground terminal GND, the fifth resistor R5 is connected in series between the collector of the first transistor Q1 and the ground terminal GND.

[0089] Specifically, the second branch also includes a fourth resistor R4 and a fifth resistor R5. The fourth resistor R4 is connected in series between the collector of the first transistor Q1 and the detection signal output terminal B, and the fifth resistor R5 is connected in series between the collector of the first transistor Q1 and the ground terminal GND. The fourth resistor R4 and the fifth resistor R5 can improve the stability of the circuit, reduce the fluctuation of the signal output from the detection signal output terminal B, and improve the detection accuracy.

[0090] Continue to refer to Figure 3 In some embodiments, the first branch 10 further includes a second diode D2 connected in series between the detection signal input terminal A and the second resistor R2, wherein the anode of the second diode D2 is electrically connected to the second resistor R2 and the cathode of the second diode D2 is electrically connected to the detection signal input terminal A.

[0091] Specifically, in the first branch 10, a second diode D2 is connected in series between the detection signal input terminal A and the second resistor R2. The anode of the second diode D2 is electrically connected to the second resistor R2, and the cathode of the second diode D2 is electrically connected to the detection signal input terminal A. This prevents the detection signal input terminal A from receiving an abnormal level signal and then being reverse-connected to the second power supply terminal VCC and its related pins, thereby protecting other pins and circuit components connected to the second power supply terminal VCC.

[0092] This disclosure provides a vehicle, including: a microcontroller and a signal detection circuit electrically connected to the microcontroller. The signal detection circuit has a detection signal output terminal electrically connected to the microcontroller. The signal detection circuit is the aforementioned signal detection circuit. For a detailed structural diagram of the signal detection circuit, please refer to... Figures 1 to 3 The description of the signal detection circuit and its specific components in the illustrated embodiment also has corresponding beneficial effects, and will not be repeated here to avoid repetition.

[0093] The above description is merely a preferred embodiment of this disclosure and an explanation of the technical principles employed. Those skilled in the art should understand that the scope of this disclosure is not limited to technical solutions formed by specific combinations of the above-described technical features, but should also cover other technical solutions formed by arbitrary combinations of the above-described technical features or their equivalents without departing from the above-described concept. For example, technical solutions formed by substituting the above features with (but not limited to) technical features disclosed in this disclosure that have similar functions.

[0094] Furthermore, while the operations are described in a specific order, this should not be construed as requiring these operations to be performed in the specific order shown or in a sequential order. In certain environments, multitasking and parallel processing may be advantageous. Similarly, while several specific implementation details are included in the above discussion, these should not be construed as limiting the scope of this disclosure. Certain features described in the context of individual embodiments may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented individually or in any suitable sub-combination in multiple embodiments.

[0095] Although the subject matter has been described using language specific to structural features and / or methodological logic, it should be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or actions described above. Rather, the specific features and actions described above are merely illustrative examples of implementing the claims.

[0096] The above description is merely a specific embodiment of this disclosure, enabling those skilled in the art to understand or implement it. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this disclosure. Therefore, this disclosure is not to be limited to the embodiments described herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A signal detection circuit, characterized in that, include: First Branch Road and Second Branch Road; The first branch includes a first power supply terminal, a voltage divider module, a ground terminal, and a detection signal input terminal; The second branch includes a second power supply terminal, a switching module, a grounding terminal, and a detection signal output terminal; The first power supply terminal, the ground terminal, and the detection signal input terminal are all electrically connected to the voltage divider module. The voltage divider node of the voltage divider module is electrically connected to the control terminal of the switch module. The switch module is connected in series between the second power supply terminal and the ground terminal. Wherein, the detection signal input terminal receives a low-level signal, the switch module is in a first state, and the detection signal output terminal outputs a first detection signal; The detection signal input terminal receives a high-level signal or is left floating, the switch module is in the second state, and the detection signal output terminal outputs a second detection signal.

2. The signal detection circuit according to claim 1, characterized in that, The first branch also includes a first diode connected in series between the first power supply terminal and the voltage divider module. The anode of the first diode is electrically connected to the first power supply terminal, and the cathode of the first diode is electrically connected to the voltage divider module.

3. The signal detection circuit according to claim 1, characterized in that, The first branch also includes a control module, which is connected in series between the first power supply terminal and the voltage divider module. The control terminal of the control module receives an enable signal. When the enable signal is valid, the control module is turned on.

4. The signal detection circuit according to claim 1, characterized in that, The switching module includes a first transistor, which is an NPN transistor; The base of the first transistor is electrically connected to the voltage divider node of the voltage divider module, the collector of the first transistor is electrically connected to the second power supply terminal, and the emitter of the first transistor is electrically connected to the ground terminal. The detection signal output terminal is electrically connected to the collector of the first transistor.

5. The signal detection circuit according to claim 4, characterized in that, The voltage divider module includes a first resistor, a second resistor, and a third resistor; One end of the first resistor is electrically connected to the first power supply terminal, and the other end of the first resistor is electrically connected to both the ground terminal and the detection signal input terminal. One end of the second resistor is electrically connected to both the ground terminal and the detection signal input terminal, and the other end of the second resistor is electrically connected to the base of the first transistor. One end of the third resistor is electrically connected to the base of the first transistor, and the other end of the third resistor is electrically connected to the ground terminal.

6. The signal detection circuit according to claim 1, characterized in that, The switching module includes a first transistor, which is a PNP transistor; The base of the first transistor is electrically connected to the voltage divider node of the voltage divider module, the emitter of the first transistor is electrically connected to the second power supply terminal, and the collector of the first transistor is electrically connected to the ground terminal. The detection signal output terminal is electrically connected to the collector of the first transistor.

7. The signal detection circuit according to claim 6, characterized in that, The voltage divider module includes a first resistor, a second resistor, and a third resistor; One end of the first resistor is electrically connected to the first power supply terminal, and the other end of the first resistor is electrically connected to both the ground terminal and the detection signal input terminal. One end of the second resistor is electrically connected to both the ground terminal and the detection signal input terminal, and the other end of the second resistor is electrically connected to the base of the first transistor. One end of the third resistor is electrically connected to the base of the first transistor, and the third resistor is electrically connected to the second power supply terminal.

8. The signal detection circuit according to claim 5 or 7, characterized in that, The second branch also includes a fourth resistor and a fifth resistor; The fourth resistor is connected in series between the collector of the first transistor and the detection signal output terminal; When the collector of the first transistor is electrically connected to the second power supply terminal, the fifth resistor is connected in series between the collector of the first transistor and the second power supply terminal. When the collector of the first transistor is electrically connected to the ground terminal, the fifth resistor is connected in series between the collector of the first transistor and the ground terminal.

9. The signal detection circuit according to claim 7, characterized in that, The first branch also includes a second diode connected in series between the detection signal input terminal and the second resistor, wherein the anode of the second diode is electrically connected to the second resistor and the cathode of the second diode is electrically connected to the detection signal input terminal.

10. A vehicle, characterized in that, include: A microcontroller and a signal detection circuit electrically connected to the microcontroller, wherein the signal detection circuit is the signal detection circuit according to any one of claims 1-9.

Images