Microprocessor reset circuit, chip and electronic equipment

Abstract

The utility model provides a microprocessor reset circuit, a chip and electronic equipment, and belongs to the field of electronic control. Comprising a power supply adapter; the input end of the lithium battery is connected with the first output end of the power supply adapter; the first input end of the first switching circuit is connected with the output end of the lithium battery, and the second input end of the first switching circuit is connected with the second output end of the power supply adapter; the input end of the second switching circuit is connected with the first output end of the first switching circuit; the second output end of the first switching circuit and the output end of the second switching circuit are both connected with the microprocessor; the first switching circuit is used for controlling the power-on and power-off of the microprocessor; the second switching circuit is used for controlling the microprocessor to be powered down. The utility model aims to solve the problem that a power supply needs to be cut off or a restart button needs to be added when a microprocessor is reset in the prior art. The technical effect is that the microprocessor can be reset without adding a restart button or disconnecting a power supply.

Description

Technical Field

[0001] This utility model relates to the field of electronic control technology, and in particular to a microprocessor reset circuit, a chip, and an electronic device. Background Technology

[0002] In the operation of microprocessor-driven electronic devices, program crashes have long been a technical challenge. When a system encounters electromagnetic interference, abnormal voltage fluctuations, or software logic defects, the microprocessor may deviate from its intended program flow, causing device malfunctions. This not only affects normal use but may also pose serious safety hazards in scenarios such as industrial control and medical equipment. To solve this problem, hardware reset, as the most direct and effective means, is widely used for system recovery. Common methods include pressing the reset button or powering off and restarting.

[0003] However, traditional hardware reset solutions face numerous challenges in practical applications. From a cost control perspective, adding a reset button significantly increases hardware costs, including the material procurement costs of the button itself, labor costs in the production and assembly process, and the costs of PCB design changes due to the added button. From a product design perspective, if the device has high requirements for waterproofing and dustproofing, such as outdoor smart devices or underwater detection instruments, the introduction of a reset button will disrupt the device's sealing structure, significantly increasing the complexity and difficulty of waterproofing design. This requires not only more precise waterproofing sealing processes but also extensive waterproofing testing and verification, leading to longer development cycles and increased costs. For portable electronic products with built-in lithium batteries, for safety reasons, the devices typically employ an integrated sealed design. Frequent disconnection of battery power is not only inconvenient but may also pose safety risks due to loose battery interfaces, short circuits, or even serious accidents such as battery fires or explosions. Utility Model Content

[0004] This utility model provides a microprocessor reset circuit to solve the problem that microprocessor reset in the prior art requires disconnecting the power supply or adding a restart button, so as to realize microprocessor reset without adding a restart button or disconnecting the power supply.

[0005] This utility model provides a microprocessor reset circuit, including:

[0006] Power adapter;

[0007] The lithium battery's input terminal is connected to the first output terminal of the power adapter.

[0008] The first switching circuit has a first input terminal connected to the output terminal of the lithium battery and a second input terminal connected to the second output terminal of the power adapter.

[0009] The second switching circuit has its input terminal connected to the first output terminal of the first switching circuit.

[0010] The microprocessor has its second output terminal of the first switching circuit and the output terminal of the second switching circuit both connected to it; the first switching circuit is used to control the power-on and power-off of the microprocessor; the second switching circuit is used to control the power-off of the microprocessor.

[0011] In addition, the microprocessor reset circuit according to the first aspect of this utility model may also have the following additional technical features:

[0012] In some embodiments of this utility model, the first switching circuit includes:

[0013] The P-type MOSFET and the first switch control circuit are as follows: the drain of the P-type MOSFET is connected to the lithium battery, the source of the P-type MOSFET is connected to the microprocessor, the gate of the P-type MOSFET is connected to the first input terminal of the first switch control circuit, the power adapter is connected to the second input terminal of the first switch control circuit, and the first output terminal of the first switch control circuit is grounded.

[0014] The second switching circuit includes:

[0015] The second switch control circuit has its second output terminal connected to the input terminal of the first switch control circuit, and its output terminal grounded.

[0016] The NPN transistor has its third output terminal connected to the base of the first switching control circuit, its collector connected to the input terminal of the microprocessor, and its emitter grounded.

[0017] In some embodiments of this utility model, the first switch control circuit includes:

[0018] The first capacitor is connected to the first terminal of the power adapter;

[0019] The first resistor, the base of the P-type MOS transistor, and the second terminal of the first capacitor are all connected to the first terminal of the first resistor;

[0020] The second switch control circuit includes:

[0021] The second resistor is connected to the base of the NPN transistor, ground, and the second resistor at the second end of the first resistor.

[0022] The second capacitor has one end of the second resistor that is away from the first resistor connected to the first end of the second capacitor, and the second end of the second capacitor is connected to ground.

[0023] In some embodiments of this utility model, the second switching circuit further includes:

[0024] The third resistor is connected between the NPN transistor and the microprocessor.

[0025] In some embodiments of this utility model, the second switching circuit further includes:

[0026] The fourth resistor is connected between the NPN transistor and the first resistor.

[0027] In some embodiments of this utility model, the first switch control circuit further includes:

[0028] The fifth resistor has its first end connected to the first end of the first capacitor, and its second end connected to the second end of the first resistor.

[0029] In some embodiments of this utility model, the second switch control circuit further includes:

[0030] The sixth resistor has its first end connected to the second end of the second capacitor, and its second end connected to ground.

[0031] In some embodiments of this utility model, both the first resistor and the second resistor are adjustable resistors, and both the first capacitor and the second capacitor are adjustable capacitors.

[0032] The chip according to the second aspect of this utility model uses all the technical features of the microprocessor reset circuit of the first aspect of this utility model.

[0033] The electronic device according to the third aspect of this utility model uses all the technical features of the chip of the second aspect of this utility model.

[0034] In summary, this application includes the following beneficial technical effects: by coordinating the first and second switching circuits, the microprocessor can be reset while charging without adding a reset button or disconnecting the power supply, thus ensuring safety without significantly increasing hardware costs. Attached Figure Description

[0035] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the scope of the invention. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:

[0036] Figure 1 A circuit diagram of a microprocessor reset circuit according to some embodiments of the present invention is shown schematically.

[0037] Figure 2The diagram schematically illustrates a microprocessor reset circuit according to some embodiments of the present invention without a lithium battery and power adapter.

[0038] Figure 3 The voltage change waveforms at points A and C of a microprocessor reset circuit according to some embodiments of the present invention are schematically shown.

[0039] Figure label:

[0040] 1. First switching circuit; 11. First switching control circuit; 111. First resistor; 112. Second resistor; 113. First capacitor; 12. P-type MOSFET; 2. Second switching circuit; 21. Second switching control circuit; 211. Second capacitor; 212. Fifth resistor; 213. Sixth resistor; 22. NPN transistor; 23. Third resistor; 24. Fourth resistor; 3. Power adapter; 4. Lithium battery; 5. Microprocessor. Detailed Implementation

[0041] Exemplary embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0042] It should be understood that the terminology used herein is for the purpose of describing particular exemplary embodiments only and is not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “” used herein may also indicate the inclusion of the plural forms. The terms “comprising,” “including,” “containing,” and “having” are inclusive and therefore indicate the presence of the stated features, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, elements, components, and / or combinations thereof. The method steps, processes, and operations described herein are not construed as requiring them to be performed in a particular order described or illustrated, unless the order of performance is explicitly indicated. It should also be understood that additional or alternative steps may be used.

[0043] Although terms such as first, second, third, etc., may be used in this document to describe multiple elements, components, regions, layers, and / or segments, these elements, components, regions, layers, and / or segments should not be limited by these terms. These terms may be used only to distinguish one element, component, region, layer, or segment from another. Unless the context clearly indicates otherwise, terms such as "first," "second," and other numerical terms used herein do not imply order or sequence. Therefore, the first element, component, region, layer, or segment discussed below may be referred to as the second element, component, region, layer, or segment without departing from the teachings of the exemplary embodiments.

[0044] For ease of description, spatial relative terms may be used in the text to describe the relationship of one element or feature relative to another element or feature, as shown in the figure. These relative terms include, for example, "inside," "outside," "middle," "outer," "below," "below," "above," "over," etc. Such spatial relative terms are intended to include different orientations of the device in use or operation, other than those depicted in the figure. For example, if the device in the figure is flipped, an element described as "below other elements or features" or "below other elements or features" would subsequently be oriented "above other elements or features" or "above other elements or features." Therefore, the example term "below" can include both upper and lower orientations. The device may also be rotated 90 degrees or in other orientations, and the spatial relative descriptors used in the text will be interpreted accordingly.

[0045] like Figure 1 and Figure 2 As shown, according to an embodiment of the first aspect of this utility model, a microprocessor reset circuit is proposed, including a power adapter 3, a lithium battery 4, a microprocessor 5, a first switch circuit 1, and a second switch circuit 2. The input terminal of the lithium battery 4 is connected to the first output terminal of the power adapter 3, the first input terminal of the first switch circuit 1 is connected to the output terminal of the lithium battery 4, the second input terminal of the first switch circuit 1 is connected to the second output terminal of the power adapter 3, the input terminal of the second switch circuit 2 is connected to the first output terminal of the first switch circuit 1, and the second output terminals of the first switch circuit 1 and the second switch circuit 2 are both connected to the microprocessor 5.

[0046] The first switching circuit 1 is used to control the power-on and power-off of the microprocessor 5;

[0047] The second switching circuit 2 is used to control the power-off of the microprocessor 5.

[0048] In the above embodiments, it should be noted that when the lithium battery 4 is low on power or the microprocessor 5 needs to be reset, the first switch circuit 1 is disconnected, causing the lithium battery 4 to disconnect from the power supply to the microprocessor 5. The second switch circuit 2 is activated, causing the microprocessor 5 to power down and reset. After the microprocessor 5 has completed the power down and reset, the first switch circuit 1 starts to work, the second switch circuit 2 stops working, the microprocessor 5 executes the initialization code, and the lithium battery 4 supplies power to the subsequent circuits or components.

[0049] The technical effect achieved by the above embodiments is that, through the cooperative arrangement of the first switch circuit 1 and the second switch circuit 2, the microprocessor 5 can be reset while charging without the need to add a restart button or disconnect the power supply, thereby ensuring safety without significantly increasing hardware costs.

[0050] Optional, such as Figure 1 and Figure 2 As shown, the first switching circuit 1 includes a first switching control circuit 11 and a P-type MOSFET 12, and the second switching circuit 2 includes a second switching control circuit 21 and an NPN transistor 22. The drain of the P-type MOSFET 12 is connected to the lithium battery 4, the source of the P-type MOSFET 12 is connected to the microprocessor 5, the gate of the P-type MOSFET 12 is connected to the first input terminal of the first switching control circuit 11, the power adapter 3 is connected to the second input terminal of the first switching control circuit 11, the second output terminal of the first switching control circuit 11 is grounded, the second output terminal of the first switching control circuit 11 is connected to the input terminal of the second switching control circuit 21, the third output terminal of the first switching control circuit 11 is connected to the base of the NPN transistor 22, the collector of the NPN transistor 22 is connected to the input terminal of the microprocessor 5, the emitter of the NPN transistor 22 is grounded, and the output terminal of the second switching control circuit 21 is grounded.

[0051] In the above optional embodiments, it should be noted that the first switch control circuit 11 is used to control the turning on and off of the P-type MOS, and the second switch control circuit 21 is used to control the turning on and off of the NPN transistor 22.

[0052] The beneficial effects of the above optional embodiments are as follows: Under normal circumstances, the gate of the P-type MOSFET 12 is grounded through the first switch control circuit 11, allowing the P-type MOSFET 12 to be turned on, and the lithium battery 4 supplies power to the microprocessor 5. When the lithium battery 4 is low on power or the microprocessor 5 needs to be reset, the first switch control circuit 11 controls the P-type MOSFET 12 to be turned off, and the second switch control circuit 21 controls the NPN transistor 22 to be turned on, allowing the microprocessor 5 to perform a power-down reset. After the microprocessor 5 has completed the power-down reset, the first switch control circuit 11 controls the P-type MOSFET 12 to be turned on, and the second switch control circuit 21 controls the NPN transistor 22 to be turned off, allowing the microprocessor 5 to be powered on normally and the program to start running again. Thus, the microprocessor 5 can be reset while charging.

[0053] Optional, such as Figure 1 and Figure 2 As shown, the first switch control circuit 11 includes a first capacitor 113 and a first resistor 111, and the second switch control circuit 21 includes a second capacitor 211 and a second resistor 112. The second output terminal of the power adapter 3 is connected to the first terminal of the first capacitor 113. The base of the P-type MOSFET 12 and the second terminal of the first capacitor 113 are both connected to the first terminal of the first resistor 111. The second terminal of the first resistor 111 is connected to the base of the NPN transistor 22, ground, and the second resistor 112. The end of the second resistor 112 away from the first resistor 111 is connected to the first terminal of the second capacitor 211. The second terminal of the second capacitor 211 is connected to ground.

[0054] In the above optional embodiments, it should be noted that the working principle of this circuit is as follows: Under normal circumstances, the gate of the P-type MOSFET 12 is grounded through the first resistor 111, the P-type MOSFET 12 is turned on, and the lithium battery 4 supplies power to the subsequent microprocessor 5; when the lithium battery 4 is low on power or the microprocessor 5 needs to be reset, the power adapter 3 is connected to the circuit. Once the power adapter 3 is connected to the circuit, the power supply is instantly turned on. Figure 2 The voltage level at point A is pulled high to be equal to the output voltage of power adapter 3. At this time, P-type MOSFET 12 is turned off. Similarly... Figure 2 When the voltage level at point C is equal to the high voltage of the output voltage of power adapter 3, NPN transistor 22 turns on, and microprocessor 5 directly discharges to ground, performing a power-down reset. After a period of time, as the voltage at point A decreases, the voltage level at point A is insufficient to turn off P-type MOSFET 12, so P-type MOSFET 12 turns on to power microprocessor 5. Similarly, the voltage level at point C is insufficient to turn on NPN transistor 22. When NPN transistor 22 turns off, the discharge to ground ends, microprocessor 5 is powered on again, and the program starts running again.

[0055] The advantages of the above optional embodiments are: by using the first capacitor 113 and the second capacitor 211, the microprocessor 5 can be reset while the lithium battery 4 is being charged, without the need to add other hardware, which saves costs.

[0056] Optional, such as Figure 1 and Figure 2 As shown, the second switching circuit 2 also includes a third resistor 23, which is connected between the NPN transistor 22 and the microprocessor 5.

[0057] The beneficial effect of the above optional embodiments is that the third resistor 23 can play a role in voltage division protection, avoiding damage to the microprocessor 5 due to overvoltage.

[0058] Optional, such as Figure 1 and Figure 2 As shown, the second switching circuit 2 also includes a fourth resistor 24, which is connected between the NPN transistor 22 and the first resistor 111.

[0059] The beneficial effect of the above optional embodiments is that the setting of the fourth resistor 24 can further play the role of voltage division protection, avoiding damage to the NPN transistor 22.

[0060] Optional, such as Figure 1 and Figure 2 As shown, the first switch control circuit 11 also includes a fifth resistor 212. The first end of the fifth resistor 212 is connected to the first end of the first capacitor 113, and the second end of the fifth resistor 212 is connected to the second end of the first resistor 111.

[0061] The beneficial effects of the above optional embodiments are as follows: by setting the fifth resistor 212, the first capacitor 113 can be protected against current shunt, thus avoiding the occurrence of current overload of the first capacitor 113.

[0062] Optional, such as Figure 1 and Figure 2 As shown, the second switch control circuit 21 also includes a sixth resistor 213. The first end of the sixth resistor 213 is connected to the second end of the second capacitor 211, and the second end of the sixth resistor 213 is connected to the ground.

[0063] The beneficial effects of the above optional embodiments are as follows: when the power adapter 3 is not connected to the circuit, the gate of the P-type MOS transistor 12 is grounded through the first resistor 111, so the P-type MOS transistor 12 is turned on and supplies power to the subsequent microprocessor 5. The base of the NPN transistor 22 is grounded through the fourth resistor 24, so the NPN transistor 22 is turned off and will not discharge to the microprocessor 5.

[0064] When power adapter 3 is connected, let the voltage of power adapter 3 be denoted as U. Then the voltage at point A is... The voltage at point B is Based on the characteristics of the selected devices, the on-state voltage drop of the P-type MOSFET 12 is denoted as U1, and the on-state voltage drop of the NPN transistor 22 is denoted as U2.

[0065] When power adapter 3 is connected, the voltage at point A and the voltage at point C are both U. The voltage drop curves at points A and C are as follows: Figure 3 As shown, during the time period from 0 to t1, the voltages at points A and C are greater than U1 and U2, respectively. Therefore, P-type MOSFET 12 is turned off, and NPN transistor 22 is turned on, discharging the subsequent microprocessor 5. During the time period from t1 to t2, the voltages at points A and C are greater than U2 but less than U1. At this time, both P-type MOSFET 12 and NPN transistor 22 are turned on, and the circuit continues to discharge. When the time exceeds t2, P-type MOSFET 12 is turned on, and NPN transistor 22 is turned off, at which point power is supplied to the subsequent stage, and the microprocessor 5 begins executing the initialization code.

[0066] Based on the voltage formulas at points A and B above, we can see that by adjusting the values ​​of the resistors and capacitors, we can change their voltage transformation curves. This causes the turn-on time of the P-type MOSFET 12 and the turn-off time of the NPN transistor 22 to change, thereby flexibly adjusting the power-down reset time required by different models of microprocessors 5.

[0067] Optional, such as Figure 1 and Figure 2 As shown, the first resistor 111 and the second resistor 112 are both adjustable resistors, and the first capacitor 113 and the second capacitor 211 are both adjustable capacitors.

[0068] The beneficial effects of the above optional embodiments are as follows: the first resistor 111 and the second resistor 112 are both adjustable resistors, and the first capacitor 113 and the second capacitor 211 are both adjustable capacitors, which enables this circuit to meet the power-down reset requirements of different models of microprocessors 5.

[0069] A second aspect of this utility model provides a chip that includes all the technical features of the microprocessor reset circuit of the first aspect of this utility model.

[0070] An embodiment of the third aspect of this utility model provides an electronic device that includes all the technical features of the chip described in the embodiment of the second aspect of this utility model.

[0071] The above are merely preferred embodiments of this utility model, but the scope of protection of this utility model is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this utility model should be included within the scope of protection of this utility model. Therefore, the scope of protection of this utility model should be determined by the scope of the claims.

Claims

1. A microprocessor reset circuit, characterized in that, include: Power adapter (3); The lithium battery (4) has its input end connected to the first output end of the power adapter (3); The first switch circuit (1) has its first input terminal connected to the output terminal of the lithium battery (4) and its second input terminal connected to the second output terminal of the power adapter (3). The input terminal of the second switching circuit (2) is connected to the first output terminal of the first switching circuit (1); The microprocessor (5) is connected to the second output terminal of the first switching circuit (1) and the output terminal of the second switching circuit (2); the first switching circuit (1) is used to control the power on and power off of the microprocessor (5); the second switching circuit (2) is used to control the power off of the microprocessor (5).

2. The microprocessor reset circuit according to claim 1, characterized in that, The first switching circuit (1) includes: The P-type MOS transistor (12) and the first switch control circuit (11) are connected. The drain of the P-type MOS transistor (12) is connected to the lithium battery (4), the source of the P-type MOS transistor (12) is connected to the microprocessor (5), the gate of the P-type MOS transistor (12) is connected to the first input terminal of the first switch control circuit (11), the power adapter (3) is connected to the second input terminal of the first switch control circuit (11), and the first output terminal of the first switch control circuit (11) is grounded. The second switching circuit (2) includes: The second switch control circuit (21) is connected to the input terminal of the first switch control circuit (11), and the output terminal of the second switch control circuit (21) is grounded. The NPN transistor (22) is connected to the base of the first switch control circuit (11), the collector of the NPN transistor (22) is connected to the input of the microprocessor (5), and the emitter of the NPN transistor (22) is grounded.

3. The microprocessor reset circuit according to claim 2, characterized in that, The first switch control circuit (11) includes: The first capacitor (113) is connected to the first terminal of the power adapter (3). The base of the P-type MOS transistor (12) and the second terminal of the first capacitor (113) are both connected to the first terminal of the first resistor (111). The second switch control circuit (21) includes: The second resistor (112) is connected to the base of the NPN transistor (22), ground and the second resistor (112) at the second end of the first resistor (111). The second capacitor (211) has one end of the second resistor (112) that is away from the first resistor (111) connected to the first end of the second capacitor (211), and the second end of the second capacitor (211) is connected to the ground.

4. The microprocessor reset circuit according to any one of claims 2 or 3, characterized in that, The second switching circuit (2) further includes: The third resistor (23) is connected between the NPN transistor (22) and the microprocessor (5).

5. The microprocessor reset circuit according to claim 3, characterized in that, The second switching circuit (2) further includes: The fourth resistor (24) is connected between the NPN transistor (22) and the first resistor (111).

6. The microprocessor reset circuit according to claim 3, characterized in that, The first switch control circuit (11) further includes: The fifth resistor (212) has its first end connected to the first end of the first capacitor (113), and its second end connected to the second end of the first resistor (111).

7. The microprocessor reset circuit according to claim 3, characterized in that, The second switch control circuit (21) also includes: The sixth resistor (213) has its first end connected to the second end of the second capacitor (211), and its second end connected to the ground.

8. The microprocessor reset circuit according to claim 3, characterized in that, The first resistor (111) and the second resistor (112) are both adjustable resistors, and the first capacitor (113) and the second capacitor (211) are both adjustable capacitors.

9. A chip, characterized in that, The microprocessor reset circuit includes any one of claims 1 to 8.

10. An electronic device, characterized in that, Includes the chip described in claim 9.

Images