Sampling and holding circuit and electronic equipment
By combining a signal acquisition module, a feedback system module, and a signal holding module, the problem of low detection accuracy in existing sample-and-hold circuits is solved, enabling precise capture and holding of input voltage peaks and improving the accuracy of signal acquisition.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- CHANGSHA YINGWEITENG ELECTRIC TECH CO LTD
- Filing Date
- 2025-04-28
- Publication Date
- 2026-05-15
AI Technical Summary
Existing sample-and-hold circuits have low detection accuracy when detecting the peak voltage of the input signal. They are affected by the voltage difference of the unidirectional conducting element and the reverse leakage current, resulting in large errors.
It adopts a combined structure of signal acquisition module, first feedback system module, signal holding module, second feedback system module, positive feedback system module and output module. Through the synergistic effect of multiple feedback methods, it accurately captures the peak value of the input voltage and ensures that the peak value information is not lost.
This greatly improves the accuracy of the sample-and-hold circuit in detecting the peak input voltage, ensuring that peak information is not lost during input voltage changes and improving the accuracy of signal acquisition.
Smart Images
Figure CN224249690U_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of electronic circuit technology, and in particular relates to a sample-and-hold circuit and an electronic device. Background Technology
[0002] Sample-and-hold circuits play a crucial role in signal processing, especially in applications requiring precise capture and holding of signal peaks. Traditional peak voltage sample-and-hold circuits typically employ a structure with unidirectional conducting elements and energy storage components, relying on the conduction characteristics of the unidirectional elements to capture peak values. However, the inherent voltage drop of the unidirectional conducting elements can lead to small-signal detection errors, and reverse leakage current can cause voltage decay in the energy storage components, affecting accuracy. Existing improved solutions, by introducing amplifiers and rectification, have improved detection accuracy to some extent, but are still affected by the voltage difference of the unidirectional conducting elements, resulting in relatively large detection errors and limited accuracy. Utility Model Content
[0003] This application provides a sample-and-hold circuit and electronic device that can solve the problem of low detection accuracy of existing sample-and-hold circuits when detecting the peak voltage of the input signal.
[0004] In a first aspect, embodiments of this application provide a sample-and-hold circuit, including a signal acquisition module, a first feedback system module, and a signal holding module, wherein the signal acquisition module is electrically connected to the first feedback system module and the signal holding module respectively;
[0005] The signal acquisition module is used to receive the input voltage and the first voltage, and output the second voltage to the signal holding module and the first feedback system module respectively according to the input voltage and the first voltage. The first feedback system module is used to output the first voltage to the signal acquisition module according to the second voltage. When the second voltage is greater than the first voltage, the signal holding module is used to output the first target voltage, which is used to characterize the peak voltage of the input voltage.
[0006] In one possible implementation of the first aspect, the first feedback system module includes a first diode and a first capacitor, wherein the anode of the first diode is electrically connected to the second terminal of the signal acquisition module and the first capacitor, respectively, and the cathode of the first diode is electrically connected to the first terminal of the signal acquisition module, the signal holding module and the first capacitor, respectively.
[0007] In one possible implementation of the first aspect, the sample-and-hold circuit further includes an output module electrically connected to the signal holding module, for outputting a second target voltage based on the first target voltage.
[0008] In one possible implementation of the first aspect, the sample-and-hold circuit further includes a second feedback system module, which is electrically connected to the output module, the first feedback system module, and the signal acquisition module, respectively, and is used to adjust the first voltage according to the second target voltage.
[0009] In one possible implementation of the first aspect, the sample-and-hold circuit further includes a positive feedback system module, which is electrically connected to the output module and the signal holding module respectively, and is used to output a third voltage to the signal holding module according to the second target voltage;
[0010] Alternatively, the output module includes a second operational amplifier, the first input terminal of which is electrically connected to the signal holding module for receiving the first target voltage, and the output terminal of which is electrically connected to the second input terminal for outputting the second target voltage.
[0011] In one possible implementation of the first aspect, the signal acquisition module includes a first operational amplifier, a first input terminal of the first operational amplifier for receiving the input voltage, a second input terminal of the first operational amplifier electrically connected to the first feedback system module for receiving the first voltage, and an output terminal of the first operational amplifier electrically connected to the first feedback system module and the signal holding module for outputting the second voltage.
[0012] In one possible implementation of the first aspect, the signal holding module includes a second diode, a third diode, a first resistor, a second resistor, and a second capacitor. The anode of the second diode is electrically connected to both the signal acquisition module and the first feedback system module. The cathode of the second diode is electrically connected to the anode of the third diode. The first terminal of the first resistor is electrically connected to the cathode of the third diode. The second terminal of the first resistor is electrically connected to both the first terminal of the second capacitor and the first terminal of the second resistor. Both the second terminal of the second capacitor and the second terminal of the second resistor are grounded.
[0013] In one possible implementation of the first aspect, the second feedback system module includes a third resistor, the first end of which is electrically connected to the signal acquisition module and the first feedback system module, and the second end of which is electrically connected to the output module.
[0014] In one possible implementation of the first aspect, the positive feedback system module includes a fourth resistor, a first terminal of which is electrically connected to the signal holding module, and a second terminal of which is electrically connected to the output module.
[0015] Secondly, embodiments of this application provide an electronic device including the sample-and-hold circuit described in any one of the first aspects.
[0016] The beneficial effects of the embodiments in this application compared with the prior art are:
[0017] The sample-and-hold circuit provided in this application includes a signal acquisition module, a first feedback system module, and a signal holding module. The signal acquisition module receives an input voltage and a first voltage, and outputs a second voltage based on the input voltage and the first voltage. The first voltage received by the signal acquisition module is used to feed back the second voltage output by the signal acquisition module. The first feedback system module outputs a first voltage to the signal acquisition module based on the second voltage; at this time, the first voltage is greater than the second voltage. When the input voltage reaches a positive peak value, the second voltage increases instantaneously, becoming greater than the first voltage, at which point the first feedback system module temporarily stops working. At this time, the signal holding module outputs a first target voltage, which represents the peak voltage of the input voltage. This allows the sample-and-hold circuit to accurately capture the peak value of the input voltage, ensuring that peak information is not lost during input voltage changes, effectively improving the accuracy of signal acquisition. Therefore, the sample-and-hold circuit provided in this application, by adding a first feedback system module, greatly improves the detection accuracy of the sample-and-hold circuit when detecting the peak voltage of the input voltage.
[0018] It is understandable that the beneficial effects of the second aspect mentioned above can be found in the relevant descriptions in the first aspect mentioned above, and will not be repeated here. Attached Figure Description
[0019] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0020] Figure 1 This is a schematic block diagram of a sample-and-hold circuit provided in one embodiment of this application;
[0021] Figure 2 This is a schematic diagram of the circuit connection of a sample-and-hold circuit provided in an embodiment of this application;
[0022] Figure 3 This is a schematic block diagram of a sample-and-hold circuit provided in another embodiment of this application;
[0023] Figure 4 This is a schematic diagram of the circuit connection of a sample-and-hold circuit provided in another embodiment of this application;
[0024] Figure 5 This is a waveform diagram of each voltage provided in an embodiment of this application.
[0025] In the diagram, 10 is the sample-and-hold circuit; 101 is the signal acquisition module; 102 is the first feedback system module; 103 is the signal holding module; 104 is the output module; 105 is the second feedback system module; and 106 is the positive feedback system module. Detailed Implementation
[0026] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.
[0027] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.
[0028] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.
[0029] As used in this application specification and the appended claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrase "if determined" or "if [the described condition or event] is detected" may be interpreted, depending on the context, as "once determined," "in response to determination," "once [the described condition or event] is detected," or "in response to detection of [the described condition or event]."
[0030] Furthermore, in the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.
[0031] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.
[0032] Traditional peak voltage sample-and-hold circuits typically employ a diode-capacitor structure, relying on the forward conduction of the diode to capture the peak value. However, the diode voltage drop can lead to small-signal detection errors, and reverse leakage current can easily cause capacitor voltage attenuation, limiting accuracy. Existing improved solutions use operational amplifiers combined with rectification, which improves detection accuracy to some extent, but is still affected by the diode voltage difference, resulting in larger detection errors and relatively low detection accuracy.
[0033] To address the aforementioned issues, the sample-and-hold circuit provided in this application includes a signal acquisition module, a first feedback system module, a signal holding module, a second feedback system module, a positive feedback system module, and an output module. The signal acquisition module receives an input voltage and a first voltage, and outputs a second voltage based on the input voltage and the first voltage. The first voltage received by the signal acquisition module is used to feed back the second voltage output by the signal acquisition module. The first feedback system module outputs a first voltage to the signal acquisition module based on the second voltage; at this time, the first voltage is greater than the second voltage. When the input voltage reaches a positive peak value, the second voltage increases instantaneously, becoming greater than the first voltage, at which point the first feedback system module temporarily stops working. At this time, the signal holding module outputs a first target voltage, which represents the peak voltage of the input voltage. This enables the sample-and-hold circuit to accurately capture the peak value of the input voltage, ensuring that peak information is not lost during input voltage changes, effectively improving the accuracy of signal acquisition. Therefore, the sample-and-hold circuit provided in this application, by adding a first feedback system module, greatly improves the detection accuracy of the sample-and-hold circuit when detecting the peak voltage of the input voltage.
[0034] To illustrate the technical solution described in this application, specific embodiments are provided below.
[0035] Figure 1 A schematic block diagram of a sample-and-hold circuit 10 according to an embodiment of this application is shown. See also Figure 1As shown, the sample-and-hold circuit 10 includes a signal acquisition module 101, a first feedback system module 102, and a signal holding module 103. The signal acquisition module 101 is electrically connected to the first feedback system module 102 and the signal holding module 103, respectively.
[0036] Specifically, the signal acquisition module 101 can receive the input voltage Vin and a first voltage V1, and output a second voltage V2 based on the input voltage Vin and the first voltage V1. The first voltage V1 received by the signal acquisition module 101 is used to feed back the second voltage V2 output by the signal acquisition module 101. The first feedback system module 102 outputs the first voltage V1 to the signal acquisition module 101 based on the second voltage V2. At this time, the first voltage V1 is greater than the second voltage V2. When the input voltage Vin reaches a positive peak value, the second voltage V2 will increase instantaneously, becoming greater than the first voltage V1. At this time, the first feedback system module 102 temporarily stops working. Then, the signal holding module 103 outputs a first target voltage Vo1, which represents the peak voltage of the input voltage Vin. This enables the sample-and-hold circuit 10 to accurately capture the peak value of the input voltage Vin, ensuring that peak information is not lost during changes in the input voltage Vin, effectively improving the accuracy of signal acquisition. Therefore, it can be seen that the sample-and-hold circuit 10 provided in this application embodiment adds a first feedback system module 102, which greatly improves the detection accuracy of the sample-and-hold circuit 10 when detecting the peak voltage of the input voltage Vin.
[0037] It should be noted that this application targets AC signals with large fluctuations, such as sinusoidal signals. Therefore, the input voltage Vin will have positive and negative peak values. The positive peak value is the maximum value of the input voltage Vin during the positive half-cycle. During the positive half-cycle, the input voltage Vin increases from zero, reaches its maximum value, and then begins to decrease; this maximum value is the positive peak value. The negative peak value is the minimum value of the input voltage Vin during the negative half-cycle. During the negative half-cycle, the input voltage Vin decreases from zero, reaches its minimum value, and then begins to increase; this minimum value is the negative peak value.
[0038] In one embodiment of this application, such as Figure 2 As shown, the signal acquisition module 101 includes a first operational amplifier X1. The first input terminal of the first operational amplifier X1 is used to receive the input voltage Vin. The second input terminal of the first operational amplifier X1 is electrically connected to the first feedback system module 102 and is used to receive the first voltage V1. The output terminal of the first operational amplifier X1 is electrically connected to the first feedback system module 102 and the signal holding module 103 respectively and is used to output the second voltage V2.
[0039] Specifically, the positive input terminal of the first operational amplifier X1 serves as its first input terminal, receiving the input voltage Vin, and the inverting input terminal serves as its second input terminal, receiving the first voltage V1. The first operational amplifier X1 can perform a difference operation between the input voltage Vin and the first voltage V1, amplify the difference, and output a second voltage V2 at its output terminal. Furthermore, the second voltage V2 output by the first operational amplifier X1 can be converted back to the first voltage V1 via the first feedback system module 102 and transmitted to the inverting input terminal of the first operational amplifier X1, thereby achieving negative feedback and ensuring that under normal conditions, the first voltage V1 is greater than the second voltage V2, and a stable relationship exists between them. The waveforms of the input voltage Vin, the first voltage V1, and the second voltage V2 can be found in [reference needed]. Figure 5 As shown.
[0040] It should be noted that in this sample-and-hold circuit 10, the first operational amplifier X1 is designed as a follower. That is, the first operational amplifier X1 receives the input voltage Vin and the first voltage V1, and its output second voltage V2 will, to some extent, follow the changes in the input voltage Vin. When the input voltage Vin changes, the first operational amplifier X1 amplifies the difference between the input voltage Vin and the first voltage V1, adjusting the output of the second voltage V2. During normal, stable signal acquisition, the second voltage V2 will change accordingly with the increase or decrease of the input voltage Vin, achieving proportional sampling of the input voltage Vin.
[0041] It should be noted that, since the first operational amplifier X1 is internally a complex circuit composed of multiple transistors, resistors, and other components, these components require a suitable DC bias voltage to function properly. Therefore, the first operational amplifier X1 is also equipped with a first positive power supply V5 and a first negative power supply V6. The first positive power supply V5 provides the necessary forward bias for the transistors to conduct, ensuring that the transistors can perform current amplification and other operations as designed. The first negative power supply V6 works in conjunction with the first positive power supply V5 to ensure that the components inside the first operational amplifier X1 are in a suitable operating state, maintaining the normal operation of the entire sample-and-hold circuit 10.
[0042] For example, designers can set the power supply voltages of the first positive power supply V5 and the first negative power supply V6 according to the actual situation. For instance, the power supply voltage of the first positive power supply V5 can be set to +15V, and the power supply voltage of the first negative power supply V6 can be set to -15V.
[0043] It should be noted that, Figure 2The positive input terminal of the first operational amplifier X1 shown is also connected to a current-limiting resistor R0 and an oscilloscope V0. The resistance value of the current-limiting resistor R0 can be set to 1kΩ. The oscilloscope V0 will be configured to measure a signal with a frequency of 8kHz, and the trigger point of the oscilloscope V0 coincides with the start point of the screen, with no additional delay time.
[0044] In one embodiment of this application, such as Figure 2 As shown, the first feedback system module 102 includes a first diode D1 and a first capacitor C1. The anode of the first diode D1 is electrically connected to the inverting input terminal of the first operational amplifier X1 and the second terminal of the first capacitor C1, respectively. The cathode of the first diode D1 is electrically connected to the output terminal of the first operational amplifier X1, the signal holding module 103 and the first terminal of the first capacitor C1, respectively.
[0045] Specifically, since there is a certain potential difference (e.g., 0.5V) between the anode and cathode of the first diode D1, placing the first diode D1 between the inverting input and output terminals of the first operational amplifier X1 ensures that the second voltage V2 at the output terminal of the first operational amplifier X1 is less than the first voltage V1 at the inverting input terminal, thereby reducing the negative voltage value of the output of the first operational amplifier X1. Specifically, when the input voltage Vin is transmitted to the first operational amplifier X1, the first diode D1 ensures that the voltage at the output terminal of the first operational amplifier X1 is lower than the input voltage Vin by the voltage drop across the first diode D1, preventing the output from reaching the limit voltage, thus indirectly improving the conversion efficiency of the first operational amplifier X1. The first capacitor C1 is connected in parallel with the first diode D1. The first capacitor C1 can receive the second voltage V2 output by the first operational amplifier X1, suppressing voltage fluctuations in the second voltage V2 and voltage spikes in the first diode D1, preventing high-frequency oscillations of the first operational amplifier X1, compensating for phase, ensuring the operational stability of the first operational amplifier X1, and improving the reliability of the sample-and-hold circuit 10.
[0046] For example, the designer can select the capacitance of the first capacitor C1, for instance, the capacitance of the first capacitor C1 can be selected as 1nF.
[0047] It should be noted that the embodiments provided in this application only show one circuit structure as the first feedback system module 102, and do not mean that only this one circuit structure can realize the function of the first feedback system module 102. Other circuit structures that can realize this function can also be substituted, and are not limited to this.
[0048] In one embodiment of this application, such as Figure 2As shown, the signal holding module 103 includes a second diode D2, a third diode D3, a first resistor R1, a second resistor R2, and a second capacitor C2. The anode of the second diode D2 is electrically connected to the output terminal of the first operational amplifier X1, the cathode of the first diode D1, and the first terminal of the first capacitor C1, respectively. The cathode of the second diode D2 is electrically connected to the anode of the third diode D3. The first terminal of the first resistor R1 is electrically connected to the cathode of the third diode D3. The second terminal of the first resistor R1 is electrically connected to the first terminal of the second capacitor C2 and the first terminal of the second resistor R2, respectively. The second terminal of the second capacitor C2 and the second terminal of the second resistor R2 are both grounded.
[0049] Specifically, both the second diode D2 and the third diode D3 have unidirectional conductivity, acting as unidirectional conductors. The second capacitor C2 stores and releases energy, the first resistor R1 limits current, and the second resistor R2 adjusts the signal hold time. Specifically, when the second voltage V2 increases instantaneously, causing an overshoot (i.e., the second voltage V2 is greater than the first voltage V1), the first diode D1 is cut off, while the second diode D2 and the third diode D3 are both turned on. At this time, the overshoot voltage of the second voltage V2 charges the second capacitor C2 through the second diode D2, the third diode D3, and the first resistor R1, increasing the voltage at the first terminal of the second capacitor C2 (the first target voltage Vo1), thus achieving peak voltage sampling. When the second voltage V2 is less than the first voltage V1, the second capacitor C2 discharges through the second resistor R2, causing the voltage at the first terminal of the second capacitor C2 (the first target voltage Vo1) to decrease, thereby maintaining the peak voltage. When the second voltage V2 overshoots again, the first target voltage Vo1 increases again, and this cycle repeats, ultimately achieving peak voltage sampling and holding. In the above process, since the second capacitor C2 discharges through the second resistor R2, the resistance value of the second resistor R2 affects the discharge rate of the second capacitor C2, thereby adjusting the signal hold time and better matching the hold time requirements of AD acquisition, making it widely applicable. The waveform of the first target voltage Vo1 can be found in [reference needed]. Figure 5 As shown.
[0050] For example, designers can select the resistance values of the first resistor R1, the second resistor R2, and the capacitance of the second capacitor C2 according to actual conditions. For instance, the resistance of the first resistor R1 can be 10mΩ, the resistance of the second resistor R2 can be 200kΩ, and the capacitance of the second capacitor C2 can be 2.2nF. Simultaneously, designers can set the initial charge IC of the second capacitor C2 to 0, meaning that the second capacitor C2 is not pre-charged when the circuit starts. The number of second capacitors C2 can be set to one or multiple. The leakage resistance of the second capacitor C2 can be set to 1Meg, and the equivalent series resistance of the second capacitor C2 can be set to 10mΩ. The parameters of the first resistor R1, the second resistor R2, and the second capacitor C2 listed above can all be set according to actual conditions and are not limited here. Furthermore, the number of resistors used is not limited; multiple resistors can be connected in series or parallel to replace the first resistor R1 or the second resistor R2.
[0051] It should be noted that the embodiments provided in this application only show one circuit structure as the signal holding module 103, and do not mean that only this one circuit structure can realize the function of the signal holding module 103. Other circuit structures that can realize this function can also be substituted, and are not limited to this.
[0052] In one embodiment of this application, such as Figure 3 As shown, the sample-and-hold circuit 10 also includes an output module 104, which is electrically connected to the signal holding module 103 and is used to output a second target voltage Vo2 according to the first target voltage Vo1.
[0053] Specifically, in the sample-and-hold circuit 10, the first target voltage Vo1 output by the signal holding module 103 needs to be output to the subsequent load circuit. However, the impedance characteristics of the load circuit may affect the signal holding module 103, causing fluctuations in the held voltage value. The output module 104 can act as an isolation module to prevent the impedance of the load circuit from affecting the signal holding module, thereby ensuring the stability of the second target voltage Vo2.
[0054] It should be noted that the first target voltage Vo1 and the second target voltage Vo2 can be the same. In this case, the output module 104 can be designed as a voltage follower to ensure the accuracy of the output second target voltage Vo2.
[0055] In one embodiment of this application, such as Figure 4As shown, the output module 104 includes a second operational amplifier X2. The first input terminal of the second operational amplifier X2 is electrically connected to the first terminal of the second capacitor C2 for receiving the first target voltage Vo1. The output terminal of the second operational amplifier X2 is electrically connected to the second input terminal of the second operational amplifier X2 for outputting the second target voltage Vo2.
[0056] Specifically, the non-inverting input of the second operational amplifier X2 serves as its first input, used to receive the first target voltage Vo1. The inverting input serves as both its second input and output, used to receive and output the second target voltage Vo2. The second operational amplifier X2 is designed as a follower, allowing the first target voltage Vo1 to be followed and output, thus providing a low-impedance output path. The waveform of the second target voltage Vo2 can be found in [reference needed]. Figure 5 As shown, Figure 5 The first waveform in the diagram shows the input voltage Vin and the second target voltage Vo2 placed together, allowing for a more intuitive observation of the frequency, phase, amplitude, and delay relationships between them. Based on this first waveform, it is clear that the second target voltage Vo2 accurately tracks and maintains the peak signal of the input voltage Vin without generating overshoot pulses, demonstrating strong anti-interference capabilities and high detection accuracy.
[0057] It should be noted that, since the second operational amplifier X2 is a complex circuit composed of multiple transistors, resistors, and other components, these components require a suitable DC bias voltage to function properly. Therefore, the second operational amplifier X2 also has a second positive power supply V7 and a second negative power supply V8. The second positive power supply V7 provides the necessary forward bias for the transistors to conduct, ensuring that the transistors can perform current amplification and other operations as designed. The second negative power supply V8 works in conjunction with the second positive power supply V7 to ensure that the components inside the second operational amplifier X2 are in the appropriate operating state, maintaining the normal operation of the entire sample-and-hold circuit 10.
[0058] For example, designers can set the power supply voltage of the second positive power supply V7 and the second negative power supply V8 according to the actual situation. For example, the power supply voltage of the second positive power supply V7 can be set to +15V, and the power supply voltage of the second negative power supply V8 can be set to -15V.
[0059] It should be noted that this application can select a first operational amplifier X1 and a second operational amplifier X2 with appropriate bandwidths, so that the response time of the sample-and-hold circuit 10 can reach within 5µs. Compared with the existing solutions mentioned in the background art, the response speed of the solution in this application can be improved by more than 5 times. Using a low-bandwidth first operational amplifier X1 and a second operational amplifier X2 can achieve the transmission effect of a high-speed operational amplifier. At the same time, the components used in this application for sampling and holding the peak voltage are all common electronic components, such as operational amplifiers, resistors, capacitors, diodes, etc., thus making the sample-and-hold circuit 10 simple in structure, easy to implement and low in cost, suitable for mass production. In addition, the sample-and-hold circuit 10 provided by this application has a small operating current during normal operation, and does not require a large current consumption.
[0060] In one embodiment of this application, such as Figure 3 As shown, the sample-and-hold circuit 10 also includes a second feedback system module 105, which is electrically connected to the output module 104, the first feedback system module 102 and the signal acquisition module 101, respectively, and is used to adjust the first voltage V1 according to the second target voltage Vo2.
[0061] Specifically, when the input voltage Vin reaches its positive peak value and the second voltage V2 is greater than the first voltage V1, the second target voltage Vo2 experiences a momentary fluctuation. At this time, the second feedback system module 105 can dissipate the momentary voltage fluctuation, thereby adjusting the first voltage V1 and restoring it to its normal value. This allows the second target voltage Vo2 to perfectly track the input voltage Vin, ensuring that the sample-and-hold circuit 10 can operate continuously and stably.
[0062] In one embodiment of this application, such as Figure 4 As shown, the second feedback system module 105 includes a third resistor R3. The first end of the third resistor R3 is electrically connected to the inverting input terminal of the first operational amplifier X1 and the anode of the first diode D1, respectively. The second end of the third resistor R3 is electrically connected to the output module 104 for receiving the second target voltage Vo2.
[0063] Specifically, when the input voltage Vin reaches its peak value, and the second voltage V2 overshoots, causing it to exceed the first voltage V1, the first diode D1 in the first feedback system module 102 is turned off, and the first feedback path temporarily stops working. At this time, the signal holding module 103 outputs the first target voltage Vo1, and the output module 104 outputs the second target voltage Vo2 based on the first target voltage Vo1. Since the second target voltage Vo2 is generated based on the second voltage V2, when the second voltage V2 overshoots, it will cause a momentary fluctuation in the second target voltage Vo2. At this time, current will flow through the third resistor R3, which can dissipate the momentary voltage fluctuation, thereby achieving the purpose of adjusting the first voltage V1 and restoring it to its normal value. This allows the second target voltage Vo2 to perfectly track the input voltage Vin, ensuring that the sample-and-hold circuit 10 can operate continuously and stably.
[0064] For example, the designer can select the resistance value of the third resistor R3, for instance, the resistance value of the third resistor R3 can be selected as 2kΩ.
[0065] In one embodiment of this application, such as Figure 3 As shown, the sample-and-hold circuit 10 also includes a positive feedback system module 106, which is electrically connected to the output module 104 and the signal holding module 103 respectively, and is used to output a third voltage to the signal holding module 103 according to the second target voltage Vo2.
[0066] Specifically, the positive feedback system module 106 outputs a third voltage V3 based on the second target voltage Vo2 generated by the output module 104, thereby providing a stable input voltage Vin for the signal holding module 103 when it is not working, improving the stability of the signal holding module 103 and enhancing its anti-interference capability.
[0067] In summary, the sample-and-hold circuit 10 provided in this embodiment adds a first feedback system module 102, a second feedback system module 105, and a positive feedback system module 106. Through the two negative feedbacks formed by the first feedback system module 102 and the second feedback system module 105, and the one positive feedback formed by the positive feedback system module 106, the multiple feedback methods work together to enable the second target voltage Vo2 output by the output module 104 to accurately track and hold the peak signal of the input voltage Vin without generating overshoot pulses. It has strong anti-interference ability and greatly improves the detection accuracy of the sample-and-hold circuit 10 when detecting the peak voltage of the input voltage Vin.
[0068] In one embodiment of this application, such as Figure 4As shown, the positive feedback system module 106 includes a fourth resistor R4. The first end of the fourth resistor R4 is electrically connected to the cathode of the second diode D2 and the anode of the third diode D3, respectively. The second end of the fourth resistor R4 is electrically connected to the output module 104 for receiving the second target voltage Vo2.
[0069] Specifically, when the second voltage V2 is positive, both the second diode D2 and the third diode D3 are conducting, and the voltage at the cathode of the second diode D2 / anode of the third diode D3 (the third voltage V3) has a stable potential point. When the second voltage V2 is negative, both the second diode D2 and the third diode D3 are cut off. When the second diode D2 recovers from reverse rotation, the voltage at the cathode of the second diode D2 will be in a floating state, resulting in unstable terminal voltage. At the arrival of the next cycle, a spike will appear at the second diode D2, thus interfering with signal sampling and holding. This application uses a fourth resistor R4 connected between the output module 104 and the cathode of the second diode D2 to dissipate the spike voltage, thereby providing a stable terminal voltage at the cathode of the second diode D2 and enhancing the circuit's anti-interference capability. The waveform of the third voltage V3 can be found in [reference needed]. Figure 5 As shown.
[0070] For example, the designer can select the resistance value of the fourth resistor R4, for instance, the resistance value of the fourth resistor R4 can be selected as 10kΩ.
[0071] This application also discloses an electronic device including the aforementioned sample-and-hold circuit. By employing this circuit, the electronic device can accurately acquire and process peak information in the input signal. This not only enhances the electronic device's ability to process various signals but also strengthens its adaptability to different operating scenarios, enabling stable and reliable operation in applications such as communication, data acquisition, and measurement analysis, thus providing users with a more accurate and efficient service experience.
[0072] It should be noted that electronic devices can include frequency converters for overcurrent protection, oscilloscopes, medical instruments, communication receivers, and audio processors, etc., and the specific type of electronic device is not limited here.
[0073] Since the processing and functions implemented by the sample-and-hold system and electronic device in this embodiment are basically the same as the embodiments, principles and examples of the aforementioned sample-and-hold circuit, any details not covered in this embodiment can be found in the relevant descriptions in the aforementioned embodiments, and will not be repeated here.
[0074] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.
Claims
1. A sample-and-hold circuit, characterized in that, It includes a signal acquisition module, a first feedback system module, and a signal holding module, wherein the signal acquisition module is electrically connected to the first feedback system module and the signal holding module respectively; The signal acquisition module is used to receive the input voltage and the first voltage, and output the second voltage to the signal holding module and the first feedback system module respectively according to the input voltage and the first voltage. The first feedback system module is used to output the first voltage to the signal acquisition module according to the second voltage. When the second voltage is greater than the first voltage, the signal holding module is used to output the first target voltage, which is used to characterize the peak voltage of the input voltage.
2. The sample-and-hold circuit according to claim 1, characterized in that, The first feedback system module includes a first diode and a first capacitor. The anode of the first diode is electrically connected to the second terminal of the signal acquisition module and the first capacitor, respectively, and the cathode of the first diode is electrically connected to the first terminal of the signal acquisition module, the signal holding module and the first capacitor, respectively.
3. The sample-and-hold circuit according to claim 1, characterized in that, The sample-and-hold circuit further includes an output module, which is electrically connected to the signal holding module and is used to output a second target voltage based on the first target voltage.
4. The sample-and-hold circuit according to claim 3, characterized in that, The sample-and-hold circuit further includes a second feedback system module, which is electrically connected to the output module, the first feedback system module, and the signal acquisition module, respectively, and is used to adjust the first voltage according to the second target voltage.
5. The sample-and-hold circuit according to claim 3, characterized in that, The sample-and-hold circuit further includes a positive feedback system module, which is electrically connected to the output module and the signal holding module respectively, and is used to output a third voltage to the signal holding module according to the second target voltage; Alternatively, the output module includes a second operational amplifier, the first input terminal of which is electrically connected to the signal holding module for receiving the first target voltage, and the output terminal of which is electrically connected to the second input terminal for outputting the second target voltage.
6. The sample-and-hold circuit according to claim 1, characterized in that, The signal acquisition module includes a first operational amplifier. The first input terminal of the first operational amplifier is used to receive the input voltage. The second input terminal of the first operational amplifier is electrically connected to the first feedback system module and is used to receive the first voltage. The output terminal of the first operational amplifier is electrically connected to the first feedback system module and the signal holding module respectively and is used to output the second voltage.
7. The sample-and-hold circuit according to claim 1, characterized in that, The signal holding module includes a second diode, a third diode, a first resistor, a second resistor, and a second capacitor. The anode of the second diode is electrically connected to the signal acquisition module and the first feedback system module, respectively. The cathode of the second diode is electrically connected to the anode of the third diode. The first end of the first resistor is electrically connected to the cathode of the third diode. The second end of the first resistor is electrically connected to the first end of the second capacitor and the first end of the second resistor, respectively. The second end of the second capacitor and the second end of the second resistor are both grounded.
8. The sample-and-hold circuit according to claim 4, characterized in that, The second feedback system module includes a third resistor, the first end of which is electrically connected to the signal acquisition module and the first feedback system module, and the second end of which is electrically connected to the output module.
9. The sample-and-hold circuit according to claim 5, characterized in that, The positive feedback system module includes a fourth resistor, the first end of which is electrically connected to the signal holding module, and the second end of which is electrically connected to the output module.
10. An electronic device, characterized in that, Includes the sample-and-hold circuit as described in any one of claims 1-9.