Electromagnetic shielded package structure

Abstract

The utility model relates to an electromagnetic shielding packaging structure, the electromagnetic shielding packaging structure includes: adapter plate, including substrate, the first recess groove in the substrate and the partition in the first recess groove, the partition divides the first recess groove into a plurality of independent sub -slot, wiring layer, located on the adapter plate, a plurality of first chips are located in a plurality of sub -slot respectively, and a plurality of first chips all are connected with wiring layer electricity, first electromagnetic shielding layer, covers on the inner wall of first recess groove, second chip, located above the adapter plate and is connected with wiring layer electricity, the utility model can integrate radio frequency chip and other various types of chips in the sub -slot, and has simplified the manufacturing process of packaging structure, still can greatly reduce the manufacturing cost of packaging structure.

Description

Technical Field

[0001] This utility model relates to the field of semiconductor manufacturing technology, and in particular to an electromagnetic shielding packaging structure. Background Technology

[0002] As various technology industries place increasingly higher demands on the integration and electrical performance of semiconductor devices, packaging technology also needs to adapt and continuously evolve and innovate. When integrating multiple chips using traditional 2D packaging technologies, such as fan-out packaging structures, the size of the package structure (e.g., volume or surface area) increases, limiting its application in products with size constraints. To address this issue, 3D packaging structures have emerged. Current advanced 3D packaging structures increasingly employ die-to-die mounting, with the base die often being an active silicon interposer, and using TMV (Through Molding Via) technology to connect the upper and lower packages. However, this three-dimensional packaging structure has at least the following problems: (1) The base chip is an active chip formed by TSV (Through Silicon Via) process, which has a high processing cost; (2) It does not have electromagnetic shielding function, so it is not suitable for integrating radio frequency chips inside the packaging structure; (3) The chip-to-chip bonding process is a high-cost process, which leads to a significant increase in the manufacturing cost of the packaging structure; (4) The use of TMV process results in a limited number of I / O interfaces, which is not suitable for interconnection that requires a high number of I / O interfaces; (5) The thickness of the entire three-dimensional packaging structure is large, which is not conducive to the miniaturization of the packaging structure.

[0003] Therefore, how to simplify the manufacturing process of packaging structures and reduce their manufacturing costs while expanding their functionality so that they can integrate multiple types of chips is a pressing technical problem that needs to be solved. Summary of the Invention

[0004] This invention provides an electromagnetic shielding packaging structure that simplifies the manufacturing process and reduces the manufacturing cost of the packaging structure while expanding its functionality, enabling the packaging structure to integrate multiple types of chips.

[0005] According to some embodiments, this utility model provides an electromagnetic shielding packaging structure, including:

[0006] The adapter plate includes a substrate, a first groove located within the substrate, and a separator located within the first groove, the separator dividing the first groove into a plurality of independent sub-grooves;

[0007] A wiring layer is located on the adapter board;

[0008] Multiple first chips are located in multiple sub-slots, and all of the multiple first chips are electrically connected to the wiring layer;

[0009] A first electromagnetic shielding layer covers the inner wall of the first groove;

[0010] The second chip is located above the adapter board and is electrically connected to the wiring layer.

[0011] In some embodiments, the adapter board includes an upper surface and a lower surface that are oppositely distributed, and the second chip is located above the upper surface of the adapter board;

[0012] The separator extends along a direction perpendicular to the upper surface of the adapter plate.

[0013] In some embodiments, the separator is a metal column, a metal wall, or a metal weld line.

[0014] In some embodiments, the adapter board includes an upper surface and a lower surface that are oppositely distributed, and the second chip is located above the upper surface of the adapter board;

[0015] The separator is a metal plate extending in a direction parallel to the upper surface of the adapter plate.

[0016] In some embodiments, all the sub-slots have the same width in a direction parallel to the upper surface of the adapter plate; or,

[0017] At least two of the sub-slots have different widths along a direction parallel to the upper surface of the adapter plate.

[0018] In some embodiments, the wiring layer includes:

[0019] A top wiring layer is located on the upper surface of the adapter board, and the second chip is located on the top wiring layer and electrically connected to the top wiring layer;

[0020] A bottom wiring layer is located on the lower surface of the adapter board, the first chip is electrically connected to the bottom wiring layer, and the top wiring layer is electrically connected to the bottom wiring layer.

[0021] In some embodiments, the adapter plate further includes:

[0022] A first conductive connection post penetrates the substrate, with one end of the first conductive connection post electrically connected to the top wiring layer and the other end electrically connected to the bottom wiring layer.

[0023] In some embodiments, the first chip includes a functional surface and a back surface that are distributed relatively to each other, and a first conductive bump is disposed on the functional surface of the first chip.

[0024] The functional surface of the first chip faces the bottom wiring layer, and the first conductive bump is electrically connected to the bottom wiring layer. The back side of the first chip is bonded to the surface of the first electromagnetic shielding layer through the first adhesive layer.

[0025] In some embodiments, it also includes:

[0026] The second groove is located within the substrate, and the second groove is located on the side of the substrate facing the top wiring layer;

[0027] The third chip is located within the second recess and is electrically connected to the top wiring layer.

[0028] In some embodiments, the third chip includes a functional surface and a back surface that are distributed relatively to each other, and a third conductive bump is provided on the functional surface of the third chip;

[0029] The functional surface of the third chip faces the top wiring layer, and the third conductive bump is electrically connected to the top wiring layer.

[0030] In some embodiments, it also includes:

[0031] The second electromagnetic shielding layer covers the inner wall of the second groove, and the back side of the third chip is bonded to the surface of the second electromagnetic shielding layer by the second adhesive layer.

[0032] In some embodiments, the bottom wiring layer includes a bottom ground line, one end of the separator is electrically connected to the first electromagnetic shielding layer and the other end is electrically connected to the bottom ground line;

[0033] The top wiring layer includes a top grounding line, and the second electromagnetic shielding layer is electrically connected to the top grounding line.

[0034] In some embodiments, the bottom wiring layer includes a bottom ground line, one end of the separator is electrically connected to the first electromagnetic shielding layer, and the other end is electrically connected to the bottom ground line; the adapter plate further includes:

[0035] The second conductive connection post is located within the substrate, with one end electrically connected to the second electromagnetic shielding layer and the other end electrically connected to the first electromagnetic shielding layer.

[0036] In some embodiments, it also includes:

[0037] A first molding layer is filled in the first groove, and the first molding layer covers the first electromagnetic shielding layer and molds multiple first chips.

[0038] A second molding layer is located above the adapter board, and the second molding layer encapsulates the second chip.

[0039] The electromagnetic shielding packaging structure provided by this utility model, by setting a first groove in the adapter plate and a separator located in the first groove, divides the first groove into multiple independent sub-grooves by the separator, and mounts multiple first chips in the multiple sub-grooves respectively. A first electromagnetic shielding layer is covered on the inner wall of the first groove, and a wiring layer is formed on the adapter plate. A second chip is mounted on the wiring layer, so that both the first chip and the second chip are electrically connected to the wiring layer. The setting of the first electromagnetic shielding layer enables the first groove to have electromagnetic shielding function, thereby enabling the integration of various types of chips, such as radio frequency chips, in the sub-grooves, which helps to expand the functionality of the packaging structure and broaden its application fields. By dividing the first groove into multiple independent sub-grooves by the separator, not only can the mutual interference between the first chips in adjacent sub-grooves be avoided, but also the width of different sub-grooves can be flexibly adjusted according to the size of the first chips mounted in different sub-grooves without changing the size of the first groove. This simplifies the packaging structure manufacturing process, improves the manufacturing flexibility of the packaging structure, and facilitates the integration of first chips of different sizes into the adapter plate. The electrical connections between the second chip and the adapter board, as well as between the second chip and the first chip, are achieved through the wiring layer, eliminating the need for chip-to-chip bonding. This simplifies the packaging manufacturing process, significantly reduces manufacturing costs, and helps reduce the overall thickness of the packaging, promoting miniaturization. By providing multiple independent sub-slots within the adapter board to house the first chip, and combining this with the wiring layer, a large number of I / O interface interconnections can be provided, making it suitable for packaging structures requiring a high number of I / O interfaces. This invention eliminates the need for processes such as TMV, further reducing manufacturing costs and complexity. Attached Figure Description

[0040] To more clearly illustrate the technical solutions in the embodiments of this utility model, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without any creative effort.

[0041] Figure 1This is a first cross-sectional schematic diagram of the electromagnetic shielding packaging structure in a specific embodiment of this utility model;

[0042] Figure 2 This is a schematic diagram of the first relative positional relationship between the adapter board and the first chip in a specific embodiment of this utility model;

[0043] Figure 3 This is a schematic diagram of the first cross-section of the adapter plate in a specific embodiment of this utility model;

[0044] Figure 4 This is a second cross-sectional schematic diagram of the electromagnetic shielding packaging structure in a specific embodiment of this utility model;

[0045] Figure 5 This is a third cross-sectional schematic diagram of the electromagnetic shielding packaging structure in a specific embodiment of this utility model;

[0046] Figure 6 This is a fourth cross-sectional schematic diagram of the electromagnetic shielding packaging structure in a specific embodiment of this utility model;

[0047] Figure 7 This is a fifth cross-sectional schematic diagram of the electromagnetic shielding packaging structure in a specific embodiment of this utility model;

[0048] Figure 8 This is a schematic diagram illustrating the second relative positional relationship between the adapter board and the first chip in a specific embodiment of this utility model;

[0049] Figure 9 This is a second cross-sectional schematic diagram of the adapter plate in a specific embodiment of this utility model;

[0050] Figure 10 This is a sixth cross-sectional schematic diagram of the electromagnetic shielding packaging structure in a specific embodiment of this utility model. Detailed Implementation

[0051] The specific embodiments of the electromagnetic shielding packaging structure provided by this utility model will be described in detail below with reference to the accompanying drawings.

[0052] This specific embodiment provides an electromagnetic shielding packaging structure. Figure 1 This is a first cross-sectional schematic diagram of the electromagnetic shielding packaging structure in a specific embodiment of this utility model. Figure 2 This is a schematic diagram illustrating the first relative positional relationship between the adapter board and the first chip in a specific embodiment of this utility model. Figure 3 This is a schematic cross-sectional view of the adapter plate in a specific embodiment of this utility model. For example... Figure 1 , Figure 2 and Figure 3 As shown, the electromagnetic shielding encapsulation structure includes:

[0053] The adapter plate includes a substrate 10, a first groove located in the substrate 10, and a separator 25 located in the first groove, wherein the separator 25 divides the first groove into a plurality of independent sub-grooves 30.

[0054] A wiring layer is located on the adapter board;

[0055] Multiple first chips 11 are respectively located in multiple sub-slots 30, and all multiple first chips 11 are electrically connected to the wiring layer;

[0056] The first electromagnetic shielding layer 15 covers the inner wall of the first groove;

[0057] The second chip 12 is located above the adapter board and is electrically connected to the wiring layer.

[0058] Specifically, the substrate 10 in the adapter board can be, but is not limited to, a silicon substrate. This specific embodiment uses a silicon substrate as an example for explanation. By etching the substrate 10, the first groove can be formed in the substrate 10. The separator 25 disposed within the first groove divides the first groove into multiple independent sub-grooves 30. Multiple first chips 11 are respectively mounted within multiple sub-grooves 30. That is, the separator 25 achieves cavity division of the first groove, realizing mutual isolation between the first chips 11 in adjacent sub-grooves 30 and avoiding mutual interference between the first chips 11 in adjacent sub-grooves 30. Moreover, while keeping the size of the first groove unchanged, the size of the sub-grooves 30 can be adjusted by adjusting the position of the separator 25 within the first groove, so as to integrate first chips 11 of different sizes within the sub-grooves 30. In one example, the first groove does not penetrate the substrate 10. In another example, the first groove penetrates the substrate 10 to form a through-hole. The first electromagnetic shielding layer 15 covers the inner wall of the first groove, thereby providing electromagnetic shielding for the first chip 11 within the sub-groove 30. This allows the first chip 11 mounted within the sub-groove 30 to be a radio frequency chip, expanding the types of chips that can be integrated into the packaging structure and broadening its application areas. In one example, the first chips 11 disposed in multiple sub-grooves 30 are of the same type (e.g., identical in function and structure). In another example, the first chips 11 disposed in at least two sub-grooves 30 are of different types (e.g., different in function or structure).

[0059] The wiring layer is disposed on the adapter board. In one example, the wiring layer is a high-density wiring layer, and the wiring layer includes a dielectric layer and high-density metal traces located within the dielectric layer. The wiring layer is electrically connected to the adapter board. Multiple first chips 11 and second chips 12 are electrically connected to the wiring layer, thereby achieving electrical connections between the second chip 12 and the adapter board, and between the second chip 12 and the first chip 11, without the need for chip-to-chip bonding. This simplifies the packaging structure manufacturing process, significantly reduces the manufacturing cost of the packaging structure, and helps reduce the overall thickness of the packaging structure, promoting miniaturization. The separator 25 divides the first groove into multiple independent sub-grooves 30, and the sub-grooves 30 accommodate the first chip 11. Combined with the wiring layer, this provides a large number of I / O interface interconnections for the adapter board, suitable for the fabrication of packaging structures requiring a high number of I / O interfaces. In this specific embodiment, processes such as TMV are not required, further reducing manufacturing costs and difficulty. In this specific embodiment, "multiple" refers to two or more.

[0060] In some embodiments, the adapter board includes an upper surface and a lower surface that are oppositely distributed, and the second chip 12 is located above the upper surface of the adapter board;

[0061] The separator 25 extends along a direction perpendicular to the upper surface of the adapter plate, such as... Figure 1 , Figure 2 and Figure 3 As shown.

[0062] In some embodiments, the separator 25 is a metal pillar, metal wall, or metal wire to facilitate welding to the wiring layer and the first electromagnetic shielding layer 15.

[0063] For example, such as Figures 1-3 As shown, the separator 25 located in the first groove extends in a direction perpendicular to the upper surface of the adapter plate, thereby dividing the first groove into a plurality of sub-grooves 30 spaced apart in a direction parallel to the upper surface of the adapter plate. Figures 1-3(The following description uses an example of a separator 25 dividing the first groove into two sub-grooves 30.) By setting the separator 25 as a metal pillar, metal wall, or metal bonding wire, electromagnetic shielding between the first chips 11 in adjacent sub-grooves 30 can be achieved using the metal pillar, metal wall, or metal bonding wire, thereby further ensuring the stability and reliability of the electromagnetic shielding packaging structure. In one example, multiple separators 25 are arranged at intervals between two adjacent sub-grooves 30 to form a partition wall, thereby improving the electromagnetic shielding effect between the first chips 11 in adjacent sub-grooves 30.

[0064] Figure 4 This is a second cross-sectional schematic diagram of the electromagnetic shielding packaging structure in a specific embodiment of this utility model. In other embodiments, the adapter plate includes an upper surface and a lower surface that are distributed opposite to each other, and the second chip 12 is located above the upper surface of the adapter plate;

[0065] The separator 25 is a metal plate extending in a direction parallel to the upper surface of the adapter plate, such as... Figure 4 As shown.

[0066] For example, such as Figure 4 As shown, the separator 25 located within the first groove extends in a direction parallel to the upper surface of the adapter plate, thereby dividing the first groove into two sub-grooves spaced apart in a direction perpendicular to the upper surface of the adapter plate. By setting the separator 25 as a metal plate, electromagnetic shielding between the first chips 11 within adjacent sub-grooves 30 can be achieved using the metal plate, thereby further ensuring the stability and reliability of the electromagnetic shielding packaging structure.

[0067] In some embodiments, all the sub-slots 30 have the same width in a direction parallel to the upper surface of the adapter plate; or,

[0068] At least two of the sub-slots have different widths along a direction parallel to the upper surface of the adapter plate.

[0069] In one example, such as Figure 1 , Figure 2 and Figure 3 As shown, all the sub-grooves 30 have the same width along the direction parallel to the upper surface of the adapter plate, that is, the separator 25 divides the first groove equally.

[0070] Figure 5 This is a third cross-sectional schematic diagram of the electromagnetic shielding encapsulation structure in a specific embodiment of this utility model. In another example, such as... Figure 5As shown, at least two adjacent sub-slots 30 have different widths along the direction parallel to the upper surface of the adapter plate, so as to mount the first chip 11 of different sizes in the sub-slots 30 with different widths, thereby further expanding the application field of the electromagnetic shielding packaging structure.

[0071] In some embodiments, the wiring layer includes:

[0072] A top wiring layer 21 is located on the upper surface of the adapter board, and the second chip 12 is located on the top wiring layer 21 and electrically connected to the top wiring layer 21.

[0073] The bottom wiring layer 22 is located on the lower surface of the adapter board. The first chip 11 is electrically connected to the bottom wiring layer 22, and the top wiring layer 21 is electrically connected to the bottom wiring layer 22.

[0074] In some embodiments, the adapter plate further includes:

[0075] A first conductive connection post 20 penetrates the substrate 10, and one end of the first conductive connection post 20 is electrically connected to the top wiring layer 21 and the other end is electrically connected to the bottom wiring layer 22.

[0076] In some embodiments, the first chip 11 includes a functional surface and a back surface that are distributed oppositely, and a first conductive bump 18 is provided on the functional surface of the first chip 11.

[0077] The functional surface of the first chip 11 faces the bottom wiring layer 21, and the first conductive bump 18 is electrically connected to the bottom wiring layer 21. The back side of the first chip 11 is bonded to the surface of the first electromagnetic shielding layer 15 through the first adhesive layer.

[0078] For example, such as Figure 1 , Figure 2 and Figure 3As shown, the substrate 10 includes a top surface 101 and a bottom surface 102 that are distributed opposite to each other. The top surface 101 of the substrate 10 serves as the upper surface of the adapter plate, and the bottom surface 102 of the substrate 10 serves as the lower surface of the adapter plate. The second chip 12 is located above the upper surface of the adapter plate. The top wiring layer 21 is disposed between the second chip 12 and the substrate 10 of the adapter plate, and the bottom wiring layer 22 is located on the lower surface of the adapter plate. In one example, the top wiring layer 21 includes a top dielectric layer covering the upper surface of the adapter plate and a top high-density metal trace located inside the top dielectric layer. The bottom wiring layer 22 includes a bottom dielectric layer covering the lower surface of the adapter plate and a bottom high-density metal trace located inside the bottom dielectric layer. The first groove extends from the bottom surface 102 of the substrate 101 into the interior of the substrate 10 in a direction perpendicular to the upper surface of the adapter plate, and the first groove does not penetrate the substrate 10 in the direction perpendicular to the upper surface of the adapter plate. A plurality of first chips 11 are correspondingly disposed within a plurality of sub-slots 30, and the functional surface of each first chip 11 faces the bottom wiring layer 22, and the first conductive bump 18 on the functional surface of the first chip 11 is electrically connected to the bottom wiring layer 22. The first electromagnetic shielding layer 15 continuously covers the sidewalls and bottom walls of the plurality of sub-slots 30 (i.e., the inner wall surface of the sub-slots 30 facing the upper surface of the adapter plate), and the back surface of the first chip 11 is bonded to the surface of the first electromagnetic shielding layer 15 by a first adhesive layer. Along a direction perpendicular to the upper surface of the adapter plate, the first conductive connection post 20 penetrates the substrate 10, and one end of the first conductive connection post 20 is electrically connected to the top high-density metal trace in the top wiring layer 21, and the other end is electrically connected to the bottom high-density metal trace in the bottom wiring layer 22. The second chip 12 includes a functional surface and a back surface that are distributed opposite to each other, and a second conductive bump 19 is provided on the functional surface of the second chip 12. The functional surface of the second chip 12 faces the top wiring layer 21, and one end of the second conductive bump 19 is electrically connected to the second chip 12, and the other end is electrically connected to the top wiring layer 21.

[0079] In one example, a plurality of solder balls 14 are spaced apart on the surface of the bottom wiring layer 22 facing away from the substrate 10, and the solder balls 14 are electrically connected to the bottom wiring layer 22. The bottom wiring layer 22 can be electrically connected to the packaging substrate (e.g., a PCB circuit board) through the solder balls 14, so as to enable the output of signals from the bottom wiring layer 22 and the top wiring layer 21 through the solder balls 14, or to transmit control signals to the bottom wiring layer 22 and the top wiring layer 21 through the solder balls 14.

[0080] In some embodiments, the electromagnetic shielding packaging structure further includes:

[0081] The second groove 31 is located within the substrate 10, and the second groove 31 is located on the side of the substrate 10 facing the top wiring layer 21;

[0082] The third chip 13 is located in the second groove 31 and is electrically connected to the top wiring layer 21.

[0083] In some embodiments, the third chip 13 includes a functional surface and a back surface that are distributed opposite to each other, and a third conductive bump 23 is provided on the functional surface of the third chip 13;

[0084] The functional surface of the third chip 13 faces the top wiring layer 21, and the third conductive bump 23 is electrically connected to the top wiring layer 21.

[0085] In some embodiments, the electromagnetic shielding packaging structure further includes:

[0086] The second electromagnetic shielding layer 26 covers the inner wall of the second groove 31, and the back side of the third chip 13 is bonded to the surface of the second electromagnetic shielding layer 26 by the second adhesive layer.

[0087] For example, such as Figure 1 , Figure 2 and Figure 3 As shown, the substrate 10 also includes a second groove 31, which is located above the first groove. The second groove 31 extends from the top surface 101 of the substrate 10 in a direction perpendicular to the upper surface of the adapter plate into the interior of the substrate 10, and does not penetrate the substrate 10 in the direction perpendicular to the upper surface of the adapter plate. That is, the first groove and the second groove 31 are isolated by the substrate 10. The second electromagnetic shielding layer 26 covers the sidewalls and bottom wall of the second groove 31 (i.e., the inner wall surface of the second groove 31 faces the first groove). The functional surface of the third chip 13 faces the top wiring layer 21, and one end of the third conductive bump 23 on the functional surface of the third chip 13 is electrically connected to the third chip 13, and the other end is electrically connected to the top wiring layer 21. The back side of the third chip 13 is bonded to the surface of the second electromagnetic shielding layer 26 by a second adhesive layer.

[0088] By configuring the top wiring layer 21, the bottom wiring layer 22, and the first conductive connection post 20, not only can electrical connections be achieved between the first chip 11, the second chip 12, and the third chip 13, providing the adapter board with a greater number of I / O interfaces, but it also helps simplify the overall circuit structure of the wiring layer and balance the stress on opposite sides of the substrate 10. Furthermore, the configuration of the top wiring layer 21 and the bottom wiring layer 22 can significantly reduce the thickness of the package structure, further contributing to the miniaturization of the packaged product.

[0089] Figure 6 This is a fourth cross-sectional schematic diagram of the electromagnetic shielding encapsulation structure in a specific embodiment of this utility model. In other embodiments, such as... Figure 6 As shown, a partition 80 can also be provided in the second groove to divide the second groove into multiple sub-cavities, and multiple second chips 13 are distributed in multiple sub-cavities in a one-to-one correspondence, thereby enabling the integration of more chips in the adapter board, further increasing the number of I / O interfaces in the adapter board, and further improving the performance of the electromagnetic shielding packaging structure.

[0090] In some embodiments, the bottom wiring layer 22 includes a bottom ground line, and one end of the separator 25 is electrically connected to the first electromagnetic shielding layer 15 and the other end is electrically connected to the bottom ground line;

[0091] The top wiring layer 21 includes a top grounding line, and the second electromagnetic shielding layer 26 is electrically connected to the top grounding line.

[0092] For example, the top wiring layer 21 has a top grounding line, and the bottom wiring layer 22 has a bottom grounding line. The second electromagnetic shielding layer 26 is electrically connected to the top grounding line, meaning the second electromagnetic shielding layer 26 is grounded through the top wiring layer 21. The first electromagnetic shielding layer 15 and the separator 25 are electrically connected to the bottom grounding line, meaning the first electromagnetic shielding layer 15 and the separator 25 are grounded through the bottom wiring layer 22.

[0093] Figure 7 This is the fifth cross-sectional schematic diagram of the electromagnetic shielding encapsulation structure in a specific embodiment of this utility model. Figure 8 This is a schematic diagram illustrating a second relative positional relationship between the adapter board and the first chip in a specific embodiment of this utility model. Figure 9 This is a second cross-sectional schematic diagram of the adapter plate in a specific embodiment of this utility model. In other embodiments, such as... Figure 7 , Figure 8 and Figure 9As shown, the bottom wiring layer 22 includes a bottom grounding line, one end of the separator 25 is electrically connected to the first electromagnetic shielding layer 15, and the other end is electrically connected to the bottom grounding line; the adapter plate further includes:

[0094] The second conductive connection post 40 is located within the substrate 10. One end of the second conductive connection post 40 is electrically connected to the second electromagnetic shielding layer 26, and the other end is electrically connected to the first electromagnetic shielding layer 15.

[0095] For example, such as Figure 7 , Figure 8 and Figure 9 As shown, the second conductive connecting post 40 penetrates the substrate 10 between the first groove and the second groove 31, so that the second electromagnetic shielding layer 26 and the first electromagnetic shielding layer 15 are electrically connected through the second conductive connecting post 40, thereby allowing the second electromagnetic shielding layer 26 and the first electromagnetic shielding layer 15 to be grounded together through the bottom grounding line in the bottom wiring layer 22, thereby simplifying the structural arrangement of the grounding line in the wiring layer.

[0096] Figure 10 This is a sixth cross-sectional schematic diagram of the electromagnetic shielding encapsulation structure in a specific embodiment of this utility model. In other embodiments, such as... Figure 10 As shown, the first groove is located above the second groove, meaning the first groove extends from the top of the substrate 10 into the interior of the substrate 10, and the second groove extends from the bottom of the substrate 10 into the interior of the substrate 10. The functional surface of the first chip 11 within the sub-groove faces the top wiring layer 21, and the first conductive bump 18 on the functional surface of the first chip 11 is electrically connected to the top wiring layer. The functional surface of the third chip 13 within the second groove faces the bottom wiring layer 22, and the third conductive bump 23 on the functional surface of the third chip 13 is electrically connected to the bottom wiring layer 22. By flexibly adjusting the positions of the first and second grooves, the positions of the first chip 11 and the third chip 13 can be flexibly set to meet specific packaging structure requirements.

[0097] In some embodiments, the electromagnetic shielding packaging structure further includes:

[0098] A first molding layer 16 is filled in the first groove, and the first molding layer 16 covers the first electromagnetic shielding layer 15 and molds multiple first chips 11.

[0099] The second molding layer 17 is located above the adapter board, and the second molding layer 17 molds the second chip 12.

[0100] For example, such as Figure 1 As shown, the first molding compound 16 fills the first groove and the second groove 31, and molds the first chip 11 and the third chip 13. The second molding compound 17 is located above the adapter board and molds the second chip 12. By setting the first molding compound 16 and the second molding compound 17, not only can the first chip 11, the second chip 12 and the third chip 13 be protected, but the strength of the adapter board can also be enhanced, and the stress on opposite sides of the top wiring layer 21 can be balanced, reducing or even avoiding large-scale deformation of the top wiring layer 21. In one example, the material of the first molding compound 16 and the material of the second molding compound 17 are the same, for example, both the material of the first molding compound 16 and the material of the second molding compound 17 are epoxy resin molding compound.

[0101] The electromagnetic shielding packaging structure provided in this specific embodiment, by providing a first groove and a separator within the first groove in an adapter plate, divides the first groove into multiple independent sub-grooves using the separator. Multiple first chips are respectively mounted in the multiple sub-grooves. A first electromagnetic shielding layer covers the inner wall of the first groove, and a wiring layer is formed on the adapter plate. A second chip is mounted on the wiring layer, so that both the first and second chips are electrically connected to the wiring layer. The first electromagnetic shielding layer provides electromagnetic shielding to the first groove, enabling the integration of various types of chips, such as RF chips, within the sub-grooves. This helps expand the functionality of the packaging structure and broaden its application areas. Dividing the first groove into multiple independent sub-grooves using the separator not only avoids mutual interference between first chips in adjacent sub-grooves but also allows for flexible adjustment of the width of different sub-grooves without changing the size of the first groove, based on the size of the first chips mounted in different sub-grooves. This simplifies the packaging structure manufacturing process, improves manufacturing flexibility, and facilitates the integration of first chips of different sizes into the adapter plate. The electrical connections between the second chip and the adapter board, as well as between the second chip and the first chip, are achieved through the wiring layer. This eliminates the need for chip-to-chip bonding, simplifying the packaging process, significantly reducing manufacturing costs, and miniaturizing the overall thickness of the package. By incorporating multiple independent sub-slots within the adapter board to house the first chip, and combining this with the wiring layer, a large number of I / O interface interconnects can be provided, making it suitable for packaging structures requiring a high number of I / O interfaces. This specific embodiment eliminates the need for processes such as TMV, further reducing manufacturing costs and complexity.

[0102] It should be noted that the terms "comprising" and "having," and their variations, used in this utility model document are intended to cover non-exclusive inclusion. The terms "first," "second," etc., are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence, unless explicitly indicated by the context; it should be understood that such use of data can be interchanged where appropriate. The term "one or more" depends at least in part on the context and can be used to describe features, structures, or characteristics in a singular sense, or in a plural sense to describe combinations of features, structures, or characteristics. The term "based on" can be understood as not necessarily intended to express an exclusive set of factors, but can instead, also at least in part on the context, allow for the presence of other factors that are not necessarily explicitly described. Furthermore, embodiments and features in embodiments of this utility model can be combined with each other without conflict. In addition, descriptions of well-known components and technologies have been omitted in the above description to avoid unnecessarily obscuring the concepts of this utility model. In the various embodiments described above, each embodiment focuses on the differences from other embodiments; similar / identical parts between embodiments can be referred to mutually.

[0103] The above description is only a preferred embodiment of the present utility model. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present utility model, and these improvements and modifications should also be considered within the protection scope of the present utility model.

Claims

1. An electromagnetic shielding packaging structure, characterized in that, include: The adapter plate includes a substrate, a first groove located within the substrate, and a separator located within the first groove, the separator dividing the first groove into a plurality of independent sub-grooves; A wiring layer is located on the adapter board; Multiple first chips are located in multiple sub-slots, and all of the multiple first chips are electrically connected to the wiring layer; A first electromagnetic shielding layer covers the inner wall of the first groove; The second chip is located above the adapter board and is electrically connected to the wiring layer.

2. The electromagnetic shielding encapsulation structure according to claim 1, characterized in that, The adapter board includes an upper surface and a lower surface that are oppositely distributed, and the second chip is located above the upper surface of the adapter board; The separator extends along a direction perpendicular to the upper surface of the adapter plate.

3. The electromagnetic shielding packaging structure according to claim 2, characterized in that, The separator is a metal column, a metal wall, or a metal welding line.

4. The electromagnetic shielding encapsulation structure according to claim 1, characterized in that, The adapter board includes an upper surface and a lower surface that are oppositely distributed, and the second chip is located above the upper surface of the adapter board; The separator is a metal plate extending in a direction parallel to the upper surface of the adapter plate.

5. The electromagnetic shielding packaging structure according to claim 2, characterized in that, In a direction parallel to the upper surface of the adapter plate, all the sub-slots have the same width; or, At least two of the sub-slots have different widths along a direction parallel to the upper surface of the adapter plate.

6. The electromagnetic shielding encapsulation structure according to claim 2, characterized in that, The wiring layer includes: a top wiring layer located on the upper surface of the adapter board, wherein the second chip is located on the top wiring layer and electrically connected to the top wiring layer; A bottom wiring layer is located on the lower surface of the adapter board, the first chip is electrically connected to the bottom wiring layer, and the top wiring layer is electrically connected to the bottom wiring layer.

7. The electromagnetic shielding encapsulation structure according to claim 6, characterized in that, The adapter plate also includes: A first conductive connection post penetrates the substrate, with one end of the first conductive connection post electrically connected to the top wiring layer and the other end electrically connected to the bottom wiring layer.

8. The electromagnetic shielding encapsulation structure according to claim 7, characterized in that, The first chip includes a functional surface and a back surface that are relatively distributed, and a first conductive bump is provided on the functional surface of the first chip; The functional surface of the first chip faces the bottom wiring layer, and the first conductive bump is electrically connected to the bottom wiring layer. The back side of the first chip is bonded to the surface of the first electromagnetic shielding layer through the first adhesive layer.

9. The electromagnetic shielding encapsulation structure according to claim 7, characterized in that, Also includes: The second groove is located within the substrate, and the second groove is located on the side of the substrate facing the top wiring layer; The third chip is located within the second recess and is electrically connected to the top wiring layer.

10. The electromagnetic shielding encapsulation structure according to claim 9, characterized in that, The third chip includes a functional surface and a back surface that are relatively distributed, and a third conductive bump is provided on the functional surface of the third chip; The functional surface of the third chip faces the top wiring layer, and the third conductive bump is electrically connected to the top wiring layer.

11. The electromagnetic shielding encapsulation structure according to claim 10, characterized in that, Also includes: The second electromagnetic shielding layer covers the inner wall of the second groove, and the back side of the third chip is bonded to the surface of the second electromagnetic shielding layer by the second adhesive layer.

12. The electromagnetic shielding encapsulation structure according to claim 11, characterized in that, The bottom wiring layer includes a bottom grounding line, and one end of the separator is electrically connected to the first electromagnetic shielding layer and the other end is electrically connected to the bottom grounding line; The top wiring layer includes a top grounding line, and the second electromagnetic shielding layer is electrically connected to the top grounding line.

13. The electromagnetic shielding encapsulation structure according to claim 11, characterized in that, The bottom wiring layer includes a bottom grounding line; one end of the separator is electrically connected to the first electromagnetic shielding layer, and the other end is electrically connected to the bottom grounding line; the adapter plate further includes: The second conductive connection post is located within the substrate, with one end electrically connected to the second electromagnetic shielding layer and the other end electrically connected to the first electromagnetic shielding layer.

14. The electromagnetic shielding encapsulation structure according to claim 1, characterized in that, Also includes: A first molding layer is filled in the first groove, and the first molding layer covers the first electromagnetic shielding layer and molds multiple first chips. A second molding layer is located above the adapter board, and the second molding layer encapsulates the second chip.

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