A clamping snubber circuit and DC power supply system

Abstract

This utility model discloses a clamping absorption circuit and a DC power supply system. The clamping absorption circuit includes a boost switch K1, a buck switch K2, a first clamping absorption branch, and a second clamping absorption branch. The first clamping absorption branch includes a first diode D1, a first capacitor C1, and a first resistor R1. The first diode D1 and the first capacitor C1 are connected in series and then in parallel with the boost switch K1, forming a first node between the first diode D1 and the first capacitor C1. The first resistor R1 is connected between the first node and the positive bus. The second clamping absorption branch includes a second diode D2, a second capacitor C2, and a second resistor R2. The second diode D2 and the second capacitor C2 are connected in series and then in parallel with the buck switch K2, forming a second node between the second diode D2 and the second capacitor C2. The second resistor R2 is connected between the second node and the negative bus.

Description

Technical Field

[0001] This utility model relates to the field of power electronics technology, and in particular to a clamping absorption circuit and a DC power supply system. Background Technology

[0002] In DC power supply systems, MOSFETs are widely used due to their high switching speed. However, as the switching frequency increases, voltage spikes and oscillations occur when a MOSFET is turned off, which increases the voltage stress on the device and may even cause breakdown damage, adversely affecting the reliability of the DC power supply system.

[0003] In related technologies, some solutions reduce voltage overshoot by connecting a capacitor in parallel between the source and drain of the MOSFET. However, due to the lack of a power discharge circuit, the absorption effect is limited and it is difficult to adapt to the trend of increasing switching frequency. Other solutions connect a resistor and a capacitor in series between the source and drain of the MOSFET. The series resistor provides a power discharge path for the capacitor. However, the resistor consumes power in the form of heat. To control the temperature rise, the capacitor value needs to be reduced, which in turn limits the absorption effect. Utility Model Content

[0004] One object of this invention is to provide a clamping absorption circuit that can solve or alleviate at least one defect in the above-mentioned background art.

[0005] Another objective of this invention is to provide a DC power supply system that can solve or alleviate at least one of the defects in the aforementioned background technology.

[0006] To achieve at least one of the above objectives, the technical solution adopted by this utility model is as follows: a clamping absorption circuit, comprising: a boost switch K1, a buck switch K2, a first clamping absorption branch, and a second clamping absorption branch; the first clamping absorption branch comprises a first diode D1, a first capacitor C1, and a first resistor R1, wherein the first diode D1 and the first capacitor C1 are connected in series and then in parallel with the boost switch K1, forming a first node between the first diode D1 and the first capacitor C1, and the first resistor R1 is connected between the first node and the busbar; the second clamping absorption branch comprises a second diode D2, a second capacitor C2, and a second resistor R2, wherein the second diode D2 and the second capacitor C2 are connected in series and then in parallel with the buck switch K2, forming a second node between the second diode D2 and the second capacitor C2, and the second resistor R2 is connected between the second node and the busbar.

[0007] As a preferred embodiment, the second terminal of the boost switch K1 is connected to the positive bus, the first terminal of the boost switch K1 is connected to the negative bus, the anode of the first diode D1 is connected to the second terminal of the boost switch K1, the cathode of the first diode D1 is connected to the first node, the first capacitor C1 is connected between the first node and the first terminal of the boost switch K1, and the first resistor R1 is connected between the first node and the positive bus.

[0008] As a preferred embodiment, during the conduction of the boost switch K1, the first capacitor C1 remains in a pre-charged state and the first diode D1 is turned off; when the boost switch K1 is turned off, the generated second voltage spike causes the first diode D1 to conduct, the first capacitor C1 absorbs electrical energy, and discharges electrical energy to the positive bus through the first resistor R1.

[0009] As a preferred embodiment, the reverse breakdown voltage of the first diode D1 is greater than the second voltage spike generated when the boost switch K1 is turned off.

[0010] As a preferred embodiment, the second terminal of the buck switching transistor K2 is connected to the positive output terminal of the power supply, the first terminal of the buck switching transistor K2 is connected to the positive terminal of the battery, the cathode of the second diode D2 is connected to the first terminal of the buck switching transistor K2, the anode of the second diode D2 is connected to the second node, the second capacitor C2 is connected between the second node and the second terminal of the buck switching transistor K2, and the second resistor R2 is connected between the second node and the negative bus.

[0011] As a preferred embodiment, during the conduction of the buck switch K2, the second capacitor C2 remains in a pre-charged state, and the second diode D2 is turned off; when the buck switch K2 is turned off, the generated first voltage spike causes the second diode D2 to conduct, the second capacitor C2 absorbs electrical energy, and discharges electrical energy to the negative bus through the second resistor R2.

[0012] Preferably, the reverse breakdown voltage of the second diode D2 is greater than the first voltage spike generated when the buck switch K2 is turned off.

[0013] As a preferred embodiment, the first diode D1 and the second diode D2 are respectively one of a silicon diode, a germanium diode, and a Schottky diode.

[0014] As a preferred embodiment, the first capacitor C1 and the second capacitor C2 are respectively one of a ceramic capacitor, a film capacitor, and a mica capacitor.

[0015] To achieve at least one of the above objectives, the technical solution adopted by this utility model is: a DC power supply system, including: the clamping absorption circuit as described above.

[0016] Compared with the prior art, the beneficial effects of this utility model are as follows:

[0017] (1) The voltage spike generated when the boost switch K1 is turned off is absorbed by the first diode D1 and the first capacitor C1 connected in series, and the voltage spike generated when the buck switch K2 is turned off is absorbed by the second diode D2 and the second capacitor C2 connected in series. On the basis of suppressing voltage spikes, it is beneficial to simplify the circuit topology, reduce the number of components, and thus reduce the process complexity of the clamping absorption circuit.

[0018] (2) The first resistor R1 and the second resistor R2 can respectively discharge the electrical energy of the first capacitor C1 and the second capacitor C2 to the bus, which helps to realize the controllable dissipation of electrical energy. This reduces the voltage stress of the boost switch K1 and the buck switch K2 without relying on complex control logic, thereby improving the stability and reliability of the DC power supply system during long-term operation. Attached Figure Description

[0019] Figure 1 This is a topology diagram of a clamping absorption circuit according to some embodiments of this application. Detailed Implementation

[0020] The present invention will be further described below with reference to specific embodiments. It should be noted that, without conflict, the various embodiments or technical features described below can be arbitrarily combined to form new embodiments.

[0021] It should be noted that the terms "first," "second," etc., in the specification and claims of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0022] The terms “comprising” and “having”, and any variations thereof, in the specification and claims of this application are intended to cover non-exclusive inclusion, for example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units that are explicitly listed, but may include other steps or units that are not explicitly listed or that are inherent to such process, method, product, or device.

[0023] A clamping snubber circuit, such as Figure 1As shown, the circuit includes: a boost switch K1, a buck switch K2, a first clamping absorption branch, and a second clamping absorption branch. Specifically, the first clamping absorption branch includes a first diode D1, a first capacitor C1, and a first resistor R1. The first diode D1 and the first capacitor C1 are connected in series and then in parallel with the boost switch K1, forming a first node A. The first resistor R1 is connected between the first node A and the busbar. The second clamping absorption branch includes a second diode D2, a second capacitor C2, and a second resistor R2. The second diode D2 and the second capacitor C2 are connected in series and then in parallel with the buck switch K2, forming a second node B. The second resistor R2 is connected between the second node B and the busbar.

[0024] It is understandable that the first clamping absorption branch and the second clamping absorption branch are connected to the boost switch K1 and the buck switch K2, respectively, which helps to suppress voltage spikes in both boost and buck operating modes. Furthermore, the first diode D1 and the first capacitor C1, connected in series, absorb the voltage spikes generated when the boost switch K1 is turned off, and the second diode D2 and the second capacitor C2, connected in series, absorb the voltage spikes generated when the buck switch K2 is turned off. In addition to suppressing voltage spikes, this simplifies the circuit topology, reduces the number of components, and thus lowers the manufacturing complexity of the clamping absorption circuit. Even further, the first resistor R1 and the second resistor R2 discharge the energy of the first capacitor C1 and the second capacitor C2 to the bus, respectively, which helps to achieve controllable energy dissipation. This reduces the voltage stress on the boost switch K1 and the buck switch K2 without relying on complex control logic, thereby improving the stability and reliability of the DC power supply system during long-term operation.

[0025] In some embodiments, such as Figure 1 As shown, the second terminal of the boost switch K1 is connected to the positive bus, the first terminal of the boost switch K1 is connected to the negative bus, the anode of the first diode D1 is connected to the second terminal of the boost switch K1, the cathode of the first diode D1 is connected to the first node A, the first capacitor C1 is connected between the first node A and the first terminal of the boost switch K1, and the first resistor R1 is connected between the first node A and the positive bus.

[0026] It can be understood that when the boost switch K1 is turned off, generating a voltage spike at the second terminal, the first diode D1 is forward-biased, thus responding to the voltage difference between the first and second terminals of the boost switch K1. The first capacitor C1 absorbs the energy of the voltage spike and discharges the energy to the positive bus through the first resistor R1. This configuration is beneficial for improving the response speed and energy absorption efficiency, and also reduces the risk of the boost switch K1 being subjected to reverse overvoltage.

[0027] In some embodiments, during the conduction of the boost switch K1, the first capacitor C1 remains in a pre-charged state and the first diode D1 is turned off; when the boost switch K1 is turned off, the generated second voltage spike causes the first diode D1 to conduct, the first capacitor C1 absorbs electrical energy, and discharges electrical energy to the positive bus through the first resistor R1.

[0028] It can be understood that when the clamping absorption circuit is first powered on or the first capacitor C1 is fully discharged, when the boost switch K1 is first turned on, since the voltage of the first capacitor C1 is 0, the voltage at the first node A is approximately the voltage of the first electrode of the boost switch K1. At this time, the anode voltage of the first diode D1 is higher than the cathode voltage, and the first diode D1 is forward-biased. Current flows from the boost switch K1 through the first diode D1 to the first node A to charge the first capacitor C1. When the voltage at the first node A rises to near the voltage of the second electrode of the boost switch K1, that is, when the voltage at the first node A is approximately the difference between the voltage of the second electrode of the boost switch K1 and the forward voltage drop of the first diode D1, the first diode D1 is finally reverse-biased and cut off. At this time, a first pre-charge voltage is formed on the first capacitor C1, which is approximately the voltage difference between the second and first electrodes when the boost switch K1 is turned on.

[0029] Furthermore, when the clamping absorption circuit operates in boost mode, when the boost switch K1 is turned on, the first diode D1 is reverse-biased and cut off due to the first pre-charge voltage formed on the first capacitor C1. When the boost switch K1 is turned off, a high-frequency oscillating voltage spike is generated at the second terminal of the boost switch K1. Specifically, when the voltage spike at the second terminal of the boost switch K1 rises above the sum of the voltage across the first capacitor C1 and the forward voltage drop of the first diode D1, the anode voltage of the first diode D1 is higher than the cathode voltage, and the first diode D1 is forward-biased. The first capacitor C1 can absorb the spike energy through the first diode D1, thereby suppressing the voltage spike at the second terminal of the boost switch K1. When the voltage spike at the second terminal of the boost switch K1 decreases, the first diode D1 is reverse-biased and cut off again. The first capacitor C1 discharges energy to the positive bus through the first resistor R1, thus allowing the first capacitor C1 to have sufficient margin to absorb the next spike energy.

[0030] It is worth mentioning that the first capacitor C1 only absorbs part of the voltage spike of the second electrode. Therefore, the voltage increment of the first capacitor C1 is small, which helps to avoid the electrical energy discharged by the first capacitor C1 from impacting the positive bus and can reduce the power consumption of the discharge.

[0031] In addition, keeping the first capacitor C1 in a pre-charged state helps avoid recharging the first capacitor C1 from zero each time, thereby improving the absorption efficiency of the voltage spike of the second electrode, reducing the voltage stress of the device, and improving the stability and reliability of the DC power supply system.

[0032] In some embodiments, the reverse breakdown voltage of the first diode D1 is greater than the second voltage spike generated when the boost switch K1 is turned off. It should be understood that this configuration helps prevent the first diode D1 from being reverse-broken within the normal range of the second voltage spike, thereby reducing the risk of failure of the first clamping absorption branch and helping to ensure the stable operation of the DC power supply system.

[0033] In some embodiments, the second terminal of the buck switching transistor K2 is connected to the positive output terminal OUT+ of the power supply, the first terminal of the buck switching transistor K2 is connected to the positive terminal BAT+ of the battery, the cathode of the second diode D2 is connected to the first terminal of the buck switching transistor K2, the anode of the second diode D2 is connected to the second node B, the second capacitor C2 is connected between the second node B and the second terminal of the buck switching transistor K2, and the second resistor R2 is connected between the second node B and the negative bus.

[0034] It can be understood that when the buck switch K2 is turned off, generating a voltage spike at its first terminal, the second diode D2 is forward-biased, thus responding to the voltage difference between the second and first terminals of the buck switch K2. The second capacitor C2 absorbs the energy of the voltage spike and discharges it to the negative bus through the second resistor R2. This configuration improves response speed and energy absorption efficiency, and also reduces the risk of the buck switch K2 being subjected to reverse overvoltage.

[0035] In some embodiments, during the conduction of the buck switch K2, the second capacitor C2 remains in a pre-charged state and the second diode D2 is turned off; when the buck switch K2 is turned off, the generated first voltage spike causes the second diode D2 to conduct, the second capacitor C2 absorbs electrical energy, and discharges electrical energy to the negative bus through the second resistor R2.

[0036] It can be understood that when the clamping absorption circuit is first powered on or the second capacitor C2 is fully discharged, when the buck switch K2 is first turned on, since the voltage of the second capacitor C2 is 0, the voltage at the second node B is approximately the voltage of the second terminal of the buck switch K2. At this time, the anode voltage of the second diode D2 is higher than the cathode voltage, and the second diode D2 is forward-biased to charge the second capacitor C2. When the voltage at the second node B drops to near the voltage of the first terminal of the buck switch K2, that is, when the voltage at the second node B is approximately the sum of the voltage of the first terminal of the buck switch K2 and the forward voltage drop of the second diode D2, the second diode D2 is finally reverse-biased and cut off. At this time, a second pre-charge voltage is formed on the second capacitor C2, which is approximately the voltage difference between the second and first terminals when the buck switch K2 is turned on.

[0037] Furthermore, when the clamping absorption circuit operates in buck mode, when the buck switch K2 is turned on, the second diode D2 is reverse-biased and cut off due to the second pre-charge voltage formed on the second capacitor C2. When the buck switch K2 is turned off, a high-frequency oscillating voltage spike is generated at the first terminal of the buck switch K2. Specifically, when the voltage spike at the first terminal of the buck switch K2 drops to a value exceeding the voltage across the second capacitor C2 and the forward voltage drop difference between the second and second diodes D2, the anode voltage of the second diode D2 is higher than the cathode voltage, and the second diode D2 is forward-biased. The second capacitor C2 can then absorb the spike energy through the second diode D2, thereby suppressing the voltage spike at the first terminal of the buck switch K2. When the voltage spike at the first terminal of the buck switch K2 rises again, the second diode D2 is reverse-biased and cut off again. The second capacitor C2 discharges energy to the negative bus through the second resistor R2, thus allowing the second capacitor C2 to have sufficient margin to absorb the next spike energy.

[0038] It is worth mentioning that the second capacitor C2 only absorbs part of the voltage spike of the first electrode. Therefore, the voltage increment of the second capacitor C2 is small, which helps to avoid the electrical energy discharged by the second capacitor C2 from impacting the negative bus and can reduce the power consumption of the discharge.

[0039] In addition, keeping the second capacitor C2 in a pre-charged state helps avoid recharging the second capacitor C2 from zero each time, thereby improving the absorption efficiency of the voltage spike of the first electrode, reducing the voltage stress of the device, and improving the stability and reliability of the DC power supply system.

[0040] In some embodiments, the reverse breakdown voltage of the second diode D2 is greater than the first voltage spike generated when the buck switch K2 is turned off. It should be understood that this configuration helps prevent the second diode D2 from being reverse-broken within the normal range of the first voltage spike, thereby reducing the risk of failure of the second clamping absorption branch and helping to ensure the stable operation of the DC power supply system.

[0041] In some embodiments, the first diode D1 and the second diode D2 are respectively one of a silicon diode, a germanium diode, and a Schottky diode. In other words, the first diode D1 and the second diode D2 can be implemented as silicon diodes, germanium diodes, or Schottky diodes, respectively. Those skilled in the art can adjust the parameters of the first diode D1 and the second diode D2 according to the actual situation, and such adjustments all fall within the protection scope of this application.

[0042] In some embodiments, the first capacitor C1 and the second capacitor C2 are respectively one of a ceramic capacitor, a film capacitor, and a mica capacitor. In other words, the first capacitor C1 and the second capacitor C2 can be implemented as ceramic capacitors, film capacitors, or mica capacitors, respectively. Those skilled in the art can adjust the parameters of the first capacitor C1 and the second capacitor C2 according to the actual situation, and such adjustments all fall within the protection scope of this application.

[0043] A DC power supply system includes the aforementioned clamping snubber circuit. It should be understood that the clamping snubber circuit reduces the voltage stress on the boost switch K1 and the buck switch K2 without relying on complex control logic, thereby improving the stability and reliability of the DC power supply system during long-term operation.

[0044] In at least one embodiment, the DC system includes a power supply, a battery, and a bus capacitor C3. The positive output terminal OUT+ of the power supply and the positive terminal BAT+ of the battery are connected through a positive bus, and the negative output terminal OUT- of the power supply and the negative terminal BAT- of the battery are connected through a negative bus. The bus capacitor C3 is connected between the positive bus and the negative bus.

[0045] The basic principles, main features, and advantages of this utility model have been described above. Those skilled in the art should understand that this utility model is not limited to the above embodiments. The embodiments and descriptions in the specification are merely the principles of this utility model. Various changes and modifications can be made to this utility model without departing from its spirit and scope, and all such changes and modifications fall within the scope of the claimed utility model. The scope of protection of this utility model is defined by the appended claims and their equivalents.

Claims

1. A clamping snubber circuit, characterized by, include: Boost switch K1, buck switch K2, first clamping absorption branch and second clamping absorption branch; The first clamping absorption branch includes a first diode D1, a first capacitor C1 and a first resistor R1. The first diode D1 and the first capacitor C1 are connected in series and then connected in parallel with the boost switch K1. A first node is formed between the first diode D1 and the first capacitor C1. The first resistor R1 is connected between the first node and the bus. The second clamping absorption branch includes a second diode D2, a second capacitor C2, and a second resistor R2. The second diode D2 and the second capacitor C2 are connected in series and then connected in parallel with the buck switch K2. A second node is formed between the second diode D2 and the second capacitor C2. The second resistor R2 is connected between the second node and the bus.

2. The clamping snubber circuit of claim 1, wherein, The second terminal of the boost switch K1 is connected to the positive bus, the first terminal of the boost switch K1 is connected to the negative bus, the anode of the first diode D1 is connected to the second terminal of the boost switch K1, the cathode of the first diode D1 is connected to the first node, the first capacitor C1 is connected between the first node and the first terminal of the boost switch K1, and the first resistor R1 is connected between the first node and the positive bus.

3. The clamping absorption circuit according to claim 2, characterized in that, During the conduction of the boost switch K1, the first capacitor C1 remains in a pre-charged state, and the first diode D1 is turned off; when the boost switch K1 is turned off, the generated second voltage spike causes the first diode D1 to conduct, the first capacitor C1 absorbs electrical energy, and discharges electrical energy to the positive bus through the first resistor R1.

4. The clamping absorption circuit according to claim 2, characterized in that, The reverse breakdown voltage of the first diode D1 is greater than the second voltage spike generated when the boost switch K1 is turned off.

5. The clamping absorption circuit according to claim 1, characterized in that, The second terminal of the buck switching transistor K2 is connected to the positive output terminal of the power supply, the first terminal of the buck switching transistor K2 is connected to the positive terminal of the battery, the cathode of the second diode D2 is connected to the first terminal of the buck switching transistor K2, the anode of the second diode D2 is connected to the second node, the second capacitor C2 is connected between the second node and the second terminal of the buck switching transistor K2, and the second resistor R2 is connected between the second node and the negative bus.

6. The clamping absorption circuit according to claim 5, characterized in that, During the conduction of the buck switch K2, the second capacitor C2 remains in a pre-charged state, and the second diode D2 is turned off; when the buck switch K2 is turned off, the generated first voltage spike causes the second diode D2 to conduct, the second capacitor C2 absorbs electrical energy, and discharges electrical energy to the negative bus through the second resistor R2.

7. The clamping absorption circuit according to claim 5, characterized in that, The reverse breakdown voltage of the second diode D2 is greater than the first voltage spike generated when the buck switch K2 is turned off.

8. The clamping absorption circuit according to any one of claims 1-7, characterized in that, The first diode D1 and the second diode D2 are respectively one of a silicon diode, a germanium diode, and a Schottky diode.

9. The clamping absorption circuit according to any one of claims 1-7, characterized in that, The first capacitor C1 and the second capacitor C2 are respectively one of a ceramic capacitor, a film capacitor, and a mica capacitor.

10. A DC power supply system, characterized in that, include: The clamping absorption circuit as described in any one of claims 1-9.

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