A computer processing module and a computer
By using an onboard CPU with a bridge chip and integrated memory chips in the computer processing module, and using an FMC connector to expand the interface and encryption chip, the problems of large size and insufficient interface expansion of the computer processing module are solved, achieving miniaturization, portability and high reliability.
CN224457375UActive Publication Date: 2026-07-03TIANJIN GUANGHAO TECH CO LTD
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- TIANJIN GUANGHAO TECH CO LTD
- Filing Date
- 2025-05-15
- Publication Date
- 2026-07-03
AI Technical Summary
Technical Problem
Existing computer processing modules are limited by the standard COME specification, resulting in large size, insufficient interface expansion capabilities, and poor resistance to vibration and shock.
Method used
It adopts an onboard CPU with a bridge chip and integrated memory chips, expands the interface through FMC connectors, and combines the vibration- and shock-resistant FMC series high-speed, high-density connectors. It is designed with a multi-layer structure and integrates an encryption chip to improve security.
Benefits of technology
It enables the miniaturization and portability of computer processing modules, enhances interface expansion capabilities and vibration and shock resistance, and improves the reliability and security of the computer.
✦ Generated by Eureka AI based on patent content.
Smart Images
Figure CN224457375U_ABST
Abstract
This utility model discloses a computer processing module and a computer, relating to the field of computer technology. It includes an onboard CPU, a first PCIe x8 interface and an information interface connected to a bridge chip, a power interface of the bridge chip connected to a power module, and the bridge chip further configured to connect a second memory chip, a second Flash chip, and a first crystal oscillator; the bridge chip; the onboard CPU further configured to connect the first memory chip, the first Flash chip, and an RTC clock chip; an FMC connector, the FMC connector including multiple first expansion interface groups connected to the onboard CPU, and multiple second expansion interface groups and functional interface groups connected to the bridge chip; and a second crystal oscillator, the second crystal oscillator providing clock to the onboard CPU, the bridge chip, and the FMC connector through a clock buffer. This achieves miniaturization and interface expansion.
Need to check novelty before this filing date? Find Prior Art