2FSK modulation and demodulation circuit for oil and gas downhole communication

Abstract

This invention relates to the field of downhole communication in oil and gas wells, and provides a 2FSK modulation and demodulation circuit for downhole communication. It comprises a 2FSK modulation circuit, a power amplifier, a transmitting transducer, a reciprocal transducer, a receiving transducer, a power supply circuit, and a 2FSK demodulation circuit. The baseband signal is processed by a comparator module, a transistor switching module, a signal conditioning module, and a VCO module in the 2FSK modulation circuit, resulting in a phase-continuous 2FSK modulated signal. This signal is then transmitted downhole via the power amplifier and the transmitting transducer. The reciprocal transducer receives the signal and transmits it to the receiving transducer. The 2FSK demodulation circuit then filters the complete signal acquired by the receiving transducer and demodulates the baseband signal. This invention's modulation and demodulation circuit achieves phase continuity of the modulated signal between adjacent symbols, has a simple circuit structure, and offers advantages such as high signal transmission stability and the ability to achieve long-distance downhole communication in oil and gas wells.

Description

Technical Field

[0001] This invention relates to the field of downhole communication in oil and gas wells, and provides a 2FSK modulation and demodulation circuit for downhole communication in oil and gas wells. Background Technology

[0002] Downhole communication is a crucial technology for ensuring efficient and safe oil and gas extraction. Common communication methods include wired, wireless, and fiber optic communication, which can efficiently transmit data such as downhole pressure, temperature, and flow rate. It enables real-time monitoring of downhole conditions, prevents potential risks, and accurately locates fault areas, providing a basis for subsequent maintenance and adjustments, making it vital in oil and gas extraction.

[0003] In practical downhole communication applications in oil and gas wells, 2FSK modulation technology effectively avoids interference in specific frequency bands by converting the original baseband signal into two different frequency band signals (corresponding to binary symbols 0 and 1 respectively), thereby improving anti-interference capability and transmission reliability. Furthermore, 2FSK demodulation technology can identify frequency differences and restore the received frequency band signal to the original baseband signal under complex channel conditions, ensuring the accuracy of information transmission. Utility Model Content

[0004] The technical problem to be solved by this utility model is to provide a 2FSK modulation and demodulation circuit for downhole communication in oil and gas wells, so as to realize long-distance communication in downhole oil and gas wells.

[0005] This invention is implemented as follows: a 2FSK modulation and demodulation circuit for downhole communication in oil and gas wells, comprising:

[0006] A 2FSK modulation circuit is used to convert the input baseband signal into a phase-continuous 2FSK modulated signal;

[0007] The 2FSK modulation circuit includes a comparator module, a transistor switching module, a signal conditioning module, and a VCO module. The comparator module compares the baseband signal with a reference voltage and outputs corresponding high and low level signals. The transistor switching module, connected to the output of the comparator module, controls the on / off states of transistors Q1 and Q2 based on the high and low level signals output by the comparator module. The signal conditioning module, connected to the transistor switching module, provides power to both high-level and low-level transistors, supplying power to the circuits containing transistors Q1 and Q2 in the transistor switching module. The VCO module, connected to the transistor switching module, converts the output signal of the transistor switching module into a modulation signal composed of signal frequencies f1 and f2.

[0008] A power amplifier, connected to a VCO module, is used to amplify the power of the modulated signal;

[0009] Transmitting transducers are used to transmit the amplified signal from the power amplifier to the downhole.

[0010] A reciprocal transducer is used to receive modulated signals transmitted from the wellhead and, after receiving the signals, return the complete acquired signals from downhole.

[0011] A receiving transducer is used to receive signals transmitted by downhole reciprocal transducers;

[0012] The 2FSK demodulation circuit is used to filter the complete signal acquired by the receiving transducer and demodulate the baseband signal.

[0013] Furthermore, it also includes a power supply circuit that connects the 2FSK modulation circuit and the 2FSK demodulation circuit, and is used to provide the 2FSK modulation circuit and the 2FSK demodulation circuit with the voltage necessary for normal operation.

[0014] Furthermore, the positive signal input terminal of the comparator module is connected to the baseband signal, the signal output terminal of the comparator module is connected to the signal input terminal of the transistor switching module, the output power of the signal conditioning module is connected to the power input terminal of the transistor switching module, the signal output terminal of the transistor switching module is connected to the signal input terminal of the VCO module, the signal output terminal of the VCO module is connected to the signal input terminal of the power amplifier, the signal output terminal of the power amplifier is connected to the transmitting transducer, and the signal output terminal of the receiving transducer is connected to the 2FSK demodulation circuit.

[0015] Furthermore: In the comparator module, a resistor R1 and a pull-down resistor R2 are connected in series at the positive signal input terminal of comparator U1. The baseband signal is input from the SMA interface and connected to the positive signal input terminal of comparator U1 through resistor R1. A DC power supply, resistors R3 and R4 are connected to the negative signal input terminal of comparator U1. By adjusting the resistance values ​​of resistors R3 and R4, the DC power supply is divided, thereby determining the reference voltage value of the negative signal input terminal. When the voltage at the positive signal input terminal is greater than the reference voltage, a high level is output; when the voltage at the positive signal input terminal is less than the reference voltage, a low level is output.

[0016] Furthermore: the power supply terminal of comparator U1 is connected to a DC power supply and a bypass capacitor C1 to suppress high-frequency noise interference and stabilize the power supply voltage; the signal output terminal of comparator U1 is connected to a pull-up resistor and a DC power supply.

[0017] Furthermore: the transistor switching module consists of a high-level switching section and a low-level switching section. Resistors R6, R8, transistor Q1, and R9 constitute the high-level switching section; resistors R7, R9, transistor Q2, and R10 constitute the low-level switching section. The base of transistor Q1 is connected to the first terminal of resistor R6, the second terminal of resistor R6 is connected to the first terminal of resistor R7, the second terminal of resistor R7 is connected to the base of transistor Q2, the collector of transistor Q2 is connected to the emitter of transistor Q1, and grounded through resistor R8. The collector of transistor Q1 is connected to the signal conditioning module through resistor R9, and the emitter of transistor Q2 is connected to the signal conditioning module through resistor R10.

[0018] Further: The signal conditioning module is divided into a high-level output power supply and a low-level output power supply. The high-level end of the signal conditioning module consists of a power supply, a resistor R11, a potentiometer R12, an operational amplifier U3A, and grounding capacitors C4 and C6; the low-level end consists of a power supply, a resistor R13, a potentiometer R14, an operational amplifier U3B, and grounding capacitors C7 and C8; wherein, the inverting input terminal of the operational amplifier U3B is connected to the output terminal and connected to one end of the capacitor C7, the other end of the capacitor C7 is grounded, the non-inverting input terminal of the operational amplifier U3B is connected to one end of the capacitor C8 and one end of the resistor R13, the other end of the resistor R13 is connected to the third terminal of the potentiometer R14, the first terminal of the potentiometer R14 is connected to the power supply, and the second terminal of the potentiometer R14 is grounded to the second terminal of the capacitor C8;

[0019] The inverting input of the operational amplifier U3A is connected to the output and to one end of capacitor C6. The other end of capacitor C6 is grounded. The non-inverting input of the operational amplifier U3A is connected to one end of capacitor C4 and one end of resistor R11. The other end of resistor R11 is connected to the third end of potentiometer R12. The first end of potentiometer R12 is connected to the power supply, and the second end of potentiometer R12 is grounded to the second end of capacitor C4. The positive power input of the operational amplifier U3A is connected to a 12-volt power supply and capacitor C5. The other end of capacitor C5 is grounded. The negative power input of the operational amplifier U3A is grounded.

[0020] Furthermore: the power supply terminal of the VCO chip U4 in the VCO module is connected to a DC power supply and bypass capacitors C9 and C10; the signal input terminal of the VCO chip U4 is connected to the signal output terminal of the transistor switching module; the signal output terminal of the VCO chip U4 outputs a modulated baseband signal.

[0021] Furthermore, the power supply circuit provides +5V and +12V power supply voltages to the 2FSK modulation circuit and the 2FSK demodulation circuit. The input terminal of the voltage regulator chip U2 in the power supply circuit is connected to a pull-down capacitor C2; the output terminal of the voltage regulator chip U2 is connected to a pull-down capacitor C3.

[0022] Furthermore: the 2FSK demodulation circuit filters the complete signal collected by the receiving transducer through a high-frequency analog phase-locked loop U5 and demodulates the baseband signal;

[0023] In the 2FSK demodulation circuit, pin 1 of the high-frequency analog phase-locked loop chip U5 is connected to a DC power supply and one end of a grounding capacitor C11, respectively; pin 2 of the high-frequency analog phase-locked loop chip U5 is connected to a DC power supply, a resistor R15, and a potentiometer R16; pin 3 of the high-frequency analog phase-locked loop chip U5 is connected to pin 7 of the high-frequency analog phase-locked loop chip U5 through a resistor R17; pin 3 of the high-frequency analog phase-locked loop chip U5 is connected to pin 9 of the high-frequency analog phase-locked loop chip U5; pins 4 and 5 of the high-frequency analog phase-locked loop chip U5 are grounded through capacitors C12 and C13, respectively; pin 6 of the high-frequency analog phase-locked loop chip U5 sends the complete signal collected by the receiving transducer, shaped by capacitor C14, to the high-frequency analog phase-locked loop chip U5; pin 6 of the high-frequency analog phase-locked loop chip U5 is connected to pin 7 of the high-frequency analog phase-locked loop chip U5 through a resistor R17; pin 7 of the high-frequency analog phase-locked loop chip U5 is connected to a DC power supply, a resistor R15, and a potentiometer R16; pin 8 of the high-frequency analog phase-locked loop chip U5 is connected to pin 9 of the high-frequency analog phase-locked loop chip U5 through a resistor R17; pin 9 of the high-frequency analog phase-locked loop chip U5 is connected to a DC power supply, a resistor R15, and a potentiometer R16; pin 10 of the high-frequency analog phase-locked loop chip U5 is connected to pin 10 of the high-frequency analog phase-locked loop chip U5 through a resistor R17; pin 10 of the high-frequency analog phase-locked loop chip U5 is connected to pin 10 of the high-frequency analog phase-locked loop chip Resistor R18 is connected; pin 7 of the high-frequency analog phase-locked loop chip U5 is connected to the grounding capacitor C15; pin 8 of the high-frequency analog phase-locked loop chip U5 is the ground terminal and is directly grounded; pin 9 of the high-frequency analog phase-locked loop chip U5 is connected to the pull-up resistor R19 and the DC power supply; pin 10 of the high-frequency analog phase-locked loop chip U5 is connected to the DC power supply and one end of the grounding capacitor C16 respectively; pin 11 of the high-frequency analog phase-locked loop chip U5 is connected to the grounding resistor R20; pins 12 and 13 of the high-frequency analog phase-locked loop chip U5 are connected through capacitor C17; pin 14 of the high-frequency analog phase-locked loop chip U5 is connected to the grounding capacitor C18; pin 15 of the high-frequency analog phase-locked loop chip U5 is connected to resistor R21, potentiometer R22 and the DC power supply; pin 16 of the high-frequency analog phase-locked loop chip U5 serves as the signal output terminal and is connected to the DC power supply through pull-up resistor R23.

[0024] Compared with the prior art, the advantages of this utility model are as follows:

[0025] The modulation and demodulation circuit of this invention achieves continuous phase of the modulated signal between adjacent symbols, and has a simple circuit structure. It has the advantages of high signal transmission stability and the ability to realize long-distance communication downhole in oil and gas wells.

[0026] It should be understood that the content described in the utility model description section is not intended to limit the key or important features of the embodiments of this utility model, nor is it intended to limit the scope of this utility model.

[0027] Other features of this invention will become readily apparent from the following description. Attached Figure Description

[0028] Other features, objects, and advantages of this invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0029] Figure 1 This is a flowchart of a 2FSK modulation and demodulation circuit for downhole communication in oil and gas wells, provided by an embodiment of this utility model;

[0030] Figure 2 This is a schematic diagram of a 2FSK modulation circuit for downhole communication in oil and gas wells, provided by an embodiment of this utility model.

[0031] Figure 3 This is a schematic diagram of a 2FSK demodulation circuit for downhole communication in oil and gas wells, provided by an embodiment of this utility model.

[0032] The diagram is labeled as follows: 1-2FSK modulation circuit; 2-comparator module; 3-transistor switching module; 4-signal conditioning module; 5-VCO module; 6-power amplifier; 7-transmitter transducer; 8-reciprocal transducer; 9-receiver transducer; 10-2FSK demodulation circuit; 11-power supply circuit; 12-oil and gas well. Detailed Implementation

[0033] To make the objectives, technical solutions, and advantages of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present utility model and are not intended to limit the present utility model.

[0034] Combined with appendix Figure 1As shown, a 2FSK modulation and demodulation circuit for downhole communication in oil and gas wells is characterized by comprising: a 2FSK modulation circuit 1, used to convert the input baseband signal into a phase-continuous 2FSK modulated signal. The 2FSK modulation circuit 1 includes a comparator module 2, a transistor switching module 3, a signal conditioning module 4, and a VCO module 5; the comparator module 2 is used to compare the baseband signal with a reference voltage and output corresponding high and low level signals; the transistor switching module 3 controls the on / off state of transistors Q1 and Q2 according to the high and low level signals output by the comparator module 2; the signal conditioning module 4 is divided into a high-level output power supply and a low-level output power supply, which respectively power the circuits containing transistors Q1 and Q2 in the transistor switching module 3; the VCO module 5 is used to convert the baseband signal into a phase-continuous 2FSK modulated signal. The output signal of transistor switching module 3 is converted into a modulated signal composed of signal frequencies f1 and f2; power amplifier 6 is used to amplify the modulated signal; transmitting transducer 7 is used to transmit the amplified signal downhole; reciprocal transducer 8 is used to receive the modulated signal transmitted from the wellhead and, after receiving the signal, return the complete acquired signal from downhole; receiving transducer 9 is used to receive the signal transmitted by the downhole reciprocal transducer 8; 2FSK demodulation circuit 10 is used to filter the complete signal acquired by receiving transducer 9 and demodulate the baseband signal. Power supply circuit 11 is used to provide the voltage necessary for the 2FSK modulation circuit 1 and 2FSK demodulation circuit 10 to operate normally; oil and gas well 12 is used to complete the entire downhole communication process.

[0035] The positive signal input terminal of comparator module 2 is connected to the baseband signal, and the signal output terminal of comparator module 2 is connected to the signal input terminal of transistor switching module 3. The output power of signal conditioning module 4 is connected to the power input terminal of transistor switching module 3, the signal output terminal of transistor switching module 3 is connected to the signal input terminal of VCO module 5, the signal output terminal of VCO module 5 is connected to the signal input terminal of power amplifier 6, and the signal output terminal of power amplifier 6 is connected to transmitting transducer 7. The signal output terminal of receiving transducer 9 is connected to 2FSK demodulation circuit 10.

[0036] Combined with appendix Figure 2As shown, specifically, in the comparator module 2, the positive signal input terminal of comparator U1 is connected in series with a 10R resistor R1 and a 1k pull-down resistor R2. The baseband signal is input from the SMA interface and connected to the positive signal input terminal of comparator U1 through resistor R1. A +5V DC power supply, a 2k resistor R3, and a 1k resistor R4 are connected to the negative signal input terminal of comparator U1. By adjusting the resistance values ​​of resistors R3 and R4, the DC power supply is divided, thereby determining the reference voltage value of the negative signal input terminal. When the voltage at the positive signal input terminal is greater than the reference voltage, a high level is output; when the voltage at the positive signal input terminal is less than the reference voltage, a low level is output.

[0037] The power supply terminal of comparator U1 is connected to a +12V DC power supply and a 0.1uF bypass capacitor C1 to suppress high-frequency noise interference and stabilize the power supply voltage. The signal output terminal of comparator U1 is connected to a 2k pull-up resistor R5 and a +12V DC power supply to ensure that a high level can be output when the voltage at the positive signal input terminal is greater than the reference voltage at the negative signal input terminal.

[0038] Specifically, the transistor switching module 3 controls the on / off state of transistors Q1 and Q2 through the high and low level signals output by the comparator module 2. The transistor switching module 3 consists of a high-level switching section and a low-level switching section, wherein the high-level switching section is composed of a 100R resistor R6, a 2k resistor R8, transistor Q1, and a 100R resistor R9; the low-level switching section is composed of a 1k resistor R7, transistor Q2, a 2k resistor R8, and a 100R resistor R10.

[0039] Resistors R6, R8, transistor Q1, and R9 constitute the high-level switching section; resistors R7, R9, transistor Q2, and R10 constitute the low-level switching section. The base of transistor Q1 is connected to the first terminal of resistor R6, the second terminal of resistor R6 is connected to the first terminal of resistor R7, the second terminal of resistor R7 is connected to the base of transistor Q2, the collector of transistor Q2 is connected to the emitter of transistor Q1, and grounded through resistor R8. The collector of transistor Q1 is connected to the signal conditioning module through resistor R9, and the emitter of transistor Q2 is connected to the signal conditioning module through resistor R10.

[0040] Specifically, the signal conditioning module 4 is divided into a high-level output power supply and a low-level output power supply. The high-level output power supply of the signal conditioning module 4 consists of a +5V power supply, a 1kΩ resistor R11, a 20kΩ potentiometer R12, an operational amplifier U3A, a 0.1µF grounding capacitor C4, and a 1µF capacitor C6; the low-level output power supply consists of a +5V power supply, a 1kΩ resistor R13, a 20kΩ potentiometer R14, an operational amplifier U3B, a 1µF grounding capacitor C7, and a 0.1µF capacitor C8. Resistor R13 and capacitor C8, as well as resistor R11 and capacitor C4, form a low-pass filter to suppress high-frequency signal interference. Adjusting the resistance values ​​of potentiometers R12 and R14 changes the input voltage values ​​of operational amplifiers U3A and U3B, thereby changing the input voltage values ​​of the high and low level switching sections of the transistor switching module 3.

[0041] The inverting input of operational amplifier U3B is connected to the output and to one end of capacitor C7. The other end of capacitor C7 is grounded. The non-inverting input of operational amplifier U3B is connected to one end of capacitor C8 and one end of resistor R13. The other end of resistor R13 is connected to the third end of potentiometer R14. The first end of potentiometer R14 is connected to the power supply, and the second end of potentiometer R14 is grounded to the second end of capacitor C8.

[0042] The inverting input of the operational amplifier U3A is connected to the output and to one end of capacitor C6. The other end of capacitor C6 is grounded. The non-inverting input of the operational amplifier U3A is connected to one end of capacitor C4 and one end of resistor R11. The other end of resistor R11 is connected to the third end of potentiometer R12. The first end of potentiometer R12 is connected to the power supply, and the second end of potentiometer R12 is grounded to the second end of capacitor C4. The positive power input of the operational amplifier U3A is connected to a 12-volt power supply and capacitor C5. The other end of capacitor C5 is grounded. The negative power input of the operational amplifier U3A is grounded.

[0043] Specifically, the power supply terminal of the VCO chip U4 in the VCO module 5 is connected to a +5V DC power supply and a 220pF bypass capacitor C9 and capacitor C10 to suppress high-frequency noise interference and stabilize the power supply voltage; the signal input terminal of the VCO chip U4 is connected to the signal output terminal of the transistor switching module 3; the signal output terminal of the VCO chip U4 outputs a modulated baseband signal.

[0044] In one embodiment, the power supply circuit 11 provides +5V and +12V power supply voltages to the 2FSK modulation circuit 1 and the 2FSK demodulation circuit 10. The input terminal of the voltage regulator chip U2 in the power supply circuit 11 is connected to a 220nF pull-down capacitor C2, with the other end of C2 grounded, serving to filter out high-frequency noise and suppress ripple. The output terminal of the voltage regulator chip U2 is connected to a 100nF pull-down capacitor C3, with the other end of C3 grounded, serving to stabilize the output voltage.

[0045] Specifically, the power amplifier 6 amplifies the modulation signal output by the VCO module 5 in a linear manner, and also has the function of adjusting the power level.

[0046] Specifically, the transmitting transducer 7, the reciprocating transducer 8, and the receiving transducer 9 are characterized by high accuracy, wide measurement range, and high stability; the reciprocating transducer 8 will return a complete acquisition signal from downhole after receiving the signal.

[0047] Specifically, the oil and gas well 12 is used to complete the entire process of downhole communication and is not affected by external signals.

[0048] Combined with appendix Figure 3 As shown, specifically, the 2FSK demodulation circuit 10 filters the complete signal collected by the receiving transducer 9 through a high-frequency analog phase-locked loop U5 and demodulates the baseband signal.

[0049] In the 2FSK demodulation circuit 10, pin 1 of the high-frequency analog phase-locked loop chip U5 is connected to a +5V DC power supply and one end of a 0.1uF grounding capacitor C11, respectively, to suppress high-frequency noise interference and stabilize the power supply voltage. Pin 2 of the high-frequency analog phase-locked loop chip U5 in the 2FSK demodulation circuit 10 is connected to a +5V DC power supply, a 2kΩ resistor R15, and a 10kΩ potentiometer R16, used to control the loop gain. Pin 3 of the high-frequency analog phase-locked loop chip U5 in the 2FSK demodulation circuit 10 is connected to pin 7 of the high-frequency analog phase-locked loop chip U5 through a 1kΩ resistor R17. Pin 3 of the high-frequency analog phase-locked loop chip U5 in the 2FSK demodulation circuit 10 is connected to pin 9 of the high-frequency analog phase-locked loop chip U5. Pins 4 and 5 of the high-frequency analog phase-locked loop chip U5 in the 2FSK demodulation circuit 10 are grounded through 1nF capacitors C12 and C13, respectively, to achieve loop filtering. The 2FSK demodulation circuit 10... Pin 6 of the mid-to-high frequency analog phase-locked loop (PLL) chip U5 receives the complete signal collected by the receiving transducer 9, which is then shaped by a 0.1uF capacitor C14 before being sent to the high-frequency analog PLL chip U5. Pin 6 and pin 7 of the high-frequency analog PLL chip U5 in the 2FSK demodulation circuit 10 are connected through a 1kΩ resistor R18. Pin 7 of the high-frequency analog PLL chip U5 in the 2FSK demodulation circuit 10 is connected to a 0.1uF grounding capacitor C15, which filters out high-frequency interference and stabilizes the control voltage. Pin 8 of the high-frequency analog PLL chip U5 in the 2FSK demodulation circuit 10 is the ground terminal and is directly grounded. Pin 9 of the high-frequency analog PLL chip U5 in the 2FSK demodulation circuit 10 is connected to a 1kΩ pull-up resistor R19 and a +5V DC power supply, which provides level adaptation and improves signal integrity. Pin 10 of the high-frequency analog PLL chip U5 in the 2FSK demodulation circuit 10 is connected to both a +5V DC power supply and a 0V DC power supply.One end of the 1uF grounding capacitor C16; pin 11 of the high-frequency analog phase-locked loop chip U5 in the 2FSK demodulation circuit 10 is connected to the 2k grounding resistor R20, which serves to set the free oscillation frequency of the voltage-controlled oscillator inside U5; pins 12 and 13 of the high-frequency analog phase-locked loop chip U5 in the 2FSK demodulation circuit 10 are connected through a 10pF capacitor C17, which serves to provide a reference time constant for the oscillation frequency of the voltage-controlled oscillator inside U5; pins of the high-frequency analog phase-locked loop chip U5 in the 2FSK demodulation circuit 10... Pin 14 is connected to a 10uF grounding capacitor C18, serving to stabilize the clock signal of U5 and control the time constant of the internal voltage-controlled oscillator. Pin 15 of the high-frequency analog phase-locked loop chip U5 in the 2FSK demodulation circuit 10 is connected to a 2k resistor R21, a 10k potentiometer R22, and a +5V DC power supply. Pin 16 of the high-frequency analog phase-locked loop chip U5 in the 2FSK demodulation circuit 10 serves as the signal output terminal and is connected to the +5V DC power supply through a 2k pull-up resistor R23, optimizing signal quality and stabilizing the static operating point.

[0050] The above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.

Claims

1. A 2FSK modulation and demodulation circuit for downhole communication in oil and gas wells, characterized in that, include: A 2FSK modulation circuit is used to convert the input baseband signal into a phase-continuous 2FSK modulated signal; The 2FSK modulation circuit includes a comparator module (2), a transistor switching module (3), a signal conditioning module (4), and a VCO module (5). The comparator module (2) is used to compare the baseband signal with the reference voltage and output the corresponding high and low level signals. The transistor switching module (3) is connected to the output terminal of the comparator module (2) and controls the on / off state of transistors Q1 and Q2 according to the high and low level signals output by the comparator module (2). The signal conditioning module (4) is connected to the transistor switching module (3) and is divided into a high-level output power supply and a low-level output power supply, which respectively supply power to the circuits where transistors Q1 and Q2 are located in the transistor switching module (3). The VCO module (5) is connected to the transistor switching module (3) and is used to convert the output signal of the transistor switching module (3) into a modulation signal composed of signal frequencies f1 and f2. A power amplifier (6) is connected to a VCO module (5) to amplify the modulated signal. Transmitting transducer (7) is used to transmit the amplified signal output by power amplifier (6) to the well. The reciprocal transducer (8) is used to receive the modulated signal transmitted from the wellhead and, after receiving the signal, return the complete acquisition signal from downhole. A receiving transducer (9) is used to receive signals transmitted by the downhole reciprocal transducer (8); The 2FSK demodulation circuit (10) is used to filter the complete signal collected by the receiving transducer (9) and demodulate the baseband signal.

2. The 2FSK modulation and demodulation circuit for downhole communication in oil and gas wells according to claim 1, characterized in that, It also includes a power supply circuit (11) that connects the 2FSK modulation circuit (1) and the 2FSK demodulation circuit (10) to provide the 2FSK modulation circuit (1) and the 2FSK demodulation circuit (10) with a voltage that allows them to operate normally.

3. The 2FSK modulation and demodulation circuit for downhole communication in oil and gas wells according to claim 1, characterized in that, The positive signal input terminal of the comparator module (2) is connected to the baseband signal, the signal output terminal of the comparator module (2) is connected to the signal input terminal of the transistor switch module (3), the output power of the signal conditioning module (4) is connected to the power input terminal of the transistor switch module (3), the signal output terminal of the transistor switch module (3) is connected to the signal input terminal of the VCO module (5), the signal output terminal of the VCO module (5) is connected to the signal input terminal of the power amplifier (6), the signal output terminal of the power amplifier (6) is connected to the transmitting transducer (7), and the signal output terminal of the receiving transducer (9) is connected to the 2FSK demodulation circuit (10).

4. The 2FSK modulation and demodulation circuit for downhole communication in oil and gas wells according to claim 1, characterized in that: The positive signal input terminal of comparator U1 in the comparator module (2) is connected in series with a resistor R1 and a pull-down resistor R2. The baseband signal is input from the SMA interface and connected to the positive signal input terminal of comparator U1 through resistor R1. A DC power supply, resistor R3 and resistor R4 are connected to the negative signal input terminal of comparator U1. By adjusting the resistance values ​​of resistors R3 and R4, the DC power supply is divided, thereby determining the reference voltage value of the negative signal input terminal. When the voltage at the positive signal input terminal is greater than the reference voltage, a high level is output; when the voltage at the positive signal input terminal is less than the reference voltage, a low level is output.

5. A 2FSK modulation and demodulation circuit for downhole communication in oil and gas wells according to claim 1, characterized in that: The power supply terminal of comparator U1 is connected to a DC power supply and a bypass capacitor C1 to suppress high-frequency noise interference and stabilize the power supply voltage; the signal output terminal of comparator U1 is connected to a pull-up resistor and a DC power supply.

6. The 2FSK modulation and demodulation circuit for downhole communication in oil and gas wells according to claim 1, characterized in that: The transistor switching module (3) consists of a high-level switching section and a low-level switching section. Resistors R6, R8, transistor Q1, and R9 constitute the high-level switching section; resistors R7, R9, transistor Q2, and R10 constitute the low-level switching section. The base of transistor Q1 is connected to the first end of resistor R6, the second end of resistor R6 is connected to the first end of resistor R7, the second end of resistor R7 is connected to the base of transistor Q2, the collector of transistor Q2 is connected to the emitter of transistor Q1, and is grounded through resistor R8. The collector of transistor Q1 is connected to the signal conditioning module through resistor R9, and the emitter of transistor Q2 is connected to the signal conditioning module through resistor R10.

7. The 2FSK modulation and demodulation circuit for downhole communication in oil and gas wells according to claim 1, characterized in that: The signal conditioning module (4) is divided into a high-level output power supply and a low-level output power supply. The high-level end of the signal conditioning module (4) consists of a power supply, a resistor R11, a potentiometer R12, an operational amplifier U3A, and grounding capacitors C4 and C6. The low-level end consists of a power supply, a resistor R13, a potentiometer R14, an operational amplifier U3B, and grounding capacitors C7 and C8. The inverting input of the operational amplifier U3B is connected to the output and to one end of the capacitor C7. The other end of the capacitor C7 is grounded. The non-inverting input of the operational amplifier U3B is connected to one end of the capacitor C8 and one end of the resistor R13. The other end of the resistor R13 is connected to the third end of the potentiometer R14. The first end of the potentiometer R14 is connected to the power supply, and the second end of the potentiometer R14 is grounded to the second end of the capacitor C8. The inverting input of the operational amplifier U3A is connected to the output and to one end of capacitor C6. The other end of capacitor C6 is grounded. The non-inverting input of the operational amplifier U3A is connected to one end of capacitor C4 and one end of resistor R11. The other end of resistor R11 is connected to the third end of potentiometer R12. The first end of potentiometer R12 is connected to the power supply, and the second end of potentiometer R12 is grounded to the second end of capacitor C4. The positive power input of the operational amplifier U3A is connected to a 12-volt power supply and capacitor C5. The other end of capacitor C5 is grounded. The negative power input of the operational amplifier U3A is grounded.

8. A 2FSK modulation and demodulation circuit for downhole communication in oil and gas wells according to claim 1, characterized in that: The power supply terminal of the VCO chip U4 in the VCO module (5) is connected to a DC power supply and bypass capacitors C9 and C10; the signal input terminal of the VCO chip U4 is connected to the signal output terminal of the transistor switching module (3); the signal output terminal of the VCO chip U4 outputs the modulated baseband signal.

9. A 2FSK modulation and demodulation circuit for downhole communication in oil and gas wells according to claim 2, characterized in that: The power supply circuit (11) provides +5V and +12V power supply voltages to the 2FSK modulation circuit (1) and the 2FSK demodulation circuit (10). The input terminal of the voltage regulator chip U2 of the power supply circuit (11) is connected to the pull-down capacitor C2; the output terminal of the voltage regulator chip U2 is connected to the pull-down capacitor C3.

10. A 2FSK modulation and demodulation circuit for downhole communication in oil and gas wells according to claim 1, characterized in that: The 2FSK demodulation circuit (10) filters the complete signal collected by the receiving transducer (9) through the high-frequency analog phase-locked loop U5 and demodulates the baseband signal. In the 2FSK demodulation circuit (10), pin 1 of the high-frequency analog phase-locked loop chip U5 is connected to a DC power supply and one end of a grounding capacitor C11, respectively; pin 2 of the high-frequency analog phase-locked loop chip U5 is connected to a DC power supply, a resistor R15, and a potentiometer R16; pin 3 of the high-frequency analog phase-locked loop chip U5 is connected to pin 7 of the high-frequency analog phase-locked loop chip U5 through a resistor R17; pin 3 of the high-frequency analog phase-locked loop chip U5 is connected to pin 9 of the high-frequency analog phase-locked loop chip U5; pins 4 and 5 of the high-frequency analog phase-locked loop chip U5 are grounded through capacitors C12 and C13, respectively; pin 6 of the high-frequency analog phase-locked loop chip U5 sends the complete signal collected by the receiving transducer (9) to the high-frequency analog phase-locked loop chip U5 after being shaped by capacitor C14; pin 6 of the high-frequency analog phase-locked loop chip U5 is connected to pin 7 of the high-frequency analog phase-locked loop chip U5 through a resistor R17; pin 9 of the high-frequency analog phase-locked loop chip U5 is connected to pin 9 of the high-frequency analog phase-locked loop chip U5 through a resistor C14; pin 4 and pin 5 of the high-frequency analog phase-locked loop chip U5 are grounded through capacitors C12 and C13, respectively; pin 6 of the high-frequency analog phase-locked loop chip U5 sends the complete signal collected by the receiving transducer (9) to the high-frequency analog phase-locked loop chip U5 after being shaped by capacitor C14; pin 6 of the high-frequency analog phase-locked loop chip U5 is connected to pin 9 of the high-frequency analog phase-locked loop chip U5 through a resistor C14; pin 6 of the high-frequency analog phase-locked loop chip U5 is connected to pin Pin 7 of the high-frequency analog phase-locked loop chip U5 is connected to the grounding capacitor C15; pin 8 of the high-frequency analog phase-locked loop chip U5 is the grounding terminal and is directly grounded; pin 9 of the high-frequency analog phase-locked loop chip U5 is connected to the pull-up resistor R19 and the DC power supply; pin 10 of the high-frequency analog phase-locked loop chip U5 is connected to the DC power supply and one end of the grounding capacitor C16 respectively; pin 11 of the high-frequency analog phase-locked loop chip U5 is connected to the grounding resistor R20; pins 12 and 13 of the high-frequency analog phase-locked loop chip U5 are connected through capacitor C17; pin 14 of the high-frequency analog phase-locked loop chip U5 is connected to the grounding capacitor C18; pin 15 of the high-frequency analog phase-locked loop chip U5 is connected to the resistor R21, the potentiometer R22 and the DC power supply; pin 16 of the high-frequency analog phase-locked loop chip U5 serves as the signal output terminal and is connected to the DC power supply through the pull-up resistor R23.

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