Precharge regulation circuit of a load circuit and low voltage power supply system

Abstract

The utility model relates to a kind of pre-charge regulating circuit for load circuit and a low-voltage power supply system.The load circuit includes load, power supply and load switch, the first power end of load switch is connected with power supply, second power end is connected with load, control end is connected with the pre-charge regulating circuit, wherein, the pre-charge regulating circuit includes first transistor, second transistor, first resistance, second resistance and capacitor, wherein, the current input end of first transistor is connected with power supply, the first power end of second transistor is electrically connected to power supply by the second resistance, the second power end of second transistor is grounded, the control end of second transistor is configured to receive PWM control signal.The pre-charge regulating circuit does not need to design different hardware circuit for different capacitance load capacitor, thereby significantly reduce system cost and development time, while improving the reliability and adaptability of system.

Description

Technical Field

[0001] This utility model relates to the field of electronic control technology, and more specifically, to a pre-charge regulation circuit for a load circuit and a low-voltage power supply system. Background Technology

[0002] In vehicle 12V / 48V low-voltage power supply networks, N-channel or P-channel enhancement-mode MOSFETs are typically used as power devices for switching and controlling the load. A key characteristic of MOSFETs is their extremely fast response time, typically on the order of nanoseconds. This characteristic offers significant advantages in achieving rapid fault isolation and reducing conduction losses.

[0003] However, low-voltage power networks typically have capacitive loads, such as capacitors, in the μF to mF range at the load end. During load power-on, the power network needs to rapidly charge these capacitive loads. Due to the extremely short switching time of MOSFETs (nanosecond level), their rapid voltage change rate triggers an extremely high instantaneous current change rate, resulting in surge currents with amplitudes far exceeding the steady-state operating current. This surge current not only damages the MOSFETs due to overcurrent stress, but the resulting line voltage drop also causes a significant drop in the vehicle's mains voltage, interfering with the normal operation of other sensitive automotive electronic devices. Furthermore, the large surge current exacerbates capacitor losses and temperature rise, affecting their lifespan and reliability, and generates electromagnetic interference (EMI) on the power grid. Utility Model Content

[0004] This utility model proposes a pre-charge adjustment circuit for a load circuit. The load circuit includes a load, a power supply, and a load switch. The first power terminal of the load switch is connected to the power supply, the second power terminal is connected to the load, and the control terminal is connected to the pre-charge adjustment circuit. The pre-charge adjustment circuit includes a first transistor, a second transistor, a first resistor, a second resistor, and a capacitor.

[0005] The current input terminal of the first transistor is connected to the power supply, the current output terminal of the first transistor is connected to the control terminal of the load switch, the control terminal of the first transistor is electrically connected to the first power terminal of the second transistor through the first resistor, the first power terminal of the second transistor is electrically connected to the power supply through the second resistor, the second power terminal of the second transistor is grounded, the control terminal of the second transistor is configured to receive PWM control signals, one end of the capacitor is connected to the current output terminal of the first transistor, and the other end is grounded.

[0006] According to the present invention, the pre-charge adjustment circuit for load circuits adjusts the PWM duty cycle in real time via a microcontroller in a software manner, without the need to replace or redesign hardware such as resistors and capacitors. Thus, a single hardware circuit board can meet the needs of multiple vehicle platforms, significantly shortening the development cycle and reducing circuit costs.

[0007] According to an optional embodiment, the precharge regulation circuit further includes a third resistor connected in parallel with the capacitor.

[0008] According to an optional embodiment, the first transistor (Q1) is a bipolar junction transistor (BJT), the emitter of which is the current input terminal of the first transistor, the collector of which is the current output terminal of the first transistor, and the base of which is the control terminal of the first transistor.

[0009] According to an optional embodiment, the first transistor is a PNP transistor.

[0010] According to an optional embodiment, the second transistor is a MOSFET, the control terminal of the second transistor is the gate of the MOSFET, the first power terminal of the second transistor is the drain of the MOSFET, and the second power terminal of the second transistor is the source of the MOSFET.

[0011] According to an optional embodiment, the load switch is a MOSFET.

[0012] According to an optional embodiment, the precharge regulation circuit further includes a control unit for providing the PWM control signal to the second transistor.

[0013] According to an optional embodiment, the load includes a load capacitor and a load resistor connected in parallel with each other, and the control unit is further configured to adjust the duty cycle of the PWM control signal based on the capacitance value of the load capacitor.

[0014] This invention also proposes a low-voltage power supply system, wherein the low-voltage power supply system includes a load circuit and a pre-charge regulation circuit as described above.

[0015] The precharge regulation circuit for load circuits according to this invention has the core advantage of employing PWM (Pulse Width Modulation) control technology. By dynamically adjusting the duty cycle of the PWM signal, the magnitude and precharge time of the precharge current in the load circuit are precisely controlled. This software-defined approach avoids the limitations of traditional hardware circuit designs, which cannot be changed once finalized. It eliminates the need to design different hardware circuits for different load capacitor values, thus significantly reducing system cost and development time, while improving system reliability and adaptability. Attached Figure Description

[0016] By incorporating the figures in this article and subsequently the accompanying figures Figure 1 The specific embodiments used to illustrate certain principles of this utility model will make other features and advantages of the method of this utility model clearer or more specifically explained.

[0017] Figure 1 A schematic diagram of a conventional solution for suppressing inrush current in a load circuit is shown.

[0018] Figure 2 A schematic diagram of another conventional solution for suppressing inrush current in a load circuit is shown.

[0019] Figure 3 A schematic diagram of a precharge adjustment circuit for a load circuit according to an exemplary embodiment of the present invention is shown.

[0020] Figure 4 It shows Figure 3 The simulation results of the pre-charge regulation circuit in the figure are shown in the figure when the load capacitor is 1mF and the duty cycle of the PWM control signal is 5%.

[0021] Figure 5 It shows Figure 3 The simulation results of the pre-charge regulation circuit in the figure are shown in the figure when the load capacitor is 1mF and the duty cycle of the PWM control signal is 10%.

[0022] Figure 6 It shows Figure 3 The simulation results of the pre-charge regulation circuit in the figure are shown in the figure when the load capacitor is 2mF and the duty cycle of the PWM control signal is 5%.

[0023] Figure 7 It shows Figure 3 The simulation results of the precharge regulation circuit in the figure are shown in the figure when the load capacitor is 2mF and the duty cycle of the PWM control signal is 2.5%. Detailed Implementation

[0024] The pre-charge regulation circuit for a load circuit and the low-voltage power supply system including the circuit according to the present invention will now be described with reference to the accompanying drawings and embodiments. In the following description, numerous specific details are set forth to enable those skilled in the art to gain a more complete understanding of the present invention. However, it will be apparent to those skilled in the art that implementations of the present invention may not include some of these specific details. Instead, the present invention may be conceived to be practiced with any combination of the following features and elements, regardless of whether they relate to different embodiments. Therefore, the following aspects, features, embodiments, and advantages are illustrative only and should not be construed as elements or limitations of the claims.

[0025] To address the issue of inrush currents caused by switching devices commonly used in low-voltage power networks for load control, two common solutions are employed to suppress inrush currents. One solution involves setting a series circuit of a resistor and capacitor at the control terminal of the switching device to suppress the rise rate of the gate signal. The other solution is to add an additional pre-charging circuit, using a pre-charging resistor to charge the load capacitor before the circuit starts. Figure 1 and Figure 2 Schematic diagrams of these two conventional solutions are shown respectively.

[0026] like Figure 1 As shown, MOSFET Q0 is the control switch for the load, and R0' and L0 are the equivalent impedance and stray inductance of the wiring harness. The load may include equivalent capacitive reactance C0 and equivalent impedance R0. BAT is the DC power supply. The on / off control of MOSFET Q0 depends on the gate control signal received from an external source.

[0027] exist Figure 1 In the proposed scheme, the gate of MOSFET Q0 is connected in series with resistor R1' and capacitor C1'. The charging and discharging characteristics of the RC delay network are used to delay the rise rate of the gate-source voltage of Q0 (the rise edge of Q0 depends on the value of resistor R1' and capacitor C1'), thereby limiting the rate of change and peak value of the initial charging current of capacitive load C0.

[0028] The drawback of this approach is that once the RC parameters are fixed, the rise time of the gate signal of MOSFET Q0 is determined, lacking the flexibility to adjust it online according to actual operating conditions. If the response characteristics of the circuit need to be optimized, hardware parameters (such as the value of resistor R1' or capacitor C1') must be changed, resulting in a longer design iteration cycle and additional circuit costs.

[0029] exist Figure 2 The diagram illustrates a solution achieved by adding an additional pre-charge circuit. This pre-charge circuit includes a MOSFET Q1 and a pre-charge resistor RP, the on / off state of which is controlled by a pre-charge control signal. The pre-charge current of the load capacitor C0 is limited by turning on the pre-charge resistor, the magnitude of which depends on the resistance value of the pre-charge resistor RP. This solution utilizes the series-connected pre-charge resistor to dissipate some energy, limiting the amplitude of the initial inrush current. The load switch Q0 is then turned on only after the load voltage approaches the supply voltage, achieving smooth switching.

[0030] However, since the resistance value of the pre-charge resistor is fixed, the pre-charge current is also not adjustable, making it unable to adapt to dynamic loads or input voltage changes. Furthermore, the additional power device Q1 needs to withstand large current pulses, increasing cost and circuit complexity.

[0031] Therefore, existing solutions for suppressing surge current in load circuits all suffer from the drawback that the pre-charge characteristics are not adjustable after the hardware parameters are fixed. When the load capacitance changes, the circuit must be redesigned, which leads to an extended development cycle and increased costs.

[0032] To address the aforementioned shortcomings, the core technical problem this invention aims to solve is to achieve dynamic software adjustment of the pre-charge current in a vehicle's low-voltage power network, overcoming the limitations of fixed hardware parameters. Specifically, a solution needs to be designed that allows for software adjustment of the pre-charge current and pre-charge time without hardware modifications when the load capacitance changes, thus avoiding the redesign costs and time losses associated with traditional solutions.

[0033] Figure 3 A schematic diagram of a precharge adjustment circuit for a load circuit according to an exemplary embodiment of the present invention is shown. The following is in conjunction with... Figure 3 The present invention will now provide a more detailed description of the solution for suppressing surge current in load circuits using a pre-charge regulation circuit.

[0034] This precharge regulation circuit is used to control the precharge of a load circuit, which typically includes a load, a power supply BAT, and a MOSFET Q0 acting as a load switch. The drain of the load switch Q0 is connected to the positive terminal of the power supply BAT, its source is connected to one end of the load via a wiring harness, the other end of the load is grounded, and its gate is connected to the regulation circuit as a control terminal. Figure 3 In the diagram, the load is shown as a load capacitor C0 and a load resistor R0 connected in parallel. The connection harness between the load switch and the load can be represented by the equivalent impedance R0' and the stray inductance L0.

[0035] To suppress surge circuits in the load circuit, a surge protection device is set at the gate control terminal of the load switch Q0. Figure 3The precharge regulation circuit shown includes a first transistor Q1, a second transistor Q2, a first resistor R1, a second resistor R2, and a capacitor C1. In this embodiment, the first transistor Q1 is a PNP bipolar junction transistor (BJT). Its emitter is connected to the power supply BAT as the current input terminal, its collector is connected to the gate of the load switch Q0 as the current output terminal, and its base is connected to the drain of the second transistor Q2 through the first resistor R1 as the control terminal. The second transistor Q2 is an N-channel MOSFET. Its drain is connected to the power supply BAT through the second resistor R2 as the first power terminal, its source is grounded as the second power terminal, and its gate receives the PWM control signal from the control unit as the control terminal. Optionally, the precharge regulation circuit also includes a third resistor R3, which is connected in parallel with the capacitor C1. This resistor releases the current stored in the capacitor C1 after the load circuit has completed precharging, preventing it from affecting the turn-off speed of the MOSFET Q0. One end of this parallel circuit is connected to the collector of the first transistor Q1, and the other end is grounded.

[0036] The architecture of this precharge regulation circuit is based on the conduction characteristics (I) of the load switch Q0 (which is typically a MOSFET). D -V DS The design is based on the characteristics of a MOSFET. The operating region of a MOSFET includes three regions: the linear region, the saturation region, and the cutoff region. The voltage between the gate and source of a MOSFET is V. GS The voltage between the drain and source is V. DS The gate threshold voltage is V th .

[0037] When V GS <V th When the MOSFET is in the cutoff region, the drain current I of the MOSFET is... D Almost zero; when V GS <V DS +V th When the MOSFET is in the saturation region, the drain current I of the MOSFET is... D Size and V DS It is not related to voltage V, but depends on voltage V. GS Size; when V GS ≥V DS +V th When the MOSFET is in the linear region, the drain current I of the MOSFET is... D The size varies with V DS It increases as it grows.

[0038] V is controlled by connecting a buffer capacitor C1 in parallel with the gate of MOSFET Q0. GSThe rate of voltage rise. During the period of time the gate voltage rises, V... GS <V DS +V th At this time, the MOSFET is operating in the saturation region, and the drain current I of the MOSFET is... D Controlled by the voltage V between the gate and the source GS The size of the capacitor C1 is determined by the collector output current of the PNP transistor Q1, which controls the rate of voltage rise. Since the collector output current of a PNP transistor is controlled by its base current when operating in the amplification region, IA... c =βI b Among them, I c It is the collector current I of the PNP transistor Q1. b β is the base current of transistor Q1, and β is the DC current amplification factor of transistor Q1.

[0039] The base current I of transistor Q1 is set by connecting a resistor R1 in series with the base of the transistor. b The equivalent operating current of the transistor base within the equivalent cycle is controlled by adjusting the duty cycle of the PWM control signal, thereby adjusting the collector output current of the transistor used to charge the capacitor, controlling the rise time of the capacitor voltage, and thus controlling the rise speed of the gate voltage of MOSFET Q0.

[0040] During one PWM control signal cycle, the equivalent current of the PNP transistor Q1 is:

[0041] I c =βI b =DC*β*(V e -V eb ) / R1

[0042] V e This refers to the emitter potential of the PNP transistor Q1, V. b This refers to the base potential of transistor Q1, V. eb This refers to its emitter V e With base V b The potential difference between them, DC is the duty cycle of the PWM control signal. The rise time of the voltage across capacitor C1 is used to control the time when MOSFET Q0 operates in the saturation region, thereby controlling the pre-charge current I flowing through Q0. D Size.

[0043] During the rise of the MOSFET gate voltage, the MOSFET operates in the saturation region, and its drain current I... D Subject to the voltage v between the gate and source GS This control enables the control of the pre-charge current magnitude of the load capacitor C0.

[0044] Optionally, a control unit for generating a PWM control signal can also be integrated into the precharge regulation circuit. When the load circuit activates the precharge function, the control unit (e.g., based on the capacitance value of the load capacitor C0) generates a PWM control signal with a specific duty cycle and applies it to the gate of the second transistor Q2. When the PWM signal is high, Q2 is turned on, its drain voltage is pulled low, causing the base of the first transistor Q1 to receive a bias voltage and turn on, and the power supply BAT charges the gate capacitor C1 of the load switch Q0 through Q1. When the PWM signal is low, Q2 is turned off, Q1 is turned off due to loss of bias, and the gate charge of Q0 is slowly released through the parallel R3 and C1. By adjusting the duty cycle of the PWM signal, the output current I of the collector of the first transistor Q1 can be adjusted. c This current I c It is used to charge capacitor C1, thereby controlling the rise time of capacitor C1 charging voltage, and thus precisely controlling the rise rate of Q0 gate voltage and its conduction speed, effectively suppressing the surge current generated when the load capacitor is charging.

[0045] As a preferred embodiment, the control unit can dynamically adjust the PWM duty cycle based on the actual capacitance value of the load capacitor C0. For example, when a large capacitance value of the load capacitor C0 is detected, the PWM duty cycle is automatically increased to extend the pre-charge time; when the capacitance value is small, the duty cycle is decreased to speed up the startup process. This adaptive adjustment mechanism ensures optimal surge suppression under different load conditions.

[0046] Another exemplary embodiment of this utility model provides a low-voltage power supply system, which includes the above-mentioned load circuit and pre-charge regulation circuit, and can be widely used in vehicle electronic equipment, industrial control systems and other occasions that require soft start of capacitive loads.

[0047] A simulation model was built in Matlab. The power supply voltage was assumed to be 48V. The base current limiting resistor of transistor Q1 was assumed to be R1 = 10KΩ, the release resistor of the pre-charge capacitor was assumed to be R3 = 50KΩ, the load resistor was assumed to be R0 = 10Ω, the equivalent impedance of the wiring harness was assumed to be R0' = 0.01Ω, the stray inductance of the wiring harness was assumed to be L0 = 3μH, the gate control capacitor of the load switch Q0 was assumed to be C1 = 1μF, and the equivalent capacitive reactance of the load (also referred to as "load capacitance") was assumed to be C0 = 1mF. The current amplification factor of the PNP transistor Q1 was assumed to be β = 100. eb =0.55V. Assume that MOSFETs Q2 and Q0 are both ideal N-channel MOSFETs, and the PWM control signal frequency is 10kHz.

[0048] Figure 4 It shows Figure 3The simulation results of the pre-charge regulation circuit in the figure are shown in the figure when the load capacitor is 1mF and the duty cycle of the PWM control signal is 5%.

[0049] exist Figure 4 In the diagram, the blue waveform represents the charging current of the load capacitor C0, and the red waveform represents the voltage V across the load resistor R0. D Under these parameter settings, the entire charging cycle lasts approximately 3.2 milliseconds. During this period, the pre-charge current (blue waveform) peaks at approximately 36 amps, after which the current gradually decreases. Furthermore, the voltage across the load (red waveform) gradually increases from its initial value, eventually reaching a steady state. Here, the peak current and charging time are primarily influenced by the PWM duty cycle and the load capacitance.

[0050] Figure 5 It shows Figure 3 The simulation results of the precharge regulation circuit are shown in the figure, with a load capacitance of 1mF and a PWM control signal duty cycle of 10%. Under these parameter settings, the duration of the entire charging cycle is approximately 1.7 milliseconds, and the maximum charging current is about 65A. It can be seen that increasing the precharge current will shorten the precharge time.

[0051] Figure 6 It shows Figure 3 The simulation results of the pre-charge regulation circuit are shown in the figure, with a load capacitor of 2mF and a PWM control signal duty cycle of 5%. Under these parameter settings, the entire charging cycle lasts for approximately 3.6 milliseconds, and the maximum charging current is approximately 62A.

[0052] Figure 7 It shows Figure 3 The simulation results of the pre-charge regulation circuit are shown in the figure, with a load capacitor of 2mF and a PWM control signal duty cycle of 2.5%. Under these parameter settings, the duration of the entire charging cycle is approximately 7.1 milliseconds, and the maximum charging current is approximately 33A.

[0053] Depend on Figures 4 to 7 Simulation results show that when the load capacitance changes, the magnitude of the precharge current and the precharge time can be controlled by dynamically adjusting the duty cycle of the PWM control signal. Since the MOSFET operates in the saturation region during the precharge phase, its operating area must be limited to a safe region; otherwise, the MOSFET may be damaged. Therefore, in practical development, the magnitude of the precharge current and the precharge time can be defined by adjusting the PWM duty cycle based on the selected MOSFET.

[0054] The precharge regulation circuit for load circuits according to this invention has the core advantage of employing PWM (Pulse Width Modulation) control technology. By dynamically adjusting the duty cycle of the PWM signal, the magnitude and precharge time of the precharge current in the load circuit are precisely controlled. This software-defined approach avoids the limitations of traditional hardware circuit designs, which cannot be changed once finalized. It eliminates the need to design different hardware circuits for different load capacitor values, thus significantly reducing system cost and development time, while improving system reliability and adaptability.

[0055] In this invention, the term "connection" refers to "electrical connection" or "communication connection." Furthermore, terms such as "comprising" and "including" indicate that, in addition to the elements directly and explicitly stated in the specification and claims, the technical solution of this application does not exclude the presence of other elements not directly or explicitly stated.

[0056] In this utility model, those skilled in the art will understand that the disclosed system can be implemented in other ways. The system implementation methods described above are merely illustrative. For example, the division of modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, the functions of multiple modules can be combined, or the function of a certain module can be further split. In the various embodiments of this utility model, each module can be integrated into one processing unit, or each module can exist physically separately, or two or more modules can be integrated into one unit.

[0057] Although the present invention has been disclosed above with reference to preferred embodiments, it is not limited thereto. All modifications and alterations made without departing from the spirit and scope of the present invention should be included within its protection scope. Therefore, the protection scope of the present invention should be determined by the scope defined in the claims.

Claims

1. A precharge regulation circuit for a load circuit, the load circuit comprising a load, a power supply (BAT), and a load switch (QO), wherein a first power terminal of the load switch is connected to the power supply, a second power terminal is connected to the load, and a control terminal is connected to the precharge regulation circuit, characterized in that, The precharge adjustment circuit includes a first transistor (Q1), a second transistor (Q2), a first resistor (R1), a second resistor (R2), and a capacitor (C1), wherein, The current input terminal of the first transistor (Q1) is connected to the power supply, and the current output terminal of the first transistor (Q1) is connected to the control terminal of the load switch. The control terminal of the first transistor (Q1) is electrically connected to the first power terminal of the second transistor (Q2) through the first resistor (R1). The first power terminal of the second transistor (Q2) is electrically connected to the power supply through the second resistor (R2). The second power terminal of the second transistor (Q2) is grounded. The control terminal of the second transistor (Q2) is configured to receive a PWM control signal. One end of the capacitor (C1) is connected to the current output terminal of the first transistor (Q1), and the other end is grounded.

2. The pre-charge adjustment circuit according to claim 1, characterized in that, The precharge regulation circuit also includes a third resistor (R3) connected in parallel with the capacitor (C1).

3. The pre-charge adjustment circuit according to claim 1 or 2, characterized in that, The first transistor (Q1) is a bipolar junction transistor (BJT). The emitter of the BJT is the current input terminal of the first transistor, the collector of the BJT is the current output terminal of the first transistor, and the base of the BJT is the control terminal of the first transistor.

4. The pre-charge adjustment circuit according to claim 3, characterized in that, The first transistor (Q1) is a PNP type transistor.

5. The pre-charge adjustment circuit according to claim 1 or 2, characterized in that, The second transistor (Q2) is a MOSFET, the control terminal of the second transistor (Q2) is the gate of the MOSFET, the first power terminal of the second transistor (Q2) is the drain of the MOSFET, and the second power terminal of the second transistor (Q2) is the source of the MOSFET.

6. The pre-charge adjustment circuit according to claim 1 or 2, characterized in that, The load switch (Q0) is a MOSFET.

7. The pre-charge adjustment circuit according to claim 1 or 2, characterized in that, The precharge regulation circuit also includes a control unit for providing the PWM control signal to the second transistor (Q2).

8. The pre-charge adjustment circuit according to claim 7, characterized in that, The load includes a load capacitor (C0) and a load resistor (R0) connected in parallel with each other, and the control unit is further configured to adjust the duty cycle of the PWM control signal based on the capacitance value of the load capacitor (C0).

9. A low-voltage power supply system, characterized in that, The low-voltage power supply system includes a load circuit and a pre-charge regulation circuit according to any one of claims 1 to 8.

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