Method for generating a digital signal

Abstract

Method for generating a digital signal (DS) from an analog signal (IA, UA) generated by a frequency converter based on pulse width modulation, wherein the digital signal corresponds in digital representation to an average value of the analog signal over one period (PD) of the pulse width modulation, comprising the steps - Generating a bitstream (BS(i)) with a predetermined bit repetition time (BW) depending on the analog signal using a sigma-delta modulator (1) and - during a time interval (TI) which has a duration at least as long as the period of the pulse width modulation: - Multiplying each bit (BS(i)) of the bitstream with an associated weighting coefficient (BK(i)) to generate a respective bit-weighting coefficient product and - Summing the respective bit weighting coefficient products, where the sum represents the digital signal, characterized in that - the time interval has a duration that is longer than a period of pulse width modulation by a number of bit repetition durations, where the number of bit repetition durations corresponds to the number of weighting coefficients.

Description

[0001] The invention relates to a method for generating a digital signal from an analog signal generated by a frequency converter and to a frequency converter for carrying out the method.

[0002] Frequency converters typically generate pulse-width modulated signals to control electric motors, for example, in the form of a (phase) voltage, where the phase voltage in turn generates a phase current. For frequency converters that feed back the phase current in the context of a control system, the quality of the signal measurement or signal feedback is of paramount importance.

[0003] The signals to be measured are usually recorded using suitable sensors, filtered analogue and then sampled and digitised using conventional analogue-to-digital converters.

[0004] The generally sawtooth-shaped phase current, one of the relevant signals, is usually sampled synchronously in the middle of each pulse-width modulation period. However, sampling off-center can cause an offset measurement error.

[0005] By averaging over a period of pulse width modulation, the aforementioned interference effects can be reduced. Averaging is traditionally performed by obtaining a plurality of digital measured values ​​over a period of pulse width modulation, and then calculating an average of the obtained measured values.

[0006] A method in which such averaging is carried out is described in DE 10 2007 032 484 A1.

[0007] EP 0 910 168 A1 discloses a circuit in which the pulse sequence output by a sigma-delta modulator is multiplied by PWM position-dependent weighting coefficients and then summed.

[0008] US 5940019 A discloses an A / D converter with a delta-sigma modulator whose output bit stream is multiplied by a data conversion value, which determines a gain. The values ​​thus obtained are then data rate reduced using a decimation filter to generate a digital output signal.

[0009] US 2007 / 0108953 A1 discloses a control unit for switching power supplies.

[0010] The invention is based on the object of providing a method for generating a digital signal from an analog signal generated by means of a frequency converter based on pulse width modulation and a frequency converter for carrying out the method, which are simple and cost-effective to implement and which in particular enable interference-free and reliable digitization.

[0011] The invention solves this problem by a method according to claim 1 and a frequency converter according to claim 5.

[0012] Preferred embodiments are the subject of the subclaims, the wording of which is hereby incorporated by reference into the content of the description.

[0013] The method is used to generate at least one digital or digitized signal from an analog signal generated by a frequency converter based on pulse width modulation, for example a phase current and / or a phase voltage, which serves to control an electric motor. The digital signal, in digital representation, corresponds to an average value of the analog signal over a period of the pulse width modulation. The digital signal is used in particular to control the analog signal, for example in a servo converter. In the method, a continuous bit stream with a predetermined, in particular constant, bit repetition time is generated as a function of the analog signal, in particular by means of a sigma-delta modulator.During a respective time interval, which has a duration at least as long as the period of the pulse-width modulation, the following steps are performed: multiplying a respective bit of the bit stream by an associated weighting coefficient to generate a respective bit-weighting coefficient product, and summing all bit-weighting coefficient products over the time interval, whereby the sum over the time interval represents the digital signal. The above steps are repeated continuously, for example, for each period or every nth period of the pulse-width modulation, with n ≥ 2.

[0014] In a further development, the evaluation coefficients are generated by superimposing weighting coefficients of a weighting function, wherein a center point of each weighting function lies within a period of the pulse width modulation, each weighting function corresponds to a digital filter function, adjacent weighting functions are shifted from one another in time by one or a multiple of the bit repetition period, and each weighting function has a predetermined number of weighting coefficients. The time interval has a duration that is longer than a period of the pulse width modulation by a number of bit repetition periods, wherein the number of bit repetition periods corresponds to the number of weighting coefficients.

[0015] In a further development, the time interval is arranged centrally to a period of the pulse width modulation.

[0016] In a further development, the digital filter function is a sinc filter function.

[0017] The frequency converter, in particular in the form of a servo converter, is designed to carry out the above-mentioned method and comprises: a sigma-delta modulator for generating the bit stream, a memory that stores the weighting coefficients, a multiplier that is designed to multiply a respective bit of the bit stream by an associated weighting coefficient, and a summer that is designed to sum the respective bit-weighting coefficient products.

[0018] The invention is described below with reference to the drawings, which illustrate preferred embodiments of the invention. Herein, schematically: Fig. 1 analog signals in the form of a phase voltage and a phase current generated or caused by a frequency converter based on pulse width modulation, Fig. 2 is a block diagram of a circuit for generating a digital signal from the Fig. 1 shown signals, Fig. 3 a weighting function of a digital sinc 3 -Filter with a total of 384 weighting coefficients and Fig. 4 a plurality of adjacent weighting functions which are shifted in time from one another by a number of bit repetition periods of a sigma-delta modulator, and evaluation coefficients which are generated by superimposing weighting coefficients of a certain number of adjacent weighting functions.

[0019] Fig. 1 shows analog signals conventionally generated or produced by a frequency converter 5 based on pulse width modulation in the form of a substantially rectangular, pulse-width-modulated phase voltage UA with a variable duty cycle and an associated sawtooth-shaped phase current IA, as they arise in a conventional, pulse-width modulation-based control of an electric motor 6 by the frequency converter 5. To control the signals UA and / or IA, according to the invention, they are continuously digitized in a time- and amplitude-discrete manner, wherein the digital or digitized signal corresponds to an average value of the analog signal UA or IA over a period PD of the pulse width modulation. A period can be, for example, approximately 0.25 ms and can be changed as needed.

[0020] Firstly, referring to Fig. 2, a continuous bit stream BS(i), where i = 0, 1, 2, ..., with a predetermined bit repetition period BW depending on the analog signal UA or IA is generated by means of a sigma-delta modulator 1. The bit repetition period BW can be, for example, 0.25 µs, which corresponds to a bit repetition frequency of 4 MHz.

[0021] During a time interval ZI (see Fig. 4), which has a duration at least as long as the period PD of the pulse width modulation, all bits BS(i) of the bit stream are multiplied by a multiplier 3 with an associated weighting coefficient BK(i) stored in a memory 2 to generate a respective bit-weighting coefficient product. The bit-weighting coefficient products thus generated are summed by a summer 4, the sum over the time interval ZI representing the digital signal DS.

[0022] The above steps can be repeated for subsequent periods or for each nth period, whereby the control variable i can be set to zero again. If a digitized measured value is to be generated for each period, the Fig. 2 can be duplicated, whereby the two circuits operate with a time offset, ie interleaved.

[0023] Based on the Fig. 3 and Fig. Section 4 describes how the weighting coefficients BK(i) are calculated. A single increment of the control variable i corresponds to the bit repetition period BW in the time domain.

[0024] Fig. 3 shows a weighting function GF of a conventional digital sinc 3 Filter with an oversampling ratio of 128 and a total of 384 weighting coefficients GK(i). Such filters are commonly used at the output of sigma-delta modulators for data rate reduction.

[0025] Fig. 4 shows based on the Fig. 3, a single weighting function GF comprises a plurality of adjacent weighting functions GF that are shifted from one another by P steps. A single step corresponds to the bit repetition period BW of the sigma-delta modulator 1, as already explained above, so that the weighting functions GF are shifted from one another in the time domain or over time by P bit repetition periods BW.

[0026] The period of the pulse width modulation is Fig. 4, for example, 500 * BW and the time interval Zl, ie the integration interval, (500 + 384 / 2 + 384 / 2) * BW = N * BW. The time interval ZI therefore has a duration that is increased by the number of weighting coefficients of the Fig. 2 shown sinc 3 -filter multiplied by the bit repetition time BW is longer than the period PD of the pulse width modulation.

[0027] The time interval ZI is arranged centrally to the period of the pulse width modulation.

[0028] The weighting coefficients BK(i) are now generated by superimposing the weighting coefficients GK(i) of the weighting function GF whose center lies within the pulse-width modulation period. These are the weighting functions labeled 0 to 3.

[0029] The evaluation coefficients BK(i) can be represented as follows: BK(i)=∑s=0s=3GK(i−s⋅P)

[0030] The digital signal DS is finally: DS=∑i=0NBS(i)⋅BK(i)

[0031] In the method described in DE 10 2007 032 484 A1, the average is calculated over a plurality of fully digitized samples within the period. For this purpose, appropriately parallelized hardware must be provided that provides these samples at a suitably decimated sampling rate with the required temporal resolution and word length.

[0032] Instead of the integral of the decimated samples, the invention uses the integral of the evaluation or weighting function of the associated decimation filters, whereby the coefficients required for this purpose are calculated in advance and stored in a memory.

[0033] This makes it possible to dispense with the decimation filter required in conventional implementations with sigma-delta modulators, thus enabling a more cost-effective and energy-efficient implementation due to the saving of corresponding logic elements.

[0034] Furthermore, it is possible to use the bit repetition frequency of the sigma-delta modulator directly without prior reduction.

[0035] The integrated evaluation function also has the property of being flat in the middle range, see Fig. 4. This property can be used, for example, to minimize the memory requirements for the coefficients, since only the rising and falling edges need to be stored.

[0036] This property also facilitates adaptation to a changing period duration. When the period duration of the pulse-width modulated signals changes, the method according to the invention can be easily adapted, for example, by adjusting the coefficients GK(i) accordingly. For example, if, based on the representation in Fig.4 If the period PD is extended, only the duration of the plateau with constant coefficients BK(i) is extended, the edges remain unchanged.

[0037] In the embodiments shown, the weighting or evaluation function is superimposed or integrated, rather than the conventional method of integrating the already decimated samples. The superimposed weighting functions are applied from a memory. Precise adaptation of the superimposed weighting function to the period of the pulse width modulation is easily achieved. Almost any function can be used as weighting functions, allowing for a wide variety of associated filter functions.

[0038] The exact integration over a period increases the measurement accuracy, which makes a reasonable phase voltage measurement possible.

[0039] Sinc filters are no longer necessary, so significantly fewer hardware resources are consumed.

[0040] The evaluation coefficients can be used for voltage and current simultaneously.

[0041] This results in a wide range of possible applications, such as inverter error compensation, voltage control and sensorless control down to zero speed.

[0042] The invention therefore enables a simple and cost-effective implementation of converter signals, while at the same time ensuring interference-free and reliable digitization.

Claims

[1] Method for generating a digital signal (DS) from an analog signal (IA, UA) generated by means of a frequency converter on the basis of pulse width modulation, wherein the digital signal in digital representation corresponds to an average value of the analog signal over a period (PD) of the pulse width modulation, comprising the steps - generating a bit stream (BS(i)) with a predetermined bit repetition time (BW) as a function of the analogue signal by means of a sigma-delta modulator (1) and - during a time interval (ZI) which has a duration at least as long as the period of the pulse width modulation: - multiplying a respective bit (BS(i)) of the bit stream by an associated weighting coefficient (BK(i)) to generate a respective bit-weighting coefficient product and - Summing the respective bit weighting coefficient products, the sum representing the digital signal,characterized by , that - the time interval has a duration which is longer than a period of the pulse width modulation by a number of bit repetition periods, the number of bit repetition periods corresponding to the number of weighting coefficients. [2] Method according to claim 1, characterized by , that - the evaluation coefficients are generated by superimposing weighting coefficients (GK(i)) of weighting functions (GF), where - a center point of a respective weighting function lies within a period of the pulse width modulation, - a respective weighting function corresponds to a digital filter function, - adjacent weighting functions are shifted in time by one or a multiple of the bit repetition time and - a respective weight function has a predetermined number of weighting coefficients. [3] Method according to one of the preceding claims, characterized by that the time interval is arranged centrally to a period of the pulse width modulation. [4] Method according to claim 2, characterized by that the digital filter function is a sinc filter function. [5] Frequency converter for carrying out the method according to one of claims 1 to 4, characterized by - a sigma-delta modulator (1) for generating the bit stream, - a memory (2) which stores the weighting coefficients, - a multiplier (3) designed to multiply a respective bit of the bit stream by an associated weighting coefficient, and - a summer (4) designed to sum the respective bit-weighting coefficient products.

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