Systems and methods for integrated re-sputtering in a physical vapor deposition chamber

A dual-mode deposition system with a copper collimator and power control addresses the challenge of uniform layer coverage on miniaturized semiconductor wafers by combining deposition and etching, enhancing coverage on critical features through controlled plasma processes.

DE102014019381B4Active Publication Date: 2025-07-24TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
View PDF 5 Cites 0 Cited by

Patent Information

Application Number
DE102014019381
Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Priority Date
2014-01-23
Filing Date
2014-12-22
Publication Date
2025-07-24
Estimated Expiration
2034-12-22

AI Technical Summary

Technical Problem

The challenge of achieving uniform coverage of sputtered material layers on semiconductor wafers with increasingly smaller features has become difficult due to advancements in semiconductor miniaturization, particularly in processes involving physical vapor deposition (PVD) and etching.

Method used

A dual-mode deposition system that utilizes a collimator made of copper, capable of functioning as both a target and a sputtering source, combined with a magnetron and power control system, to facilitate both deposition and etching processes, ensuring improved coverage on both the bottom and sidewalls of semiconductor devices with critical dimensions of 20 nanometers or less.

Benefits of technology

The system achieves enhanced material layer coverage on semiconductor wafers, particularly at the bottom and sidewalls of narrow trenches, by controlling plasma conditions and using metal ions for re-sputtering, thereby maintaining profile integrity and deposition rate.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 00000000_0000_ABST
    Figure 00000000_0000_ABST
Patent Text Reader

Abstract

Material layer deposition chamber (100) comprising: a boundary shielding structure (102); a wafer holder (110) configured to hold at least one wafer in the confinement shield structure (102); a target support structure (112) disposed above the wafer holder (110) on an opposite side of the confinement shield structure (102), the target support structure (112) configured to hold a target (114); a collimator (106) disposed in the confinement shielding structure (102) between the wafer holder (110) and the target support structure (112); an electrical power source (124, 126) connected to the collimator (106) for supplying electrical power to the collimator (106), a direct current electrical source (120) connected to the target support structure (112) for supplying electrical current to the target (114); and a control system (140) for controlling the current source (124, 126) of the collimator (106) and the DC current source (120) of the target support structure (112) such that the electrical current is selectively supplied to the target (114) and / or the collimator (106) in order to use the collimator (106) and the target (114) sequentially as a sputtering target for depositing a layer of material on the wafer.
Need to check novelty before this filing date? Find Prior Art

Description

BACKGROUND

[0001] The semiconductor integrated circuit industry has experienced rapid growth in recent decades. Technological advances in semiconductor materials and design have resulted in increasingly smaller and more complex circuits. These advances in materials and design have been made possible by the technological advances related to processing and manufacturing. As semiconductors have evolved, the number of interconnected devices per unit area has increased, while the size of the smallest component that can be reliably produced has decreased.

[0002] A commonly used technique to form material layers over semiconductor wafers is physical vapor deposition (PVC), which incorporates the technique of sputtering. In sputter deposition, a plasma is used to excite ions, usually of a noble gas, to facilitate strong collisions with a target. Atoms of the target are knocked out by colliding ions and then condense onto the exposed surface of a semiconductor wafer, forming a thin layer or film of the target material. Some other PVD chambers can also be used in an etching process by exciting ions, noble gases, or metal ions and causing collisions with the layer to be etched on the semiconductor wafer.As feature sizes have decreased, providing sputtered material layers with uniform feature coverage on a semiconductor wafer has become increasingly difficult.

[0003] For the prior art, reference is made to WO 2015 / 060 942 A1, EP 0 703 598 A1, US 6 692 617 B1 and US 2005 / 0 211 546 A1. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] Aspects of the present disclosure will be better understood by reference to the accompanying drawings. It is emphasized that, in accordance with standard industry practice, various features are not drawn to scale. Indeed, the dimensions of the various features may be exaggerated or reduced as desired for clarity of description. Fig. 1 is a cross-sectional view of a material layer deposition chamber according to aspects of the present disclosure. Fig. 2 is a flow diagram of a method for depositing a layer of material on a semiconductor wafer according to aspects of the present disclosure.

[0005] Aspects of the present disclosure can best be understood by considering the accompanying figures with reference to the detailed description provided below. DETAILED DESCRIPTION

[0006] The following disclosure provides many different embodiments or examples for implementing various features of the invention. Specific examples of components and arrangements are described below.

[0007] Furthermore, spatially relative terms such as "below," "under," "lower," "above," "upper," and the like may be used herein for convenience of description to describe the relationship of one element or feature to one or more other elements or features as shown in the figures. The spatially relative terms are intended to encompass various orientations of the device being used or operated in addition to the orientation shown in the figures. The device may be oriented differently (rotated 90 degrees or in a different orientation), and the spatially relative terms used herein may also be interpreted accordingly.

[0008] If we now refer to Fig. 1, a physical vapor deposition system 100 capable of performing both deposition and etching processes is shown in a cross-sectional view. The deposition chamber 100 includes a confinement shield structure 102 defining a chamber 104 including an upper chamber or section 104A and a lower chamber or section 104B. The upper and lower sections 104A and 104B are separated by a collimator 106. The collimator 106 is a structure used to guide sputtered atoms or molecules by restricting the available paths from a target 114 to a wafer 108 undergoing processing. The collimator 106 is open at the top and bottom and includes multiple channels therethrough, with the dimensions and geometry of the channels restricting the available paths of material passing through the collimator.In some embodiments, individual channels may be hexagonal when viewed from above, giving collimator 106 a "honeycomb" appearance. Other embodiments of the collimator may have different shapes and structures.

[0009] The wafer 108 is supported and positioned in the lower chamber 104B by a wafer chuck 110. In some embodiments, the wafer chuck 110 is an electrostatic chuck or e-chuck. Clamps (not shown) may be positioned over the edges of the wafer 108 to help hold it in place. The wafer chuck 110 may have a temperature control and maintenance system built into it that allows the temperature of the wafer 108 to be controlled. For example, the wafer chuck 110 may be used to cool the wafer 108 while heating the chamber 104 for and by generating a plasma therein. Controlling the temperature of the wafer 108 may improve characteristics of the deposited material layer and increase the deposition rate by promoting condensation.

[0010] Opposite the wafer 108 and the wafer holder 110, and above the upper chamber 104A, is a target support structure 112 that supports a target 114. The target support structure 112 secures the target 114 during operation of the deposition system 100. The target 114 is a piece of material from which the material layer is formed on the wafer 108. The target 114 can be a conductive material, an insulating material, or a precursor material that reacts with a gas to form a molecule from which the deposited material layer is made. For example, a metal oxide or metal nitride can be deposited using a metal target 114 that does not include oxygen or nitrogen.

[0011] A number of power supplies are provided in the deposition system 100 to generate and control the plasma in the chamber 104 and to conduct the sputtering and etching, or re-sputtering if desired. A direct current (DC) power supply 120 is connected to the target support structure 112 to supply DC power thereto. A radio frequency alternating current (RF) power supply 122 is connected to the wafer stage 110. In some embodiments, an RF power supply is also provided for the target support structure 112, in addition to the DC power supply 120. Additionally, at least one power supply is provided for the collimator 106. In the embodiment shown, both a DC power supply 124 and an RF power supply 126 are connected to the collimator 106.

[0012] As shown, both the target 114 and the collimator 106 are made of the same material, copper. In conventional deposition systems, collimators, when present, are typically made of aluminum or stainless steel. In some embodiments, the collimator 106 may consist of an inner core structure with a layer of copper deposited thereon; in others, the collimator 106 is formed entirely of copper.

[0013] As in Fig. 1, the deposition system 100 further includes a number of magnets. The magnets may include side magnets 130 and 132. The side magnets 130 and 132 are disposed in the deposition system 100 outside the confinement shield structure 102 and may be coil magnets. Additionally, a magnetron 134 is provided above the target support structure 112. The magnetron 134 provides a magnetic field to the chamber 104, particularly the upper chamber 104A, which may facilitate the control and use of the plasma.

[0014] In operation, the deposition system 100 can be used for sputter deposition and for re-sputtering or etching. During a deposition process, the collimator 106 can be used, for example, as a sputtering target instead of the target 114. To achieve this, the DC power supply 120 can be turned off so that no power is supplied to the target 114. An RF bias voltage is applied to the wafer holder 110. This RF bias voltage can be less than about 500 W. RF power and DC power are supplied to the collimator 106 by the RF power supply 126 and the DC power supply 124. In some cases, only the RF power is supplied to the collimator 106. Thus, the DC power supply 124 can supply from 0 to 10 kW. The RF power supplied to the collimator is about 1 kW or more.

[0015] The power provided to the DC power supply and the RF power supply is controlled by a control system 140, which includes one or more processors in conjunction with memory. The memory may include process sequences preprogrammed for use in device fabrication. The memory may contain instructions that describe and implement the sequences. The processors are communicatively coupled to the power supplies and to several sensors in the deposition system 100. The sensors may include temperature sensors, pressure sensors, position sensors, field sensors, and others.

[0016] During the sputtering process, the pressure in chamber 104 is maintained at a low level. For example, the pressure may range from about 10 to about 150 mTorr. A gas and pressure system 142 is provided as part of deposition system 100. Gas and pressure system 142 includes valves, conduits, and pressure and flow sensors to control the pressure in chamber 104, to introduce reaction gases, and to remove exhaust gases. Gas and pressure system 142 is connected to control system 140.

[0017] During the sputtering process, Ar+ ions can be used to release copper atoms from the collimator 106, which condense on the wafer 108.

[0018] The deposition system 100 can also be used for etching or re-sputtering using metal ions, such as copper ions. This can be achieved by using the control system 140 to control the DC power supply 120 to provide approximately 20 kW or more to the target support structure 112 and the target 114. The DC power supply and the RF power supplies 124 and 126 can be turned off so that no power is supplied to the collimator 106. And the RF bias voltage applied by the RF power supply 122 to the wafer holder 110 is greater than approximately 500 W. Thus, the collimator 106 can serve only as a collimator and not as a collimator and target during a metal ion etching process, such as a copper ion etching process. The pressure maintained in chamber 104 by gas and pressure system 142 is less than about 1 mTorr.

[0019] Both the deposition process and the re-sputtering process can be used in forming a single material layer on wafer 108. By enabling both processes in deposition system 100, the material layer formed therein can provide improved device coverage. For example, deposition system 100 can provide thick coverage at the bottom of a narrow trench device and good sidewall coverage. The re-sputtering process can utilize the metal ions to improve sidewall coverage while limiting profile damage.

[0020] Fig. 2 is a flowchart of a method 200 for depositing a material layer on a semiconductor wafer. As shown, the method 200 includes a plurality of numbered steps. However, embodiments of the method 200 may include additional steps before, after, between, and / or as part of the numbered steps. The illustrated embodiment of the method 200 begins at step 202, in which a wafer is placed on a wafer stage beneath a collimator formed of a material and beneath a target. At step 204, the collimator is used as a sputtering target in a deposition process. The deposition process uses the collimator to provide the material for the material layer. At step 206, the deposition process ends.

[0021] In order to better describe the method 200, reference will now be made to the deposition system 100 of Fig.1. The wafer holder 110 is used, for example, to position the wafer 108 at the bottom of the chamber 104, beneath both the collimator 106 and the target 114 attached to the target support structure 112. The control system 140 controls the DC power supply 124 and / or the RF power supply 126 to supply electrical current to the collimator 106. This causes the collimator 106 to act as a target, so that the material is released from the collimator and then condenses onto the wafer 108 by ions formed in a plasma.

[0022] In some embodiments, the collimator 106 and the target 114 can be used in a deposition process. In such embodiments, the collimator 106 and the target 114 can be used simultaneously as a target, or the collimator 106 and the target 114 can be used sequentially in depositing a material layer. This can include supplying RF power and / or DC power to the target during the deposition process.

[0023] When a desired amount of material has been deposited on wafer 108, the deposition process may be terminated. To improve the sidewall coverage of features, such as trenches, present on wafer 108, a metal ion etching process or a re-sputtering process may be initiated by control system 140. As part of the metal ion etching process, power supplies 124 and 126 connected to collimator 106 may be turned off so that no power is supplied thereto. Instead, DC power is supplied to target 114 through DC power supply 120 connected to target support structure 112. During re-sputtering, an RF bias of greater than 500 W is applied to wafer chuck 110, while an RF bias of less than 500 W is applied during deposition.

[0024] The steps of method 200 are performed in a single deposition chamber that is part of deposition system 100. The dual-mode deposition system can provide improved coverage on the bottom and sidewalls of devices with critical dimensions of approximately 20 nanometers or less. The profile of the material layer can generally be maintained through the use of metal ions during the re-sputtering process.

[0025] In one exemplary aspect, the present disclosure relates to a deposition chamber for material layers. The deposition chamber includes a confinement shield structure, a wafer holder configured to hold at least one wafer within the confinement shield structure, and a target support structure disposed above the wafer holder on an opposite side of the confinement shield structure. The target support structure is configured to hold a sputtering target. The deposition chamber further includes a collimator disposed within the confinement shield structure between the wafer holder and the target support structure, wherein an electrical power source is connected to the collimator to supply electrical power.

[0026] In another exemplary aspect, the present disclosure relates to a material layer deposition system. The material layer deposition system includes a wafer chuck configured to hold at least one wafer in a confinement shield structure, and a target support structure disposed above the wafer chuck on an opposite side of the confinement shield structure. The target support structure is configured to support a sputtering target. The material layer deposition system further includes a collimator disposed in the confinement shield structure between the wafer chuck and the target support structure, an electrical power source connected to the collimator to supply electrical power, and a control system configured to control the electrical power source connected to the collimator.

[0027] In yet another exemplary aspect, the present disclosure relates to a method for depositing a material layer on a semiconductor wafer. The method includes steps of positioning a wafer on a wafer stage beneath a collimator formed from a material and beneath a target, using the collimator as a sputtering target in a deposition process, and terminating the deposition process. The collimator provides the material for the material layer.

Claims

[1] Material layer deposition chamber (100) comprising: a boundary shielding structure (102); a wafer holder (110) configured to hold at least one wafer in the confinement shield structure (102); a target support structure (112) disposed above the wafer holder (110) on an opposite side of the confinement shield structure (102), the target support structure (112) configured to hold a target (114); a collimator (106) disposed in the confinement shielding structure (102) between the wafer holder (110) and the target support structure (112); an electrical power source (124, 126) connected to the collimator (106) for supplying electrical power to the collimator (106), a direct current electrical source (120) connected to the target support structure (112) for supplying electrical current to the target (114); and a control system (140) for controlling the current source (124, 126) of the collimator (106) and the DC current source (120) of the target support structure (112) such that the electrical current is selectively supplied to the target (114) and / or the collimator (106) in order to use the collimator (106) and the target (114) sequentially as a sputtering target for depositing a layer of material on the wafer. [2] The material layer deposition chamber (100) of claim 1, further comprising a radio frequency power source (122) connected to the wafer holder (110) and configured to provide an RF bias voltage to the wafer holder (110), and wherein the control system (140) is configured to supply the electrical current only to the collimator (106) and to turn off the DC power source (120) connected to the target support structure (112) for sputter deposition using a collimator (106) as a sputter target. [3] The material layer deposition chamber (100) of any preceding claim, wherein the electrical power source (124, 126) connected to the collimator (106) comprises a direct current source (124). [4] The material layer deposition chamber (100) of any preceding claim, wherein the electrical power source (124, 126) connected to the collimator (106) comprises a radio frequency (RF) power source (126). [5] The material layer deposition chamber (100) of claim 1, further comprising a high frequency power source (122) connected to the wafer holder (110). [6] A material layer deposition chamber (100) according to any one of the preceding claims, wherein the target (114) and the collimator (106) comprise the same material. [7] The material layer deposition chamber (100) of any preceding claim, wherein the collimator (106) has an outer surface formed of copper. [8] A material layer deposition chamber (100) according to any one of the preceding claims, wherein the collimator (106) is formed of copper. [9] The material layer deposition chamber (100) of any preceding claim, further comprising a gas and pressure system for achieving and maintaining a desired pressure in the material layer deposition chamber (100) and introducing one or more gases into the material layer deposition chamber (100), the gas and pressure system being controlled by the control system (140). [10] A material layer deposition chamber (100) according to any one of the preceding claims, further comprising magnets oriented perpendicular to a collimating direction of the collimator (106). [11] The material layer deposition chamber (100) of any preceding claim, wherein the material layer deposition chamber (100) is configured by the control system (140) to deposit a material layer on a wafer at a first time and to etch the material layer at a second time. [12] A method for depositing a layer of material on a semiconductor wafer, comprising: Positioning a wafer on a wafer holder (110) beneath a target (114) and a collimator (106) formed from a material; and sequentially using the collimator (106) as a sputtering target in a deposition process, wherein the collimator (106) provides the material for the material layer, and using the target (114) as a sputtering target in the deposition process, wherein the sputtering target provides the material for the material layer; and terminating the deposition process. [13] The method of claim 12, wherein using the collimator (106) as a sputtering target comprises supplying an electrical current to the collimator (106) during a deposition process that deposits the material over the wafer. [14] The method of claim 13, wherein supplying the electrical current to the collimator (106) comprises at least one of the following: Supplying a direct current; or Supplying a high-frequency current. [15] The method of any one of claims 12 to 14, further comprising using the target (114) as a sputtering target in an additional deposition process. [16] The method of claim 15, wherein using the target (114) as a sputtering target comprises: Applying a direct current to the target (114); and Stopping the supply of an electrical current to the collimator (106). [17] The method of claim 15 or 16, wherein using the target (114) as a sputtering target in the additional deposition process comprises performing a target ion etch. [18] The method of any one of claims 12 to 17, further comprising applying a radio frequency bias voltage to a portion of the wafer holder (110). [19] Method according to one of claims 12 to 18, wherein the target (114) is formed of the same material as the collimator (106).

Citation Information

Patent Citations

  • Electrode between sputtering target and workpiece

    EP0703598A1

  • Reactive sputter deposition plasma process using an ion shower grid

    US20050211546A1

  • Sustained self-sputtering reactor having an increased density plasma

    US6692617B1

  • Apparatus and method for uniform deposition

    WO2009155208A2

  • Bipolar collimator utilized in a physical vapor deposition chamber

    WO2015060942A1