Method for manufacturing semiconductor devices and semiconductor device containing oxygen-correlated thermal donors

Abstract

A method for fabricating a semiconductor device, the method comprising: determining information specifying an extrinsic dopant concentration (Dext) and information specifying an intrinsic oxygen concentration (Doi) in a semiconductor wafer (100), and, based on the information about the extrinsic dopant concentration (Dext) and the intrinsic oxygen concentration (Doi) as well as a generation rate or a dissociation rate of oxygen-correlated thermal donors in the semiconductor wafer (100), determining a process temperature gradient (Tproc(t)) for generating or dissociating oxygen-correlated thermal donors to compensate for a difference between a target dopant concentration (Dtarg) and the extrinsic dopant concentration (Dext), wherein the extrinsic dopant concentration (Dext) is of the n-type doping, and subjecting the semiconductor wafer (100) a main heat treatmentwhich applies the process temperature gradient (Tproc(t)).

Description

BACKGROUNDPower semiconductor devices typically include a low doped drift zone over which the reverse voltage drops. Typically, the drift zone is recessed on an epitaxial layer grown on a heavily doped semiconductor base. In situ doping during epitaxial growth results in a highly homogeneous distribution of the dopants within the epitaxial layer. Since the growth rate of epitaxial layers is about 1 μm per minute, the process is complicated when drift zones exceed a thickness of about 200 μm and more for reverse voltages beyond 2000 V. Therefore, semiconductor wafers for the manufacture of high blocking capability semiconductor devices are typically obtained by sawing silicon ingots grown from a localized molten zone. During the floating zone melting process, the growing silicon crystal typically takes up dopant atoms with a comparatively high homogeneity over the length and diameter of the silicon ingot.US 2006 / 0263967 A1 describes the provision of silicon wafers with the highest possible resistance for the production of HF components. An initial impurity containing boron atoms is partially compensated or overcompensated by the formation of thermal donors. DE 10 2011 113 549 A1 describes the generation of a field stop zone which is formed in a semiconductor body with a basic doping, wherein the basic doping corresponds to the doping in the drift zone of the power semiconductor component. The field stop zone additionally contains a dopant formed by oxygen / hole complexes such that the total dopant concentration in the field stop zone is above the dopant concentration in the drift zone.It is desirable to improve the production of power semiconductor devices.SUMMARYThe object is achieved with the subject matter of the independent claims. The dependent claims relate to further embodiments.According to an embodiment, a method of manufacturing a semiconductor device includes determining information indicative of an extrinsic dopant and an intrinsic oxygen concentration in a semiconductor wafer. Based on the information about the extrinsic dopant concentration and the intrinsic oxygen concentration as well as a generation rate or dissociation rate of oxygen-correlated thermal donors in the semiconductor wafer, a process temperature gradient for generating or dissociation of oxygen-correlated thermal donors is determined to compensate for a difference between a target dopant concentration and the extrinsic dopant concentration.According to another embodiment, a semiconductor device includes a semiconductor portion including a drift zone having a total dopant concentration in the range of 1E12cm -3 to 1E17cm -3 wherein a ratio of oxygen correlated thermal donors to a total of extrinsic donors and the oxygen correlated thermal donors is at least 25%.Those skilled in the art will recognize additional features and advantages upon reading the following detailed description and viewing the accompanying drawings.BRIEF DESCRIPTION OF THE DRAWINGSThe accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of the disclosure. The drawings illustrate the embodiments of the present invention and together with the description serve to explain principles of the invention. Other embodiments of the invention and intended advantages will be immediately appreciated as they become better understood by reference to the following detailed description. FIG. 1A is a schematic block diagram for illustrating a method of manufacturing a semiconductor device by determining information about an extrinsic dopant concentration and an intrinsic oxygen concentration and by compensating a difference between a target dopant concentration and the extrinsic dopant concentration by generating OTDs (oxygen-correlated thermal donors) in a feed-forward process. FIG. 1B is a schematic diagram illustrating OTD concentration as a function of heating temperature at a heating period of 5 hours and at an intrinsic oxygen concentration of 4E17cm -3. FIG. 2A is a schematic block diagram illustrating a method of manufacturing a semiconductor device according to an embodiment including dissociating OTDs just prior to measurement of extrinsic dopant and intrinsic oxygen concentrations, as well as measuring a current total concentration of donors just prior to forming a predetermined number of OTDs. FIG. 2B is a schematic block diagram for illustrating a method of manufacturing a semiconductor device according to an embodiment including dissociating OTDs directly before measurement of extrinsic dopant and intrinsic oxygen concentrations and directly before forming a predetermined number of OTDs. FIG. 2C is a schematic block diagram illustrating a method of manufacturing a semiconductor device including dissociating OTDs at a known dissociation rate, according to an embodiment. FIG. 2D is a schematic block diagram illustrating a method of manufacturing a semiconductor device according to an embodiment including dissociating OTDs at a known dissociation rate without a previous generation step. FIG. 2E is a schematic block diagram for illustrating a method for manufacturing a semiconductor device according to an embodiment based on two measurements of a total dopant concentration at different times. FIG. 3A is a schematic block diagram of a method of manufacturing a semiconductor device according to an embodiment including hydrogen assisted diffusion of ODTs. FIG. 3B is a schematic diagram illustrating vertical hydrogen and oxygen correlated thermal donor gradients. FIG. 4A is a schematic vertical cross-sectional view through a power semiconductor device having a drift zone in which OTDs represent at least 25% of the total dopant concentration, according to an embodiment. FIG. 4B is a schematic diagram illustrating a vertical dopant profile through the power semiconductor device of FIG. 4A according to an embodiment concerning a field stop zone containing dopant atoms. FIG. 4C is a schematic diagram of a vertical dopant profile of the power semiconductor device of FIG. 4A according to an embodiment based on hydrogen assisted diffusion of OTDs. FIG. 5A is a schematic vertical cross-sectional view of a power semiconductor diode with OTDs representing at least 25% of a total dopant concentration in a drift zone, according to an embodiment. FIG. 5B is a schematic vertical cross-sectional view of an IGFET (insulated gate field effect transistor) with OTDs representing at least 25% of a total dopant concentration in a drift zone, according to another embodiment. FIG. 5C is a schematic vertical cross-sectional view of an IGBT (insulated gate bipolar transistor) with OTDs representing at least 25% of a total dopant concentration in a drift zone, according to another embodiment.DETAILED DESCRIPTIONIn the following detailed description, reference is made to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration specific embodiments in which the invention may be practiced. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present invention. For example, features illustrated or described for one embodiment may be used in or in conjunction with other embodiments to arrive at yet another embodiment. It is intended that the present invention cover such modifications and variations. The examples are described by means of a specific language, which should not be construed as limiting the scope of the appended claims. The drawings are not to scale and are for illustrative purposes only. Corresponding elements are denoted by the same reference numerals in the different drawings, unless stated otherwise.The terms "have," "include," "comprise," "have," and similar terms are open ended terms, and these terms indicate the presence of stated structures, elements, or features, but do not exclude additional elements or features. The indefinite articles and the definite articles are intended to include both the plural and the singular, unless the context clearly indicates otherwise.The term "electrically connected" describes a permanent low-ohmic connection between electrically connected elements, for example a direct contact between the relevant elements or a low-ohmic connection via a metal and / or a highly doped semiconductor. The term "electrically coupled" includes that one or more intervening elements suitable for signal transmission may be provided between the electrically coupled elements, for example elements controllable to temporarily provide a low impedance connection in a first state and a high impedance electrical decoupling in a second state.The figures illustrate relative doping concentrations by indicating "-" or "+" next to the doping type "n" or "p". For example, "n -" means a doping concentration lower than the doping concentration of an "n" doping region, while an "n +" doping region has a higher doping concentration than an "n" doping region. Doping regions of the same relative doping concentration do not necessarily have the same absolute doping concentration. For example, two different "n" doping regions may have the same or different absolute doping concentrations.FIG. 1A shows a semiconductor wafer 100 at various stages of processing. The material of the semiconductor wafer 100 is a crystalline semiconductor material, for example, silicon (Si), silicon carbide (SiC), germanium (Ge), a silicon germanium crystal (SiGe), gallium nitride (GaN), gallium arsenide (GaAs), or any other A III B V- semiconductor. For example, the semiconductor wafer 100 is a single crystal silicon wafer having a planar front surface 101 aand a supporting surface 102 aon the back side opposite to the front surface 101 a. The semiconductor wafer 100 may be a monocrystalline Czochralski silicon (Cz:Si) obtained by sawing a cylindrical silicon ingot pulled from a silicon melt in a crucible in a Czochralski process in the absence of magnetic fields. According to another embodiment, the semiconductor wafer is a Czochralski magnetic silicon (mZ:Si) obtained by applying a strong magnetic field that controls the convection flux in the silicon melt during extraction of the silicon ingot from the silicon melt.The shape, dimensions, and material of the semiconductor wafer 100 are compatible with production lines for silicon-based semiconductor devices. For example, the silicon wafer 100 may have an approximately cylindrical shape, wherein the diameter of the silicon wafer 100 may be at least 150 mm, e.g., 200 mm ("8 inches"), 300 mm ("12 inches") or 450 mm ("18 inches"). A thickness of the semiconductor wafer 100 may be between 100 μm and a few millimeters, for example, in a range of 500 μm to 2 mm, for example.A normal to the front side 101 adefines a vertical direction. Directions parallel to the front surface 101 aare horizontal directions.In a production line, the semiconductor wafer 100 is subjected to a sequence of processes to form electronic elements in and on the semiconductor wafer 100. At a suitable stage of processing, information regarding the extrinsic dopant concentration Dext and the intrinsic oxygen concentration Doi is obtained.The extrinsic dopant concentration Dext is the net dopant concentration resulting from the total content of donors and acceptors, for example, n-type phosphorus (P) and arsenic (As) atoms, as well as p-type boron (B) atoms, and may be in a range of 0 to 1E14 cm -3, for example, 5E12 cm -3 to 1E14 cm -3. The intrinsic oxygen concentration Doi is the concentration of interstitial oxygen dissolved in the silicon crystal. The oxygen content is sufficiently high that a sufficient number of OTDs (oxygen correlated thermal donors) can be formed, and at the same time is sufficiently low to avoid the formation of oxygen deposits. According to an embodiment, the intrinsic oxygen concentration is in a range of 2E17 cm -3 to 6E17 cm -3, for example in a range of 3E17 cm -3 to 5E17 cm -3.The extrinsic dopant concentration Dext and the intrinsic oxygen concentration Doi can be measured directly independently of one another. For example, the semiconductor wafer may be heated to a temperature at which OTDs present at an initial state of the wafer dissociate after a certain time. Prior to any further process at temperatures at which the OTDs can be regenerated, the intrinsic oxygen concentration Doi can be measured by infrared spectroscopy. At the same time, the extrinsic dopant concentration Dext can be determined by a sheet resistance measurement.The extrinsic dopant concentration Dext and the intrinsic oxygen concentration Doi may be measured at the beginning of a process sequence for forming electronic elements in the semiconductor wafer 100 or at any later stage before the semiconductor wafer 100 is separated into a plurality of identical semiconductor dies, for example, by sawing or laser cutting. Since the extrinsic dopant concentration Dext and the intrinsic oxygen concentration Doi both change only slightly along the longitudinal axis of a silicon ingot, for example a Cz:Si ingot, the measurement of both parameters in a semiconductor wafer 100 may be sufficiently representative of a number of adjacent wafers, and measurements are performed only for each nth semiconductor wafer 100, where n is an integer value greater than 1, for example greater than 5 or greater than 9 or greater than 16.From the extrinsic dopant concentration Dext and the intrinsic oxygen concentration Doi, a control unit 490 determines a process temperature gradient Tproc(t) for a heat treatment resulting in a predetermined number of OTDs such that a final total dopant concentration Dtot including both extrinsic dopants and OTDs satisfies a predetermined condition, for example, deviates from a target dopant concentration Datrg by no more than 13%, by no more than 8%, or by no more than 5%.The process temperature gradient Tproc(t) may be an isothermal gradient defined by a constant process temperature Tproc, a process time tprocduring which the process temperature Tprocappears, and falling and exiting temperature ramps before and after Tprocappears.The control unit 490 may determine the process temperature gradient Tproc(t), for example, a constant process temperature Tprocand a process time tprocfor acting on the constant process temperature Tproc, by considering both from a known OTD generation rate and information about the current content of OTDs, or alternatively assuming the absence of any OTDs. According to another embodiment, the control unit 490 determines the process temperature gradient Tproc(t) by considering an OTD dissociation rate in the semiconductor wafer 100. The effective temperature range for forming OTDs in silicon is a range from 350° C. to about 500° C., for example, from 400° C. to 500° C.The semiconductor wafer 100 may be subjected to the heat treatment in a heating chamber 470 at any later stage of processing after obtaining the information on the extrinsic dopant concentration Dext and the intrinsic oxygen concentration Doi and before the semiconductor wafer 100 is decomposed into a plurality of identical semiconductor dies. According to an embodiment, the heat treatment is performed after forming metallization layers on the first surface and on the supporting surface. The heat treatment may be an appropriate heat treatment exclusively for generating the desired number of OTDs.According to other embodiments, the heat treatment may serve a further purpose, for example for healing implantation damage or for forming ohmic metallic contacts. For example, the activation of a field stop implant can be combined with the generation of OTDs. The temperature of activation of the field stop implant may be about 450° C., where the OTD generation rate is comparatively high and the activation of protons shows only a small degree of dependence on time, so that the duration of the heat treatment may be adjusted to the desired OTD concentration.If the heat treatment is based on the generation of OTDs, a prior auxiliary heat treatment may heat the semiconductor wafer 100 to a temperature at which oxygen correlated thermal donors completely dissociate after a certain time. The auxiliary heat treatment may be carried out at temperatures exceeding 500° C., for example, 1000° C. The minimum duration of the heat treatment is a function of the temperature of the heat treatment and may be at least 10 seconds for a temperature of about 1000° C. and at least 500 minutes, for example at least 90 minutes or at least 30 minutes for a temperature close to 500° C. Then, the desired concentration is adjusted by a main heat treatment at a process temperature Tprocbetween 350° C. and 500° C. According to an embodiment, the process temperature Tproc is in a range of 420 to 480° C. to achieve a high OTD generation rate.If the heat treatment is based on a defined dissociation rate, a previous auxiliary heat treatment may heat the semiconductor wafer 100 to a temperature below the dissociation temperature to produce a stable maximum concentration of OTDs. For example, the auxiliary heat treatment may be carried out at 420° C. and may last for at least five, for example about ten hours. Then, the desired OTD concentration is adjusted by a main heat treatment at process temperatures above the dissociation temperature, for example at about 480° C. for the determined process time tproc. Unlike the generation rates that exhibit a strong dependence on the intrinsic oxygen concentration Doi, the dissociation rates are more independent of the intrinsic oxygen concentration Doi, so that the desired OTD concentration Doi can be more accurately adjusted.When a silicon crystal containing intrinsic oxygen is heated for periods of hours at temperatures between 420° C. and 480° C., formation of donors can be observed, wherein the concentration of donors increases with time and reaches a characteristic maximum after a few hours. The time to reach the maximum donor concentration increases as the oxygen concentration decreases. Heat treatment above a dissociation temperature, for example at a temperature higher than 500°C, reduces the number of donors. The current model assumes that a heat treatment above a temperature of about 420° C. begins upon agglomeration of oxygen in the silicon crystal. Heating sequentially produces oxygen clusters from monomeric oxygen to dimeric oxygen to trimeric oxygen and to additional oxygen clusters containing five or eight and more oxygen atoms. There are dynamic balances between the various oxygen clusters, depending on the current temperature. Some of the oxygen clusters are electrically active donors.In the method of FIG. 1A, feed-forward control completes an original background donor concentration to a desired target donor concentration by filling a gap between a target dopant concentration Datrg and the extrinsic dopant concentration Dext with OTDs. The feed-forward control allows the use of semiconductor wafers 100 with a comparatively high variance with respect to the original extrinsic dopant concentration. For example, the method allows the use of Cz:Si or mZ:Si, both of which have a strong gradient of extrinsic doping concentration along the axial rod position, for the manufacture of power semiconductor devices for high reverse voltages, wherein the power semiconductor devices can be manufactured without epitaxy. Since the extrinsic dopant and intrinsic oxygen concentrations vary only slightly along a longitudinal axis of a silicon ingot, both values may be measured only for semiconductor wafers 100 formed from remote parts of the same silicon ingot, and the values for semiconductor wafers from central parts of the silicon ingot may be interpolated from the measured values.In FIG. 1B, a gradient 602 shows the concentration DOTDof acid-correlated thermal donors with respect to a heating temperature in degrees Kelvin for a process time tprocof 5 hours and at an intrinsic oxygen concentration Doiof 4E17 cm -3. From the gradient 602, it can be concluded that for a measured extrinsic dopant concentration of 1E13 cm -3 a heat treatment lasting for 5 hours at a temperature of 650° K generates an OTD concentration DOTDof 1E13 cm -3 to obtain a total dopant concentration Dtotof 2E13 cm -3. The gradient 602 of FIG. 1B and other known gradients for isochronous and / or isothermal annealing may form the basis on which an estimation process in the central processing unit 490 determines an appropriate process temperature gradient Tproc(t).FIG. 2A relates to an embodiment based on a direct measurement of the extrinsic dopant concentration Dext and the intrinsic oxygen concentration Doi.A first heat treatment at a temperature above the dissociation temperature of the OTDs, for example above 500° C., dissolves possible OTDs in the semiconductor wafer 100 in a first heat chamber 410. As a result, a subsequent measurement of the extrinsic dopant concentration Dext at a first inspection station 420 is not affected by any OTDs. The first monitoring station 420 may measure the extrinsic dopant concentration Dext and the intrinsic oxygen concentration Doi. Then, a series of processes for forming electronic elements in and on the semiconductor wafer 100 may be performed in a production line 430. The first or another, second monitoring station 420 may measure the current total dopant concentration Dtot 1, where the current total dopant concentration Dtot 1 includes the extrinsic dopants as well as OTDs formed during the processes performed in the production line 430.Based on Dext, Doi, Dtot1and the appropriate generation rates for OTDs, the controller 490 determines the process temperature gradient Tproc(t) for generating a sufficient number of OTDs to obtain a target dopant concentration Datrg.The first or other thermal chamber 470 applies the process temperature gradient Tproc(t) to the semiconductor wafer 100. At the end of the heat treatment in the thermal chamber 470, the semiconductor wafer 100 contains a final total dopant concentration Dtot including extrinsic dopants and OTDs that deviates from the target donor concentration Datrg by no more than 13%, for example by no more than 8% or by no more than 5%, for example by no more than 2%.The method illustrated in FIG. 2B replaces the measurement of the current total dopant concentration Dtot1with an auxiliary heat treatment in the heat chamber 470 to dissociate any OTDs that may have been formed during the formation of electronic elements in the production line 430. The auxiliary heat treatment applies a temperature above the dissociation temperature of thermal donors, for example a temperature above 500°C. The length of time of the auxiliary heat treatment is a function of temperature. An auxiliary heat treatment at about 500° C. may last for at least 300 or 100 minutes, while a heat treatment at 1000° C. may last less than one minute and more than about 10 seconds.The auxiliary heat treatment may be a separate heat treatment exclusively used for dissociation of the OTDs. According to other embodiments, the heat treatment may serve a further purpose. For example, a heat treatment for healing implantation damage or for forming ohmic metallic contacts may dissociate OTDs that may be formed up to this time. According to an embodiment, a heat treatment for controlling a reflux of an interlayer dielectric based on a silicate glass such as BSG (borosilicate glass), PSG (phosphosilicate glass), or BPSG (borophosphosilicate glass) is effective as the auxiliary heat treatment and dissociates the OTDs present at this time.While the foregoing embodiments rely on knowledge of the OTD generation rates, the method illustrated in FIG. 2C relies on knowledge of the dissociation rates.An auxiliary heat treatment in the heat chamber 470 at a temperature below the dissociation temperature produces a stable maximum concentration of OTDs. For example, the auxiliary heat treatment may be carried out at 420° C. and takes at least five hours, for example, about ten hours. A subsequent main heat treatment at process temperatures above the dissociation temperature, for example at a process temperature of at least 480° C. for a specific process time tprocsets the desired OTD concentration Doi. Since the dissociation rates are more independent of the intrinsic oxygen concentration Doi than the generation rates, the desired OTD concentration DOTD as well as the final total dopant concentration Dtot can be more accurately adjusted.The process in FIG. 2D differs from the process of FIG. 2C in that, instead of an auxiliary heat treatment, a reflux of an interlayer dielectric based on a silicate glass possibly dissociates previously formed OTDs.The method illustrated in FIG. 2E relates to two successive measurements of the total dopant concentration Dtot 1, Dtot 2, wherein a significant thermal budget between 420° C. and 470° C. acts on the semiconductor wafer 100 between the two measurements. The first measurement of the total dopant concentration Dtot 1 may be taken at a first monitoring station 421 at the beginning of a production line after the semiconductor wafer 100 has passed a first portion 431 of the production line for forming electronic elements on the semiconductor wafer 100, or for example after a process applying a temperature above the dissociation temperature. The second measurement of a second total dopant concentration Dtot 2 may be taken at the first or a second monitoring station 422 after the semiconductor wafer 100 has passed through a second portion 132, which may be an end portion of sequences of processes for forming electronic elements on the semiconductor wafer 100.The central unit 490 receives both measurement results Dtot 1, Dtot 2 and also receives information about the time that the semiconductor wafer 100 has been exposed to temperatures in a range of 350° C. to 500° C. or, for example, between 400° C. and 480° C. By analyzing a correlation between the OTD concentration and the applied thermal budget ΣTBin the thermal span of interest during the second portion of the production line 432, the controller 490 has available information equivalent to the extrinsic dopant concentration information Dextand the intrinsic oxygen concentration Doito generate a process temperature gradient Tproc(t) for generating a desired number of OTDs.The embodiment of FIG. 3A includes proton implantation in an implantation chamber 440 and may be combined with any of the processes of FIGS. 2A to 2E. Proton implantation may be performed at any stage before the beginning of processing in the production line 430 to the end. Proton implantation may be an associated process to assist in the formation of OTDs or may serve a further purpose, for example the formation of doped regions such as a field stop zone due to HDs (hydrogen correlated donors). Proton implantation can significantly reduce a process time and cost by increasing the OTD generation rate.The implanted hydrogen atoms and the intrinsic oxygen atoms may cooperate to mutually promote diffusion in the silicon crystal, the oxygen atoms locally damaging the silicon lattice, the crystal lattice defects produced promoting diffusion of hydrogen atoms, and hydrogen atoms forming complexes with silicon atoms which in turn promote further diffusion of oxygen atoms. In layers with increased hydrogen content, the hydrogen can smooth radial changes in the intrinsic oxygen distribution.In FIG. 3B, a hydrogen concentration DHand a total dopant concentration Dtotin a semiconductor wafer 100 are plotted against a distance d from the supporting surface 102 a. A first hydrogen profile 611 in the semiconductor wafer 100 of FIG. 3A results from a short hydrogen diffusion of electrically inactive hydrogen due to the hydrogen. A first total dopant profile 621 exhibits a peak 621 aresulting from hydrogen correlated donors around an implantation depth of hydrogen implantation within a field stop layer 178. The first total dopant profile 621 further shows a high plateau 621 bin a first part 171 aof a drift layer 171 closest to the field stop layer 178 where the presence of hydrogen accelerates the formation of OTDs and a low plateau 621 cin a second part 171 bof the drift layer 171 where hydrogen is absent. A second hydrogen profile 612 results from a long hydrogen diffusion of the electrically inactive hydrogen, which may be due to the hydrogen implantation. A second total dopant profile 622 exhibits a longer high plateau 622 bwhere the presence of hydrogen accelerates the formation of OTDs.FIG. 4A illustrates a power semiconductor device 500. A single crystal semiconductor material, for example silicon, forms a semiconductor portion 100 zhaving a planar first surface 101 on a front side and a planar second surface 102 parallel to the first surface 101 on the back side opposite the front side.A minimum distance between the first and second surfaces 101, 102 depends on the voltage blocking capability of the power semiconductor device 500. For example, the distance between the first and second surfaces 101, 102 may be in a range of 90 μm to 200 μm if the power semiconductor device 500 is specified for a blocking voltage of about 1200 V. Other embodiments related to power semiconductor devices with higher blocking capabilities may provide semiconductor portions 100 zhaving a thickness up to a few 100 μm.In a plane parallel to the first surface 101, the semiconductor part 100 zmay have a rectangular shape having an edge length in the range of a few millimeters or a circular shape having a diameter of a few centimeters. Directions parallel to the first surface 101 are horizontal directions, and directions perpendicular to the first surface 101 are vertical directions.The semiconductor portion 100 zcomprises a doped region 115 or a plurality of first doped regions 115 electrically connected to a first load terminal L 1. A highly doped contact layer 129 is formed along the second surface 102 and is electrically connected to a second load terminal L 2.A lightly doped drift zone 121 forms one or more pn junctions pn 1 with the one or more first doped regions 115. An effective dopant concentration in the drift zone 121 may be at least 1E12 cm -3 and at most 1E17 cm -3, typically in the range between 1E13 cm -3 and 4E14 cm -3. The doping in the drift zone 121 may correspond to an initial background doping in the semiconductor portion 100 z. At least 25%, for example at least 50%, of the donors in the drift zone 121 are OTDs. The further donors in the drift zone 121 may be hydrogen-correlated donors or extrinsic or impurity dopant atoms, such as arsenic and / or phosphorus atoms.A field stop zone 128 may separate the contact layer 129 and the drift zone 121 and forms either a unipolar homojunction or a pn junction with the contact layer 129 and a unipolar homojunction with the drift zone 121. The field stop zone 128 may include HDs based on an implantation of light ions, for example protons, and / or extrinsic dopant atoms, such as phosphorus and arsenic atoms.FIG. 4B shows a vertical dopant profile 630 along a line B-B of FIG. 4A.The contact layer 129 can be n-doped or p-doped or can contain zones of both conductivity types. The dopant concentration in the contact layer 129 along the second surface 102 is sufficiently high to form an ohmic contact with a load electrode directly adjacent to the second surface 102. For example, an n-doped contact layer 129 may have a net average dopant concentration in a range of 1E18 cm -3 to 1E20 cm -3, for example, 5E18 cm -3 to 5E19 cm -3. The predominant dopants in the contact layer 129 may be extrinsic dopant atoms, such as boron (B) atoms, arsenic (As) atoms, or phosphorus (P) atoms.In the field stop zone 128, the average net dopant concentration is at most 10% of the maximum dopant concentration in the contact layer 129. For example, the average dopant concentration in the field stop zone 128 may be in a range of 1E15 cm -3 to 1E18 cm -3, for example, 1E16 cm -3 to 5E17 cm -3, as an example. The vertical extension of the field stop zone 128 may be in a range from 1 μm to 20 μm, for example from 2 μm to 10 μm. The predominant dopants in the field stop zone 128 may be extrinsic dopants or HDs.In the drift zone 121, the net average dopant concentration is in a range from 1E12cm -3 to 1E17cm -3, for example in a range from 3E12to 5E15or from 1E14cm -3 to 5E15cm -3. In the drift zone 121, the ratio of the OTDs to the dopants is altogether at least 25%, for example at least 50%. The further dopants in the drift zone 121 may be extrinsic dopants or HDs. The vertical dopant profile 630 may show steps along the transitions between the contact layer 129 and the field stop zone 128 as well as between the field stop zone 128 and the drift zone 121.FIG. 4C shows a hydrogen concentration DH and a total dopant concentration Dtot in a power semiconductor device having a field stop zone 128 due to hydrogen implantation against a distance d to the second surface 102 and having a vertical total dopant profile 631 due to hydrogen assisted diffusion of OTDs. For example, when the semiconductor device 500 is a semiconductor switching device such as a PT-IGBT (punch-through IGBT) and turns off, a depletion zone over which the reverse voltage drops gradually expands, starting expansion from a pn junction pn 1 on the right-handed side of the diagram.The field stop zone 128 prevents the depletion zone and the electric field in the gradually expanding depletion zone from reaching an electrode at d=0 at the rear side or a rear side emitter. When the electric field extends in the direction of the rear side, the power semiconductor device 500 may continuously supply carriers from the contact layer 129 to support an external current flow.When extrinsic dopant atoms, such as arsenic or phosphorus atoms, are used as dopants in the field stop zone 128, the diffusion properties of the extrinsic dopant atoms result in smooth, Gaussian-like dopant profiles. Since the number of movable carriers is high where the number of stationary carriers such as dopant atoms in the field stop zone 128 is low due to a higher emitter efficiency and vice versa, as the depletion zone expands, the number of free carriers available to sustain an external current continuously increases and the step speed of such PT-IGBTs is low. However, out-diffusion of dopant atoms implanted from a back side requires a thermal budget that can destroy structures and dopant gradients in previously formed doped zones on the front side of the PT IGBT.Alternatively, the field stop zones 128 may be formed by generating HDs after completion of processing at the front side. However, conventional light ion implantations from the back side show steep HD profile transitions on the drift zone 121 side, such steep transitions tend to degrade switching performance.According to the embodiment of FIG. 4C, hydrogen is diffused into the field stop zone 128 and an adjacent first part 121 aof the drift zone 121. The hydrogen promotes the formation of OTDs.FIG. 4C shows that the hydrogen assisted formation of OTDs may result in a more gradual transition of the OTD concentration, such that the semiconductor device 500 may gradually resolve the electric field at an early point in time after the switching process is triggered. As the depletion zone gradually extends in a smooth, less abrupt manner, the hydrogen assisted formation of OTDs may improve the responsiveness of the semiconductor device 500 at a given total thickness of the semiconductor device 500. The charge carriers outside the expanding depletion zone are continuously available to supply a current induced by external circuit elements.Hydrogen assisted formation of OTDs allows combining the formation of the field stop zones 128 from the back side to a late process stage with a gradual transition of effective dopant concentrations between the contact layer 129 and the drift zone 121.FIG. 5A shows a power semiconductor diode 501 having a rated forward current greater than 1000 mA, for example greater than 10 A or greater than 100 A, based on the semiconductor device 500 of FIG. 4A. The first doped region 115 forms an ohmic contact with a first load electrode 310 at the front side. The first load electrode 310 forms an anode terminal A or is electrically connected thereto. The heavily doped contact layer 129 forms an ohmic contact with a second load electrode 320 on the back side. The second load electrode 320 forms a cathode terminal K or is electrically connected thereto.FIG. 5B relates to an IGFET 502. For details of the semiconductor portion 100z, the drift zone 121, the field stop zone 128, the contact layer 129 functioning as a drain and the vertical dopant profile, reference is made to the description of Figures 4A to 4C and 5A. The IGFET 502 comprises transistor cells TC, which may be IGFET cells with n-doped source zones and with the first doped regions 115 forming body zones of the transistor cells TC. The body zones respectively separate the source zones from the drift zone 121. The source regions may be electrically connected or coupled to a first load electrode at the front side. The first load electrode may form a source terminal S or may be electrically connected thereto.Gate electrodes of the transistor cells TC may be electrically connected or coupled to a gate terminal G and may be capacitively coupled to the body zones through gate dielectrics. Depending on a voltage applied to the gate terminal G, inversion channels are formed in the body zones and provide an electron flow through the transistor cells TC, such that in an on-state of the IGFET 502 electrons enter the drift zone 121 through the transistor cells TC.The transistor cells TC may be planar cells having lateral gate structures arranged outside the contour of the semiconductor portion 100 z, or trench cells having trench gate structures extending from the first surface 101 into the semiconductor portion 100 z. For example, the source and body zones of the transistor cells TC may be formed in semiconductor mesas separated by the trench gate structures.FIG. 5C relates to an IGBT 503, for example a PT-IGBT, having a p-type contact layer 129 and the second load electrode 320 electrically connected to a collector terminal C. The source and body zones are electrically connected or coupled to an emitter terminal E. For further details, reference is made to the description of the power semiconductor diode 501 of FIG. 5A and the IGFET 502 of FIG. 5B.Although specific embodiments are illustrated and described herein, it will be understood by those skilled in the art that a variety of alternative and / or equivalent implementations may be utilized for the specific embodiments shown and described without departing from the scope of the present invention. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Therefore, it is intended that this invention be limited only by the claims and their equivalents.

Claims

A method of manufacturing a semiconductor device, the method comprising: determining information indicative of an extrinsic dopant concentration (Dext) and information indicative of an intrinsic oxygen concentration (Doi) in a semiconductor wafer (100), and based on the information about the extrinsic dopant concentration (Dext) and the intrinsic oxygen concentration (Doi) and a generation rate or a dissociation rate of oxygen-correlated thermal donors in the semiconductor wafer (100), determining a process temperature gradient (Tproc(t)) for generating or dissociation of oxygen-correlated thermal donors to compensate a difference between a target dopant concentration (Dtarg) and the extrinsic dopant concentration (Dext), wherein the extrinsic dopant concentration (Dext) is of the n-type dopant, and subjecting the semiconductor wafer (100) to a main heat treatment applying the process temperature gradient (Tproc(t)).The method of claim 1, wherein determining the intrinsic oxygen concentration (Doi) comprises measuring the intrinsic oxygen content after a heat treatment that dissociates oxygen correlated thermal donors and before heating the semiconductor wafer (100) to a temperature beyond 350°C.The method of any of claims 1 to 2, wherein determining the extrinsic dopant concentration (Dext) comprises dissociation of oxygen-correlated donors by heating the semiconductor wafer (100) to a temperature higher than 480°C and measuring the extrinsic dopant concentration (Dext) after dissociation of the oxygen-correlated thermal donors and before heating the semiconductor wafer (100) to a temperature beyond 350°C.The method of any of claims 1 to 3, wherein determining the extrinsic dopant concentration (Dext) and the intrinsic oxygen concentration (Doi) comprises measuring a first total dopant concentration (Dtot1), then heating the semiconductor wafer (100) to a temperature higher than 350°C, measuring a second total dopant concentration (Dtot2) after the heating, and determining the extrinsic dopant concentration (Dext) and the intrinsic oxygen concentration (Doi) based on a difference between the first and second total dopant concentrations (Dtot1, Dtot2) and parameters of the heating.The method of any of claims 1 to 4, further comprising: measuring a first total dopant concentration (Dtot1); and determining the process temperature gradient (Tproc(t)) based on a difference between the first total dopant concentration (Dtot1) and the extrinsic dopant concentration (Dext).The method according to any of claims 1 to 5, wherein the process temperature gradient (Tproc(t)) is determined based on the generation rate of oxygen correlated thermal donors in the semiconductor wafer (100).The method of claim 6, further comprising: dissociation of oxygen-correlated thermal donors in an auxiliary heating process prior to subjecting the semiconductor wafer (100) to a main heat treatment applying the process temperature gradient (Tproc(t)).Method according to one of claims 1 to 5, wherein the process temperature gradient (Tproc(t)) is determined on the basis of a dissociation rate of oxygen-correlated thermal donors in the semiconductor wafer (100).The method of claim 8, further comprising: generating a maximum concentration of oxygen-correlated thermal donors in an auxiliary thermal process prior to subjecting the semiconductor wafer (100) to a main thermal treatment applying the process temperature gradient (Tproc(t)).Method according to one of Claims 1 to 9, in which the process temperature gradient (Tproc(t)) is an isothermal process which is given by a constant process temperature and a process time for which the process temperature is present.The method of claim 1, further comprising: forming an interlayer dielectric on a front side of the semiconductor wafer (100) before subjecting the semiconductor wafer (100) to the main heat treatment.The method of any one of claims 1 to 11, further comprising: forming a plurality of separate semiconductor dies from the semiconductor wafer (100) after subjecting the semiconductor wafer (100) to the main heat treatment.The method of any of claims 1 to 12, wherein after the main heat treatment, at least 25% of the donors in the semiconductor wafer (100) are oxygen correlated thermal donors.The method of any one of claims 1 to 13, further comprising: forming transistor cells (TC) in the semiconductor wafer (100).The method according to any one of claims 1 to 14, wherein the intrinsic oxygen concentration (Doi) is in a range of 2E17 cm -3 to 6E17 cm -3.The method of any of claims 1 to 15, further comprising: prior to generating the oxygen-correlated donors, implanting protons to form a field-stop layer (178) in the semiconductor wafer (100).The method of claim 16, wherein the main heat treatment applying the process temperature gradient (Tproc(t)) additionally activates the implanted protons of the field stop layer (178).A semiconductor device, comprising: a semiconductor portion (100z) comprising a first doped region (115), wherein the first doped region (115) is electrically connected to a first load terminal (L1), and a drift zone (121), wherein the drift zone (121) and the first doped region (115) form a pn-junction, and the drift zone (121) has a total dopant concentration in the range of 1E12 cm -3 to 1E17 cm -3 wherein a ratio of oxygen correlated thermal donors to a total sum of extrinsic donors and the oxygen correlated thermal donors is at least 25%.The semiconductor device of claim 18, wherein the ratio of the intrinsic oxygen-correlated thermal donors to a total sum of extrinsic donors and the oxygen-correlated thermal donors is at least 50%.The semiconductor device of any of claims 18 to 19, further comprising: a field stop zone (128) forming a unipolar homojunction with the drift zone (121), wherein the field stop zone (128) contains predominantly hydrogen correlated donors.The semiconductor device according to claim 20, wherein the drift zone (121) comprises a first part (121a) directly adjacent to the field stop zone (128) and a second part (121b) separated from the field stop zone (128) by the first part (121a), wherein the first part (121a) contains more hydrogen- and more oxygen-correlated thermal donors than the second part (122a).

Images