Power semiconductor device

Abstract

A power semiconductor device comprising: a metallic conductor frame (2) comprising opposing main surfaces, one of which is a mounting surface (2a) and the other a discharge surface (2b), and comprising a P-potential electrode (21), intermediate potential electrodes (22a, 22b) and an N-potential electrode (23) which are electrically independent; a switchable power semiconductor chip (3, 3a, 3b, 3c, 3d) and a current detection resistor (4) which is connected to the mounting surface (2a) of the conductor frame (2) via a conductive connecting element (5a); a conductor element (6, 6a, 6b, 6c) which connects an electrode of the power semiconductor chip (3, 3a, 3b, 3c, 3b) to a section of the conductor frame (2); and a resin (7) which covers a section of the mounting surface (2a) of the conductor frame (2), the power semiconductor chip (3, 3a, 3b, 3c, 3b), the resistor (4) and the conductor element (6, 6a, 6b, 6c), wherein the P-potential electrode (21) and the N-potential electrode (23) are positioned on a center line (C) of the conductor frame (2) and the conductor frame (2), the power semiconductor chip (3, 3a, 3b, 3c, 3d), the conductor element (6, 6a, 6b, 6c) and the resistor (4) are positioned symmetrically with respect to the center line (C).

Description

Background of the inventionField of the invention

[0001] The present invention relates to a power semiconductor device having a switchable power semiconductor chip mounted on a lead frame. Description of the state of the art

[0002] A power semiconductor device is configured to mount a switchable power semiconductor chip on a mounting surface of a lead frame formed in a conductive pattern and seal it with a molding resin. The power semiconductor device is used as a single unit or as a plurality of units in combination in a power conversion circuit incorporated into various products, including transportation devices and home electrical appliances.

[0003] When energized, the power semiconductor chip generates heat, causing its temperature to rise. The current flowing into the power semiconductor chip must then be controlled so that the temperature does not exceed a predetermined allowable temperature. Specifically, preventing a momentary temperature increase of the power semiconductor chip when energized prevents the current flowing into the power semiconductor chip from increasing, thus increasing the efficiency of the power conversion circuit.

[0004] For automotive equipment, the performance of the power conversion circuit affects the amount of torque needed to drive a motor or the power generated by a motor. In such equipment, a large amount of current can flow, reaching several hundred A in a short period of time. Therefore, preventing a temporary temperature increase in the power semiconductor chip when a large amount of current flows through it is one of the most important factors for the product's operation.

[0005] As a structure for preventing a temperature increase of the power semiconductor chip, for example, PTL 1 provides a semiconductor power module in which a metallized surface of a semiconductor chip is soldered to a heat diffusion plate. In this example, a heat diffusion plate formed from a copper-containing sintered compact and a copper plate is used to improve the heat dissipation capability of the semiconductor power module at a lower cost than one using a highly thermally conductive ceramic substrate.

[0006] [PTL 1] JP 4 030 930 B2

[0007] However, in the structure shown in PTL 1, where the heat diffusion plate is provided below the semiconductor chip, variations in the thickness of the solder joints on the top and bottom surfaces of the heat diffusion plate cause variations in the height of the semiconductor chip, increasing variations in thermal resistance. To prevent problems or failure during use, product design must be based on the thermal resistance at a location where variations in height are greatest, which poses a problem of limiting product performance.

[0008] Furthermore, providing the heat diffusion plate poses the problem of increasing material costs and module size. Furthermore, the solder joints on the top and bottom of the heat diffusion plate serve as a through-channel through which current flows. Therefore, variations in the shape of the solder joints must be avoided, which poses a problem of reduced productivity.

[0009] US 2015 / 0 162 808 A1 teaches a rotating electrical machine with a power converter.

[0010] US 6 933 593 B2 shows a power module comprising a molded housing with a frame formed in a mold body and a plurality of power semiconductor devices arranged directly on the die pads of the lead frame.

[0011] DE 10 2011 050 405 A1 discloses a semiconductor module device and drive device having the same.

[0012] JP 2009- 129 952 A is about improving the reliability of a semiconductor device in which a semiconductor element is mounted on a lead frame. Summary of the invention

[0013] To solve the above problem, it is an object of the present invention to provide a power semiconductor device which can prevent a momentary temperature rise of a power semiconductor chip when energized without increasing a material cost and a device size.

[0014] The power semiconductor device according to the present invention comprises all features according to claim 1. Further advantageous embodiments emerge from claims 2-17.

[0015] According to the invention, heat generated from the power semiconductor chip connected to the P-potential electrode is transferred to the first heat mass portion, which can provide the power semiconductor device that can prevent a momentary temperature increase of the power semiconductor chip when energized without increasing the material cost and the device size.

[0016] The above and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when considered in conjunction with the accompanying drawings. Short description of the characters Fig. 1 is an internal perspective schematic view of a power semiconductor device according to a first embodiment of the invention; Fig. 2 is a cross-sectional view of the power semiconductor device according to the first embodiment of the invention; Fig. 3 is an equivalent circuit diagram of a power conversion circuit including the power semiconductor device according to the first embodiment of the invention; Fig. 4 is an internal perspective schematic view of a power semiconductor device according to a second embodiment of the invention; Fig. 5 is an internal perspective schematic view of a power semiconductor device according to a third embodiment of the invention; Fig. 6 is an internal perspective schematic view of a power semiconductor device according to a fourth embodiment of the invention; and Fig. 7 is a cross-sectional view of a power semiconductor device according to a fifth embodiment of the invention. Detailed Description of the Preferred Embodiments (First Embodiment)

[0017] A power semiconductor device according to a first embodiment of the invention will be described below with reference to the figures. Fig. 1 is an internal perspective schematic view of the power semiconductor device according to the first embodiment. Fig. 2 is a partial cross-sectional view taken along the line AA in Fig. 1 is taken. Fig. Figure 3 is an equivalent circuit diagram of a power conversion circuit including the power semiconductor device according to the first embodiment. Note that the same or corresponding components are denoted by the same reference numerals throughout the figures.

[0018] A power semiconductor device 1 according to the first embodiment includes a metal lead frame 2 formed in a conductive pattern; switchable top-side power semiconductor chips 3a, 3b and bottom-side power semiconductor chips 3c, 3d (collectively referred to as a power semiconductor chip 3); a current detection resistor 4; conductive connecting members 5a, 5b such as solder; a metal inner lead 6 as a conductive member (wiring member); and a molding resin 7, which is a resin covering the above components.

[0019] The lead frame 2 includes opposing main surfaces, one of which is a mounting surface 2a and the other of which is a discharging surface 2b. The lead frame 2 includes a P-type potential electrode 21, intermediate potential electrodes 22a, 22b, and an N-type potential electrode 23, which are electrically independent. The power semiconductor chip 3 and the current detection resistor 4 are connected to the mounting surface 2a of the lead frame 2 via the conductive connecting element 5a.

[0020] The power semiconductor device 1 comprises: two top-side power semiconductor chips 3a, 3b for a three-phase AC circuit at the P-potential electrode 21, and the bottom-side power semiconductor chips 3c, 3d for the three-phase AC circuit at the two intermediate potential electrodes 22a (a first intermediate potential electrode). This forms two phases of the three-phase AC circuit, as shown in Fig. 3. Using three of the power semiconductor devices 1, a six-phase power conversion circuit or a power conversion circuit comprising two three-phase AC circuits in parallel can be formed.

[0021] As in Fig. 1, in the power semiconductor device 1, the P-potential electrode 21 and the N-potential electrode 23 are positioned on a center line C of the lead frame 2, and the lead frame 2, the power semiconductor chip 3, the inner lead 6, and the resistor 4 are positioned symmetrically with respect to the center line C.

[0022] This causes the heat capacity and temperature distribution within the power semiconductor device 1 to be symmetrical with respect to the center line C. In particular, positioning a plurality of the power semiconductor chips 3 symmetrically with respect to the center line C can reduce the temperature difference between the power semiconductor chips 3. A current flowing into the power semiconductor device 1 is adjusted such that the temperature of a power semiconductor chip 3 that heats up to the highest temperature will not exceed the allowable value. Then, by reducing the temperature difference between the power semiconductor chips 3, the allowable value of the output power of the power semiconductor device 1 increases.

[0023] The P-potential electrode 21 includes a die mounting portion 21a, in which the mounting surface 2a with the two top-side power semiconductor chips 3a, 3b mounted thereon is positioned within the mold resin 7; and a first thermal mass portion 21b provided adjacent to the die mounting portion 21a and positioned outside the mold resin 7. Furthermore, the P-potential electrode 21 includes a second thermal mass portion 21c opposite the first thermal mass portion 21b with the die mounting portion 21a therebetween, and the mounting surface 2a of the second thermal mass portion 21c is positioned within the mold resin 7.

[0024] As in Fig. As shown in FIG. 2, the dissipation surface 2b of the lead frame 2 is bonded to a heat sink 9 via an insulating adhesive 8, which is an insulating bonding member. The insulating adhesive 8 contains ceramic fillers with high thermal conductivity. This secures the power semiconductor device 1 while achieving both insulation and dissipation properties. Likewise, the first heat mass portion 21b and the second heat mass portion 21c are bonded to the heat sink 9 via the insulating adhesive 8.

[0025] In this way, providing the second heat mass portion 21c inside the mold resin 7 in addition to the first heat mass portion 21b positioned outside the mold resin 7 improves the effect of preventing a momentary temperature increase of the top-side power semiconductor chips 3a, 3b attached to the chip attaching portion 21a of the P-potential electrode 21 when energized.

[0026] Likewise, when a temporary temperature rise occurs, the temperature distribution of the power semiconductor chip 3 is such that the temperature on the side of the power semiconductor chip 3 near the thermal mass portions is lower when there is no external influence. Then, providing the first thermal mass portion 21b and the second thermal mass portion 21c with the chip mounting portion 21a therebetween can prevent distortion of the temperature distribution of the top-side power semiconductor chips 3a, 3b from occurring.

[0027] It is noted that the mounting surface 2a of the first heat mass portion 21b and the second heat mass portion 21c preferably has an area of ​​20 mm 2or more. This ensures that a sufficient area is provided for transferring heat to the cooling element 9 via the insulating adhesive 8, which provides the effect of preventing a momentary temperature increase when energized and provides the effect of constantly reducing thermal resistance.

[0028] On the other hand, for the bottom-side power semiconductor chips 3c, 3d mounted on the intermediate potential electrode 22a, the current detection resistor 4 functions as a heat mass portion. The metallic resistor 4, such as a shunt resistor, is connected to an electrode on the lead frame 2 via the conductive connecting element 5a and positioned between the power semiconductor device 1 and a motor 10, as shown in FIG. Fig. 3 shown.

[0029] The intermediate potential electrode 22a is electrically connected to the intermediate potential electrode 22b (a second intermediate potential electrode) through the metallic resistor 4. The intermediate potential electrode 22b does not have the power semiconductor chip 3 mounted thereon and is connected to an external electrode. The resistor 4 will be described in detail later.

[0030] Resistor 4 is mounted near the bottom-side power semiconductor chips 3c, 3d mounted on the intermediate potential electrode 22a and acts as a heat mass for heat generated by the bottom-side power semiconductor chips 3c, 3d. This reduces the temperature difference between the top-side power semiconductor chips 3a, 3b mounted on the P-potential electrode 21 and the bottom-side power semiconductor chips 3c, 3d mounted on the intermediate potential electrode 22a.

[0031] Furthermore, the metallic inner lead 6, used as a conduction element, acts as a heat mass for heat generated by the power semiconductor chip 3, further enhancing the effect of preventing a temperature increase of the power semiconductor chip 3. The inner lead 6 is in contact with the mold resin 7 except for the portion connected to the electrodes via the conductive connecting element 5b. The mold resin 7 contains insulating fillers for transferring heat generated by the power semiconductor chip 3 to the outside.

[0032] A manufacturing method, construction material, dimensions, and the like of the power semiconductor device 1 according to the first embodiment will be described below with reference to an example. The lead frame 2 is formed by etching and pressing a connecting plate containing copper or aluminum or the like as a base material and forming the plate into a conductive pattern. On the surface of the lead frame, the material metal may be exposed or partially coated.

[0033] The power semiconductor chip 3 and the resistor 4 are mounted on the mounting surface 2a of the lead frame 2, then covered with the molding resin 7 by transfer molding, and then an unwanted part of the lead frame 2 is separated. This forms the P-potential electrode 21, the intermediate potential electrodes 22a, 22b, and the N-potential electrode 23.

[0034] The lead frame 2 preferably has a thickness of 0.4 mm or more. Using the lead frame 2 with a thickness of 0.4 mm or more causes heat to be efficiently transferred to the first thermal mass portion 21b, providing the effect of suppressing a momentary temperature increase of the top-side power semiconductor chips 3a, 3b.

[0035] The power semiconductor chip 3 is, for example, a metal-oxide-semiconductor field-effect transistor (MOSFET), an insulated-gate bipolar transistor (IGBT), or something similar. The base material of the power semiconductor chip 3 is Si, SiC, SiN, GaN, GaAs, or something similar.

[0036] The power semiconductor chip 3 includes an upper surface electrode, a gate portion, and a gate electrode on the upper surface of the chip, and a lower surface electrode on the lower surface of the chip, none of which are shown. The gate electrode is electrically connected to a gate terminal formed from a portion of the lead frame 2 by wire bonding (not shown). The upper surface electrode is connected to an electrode on the lead frame 2 through the inner lead 6. When the upper surface electrode is connected to the inner lead 6 by soldering, the upper surface electrode is suitable for soldering by Ni plating.

[0037] The resistor 4 has two end portions formed from a mixture containing copper as a base material, and a center portion formed from a metallic resistor body with a thermal conductivity of 20 W / m·k or more. A base material with high heat capacity and high thermal conductivity is used for both end portions of the resistor 4, improving thermal mass performance. Furthermore, the center portion resistor body of the resistor 4 is made of a metal with high thermal conductivity, allowing heat generated by the bottom-side power semiconductor chips 3c, 3d mounted on the intermediate potential electrode 22a to be efficiently transferred to the intermediate potential electrode 22b via the resistor 4.

[0038] When a solder material is used as the conductive connecting element 5a, 5b, the upper surface electrode of the power semiconductor chip 3 is connected to the inner lead 6, the lower surface electrode is connected to the lead frame 2, and the resistor 4 is connected to the lead frame 2, simultaneously through heat treatment using a reflow device. Note that if a difference in durability of the solder joints occurs due to deformation caused by a temperature change when the power semiconductor device 1 is used, a solder material with a different composition may also be used for each solder joint.

[0039] The body of the inner lead 6 is deformed to face away from the lead frame 2 to prevent a short circuit with the lead frame 2. The cross-sectional area of ​​the body of the inner lead 6 is determined depending on the current flowing therethrough. The power semiconductor device 1 according to the first embodiment allows a current of several amperes to several hundred A or so, including a directly applied current, to flow therethrough.

[0040] The lead 6 has a thickness of 0.5 mm or more at a minimum, which provides the effect of preventing a momentary temperature increase of the power semiconductor chip 3 and can ensure the rigidity of the inner lead 6 to prevent failure due to deformation of the inner lead 6 from occurring.

[0041] By using a plurality of the inner leads 6 having the same shape and size, a heat mass having the same heat capacity is provided to all the power semiconductor chips 3, which can reduce the temperature difference between the power semiconductor chips 3.

[0042] Alternatively, the minimum thickness value of the inner line 6 connected to the top-side power semiconductor chips 3a, 3b attached to the P-potential electrode 21 may be at least different from the minimum thickness value of the inner line 6 connected to the bottom-side power semiconductor chips 3c, 3d attached to the intermediate potential electrode 92a.

[0043] In particular, for the top-side power semiconductor chips 3a, 3b mounted on the P-potential electrode 21, the first thermal mass portion 21b and the second thermal mass portion 21c prevent a temperature increase, whereas for the bottom-side power semiconductor chips 3c, 3d mounted on the intermediate potential electrode 22a, only the resistor 4 functions as a thermal mass. Thus, increasing the thermal capacity of the inner lead 6 connected to the bottom-side power semiconductor chips 3c, 3d to improve its thermal mass function can reduce the temperature difference between the power semiconductor chips 3.

[0044] Note that in the first embodiment, the two upper-side power semiconductor chips 3a, 3b are mounted on the P-potential electrode 21, and the lower-side power semiconductor chips 3c, 3d are mounted on the two intermediate potential electrodes 22a, respectively. However, the number and arrangement of the power semiconductor chips 3 are not limited thereto. Two or more power semiconductor chips 3 may be mounted on the P-potential electrode 21. Furthermore, the invention can also be applied to a power semiconductor device constituting one or three phases of a three-phase AC circuit.

[0045] The conductive connecting element 5a, 5b is not limited to the solder material, and an electrically conductive resin paste, a sintering paste, or the like can also be used. Furthermore, the conductive element is not limited to the inner lead 6, but a wire bond, a loop bond, or the like formed of copper, aluminum, a copper-aluminum plating material, or the like can also be used.

[0046] As described above, according to the first embodiment, when the power semiconductor device 1 is energized, heat generated by the top-side power semiconductor chips 3a, 3b mounted on the P-potential electrode 21 is transferred to the first heat mass portion 21b and the second heat mass portion 21c. Similarly, heat generated by the bottom-side power semiconductor chips 3c, 3d mounted on the intermediate potential electrode 22a is transferred to the resistor 4.

[0047] In this way, a temporary temperature increase of the power semiconductor chip 3 can be prevented without adding a new element such as a heat diffusion plate under the power semiconductor chip 3 and increasing the material cost and the device size.

[0048] Furthermore, the lead frame 2, the power semiconductor chip 3, the inner leads 6 and the resistor 4 are arranged symmetrically with respect to the center line C, resulting in the heat capacity and a temperature distribution within the power semiconductor device 1 being symmetrical with respect to the center line C, which can reduce the difference between the temperature increases of the power semiconductor chips 3 when they are energized.

[0049] Then, a large amount of current flowing in a short time can be handled without increasing the size of the power semiconductor chip 3, improving the performance of the product. Furthermore, the power semiconductor device 1 has good internal weight balance, reducing defects and mishandling during transportation in the manufacturing process, thus improving the manufacturing yield.

[0050] Note that a plurality of the power semiconductor devices 1 according to the first embodiment, in combination, constitute a power conversion circuit for a motor generator. The motor generator is a product having both the starting function of a starter motor and the power generation function of an alternator, in which a large amount of current flows in a short time, for example, when an engine is started. According to the first embodiment, a momentary temperature increase of the power semiconductor chip 3 when the large amount of current flows therein can be prevented, increasing the amount of current that can flow in the power semiconductor device 1, thereby enabling the output torque of the motor and the amount of generated power to be increased. (Second embodiment)

[0051] Fig. Fig. 4 is an internal perspective schematic view of a power semiconductor device according to a second embodiment of the invention. In a power semiconductor device 1A according to the second embodiment, the bottom-side power semiconductor chips 3c, 3d mounted on the first intermediate potential electrode 22a are connected to the N-potential electrode 23 by an internal lead 6a placed diagonally with respect to the center line C of the lead frame 2 (see Fig. 1). The remaining parts are constructed in the same manner as in the first embodiment, and their description is omitted.

[0052] In the power semiconductor device 1A, the bottom-side power semiconductor chips 3c, 3d of the N-type potential electrode 23 and the inner lead 6a connecting them, connected to the first intermediate potential electrode 22a, each have respective round connection surface pads (not shown). This allows the inner lead 6a to be positioned diagonally with respect to the bottom-side power semiconductor chips 3c, 3b.

[0053] With this configuration, even if the second heat mass portion 21c is provided on the P-potential electrode 21, the first intermediate potential electrode 22a does not need to be extended by a corresponding length, and the bottom-side power semiconductor chips 3c, 3b mounted on the first intermediate potential electrode 22a can be connected to the N-potential electrode 23. Thus, according to the second embodiment, the device size can be reduced in addition to achieving the same effect as the first embodiment. (Third embodiment)

[0054] Fig. 5 is an internal perspective schematic view of a power semiconductor device according to a third embodiment of the invention. In a power semiconductor device 1B according to the third embodiment, the bottom-side power semiconductor chips 3c, 3d connected to the first intermediate potential electrodes 22a, respectively, and the N-type potential electrode 23 are connected by a straight internal lead 6b. The remaining parts are configured in the same manner as in the first embodiment, and their description is omitted.

[0055] The bottom-side power semiconductor chips 3c, 3b, respectively mounted on the first intermediate potential electrodes 22a, can be connected through the one straight inner lead 6b, with half the workload using two inner leads, improving productivity. Furthermore, the inner lead 6b is fixed at three points, reducing positional misalignment between the bottom-side power semiconductor chips 3c, 3d mounted on the first intermediate potential electrodes 22a and the inner lead 6b.

[0056] Furthermore, positional misalignment in the rotation direction of the inner lead 6b around the intermediate member connected to the N-potential electrode 23 can be prevented. Thus, according to the third embodiment, productivity can be improved in addition to the same effect as that of the first embodiment. (Fourth embodiment)

[0057] Fig. 6 is an internal perspective schematic view of a power semiconductor device according to a fourth embodiment of the invention. In a power semiconductor device 1C according to the fourth embodiment, the bottom-side power semiconductor chips 3c, 3b connected to the first intermediate potential electrodes 22a, respectively, and the N-type potential electrode 23 are connected to a T-shaped internal lead 6c. The remaining parts are formed in the same manner as in the first embodiment, and their description is omitted.

[0058] The bottom-side power semiconductor chips 3c, 3d respectively mounted on the first intermediate potential electrodes 22a can be connected to the one T-shaped inner lead 6c with half the working load using two inner leads, improving productivity. Furthermore, even if the second heat mass portion 21c is provided at the P-potential electrode 21, the first intermediate potential electrode 22a does not need to be extended by a corresponding length, and the bottom-side power semiconductor chips 3c, 3d mounted on the first intermediate potential electrode 22a can be connected to the N-potential electrode 23.

[0059] Furthermore, the T-shaped inner lead 6c has a heat capacity greater than that of the straight inner lead, which enhances the effect of reducing the short-term temperature rise of the bottom-side power semiconductor chips 3c, 3b. Thus, according to the fourth embodiment, the device size can be reduced and productivity can be improved, in addition to achieving the same effect as the first embodiment. (Fifth embodiment)

[0060] Fig.7 is a cross-sectional view of a power semiconductor device according to a fifth embodiment of the invention. In a power semiconductor device 1D according to the fifth embodiment, the lead frame 2 has two sections with different thicknesses, and the power semiconductor chip 3 is connected to a thick-walled section 2c with a large thickness. The remaining parts are formed in the same manner as in the first embodiment, and their description is omitted.

[0061] The power semiconductor chip 3 is mounted on the thick-walled portion 2c of the lead frame 2, which improves the effect of reducing the temporary temperature rise of the power semiconductor chip 3. Furthermore, some portions of the lead frame 2 are thicker than others, improving the rigidity of the lead frame and making the lead frame 2 less deformable.

[0062] According to the fifth embodiment, the manufacturing yield can be improved in addition to the same effect of the first embodiment.

Claims

[1] A power semiconductor device comprising: a metallic lead frame (2) having opposing main surfaces, one of which is an attachment surface (2a) and the other of which is a discharge surface (2b), and comprising a P-potential electrode (21), intermediate potential electrodes (22a, 22b) and an N-potential electrode (23) which are electrically independent; a switchable power semiconductor chip (3, 3a, 3b, 3c, 3d) and a current detection resistor (4) connected to the mounting surface (2a) of the lead frame (2) via a conductive connecting element (5a); a conducting element (6, 6a, 6b, 6c) which connects an electrode of the power semiconductor chip (3, 3a, 3b, 3c, 3b) to a portion of the lead frame (2); and a resin (7) covering a portion of the mounting surface (2a) of the lead frame (2), the power semiconductor chip (3, 3a, 3b, 3c, 3b), the resistor (4) and the conduction element (6, 6a, 6b, 6c), wherein the P-potential electrode (21) and the N-potential electrode (23) are positioned on a center line (C) of the lead frame (2), and the lead frame (2), the power semiconductor chip (3, 3a, 3b, 3c, 3d), the conduction element (6, 6a, 6b, 6c) and the resistor (4) are positioned symmetrically with respect to the center line (C). [2] The power semiconductor device according to claim 1, wherein the P-potential electrode (21) comprises a chip mounting portion (21a) in which the mounting surface (2a) with two or more of the power semiconductor chips (3a, 3b) connected thereto is positioned inside the resin (7); and a first heat mass portion (21b) provided adjacent to the chip mounting portion (21a) and positioned outside the resin (7). [3] The power semiconductor device according to claim 2, wherein the dissipation surface (2b) of the lead frame (2) is connected to a heat sink (9) via an insulating connecting member (8), and the first heat mass portion (21b) is connected to the heat sink (9) via the insulating connecting member (8). [4] The power semiconductor device according to claim 2 or 3, wherein the P-potential electrode (21) comprises a second thermal mass portion (21c) opposite to the first thermal mass portion (21b) with the chip mounting portion (21a) therebetween, and the mounting surface (2a) of the second thermal mass portion (21c) is positioned within the resin (7). [5] The power semiconductor device according to claim 4, wherein the dissipation surface (2b) of the lead frame (2) is connected to a heat sink (9) via an insulating connecting member (8), and the second heat mass portion (21c) is connected to the heat sink (9) via the insulating connecting member (8). [6] A power semiconductor device according to claim 4 or 5, wherein the mounting surface (2a) of the second heat mass portion (21c) has an area of ​​20 mm 2 or more. [7] A power semiconductor device according to any one of claims 2 to 6, wherein the mounting surface (2a) of the first heat mass portion (21b) has an area of ​​20 mm 2 or more. [8] A power semiconductor device according to any one of claims 2 to 7, wherein the two upper-side power semiconductor chips (3a, 3b) for a three-phase AC circuit are connected to the chip mounting portion (21a) of the P-potential electrode (21), and the lower-side power semiconductor chips (3c, 3d) for the three-phase AC circuit are respectively connected to the two intermediate potential electrodes (22a), forming two phases of the three-phase AC circuit. [9] The power semiconductor device according to any one of claims 1 to 8, wherein the intermediate potential electrodes (22a, 22b) comprises two first intermediate potential electrodes (22a) to which the power semiconductor chips (3c, 3b) are connected, and two second intermediate potential electrodes (22b) to which the power semiconductor chips (3c, 3d) are connected, and the first intermediate potential electrode (22a) is electrically connected to the second intermediate potential electrode (22b) through the metallic resistor (4). [10] Power semiconductor device according to one of claims 1 to 9, comprising: a metallic inner line (6, 6a, 6b, 6c) as the line element, wherein the inner line (6, 6a, 6b, 6c) has a thickness of 0.5 mm or more. [11] Power semiconductor device according to one of claims 1 to 10, comprising: a plurality of metallic inner leads (6) having the same shape and size as the lead element. [12] Power semiconductor device according to one of claims 1 to 10, comprising: a metallic inner line (6, 6a, 6b, 6c) as the line element, wherein the minimum thickness value of the inner line (6) connected to the power semiconductor chips (3a, 3b) connected to the P-potential electrode (21) is at least different from the minimum thickness value of the inner line (6) connected to the power semiconductor chips (3c, 3b) connected to the intermediate potential electrode (22a). [13] A power semiconductor device according to claim 9, comprising: a metallic inner line (6, 6a, 6b, 6c) as the line element, wherein the power semiconductor chips (3c, 3d) connected to the first intermediate potential electrodes (22a) and the N-potential electrode (23) are connected by the one straight or T-shaped inner line (6b, 6c). [14] The power semiconductor device according to claim 1, wherein the intermediate potential electrodes (22a, 22b) comprise two first intermediate potential electrodes (22a) to which the power semiconductor chips (3c, 3d) are connected, and two second intermediate potential electrodes (22b) to which the power semiconductor chips (3c, 3d) are not connected, the power semiconductor device comprising a metallic inner lead (6, 6a, 6b, 6c) as the conduction element, the power semiconductor chips (3c, 3d) connected to the first intermediate potential electrode (22a), the N-potential electrode (23) and the inner lead (6a) connecting them each having corresponding round connection surface pads, and the inner lead (6a) is positioned diagonally with respect to the center line (C). [15] A power semiconductor device according to any one of claims 1 to 14, wherein the lead frame (2) has a thickness of 0.4 mm or more. [16] A power semiconductor device according to any one of claims 1 to 15, wherein the lead frame (2) has two portions with different thicknesses and the power semiconductor chip (3, 3a, 3b, 3c, 3d) is connected to a portion (2c) with a greater thickness. [17] A power semiconductor device according to any one of claims 1 to 16, wherein the resistor (4) has two end portions formed of a mixture containing copper as a base material and a middle portion which is a metallic resistor body having a thermal conductivity of 20 W / m·k or higher.

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