METHOD FOR PLANIZING SiC SURFACES

Abstract

Method for planarizing a roughened surface (102) of a SiC substrate (100), the method comprising: Providing the SiC substrate (100) with the roughened surface (102); then Forming a sacrificial material (108) on the roughened surface (102) of the SiC substrate (100), wherein the sacrificial material (108) has a density between 35% and 120% of the density of the SiC substrate (100); Implanting ions (112) through the sacrificial material (108) and into the roughened surface (102) of the SiC substrate (100) to form an amorphous region (114) in the SiC substrate (100); and Removal of the sacrificial material (108) and the amorphous region (114) of the SiC substrate (100) by wet etching.

Description

AREA OF INVENTION

[0001] The present application relates to SiC substrates, in particular to the planarizing of a roughened surface of a SiC substrate. BACKGROUND

[0002] After mechanical separation of a SiC wafer from a SiC crystal, the surface of the SiC wafer exhibits a high surface roughness, which is unsuitable for the fabrication of electronic devices. Surface roughness is also a problem in reclaim processes for SiC wafers that involve splitting / cleaving the SiC wafer instead of simply grinding it, as is common in processes involving thin SiC wafers. Exemplary methods for fabricating a semiconductor layer structure are described in German patent applications DE 602 11 190 T2 and DE 10 2005 024 073 A1. After the cleavage process, a surface roughness in the range of a few micrometers (e.g., between 1 and 5 µm of average peak-to-valley distance) or greater (e.g., between 5 and 15 µm of average peak-to-valley distance) can be expected. The roughened surface is typically polished to achieve the desired surface quality.Conventional approaches to planarizing the roughened surface of a SiC wafer after mechanical separation from a SiC crystal involve performing a sequence of mechanical and chemical-mechanical polishing (CMP) steps until the final surface quality is achieved. However, due to the very high hardness of SiC, which is comparable to diamond, this procedure is a difficult and costly process. SUMMARY

[0003] The embodiments described herein provide cost-effective and less complex processes for planarizing the roughened surface of a SiC substrate.

[0004] The invention is defined in claim 1. Further developments are the subject of dependent claims.

[0005] The expert in the field will recognize additional features and advantages upon reading the following detailed description and examining the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] The elements in the drawings are not necessarily to scale with each other. Identical reference numerals denote corresponding similar parts. The features of the various illustrated embodiments can be combined unless they are mutually exclusive. Embodiments are shown in the drawings and are described in detail in the following description. Fig. Figures 1A to 1E illustrate an embodiment of a method for planarizing a roughened surface of a SiC substrate by chemical wet etching. Fig. Figures 2A to 2D illustrate a second iteration of the planarization process. Fig. 3A and Fig. Figure 3B illustrates an embodiment of a dry etching process to ensure the removal of an area of ​​poor crystalline quality at or near the roughened surface of the SiC substrate. Fig. 4A and Fig. Figure 4B illustrates an embodiment of a wet etching process to ensure the removal of an area of ​​poor crystalline quality at or near the roughened surface of the SiC substrate. Fig. 5A and Fig. Figure 5B illustrates an embodiment of a wet etching process to ensure the removal of an area of ​​poor crystalline quality in the SiC substrate after planarization of the roughened surface by chemical wet etching. Fig. Figures 6A to 6E illustrate an embodiment for partial planarization of the roughened surface of the SiC substrate, followed by complete planarization of the roughened surface by chemical wet etching. Fig. Figure 7 illustrates an embodiment of an inclined ion beam implantation process used to form an amorphous region at the roughened surface of the SiC substrate, which is subsequently removed by chemical wet etching. Fig. Figure 8 illustrates another embodiment for at least partially planarizing the roughened surface of a SiC substrate. DETAILED DESCRIPTION

[0007] The embodiments described herein provide effective processes for planarizing the roughened surface of a SiC substrate. These processes involve damaging the roughened surface of the SiC substrate, rendering it suitable for wet chemical etching. The damaged area of ​​the SiC substrate is then removed by wet chemical etching, which, compared to conventional mechanical and chemical post-processing (CMP), is significantly less stressful on the SiC substrate, less expensive, and provides a well-defined etch stop.

[0008] The roughened surface of a SiC substrate is damaged using an ion implantation process, in which ions are implanted through a sacrificial material formed on the roughened surface. The sacrificial material is selected to have a density between 35% and 120% of the density of the SiC substrate. In this way, the ion stopping power of the sacrificial material is between 35% and 120% of that of the SiC substrate. Consequently, the end-of-range of the ions implanted into the SiC substrate varies by a maximum of + / - 20%. If the density of the sacrificial material is chosen to be relatively close to or even equal to the density of the SiC substrate, e.g. between 90% and 110%, between 95% and 105%, between 98% and 102%, etc. of the density of the SiC substrate, the range of the implanted ions across the SiC substrate will generally be uniform.The damaged portion of the SiC substrate is removed by chemical wet etching to provide a substantially planar surface for subsequent fixture fabrication. The process can be repeated one or more times to achieve a sufficiently planar surface.

[0009] Fig. Figures 1A to 1E illustrate an embodiment of a method for planarizing a roughened surface of a SiC substrate.

[0010] Fig. Figure 1A shows a portion of a SiC substrate 100 with a roughened surface 102. The SiC substrate 100 preferably has a polymorphism (polytype) suitable for the fabrication of electronic devices, such as, but not limited to, 2H-SiC, 4H-SiC, or 6H-SiC. The SiC substrate 100 can be formed by cutting a SiC wafer, wherein the roughened surface 102 of the SiC substrate 100 results from the cutting process; by thinning a SiC wafer, wherein the roughened surface 102 of the SiC substrate 100 results from the thinning process; or by sawing a SiC single-crystal body, wherein the roughened surface 102 of the SiC substrate 100 results from the sawing process. The roughened surface 102 consists of numerous peaks 104 and valleys 106 and can have an average peak-to-valley distance of between 1 and 5 µm, between 5 and 15 µm, or even greater. The maximum peak-to-valley distance for the in Fig. 1A illustrated part of substrate 100 is with d MAX The roughened surface 102 of the SiC substrate 100 requires planarization suitable for the manufacture of electronic devices.

[0011] Fig. Figure 1B shows the SiC substrate 100 after the formation of a sacrificial material 108 on the roughened surface 102 of the SiC substrate 100. The sacrificial material 108 has a density between 35% and 120% of the density of the SiC substrate 100. Thus, the ion stopping power of the sacrificial material 108 is between 35% and 120% of the ion stopping power of the SiC substrate 100. The sacrificial material 108 provides a non-conforming covering of the roughened surface 102 of the SiC substrate 100, such that the valleys 104 between the peaks 106 of the roughened surface 102 are filled by the sacrificial material 108.Exemplary compositions that can provide non-conforming coverage of the roughened surface 102 of the SiC substrate 100 and have a density between 35% and 120% of the density of the SiC include, but are not limited to: polymers, antireflection coatings, photoresists, spin-on glass, and an oxide deposited from the chemical vapor phase of a high-density plasma (HDP-CVD). The sacrificial material 108 can comprise one or more of these compositions or other compositions with similar density properties.

[0012] Fig. Figure 1C shows the SiC substrate 100 after an optional planarization process. The topography of the sacrificial material 108 is determined during a process that is Fig. The subsequent ion implantation process, as depicted in 1D, is transferred to the underlying SiC substrate 100. If the (upper) surface 110 of the sacrificial material 108, facing away from the SiC substrate 100, has a greater surface roughness than the final roughness target for the SiC substrate 100, an optional planarization process can be performed to shape the upper surface 110 of the sacrificial material 108 with the desired planarity. Any standard planarization process, such as, but not limited to, mechanical polishing, CMP, etc., can be used. The sacrificial material 108 has a lower hardness than SiC and can therefore be readily planarized using any standard planarization process. Some sacrificial materials can be applied in a relatively planar manner, so that the optional planarization process can be omitted.For example, spin-on glass and other spin-on compositions can be applied in a relatively planar manner, depending on the viscosity of the material.

[0013] Fig. Figure 1D shows ions 112 being implanted through the sacrificial material 108 and into the roughened surface 102 of the SiC substrate 100 to form an amorphized region 114. The desired ion implantation depth in the SiC substrate 100 is mainly determined by the topography of the outermost surface 110 of the sacrificial material 100, which is less rough than the roughened surface 102 of the SiC substrate 100. The ion implantation energy, which determines the penetration depth, is chosen such that the SiC substrate 100 is amorphized down to the dashed line in Figure 1D. Fig. The 1D amorphization layer defines the base of the amorphous region formed by the ion implantation process. For example, the SiC substrate 100 may have an average peak-to-valley surface roughness of 2 µm with a variation between 1.5 and 2.5 µm. The ion implantation energy is selected accordingly, e.g., to ensure an amorphous ion concentration with a worst-case margin / safety margin of 2.5 µm in the SiC substrate. In one embodiment, the sacrificial material 108 has an ion implantation penetration depth (peak of an implantation distribution) at an ion energy of 1 MeV for phosphorus ions that is 150% higher, 100% higher, or 50% higher than that for SiC, or 20% or 50% lower than that for SiC. The maximum peak-to-valley value for the roughened surface of the SiC substrate 100 can be determined by a measurement process, e.g.can be verified using any standard instrument that can accurately calibrate the surface roughness of a SiC wafer, such as a probe, to verify the ion implantation energy.

[0014] Below the dotted line in Fig. 1D is the concentration of implanted ions such that the SiC substrate 100 is not amorphous. The ions can be electrically active or inactive in the SiC substrate 100. In the case of an electrically active ion type, this is indicated by the upper dashed line and the lower solid line in Fig. A 1D delineated region 116 of the SiC substrate 100 is an electrically conductive region after curing of the SiC substrate 100 to activate the ions in this region. The conductivity type (p or n) of this region 116 depends on the type of ion and can form part of an electronic device to be subsequently fabricated from the SiC substrate 100. Examples of ion species suitable for inducing amorphous damage in SiC include, but are not limited to, aluminum, argon, arsenic, nitrogen, oxygen, phosphorus, boron, silicon, carbon, and germanium.

[0015] Fig. Figure 1E shows the SiC substrate 100 after the sacrificial material 108 and the amorphous region 114 of the SiC substrate 100 have been removed by wet etching, resulting in a planarized upper surface 118. Depending on the type of sacrificial material used, the sacrificial material 108 and the amorphous region 114 of the SiC substrate 100 can be removed by the same etching solution or by different etching solutions. The etching chemistry chosen for the sacrificial material 108 depends on its composition.

[0016] In one embodiment, the amorphous region 114 of the SiC substrate 100 is removed by etching the SiC substrate 100 in a solution of hydrofluoric acid, nitric acid, tetramethylammonium hydroxide, or potassium hydroxide. The amorphous region 114 of the SiC substrate 100 can be removed by chemical wet etching, while undamaged SiC cannot be removed, thus creating a clearly defined etch stop. The in Fig. The process illustrated in Figures 1A to 1E provides for the planarization of a very hard material (SiC) using a wet etching process, which is more cost-effective and easier to implement compared with conventional planarization techniques. As a specific, non-limiting example, the SiC substrate 100 can have an average peak-to-valley surface roughness of about 0.5 µm, which is covered by a spin-on coating with a total thickness of about 0.75 µm. Next, amorphizing atoms with a dose of more than 1E14 cm⁻¹ are introduced. -2 or more than 3E14 cm -2 or even more than 5E14 cm -2The spin-on material is implanted into the SiC substrate 100 to a depth of approximately 1.5 µm at an energy of approximately 1.5 MeV. The spin-on material is then removed using a standard wet etching process, and the SiC substrate 100 is wet-etched chemically down to the edge of the amorphized region 114 (e.g., at 0.15 µm / h).

[0017] Since the ion stopping power of the sacrificial material 108 is between 35% and 120% of the ion stopping power of the SiC substrate 100, and since the sacrificial material 108 is more planar than the roughened surface 102 of the SiC substrate 100, the bottom of the amorphous region 114, which is in the SiC substrate 100 by the in Fig. The ion implantation process, as illustrated in 1D, is formed, resulting in a more planar surface than the roughened surface 102 of the SiC substrate 100. The degree of planarity at the bottom of the amorphous region 114 depends on the difference in the ion stopping capacities of the sacrificial material 108 and the SiC substrate 100. For example, with an ion stopping discrepancy of 20% between the sacrificial material 108 and SiC, the surface roughness of the SiC substrate 100 after the first pass of the process is greater than the ion stopping capacity of the sacrificial material 108 and the SiC substrate 100. Fig. The illustrated process in 1A to 1E reduced the surface roughness to 1 / 5 of the original surface roughness.

[0018] Fig. Figures 2A to 2D illustrate an embodiment in which the planarization process is repeated at least one additional time, e.g. if the first pass of the planarization process does not produce the desired final surface roughness.

[0019] Fig. Figure 2A shows the SiC substrate 100 after completion of the first pass of the planarization process. The SiC substrate 100 exhibits residual (undesired) surface roughness after the first sacrificial material 108 and the first amorphous region 114 of the SiC substrate 100 were removed by wet settling.

[0020] Fig. Figure 2B shows the SiC substrate 100 after a new (additional) sacrificial material 200 has formed on the surface of the SiC substrate 100 with the remaining roughness. The new sacrificial material 200 has a density between 35% and 120% of the density of the SiC substrate 100 and can be planarized as previously explained. For some types of compositions, such as spin-on glass and other spin-on materials, the optional planarization step can be omitted.

[0021] Fig. Figure 2C shows the SiC substrate 100, while ions 202 are implanted through the new sacrificial material 200 and into the surface of the SiC substrate 100 with the remaining roughness to form a new (additional) amorphous region 204 in the SiC substrate 100. The dashed line in Fig. 2C indicates the bottom of amorphous region 204.

[0022] Fig. Figure 2D shows the SiC substrate 100 after the new sacrificial material 200 and the new amorphous region 204 of the SiC substrate 100 have been removed by wet etching, resulting in a planarized upper surface 206. The new sacrificial material 200 and the new amorphous region 204 can be removed using the same or different etching solutions. The etching chemistry chosen for the new sacrificial material 200 depends on the composition of the sacrificial material 200.

[0023] In some cases, in addition to the roughened surface 102, the SiC substrate 100 may also exhibit an area of ​​poor crystalline quality at or near the roughened surface 102. For example, standard processes that produce a SiC wafer from a SiC crystal, such as splitting / cleaving, grinding and sawing, can cause microfractures and other damage near the machined surface of the SiC wafer.

[0024] Fig. Figure 3A illustrates a SiC substrate 300 with a roughened surface 302 and an area 304 of poor crystalline quality. The area 304 of poor crystalline quality extends below the dashed line in Fig. 3A, which indicates the base of the amorphous area to be subsequently created by the planarization process described above in conjunction with Fig. 1A to 1E and Fig. 2A to 2D was described.

[0025] Fig. Figure 3B shows the SiC substrate 300 after a standard dry etching process, such as plasma etching. The topography of the roughened surface 302 was transferred deeper into the SiC substrate 300 by the dry etching process, such that the region 304 of poor crystalline quality lies above the dashed line. This means that the region 304 of poor crystalline quality will be located within the amorphous region subsequently exposed by the above in conjunction with Fig. 1A to 1E and Fig. The planarization process described in sections 2A to 2D is to be generated. The wet-etch-based planarization process described above is then carried out to planarize the roughened surface 302 of the SiC substrate 300. Since the roughened surface 302 of the SiC substrate 300 was transferred deeper into the SiC substrate 300 by the previous dry etching process, as described in Fig. As shown in Figure 3B, the area 304 of poor crystalline quality is located within the amorphous area that is removed by the chemical wet etching process described above.

[0026] In yet another embodiment, the SiC substrate 300 is planarized by a standard dry etching process after the roughened surface 302 has been treated as before herein in conjunction with Fig. 1A to 1E and Fig. The roughened surface 302 is planarized as described in Figures 2A to 2D. In this approach, the roughened surface 302 was planarized, but the region 304 of poor crystalline quality is still present at or near the planarized surface 302. A subsequent dry etching process transfers the planarized surface 302 deeper into the SiC substrate 300, while removing the region 304 of poor crystalline quality. Alternatively, the roughened surface 302 of the SiC substrate 300 can be dry-etched before the sacrificial material is formed on the roughened surface, or after the sacrificial material and the amorphous region of the SiC have been removed by wet etching to eliminate a region 304 of poor crystalline quality.

[0027] Fig. 4A and Fig. Figure 4B illustrates an alternative approach in which ion implantation and chemical wet etching processes are used to transfer the roughened surface 302 of the SiC substrate 300 deeper into the SiC substrate 300 prior to planarizing the roughened surface 302. As previously explained, amorphous SiC can be removed via a wet etching process. By implanting an amorphous concentration of ions 400 into the roughened surface 302 of the SiC substrate 300, as described in Figure 4B, the roughened surface 302 is further developed. Fig. As shown in Figure 4A, the roughened surface 302 can be amorphized before the sacrificial material is formed on the roughened surface 302. The topography of the roughened surface 302 is transferred deeper into the SiC substrate 300 by wet-etching the amorphized area 402 of the SiC, as shown in Figure 4A. Fig. As shown in Figure 4B, area 304 of poor crystalline quality is shifted beyond the dashed line. As explained above, this means that area 304 of poor crystalline quality will be located within the amorphous region to be generated by the subsequent planarization process, and therefore area 304 of poor crystalline quality will be removed by the wet chemical etching process performed as part of the planarization process.

[0028] Fig. 5A and Fig. Figure 5b illustrates yet another alternative approach in which the region 304 of poor crystalline quality is removed after the roughened surface 302 of the SiC substrate 300 has been planarized. According to this embodiment, ions 500 are directly implanted into the planarized surface 502 of the SiC substrate 300 to create a new amorphous region 504 in the SiC substrate 300, as shown in Figure 5b. Fig. 5A shown, to train. Fig. Figure 5B shows the SiC substrate 300 after the new amorphous region 504 has been removed by wet settling.

[0029] Fig. Figures 6A to 6E illustrate an embodiment in which the roughened surface 602 of a SiC substrate 600 is partially planarized before a sacrificial material is formed on the roughened surface 602.

[0030] Fig. Figure 6A shows part of the SiC substrate 600 with the roughened surface 602 before partial planarization.

[0031] Fig. Figure 6B shows the SiC substrate 600 after the roughened surface 602 has been partially planarized. Any standard SiC planarization process can be used to partially planarize the roughened surface 602, such as, but not limited to, mechanical polishing, CMP, etc. In one embodiment, the roughened surface 602 of the SiC substrate 600 has an average peak-to-valley distance in the range of 5 µm to 15 µm before it is partially planarized, and an average peak-to-valley distance in the range of 1 µm to 5 µm or between 0.3 µm and 1.5 µm after it is partially planarized and before the sacrificial material is formed on the roughened surface 602.

[0032] Fig. Figure 6C shows the SiC substrate 602 after a sacrificial material 604 has formed on the partially planarized roughened surface 602 of the SiC substrate 600. The sacrificial material 604 has a density between 35% and 120% of the density of the SiC substrate 600 and can be planarized as previously described, depending on the planarity of the upper surface 606 of the sacrificial material 604. For some types of compositions, such as spin-on glass and other spin-on materials, the optional planarization step can be omitted.

[0033] Fig. Figure 6D shows the SiC substrate 600, while straight ions 608 are implanted through the sacrificial material 604 and into the partially planarized roughened surface 602 of the SiC substrate 600 to form an amorphous region 610 in the SiC substrate 600. The dashed line in Fig. 6C indicates the bottom of the amorphous region 610.

[0034] Fig. Figure 6E shows the SiC substrate 600 after the sacrificial material 604 and the amorphous region 610 of the SiC substrate 600 have been removed by wet etching, resulting in a planarized upper surface 612. The sacrificial material 604 and the amorphous region 610 can be removed using the same or different etching solutions as previously described herein.

[0035] The ion implantation processes described herein can be performed at an angle to the SiC substrate being implanted.

[0036] Fig. Figure 7 illustrates an embodiment in which a SiC substrate 700 has a roughened surface 702 and ions are implanted through a sacrificial material 704 and into the roughened surface 702 to form an amorphous region 706 by generating an ion beam 706 directed towards the sacrificial material 704. The sacrificial material 704 has, as previously described herein, a density between 35% and 120% of the density of the SiC substrate 700. The ion beam 706 is in Fig. Figure 7 is schematically illustrated and can be generated using any standard ion implantation system suitable for SiC technology. The ion beam 706 is inclined at an angle α between 1 degree and 10 degrees with respect to a direction perpendicular to the SiC substrate 700. In this embodiment, the ion implantation angle α is inclined relative to the crystallographic hexagonal principal direction of the SiC substrate 700. A lattice guiding or channeling effect can occur during the ion implantation process at the peaks of the roughened surface 702 of the SiC substrate 700, where inverse spikes cause the channeling. By inclined the ion beam 706 between 1 and 10 degrees, e.g., approximately 7 degrees typically with respect to a direction perpendicular to the SiC substrate 700, the channeling effect can be reduced.Tilting the ion beam 706 by more than 10 degrees can limit the implantation depth without significantly reducing the channeling effect.

[0037] Fig. Figure 8 illustrates another embodiment in which, after planarizing the sacrificial material 108, some of the peaks 104 of the roughened SiC surface 102 may no longer be covered by the sacrificial material 108. In this case, only the valleys 106 of the roughened surface 102 remain filled with the sacrificial material 108, as indicated by the dashed line in Figure 8. Fig. Figure 8 is shown. This case can occur, for example, if CMP is used to planarize the sacrificial material 108, and the CMP process is stopped on the roughened SiC surface 102. In this case, a planarization effect is achieved; however, it is reduced compared to the case of complete coverage of the roughened SiC surface 102 by the sacrificial material 108, as shown by the solid line with peaks in Figure 8. Fig. 8 is displayed.

[0038] Optionally, a further planarization step (e.g., using CMP) can be incorporated after the sacrificial material 108 and the amorphous area 114 have been removed. Adding an additional planarization step may make it possible to remove the area defined by the solid line in Fig. to remove the peaks specified in section 8. Such an additional planarization step (e.g., using CMP) after the removal of the sacrificial material 108 and the amorphous region 114 can also be incorporated into other embodiments of the method described herein. Alternatively, the method described herein can function entirely without an additional planarization step, in particular a planarization step utilizing CMP.

[0039] Terms such as "first," "second," and the like are used to describe different elements, areas, sections, etc., and are not intended to be restrictive. Throughout the description, the same terms refer to the same elements.

[0040] As used herein, the terms "have," "contain," "comprise," "exhibit," and the like are open-ended terms that indicate the presence of identified elements or features but do not exclude additional elements or features. The indefinite and definite articles are intended to encompass both the plural and the singular unless the context clearly indicates otherwise.

Claims

[1] A method for planarizing a roughened surface (102) of a SiC substrate (100), the method comprising: Providing the SiC substrate (100) with the roughened surface (102); thereafter Forming a sacrificial material (108) on the roughened surface (102) of the SiC substrate (100), wherein the sacrificial material (108) has a density between 35% and 120% of the density of the SiC substrate (100); implanting ions (112) through the sacrificial material (108) and into the roughened surface (102) of the SiC substrate (100) to form an amorphous region (114) in the SiC substrate (100); and Removing the sacrificial material (108) and the amorphous region (114) of the SiC substrate (100) by wet etching. [2] The method of claim 1, wherein the surface of the SiC substrate (100) has a remaining roughness after the sacrificial material (108) and the amorphous region (114) of the SiC substrate (100) are removed by wet etching, the method further comprising: Forming an additional sacrificial material (200) on the surface of the SiC substrate (100) with the remaining roughness, wherein the additional sacrificial material (200) has a density between 35% and 120% of the density of the SiC substrate (100); implanting ions (202) through the additional sacrificial material (200) and into the surface of the SiC substrate (100) with the remaining roughness to form an additional amorphous region (204) in the SiC substrate (100); and Removing the additional sacrificial material (200) and the additional amorphous region (204) of the SiC substrate (100) by wet etching. [3] A method according to any one of the preceding claims, wherein implanting ions (112) through the sacrificial material (108) and into the roughened surface (102) of the SiC substrate (100) to form the amorphous region (114) comprises: generating an ion beam directed towards the sacrificial material (108); and Tilting the ion beam at an angle between 1 degree and 10 degrees with respect to a direction perpendicular to the SiC substrate (100). [4] A method according to any one of the preceding claims, wherein the sacrificial material (108) comprises a polymer, an anti-reflective coating, a photoresist, a spin-on glass and / or a high density plasma chemical vapor deposited (HDP-CVD) oxide. [5] A method according to any one of the preceding claims, further comprising: Planarizing the sacrificial material (108) before implanting the ions (112). [6] A method according to any one of the preceding claims, wherein the ions (112) in the SiC substrate (100) are electrically active. [7] The method of claim 6, wherein after removal of the amorphous region (114), some of the ions (112) remain in the SiC substrate (100) to form an electrically conductive region at a planarized surface of the SiC substrate (100) formed by removal of the amorphous region (114). [8] The method according to any one of claims 1 to 5, wherein the ions (112) in the SiC substrate (100) are electrically inactive. [9] The method of any one of claims 1 to 5, wherein the ions (112) are selected from the group consisting of aluminum, argon, arsenic, nitrogen, oxygen, phosphorus, boron, silicon, carbon and germanium. [10] A method according to any one of the preceding claims, wherein the roughened surface (102) of the SiC substrate (100) has a maximum peak-to-valley distance (d MAX) and wherein the ions (112) are implanted at an energy level selected such that the amorphous region (114) extends deeper than the maximum peak-to-valley distance (d MAX ) into the SiC substrate (100). [11] The method of any preceding claim, wherein removing the amorphous region (114) of the SiC substrate (100) by wet etching comprises etching the SiC substrate (100) in a solution of hydrofluoric acid, nitric acid, tetramethylammonium hydroxide, or potassium hydroxide. [12] A method according to any one of the preceding claims, further comprising: Dry etching the roughened surface (102) of the SiC substrate (100) before forming the sacrificial material (108) on the roughened surface (102). [13] A method according to any one of claims 1 to 11, further comprising: Dry etching the surface of the SiC substrate (100) after removing the sacrificial material (108) and the amorphous region (114) of the SiC substrate (100) by wet etching. [14] A method according to any one of the preceding claims, further comprising: implanting ions (112) directly into the roughened surface (102) of the SiC substrate (100) to form an additional amorphous region (204) in the SiC substrate (100) prior to forming the sacrificial material (108) on the roughened surface (102); and Removing the additional amorphous region (204) by wet etching before forming the sacrificial material (108) on the roughened surface (102). [15] A method according to any one of claims 1 to 13, further comprising: implanting ions (112) directly into the surface of the SiC substrate (100) to form an additional amorphous region (204) in the SiC substrate (100) after removing the sacrificial material (108) and the amorphous region (114) of the SiC substrate (100) by wet etching; and Removing the additional amorphous region (204) of the SiC substrate (100) by wet etching. [16] A method according to any one of the preceding claims, further comprising: partially planarizing the roughened surface (102) of the SiC substrate (100) before forming the sacrificial material (108) on the roughened surface (102). [17] The method of claim 16, wherein the roughened surface (102) of the SiC substrate (100) has an average peak-to-valley distance (d MAX) in a range between 5 µm and 15 µm before being partially planarized, and wherein the roughened surface (102) of the SiC substrate (100) has an average peak-to-valley distance (d MAX ) in a range between 1 µm and 5 µm or between 0.3 µm and 1.5 µm after it is partially planarized and before the sacrificial material (108) is formed on the roughened surface (102). [18] A method according to any one of the preceding claims, wherein the sacrificial material (108) and the amorphous region (114) of the SiC are removed by different etching solutions. [19] A method according to any one of the preceding claims, further comprising: Dicing a SiC wafer to form the SiC substrate (100), wherein the roughened surface (102) of the SiC substrate (100) results from the dicing. [20] A method according to any one of claims 1 to 18, further comprising: Thinning a SiC wafer to form the SiC substrate (100), wherein the roughened surface (102) of the SiC substrate (100) results from the thinning. [21] A method according to any one of claims 1 to 18, further comprising: Sawing a SiC single crystal body to form the SiC substrate (100), wherein the roughened surface (102) of the SiC substrate (100) results from the sawing. [22] A method according to any one of the preceding claims, wherein the ions (112) are phosphorus ions and wherein the sacrificial material (108) has an ion implantation penetration depth at an ion energy of 1 MeV for the phosphorus ions that is 150% higher, or 100% higher, or 50% higher than for SiC, or 20% or 50% lower than for SiC.

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