Procedure for operating an inverter

Abstract

The invention relates to a method for operating an inverter (100) for an electric machine, in particular an electric vehicle, wherein the inverter (100) is controllably configured in three stages and has at least one main current path (20) with at least two semiconductor switches (22, 24) and at least one neutral point path (30) leading into the main current path (20) with at least one semiconductor switch (32, 34). The neutral point path (30) is configured to provide, in three-stage operation (1), output load currents at the load output (26) which are smaller than the output load currents provided by the main current path (20) in two-stage operation (2). Depending on at least one electrical load requested by the electric machine, the inverter (100) switches from three-stage operation (1) to two-stage operation (2) and vice versa.The inverter (100) is controlled in a partial load range such that a mixed operation (3) between the three-stage operation (1) and the two-stage operation (2) is set up. The invention further relates to an inverter (100).

Description

[0001] The invention relates to a method for operating an inverter for an electrical machine, in particular an electrically operable vehicle, and to an inverter for an electrical machine, in particular an electrically operable vehicle, for carrying out such a method.

[0002] Two-stage inverters are typically used in battery-electric vehicles. Three-stage inverters are well-known and offer significant efficiency potential in electric drive systems. To increase the efficiency of the electric motor in the cycle-relevant range, a two-stage inverter can be expanded to a three-stage inverter, for example, using a so-called T-branch, which then represents a version of a three-stage neutral-point-coupled inverter.

[0003] Three-stage inverters enable particularly efficient energy conversion, but require more semiconductor switches than currently used two-stage inverters.

[0004] The neutral point switches of the various three-stage structures with neutral point connection enable efficient partial load operation, but must be designed for the full current of the rated point for start-up with low modulation.

[0005] DE 10 2021 003 941 B4 discloses the use of a controllable three- or multi-stage inverter for electric drive systems of motor vehicles, which can be operated in three- or multi-stage operation and in two-stage operation. A dedicated operating mode setting device sets the respective operating mode by controlling the power switches of the inverter in an appropriate manner. The operating mode is set according to the overall efficiency of the entire drive system and thus not only on the basis of the electric machine and / or the inverter used. In addition to the measured phase current of the electric machine, other parameters and / or properties of the electric machine that influence the overall efficiency are also taken into account for the overall efficiency.

[0006] The generic document DE 10 2013 202 649 A1 shows an optimized control of an inverter device, whereby the inverter device can be controlled alternatively in 2-level or 3-level operation. By selecting the appropriate control method, semiconductor losses in the inverter can be minimized and the thermal load on the components used can be specifically controlled. With such an operating method for an inverter, efficient and gentle inverter operation is possible even with low output voltages and highly inductive or capacitive loads.

[0007] In the publication by Kim and Lee in 2017 at the IEEE 3rd International Future Energy Electronics Conference and ECCE Asia on “Mode transition scheme for optimal efficient operation of a 3-level T-type inverter”, a general idea for mixed operation is already suggested, even if it is implemented there for specific applications.

[0008] In the IEEE article by Wang, Zheng, Xu and Li from 2020, Volume 35 Issue 9 on “A Generalized Carrier-Overlapped PWM Method for Neutral-Point-Clamped Multilevel Converter”, a modulation method called COPWM (carrier overlapped PWM) is described, which has an overlap range of the carrier voltage.

[0009] An overlap of the carrier voltages can also be recognized in the publication of the IEEE conference “European Conference on Power Electronics and Applications” from 2007 by Far, Radan and Far on “Introduction and evaluation of novel multi-level carrier-based PWM strategies using a generalized algorithm”.

[0010] An object of the invention is to provide an improved method for the efficient operation of an inverter for an electrical machine, in particular an electrically operated vehicle.

[0011] A further object is to provide an inverter for an electrical machine, in particular of an electrically operated vehicle, for carrying out such an improved method.

[0012] The above-mentioned objects are solved by the features of the independent claims.

[0013] Advantageous embodiments and advantages of the invention emerge from the further claims, the description and the drawing.

[0014] According to one aspect of the invention, a method for operating an inverter for an electrical machine, in particular an electrically operable vehicle, is proposed. The inverter is designed to convert a direct current into an alternating current for driving the electrical machine connected to a load output of the inverter. The inverter is designed to be controllably three-stage and has at least one main current path with at least two semiconductor switches and at least one neutral point path, which opens into the main current path and has at least one semiconductor switch.

[0015] The neutral point path is designed to provide output load currents at the load output in three-stage operation that are smaller than the output load currents provided by the main current path in two-stage operation. The inverter is converted from three-stage operation to two-stage operation and vice versa depending on at least one electrical load demanded by the electrical machine. In a partial load range, the inverter is controlled such that a mixed operation between three-stage operation and two-stage operation is established.

[0016] When a load limit is exceeded, particularly at very high loads, the proposed method advantageously enables the load on the semiconductor switches of the neutral point path to be relieved through a suitable modulation method of the inverter. When a load limit is exceeded, the inverter switches from three-stage operation to mixed operation. This allows for smaller dimensions of the semiconductor switches of the neutral point path while simultaneously benefiting from partial load operation. Furthermore, depending on the required electrical load, the inverter can switch between two-stage and three-stage operation. At full load, the inverter is then controlled exclusively in two-stage operation.

[0017] In this way, cost savings can be advantageously achieved by reducing the installed semiconductor area of ​​the inverter without reducing the partial load efficiency.

[0018] The method can be applied to three-stage neutral-point inverters with any type of neutral-point connection, for example, so-called T-branch inverters, NPC inverters, or ANPC inverters. A particularly significant effect can be achieved with the inventive method for a T-type inverter, but this can also have a positive impact on other types of inverter structures, particularly with regard to the required semiconductor area.

[0019] According to the invention, the inverter is operated using a pulse-width modulation method, wherein the semiconductor switches of the inverter are controlled by means of at least one carrier signal, in particular a periodic triangular signal, to define switching times. In two-stage operation, the at least one carrier signal is compared with a predetermined setpoint signal, and in three-stage operation, at least two carrier signals mirrored at a voltage zero point for two half-waves are compared with the predetermined setpoint signal. In mixed operation, the at least two carrier signals are set to overlap in a predetermined overlap voltage range around the voltage zero point.In particular, one of the at least two carrier signals of one polarity can be scaled to an overlap value of the other polarity, with the sum of the at least two overlap values ​​resulting in the overlap voltage range. For this purpose, the carrier signals are advantageously stretched rather than simply shifted.

[0020] To be able to compare the specified setpoint signal in three-stage operation, at least two carrier signals for two half-waves are used, mirrored at a voltage zero point. The two carrier signals for two half-waves, mirrored at a voltage zero point, can also optionally be shifted in time by a period component, whereby the period component can be, for example, a quarter period.

[0021] According to the invention, the carrier signals are stretched beyond the voltage zero point. In the overlap voltage range, mixed operation can thus be advantageously set with the inverter alternating between two-stage and three-stage modulation, while outside the overlap voltage range, a quasi-normal three-stage modulation is used. The extent of the overlap voltage range adjusts the load on the semiconductor switches of the neutral point path.

[0022] According to the invention, mixed operation can be set when the setpoint signal lies within the overlap voltage range of the at least two carrier signals. Thus, mixed operation in the overlap voltage range can advantageously relieve the load on the semiconductor switches of the neutral point path.

[0023] According to the invention, the overlap value is adjusted dynamically during operation of the inverter. This prevents excessive heating of the semiconductor switches in the neutral point path, which can adversely affect their service life.

[0024] According to an advantageous embodiment of the method, three-stage operation can be discontinued when the setpoint signal lies outside the overlap voltage range of the at least two carrier signals. This advantageously relieves the load on the semiconductor switches of the neutral point path.

[0025] According to an advantageous embodiment of the method, an electrical load of the at least one semiconductor switch of the neutral point path can be adjusted using the overlap value. This allows the electrical load to be advantageously adapted to the design values ​​of the semiconductor switches of the neutral point path.

[0026] According to an advantageous embodiment of the method, a proportion of zero states in which the semiconductor switches of the neutral point path continuously conduct current can be adjusted via the overlap value. This allows the operation of the semiconductor switches of the neutral point path to be optimized.

[0027] According to an advantageous embodiment of the method, the control signals of the semiconductor switches of the neutral point path can be determined by comparing the at least two carrier signals with the setpoint signal and summing the comparison results. This allows mixed operation with a combined two-stage and three-stage control of the inverter to be easily configured.

[0028] According to a further aspect of the invention, an inverter for an electrical machine, in particular an electrically operated vehicle, is proposed for implementing a method, wherein the inverter can be converted from three-stage operation to two-stage operation and vice versa depending on at least one load required by the electrical machine. The inverter can be controlled in a partial load range such that mixed operation between three-stage operation and two-stage operation can be set. Any three-stage inverter with a neutral point connection can benefit from the invention.

[0029] With the proposed inverter, the load on the semiconductor switches of the neutral point path can be advantageously reduced at full load through a suitable inverter modulation method. This allows for smaller dimensions of the semiconductor switches of the neutral point path while simultaneously providing advantages during partial load operation. Furthermore, depending on the required electrical load, the inverter can be switched between two-stage and three-stage operation.

[0030] In this way, cost savings can be advantageously achieved by reducing the installed semiconductor area of ​​the inverter without reducing the partial load efficiency.

[0031] According to an advantageous embodiment, the inverter can comprise a T-type neutral-point clamped inverter architecture, wherein a main current path comprises at least two series-connected semiconductor switches with a center tap, which are electrically connected to a positive and a negative operating voltage. The center tap is electrically connected to a load output. A neutral-point path with at least one semiconductor switch is electrically connected to a neutral point of the positive and negative operating voltages and the center tap.

[0032] The inverter can advantageously be operated using the method described above, which provides for mixed operation with a combined two-stage and three-stage control of the inverter and thus allows efficient and service-long operation.

[0033] Further advantages will become apparent from the following description of the drawings. The drawings illustrate an exemplary embodiment of the invention. The drawings, the description, and the claims contain numerous features in combination. Those skilled in the art will also expediently consider the features individually and combine them into useful further combinations.

[0034] Showing: Fig. 1 shows a circuit arrangement of an inverter for an electrical machine, in particular of an electrically operated vehicle, for a method according to an embodiment of the invention; Fig. 2 Setpoint signal and carrier signal for two-stage operation of the inverter according to Fig. 1; Fig. 3 Control signals of the inverter in two-stage operation according to Fig. 2; Fig. 4 setpoint signals and carrier signals for three-stage operation of the inverter; Fig. 5 Control signals of the inverter in three-stage operation according to Fig. 4; Fig. 6 Setpoint signal and carrier signals for a mixed operation of the inverter according to an embodiment of the invention; Fig. 7 Control signals of the inverter during mixed operation according to Fig. 6; Fig. 8 a temporal section of setpoint signal and carrier signals from Fig. 6; Fig. 9 a temporal section of the control signals according to Fig. 7; Fig. 10 setpoint signal and carrier signals for mixed operation of the inverter with modified overlap values; Fig. 11 Control signals of the inverter during mixed operation according to Fig. 10; Fig. 12 setpoint signal and carrier signals for mixed operation of the inverter with modified overlap values; and Fig. 13 Control signals of the inverter during mixed operation according to Fig. 12.

[0035] In the figures, identical or similar components are numbered with the same reference numerals. The figures show only examples and are not to be understood as limiting.

[0036] Fig. 1 shows a circuit arrangement of an inverter 100 for an electrical machine, in particular an electrically operated vehicle, for a method according to an embodiment of the invention.

[0037] The inverter 100 is designed to convert a direct current 10, 12 into an alternating current 16 for driving the electrical machine connected to a load output 26 of the inverter 100. The inverter 100 is designed to be controllable in three stages and has at least one main current path 20 with at least two semiconductor switches 22, 24 and at least one neutral point path 30 with at least one semiconductor switch 32, 34. The neutral point path 30 opens into the main current path 20.

[0038] The main current path 20 of the Fig. The circuit arrangement shown in Figure 1 represents a so-called half-bridge of the inverter 100. Inverters 100 for three-phase electrical machines typically have three such half-bridges for controlling the electrical machines.

[0039] The inverter 100 comprises a so-called T-type neutral-point clamped inverter architecture. A main current path 20 comprises at least two series-connected semiconductor switches 22, 24 with a center tap 36, which are electrically connected to a positive and a negative operating voltage 10, 12. The center tap 36 is electrically connected to the load output 26.

[0040] A neutral point path 30 with at least one semiconductor switch 32, 34 is electrically connected to a neutral point 14 of the positive and negative operating voltages 10, 12 and the center tap 36.

[0041] The neutral point path 30 is designed to provide output load currents at the load output 26 in a three-stage operation 1 which are smaller than the output load currents provided by the main current path 20 in a two-stage operation 2.

[0042] The inverter 100 can be converted from a three-stage operation 1 to a two-stage operation 2 and vice versa depending on at least one load required by the electrical machine. The inverter 100 can be controlled in a partial load range such that a mixed operation 3 between the three-stage operation 1 and the two-stage operation 2 can be set (in the Fig. 6 and Fig. 7).

[0043] Fig. 2 shows a setpoint signal 44 and a carrier signal 40 for a two-stage operation 2 of the inverter 100 according to Fig. 1. Fig. 3 shows the associated control signals 60, 62, 64 of the inverter 100 in two-stage operation 2. The signals 44, 40, 60, 62, 64 are, as in the other Fig. 4 to 13 each plotted as voltage U, scaled from -1 V to +1 V, as a function of time 70.

[0044] The inverter 100 is operated using a pulse-width modulation method. The semiconductor switches 22, 24, 32, 34 of the inverter 100 are controlled by at least one carrier signal 40, 42, in particular a periodic triangular signal, to define switching times. The setpoint signal 44 for the desired control of the electric machine is compared with one or more carrier signals 40, 42 to define the switching times of the semiconductor switches 22, 24, 32, 34.

[0045] In the Fig. 2 and Fig. In the two-stage operation 2 shown in Figure 3, the carrier signal 40 is compared with the specified setpoint signal 44 (a sinusoidal signal) and the switching times for the two semiconductor switches 22, 24 of the main current path 20 are derived therefrom. This results in the Fig. 3 shown control signals 60, 62, 64 of the electrical machine.

[0046] Fig. 4 shows setpoint signal 44 and carrier signals 40, 42 for a three-stage operation 1 of the inverter 100, while in Fig. 5 the corresponding control signals of the inverter 100 are shown.

[0047] In the Fig. 4 and Fig. In the three-stage operation 1 shown in Figure 5, the two carrier signals 40, 42 mirrored at a voltage zero point 46 are compared for two half-waves with the specified setpoint signal 44, and from this the switching times for the two semiconductor switches 32, 34 of the neutral point path 30 as well as for the two semiconductor switches 22, 24 of the main current path are derived. This results in the Fig. 5 shown control signals 60, 62, 64 of the electrical machine.

[0048] The inverter 100 can be converted from the three-stage operation 1 to the two-stage operation 2 and vice versa depending on at least one electrical load requested by the electrical machine.

[0049] According to the proposed method, the inverter 100 is controlled in a partial load range such that a mixed operation 3 between the three-stage operation 1 and the two-stage operation 2 is set.

[0050] Fig. 6 shows setpoint signal 44 and carrier signals 40, 42 for a mixed operation 3 of the inverter 100 according to an embodiment of the invention, while in Fig. 7 the control signals 60, 62, 64 of the inverter 100 are shown in mixed operation 3. Fig. 8 shows a temporal section of setpoint signal 44 and carrier signals 40, 42 from Fig. 6, while in Fig. 9 the corresponding temporal section of the control signals 60 is shown.

[0051] In the mixed operation 3, the two carrier signals 40, 42 are set to overlap in a predetermined overlap voltage range 50 around the voltage zero point 46. In this case, one of the at least two carrier signals 40, 42 of one polarity is set up up to an overlap value 48, 49 (dashed lines in Fig. 8) of the other polarity, whereby a sum of the at least two overlap values ​​48, 49 results in the overlap voltage range 50.

[0052] The mixed operation 3 is set when the setpoint signal 44 lies in the overlap voltage range 50 of the at least two carrier signals 40, 42 (dashed box in the Fig. 6 and Fig. 7), while the three-stage operation 1 is set when the setpoint signal 44 lies outside the overlap voltage range 50 of the at least two carrier signals 40, 42 (solid boxes in the Fig. 6 and Fig. 7).

[0053] A proportion of zero states in which the semiconductor switches 32, 34 of the neutral point path 30 permanently carry current can be set via the overlap value 48, 49.

[0054] The control signals 60, 62, 64 of the semiconductor switches 32, 34 of the neutral point path 30 can be determined in a simple manner by comparing the at least two carrier signals 40, 42 with the setpoint signal 44 and summing the comparison results. Fig. 8 and Fig. 9, when the setpoint signal 44 is greater than the first carrier signal 40, a positive control signal 60 when the setpoint signal 44 is less than the second carrier signal 42, a negative control signal 60 and a control signal 60 of zero when the setpoint signal 44 lies between the two carrier signals 40, 42.

[0055] An electrical load of the semiconductor switches 32, 34 of the neutral point path 30 can be adjusted by the overlap value 48, 49. The overlap value 48, 49 can be adjusted dynamically, particularly during operation of the inverter 100.

[0056] In the Fig. 10 and Fig. 11 shows an example with a relatively large overlap voltage range 50, while in the Fig. 12 and Fig. Figure 13 shows an example with a relatively small overlap voltage range 50. The overlap values ​​48 and 49 are shown in dashed lines.

[0057] As in the Fig. 11 and Fig. 13, the resulting control signals 60, 62, 64 differ greatly. Fig. 10 and Fig. 11, the proportion of mixed operation 3, where the setpoint signal 44 lies between the overlap values ​​48, 49, is large relative to the three-stage operation 1, while in the case of the Fig. 12 and Fig. 13, the proportion of mixed operation 3 is very small relative to the three-stage operation 1 due to the low overlap values ​​48, 49.

[0058] The influence on the duration of the zero states of the control signals 60, 62, 64 therefore depends on the modulation. The larger the overlap voltage range 50, the less the semiconductor switches 32, 34 of the neutral point path 30 are loaded, since a greater degree of quasi-two-stage modulation is present and shorter intermediate zero states result.

[0059] Advantageously, control signal 60 always belongs to setpoint signal 40, and control signals 62 and 64 belong to a respective, not-shown, setpoint signal of the other two phases of a three-phase inverter. Each phase thus has its own setpoint signal and a resulting control signal.

[0060] By applying the proposed method for operating the inverter 100, the semiconductor switches 32, 34 of the neutral point path 30 can be made smaller, which enables cost savings.

[0061] For symmetrical inverter operation, a symmetrical overlap area is essential and thus the overlap values ​​48, 49 are equal in magnitude. List of reference symbols 1 three-stage operation 2 two-stage operation 3 mixed operation 10 positive DC voltage 12 negative DC voltage 14 Neutral point 16 alternating voltage 20 Main current path 22 semiconductor switches 24 semiconductor switches 26 Load output 30 Neutral Point Path 32 semiconductor switches 34 semiconductor switches 36 center tap 40 carrier signal 42 carrier signal 44 Setpoint signal 46 Voltage zero point 48 Overlap value 49 Overlap value 50 Overlap voltage range 60 control signal 62 control signal 64 control signal 70 time 100 inverters

Claims

[1] Method for operating an inverter (100) for an electrical machine, in particular an electrically operable vehicle, wherein the inverter (100) is designed to convert a direct voltage (10, 12) into an alternating voltage (16) for driving the electrical machine connected to a load output (26) of the inverter (100), wherein the inverter (100) is designed to be controllable in three stages and has at least one main current path (20) with at least two semiconductor switches (22, 24) and at least one neutral point path (30) opening into the main current path (20) with at least one semiconductor switch (32, 34), wherein the neutral point path (30) is designed to provide output load currents at the load output (26) in a three-stage operation (1) which are smaller than the output load currents provided by the main current path (20) in a two-stage operation (2), wherein the inverter (100) is converted from the three-stage operation (1) to the two-stage operation (2) and vice versa depending on at least one electrical load requested by the electrical machine, wherein the inverter (100) is controlled in a partial load range such that a mixed operation (3) between the three-stage operation (1) and the two-stage operation (2) is set, characterized by that the inverter (100) is operated in a pulse width modulation method, wherein the semiconductor switches (22, 24, 32, 34) of the inverter (100) are controlled by means of at least one carrier signal (40, 42), in particular a periodic triangular signal, for defining switching times, wherein in the two-stage operation (2) the at least one carrier signal (40, 42) is compared with a predetermined setpoint signal (44), wherein in the three-stage operation (1) at least two carrier signals (40, 42) mirrored at a voltage zero point (46) are compared for two half-waves with the predetermined setpoint signal (44), wherein in the mixed operation (3) the at least two carrier signals (40, 42) are set to overlap in a predetermined overlap voltage range (50) around the voltage zero point (46), in particular wherein one of the at least two carrier signals (40, 42) of one polarity is scaled up to an overlap value (48, 49) of the other polarity, wherein a sum of the at least two overlap values (48, 49) results in the overlap voltage range (50), wherein the mixed operation (3) is set when the setpoint signal (44) lies within the overlap voltage range (50) of the at least two carrier signals (40, 42) and the overlap value (48, 49) is set dynamically during operation of the inverter (100). [2] Method according to claim 1, wherein the three-stage operation (1) is stopped when the setpoint signal (44) is outside the overlap voltage range (50) of the at least two carrier signals (40, 42). [3] Method according to claim 1 or 2, wherein an electrical load of the at least one semiconductor switch (32, 34) of the neutral point path (30) is adjusted by the overlap value (48, 49). [4] Method according to one of the preceding claims, wherein a proportion of zero states in which the semiconductor switches (32, 34) of the neutral point path (30) permanently carry current is set via the overlap value (48, 49). [5] Method according to one of the preceding claims, wherein control signals (60, 62, 64) of the semiconductor switches (32, 34) of the neutral point path (30) are determined by comparing the at least two carrier signals (40, 42) with the desired value (44) and summing the comparison results. [6] Inverter (100) for an electrical machine, in particular an electrically operated vehicle, for carrying out a method according to one of the preceding claims, wherein the inverter (100) can be converted from a three-stage operation (1) into a two-stage operation (2) and vice versa depending on at least one load requested by the electrical machine, wherein the inverter (100) can be controlled in a partial load range such that a mixed operation (3) between the three-stage operation (1) and the two-stage operation (2) can be set. [7] An inverter according to claim 6, comprising a T-type neutral point clamped inverter architecture, wherein a main current path (20) has at least two series-connected semiconductor switches (22, 24) with a center tap (36), which are electrically connected to a positive and a negative operating voltage (10, 12), wherein the center tap (36) is electrically connected to a load output (26), wherein a neutral point path (30) with at least one semiconductor switch (32, 34) is electrically connected to a neutral point (14) of the positive and negative operating voltages (10, 12) and the center tap (36).

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