Semiconductor device, method for manufacturing a semiconductor device and power conversion device

Abstract

Semiconductor device (1), comprising: - a semiconductor element (2) having an electrode (3); - a substrate (4) having the semiconductor element (2) mounted thereon; - a connection (5a), - which is arranged so that it is opposite the electrode (3) of the semiconductor element (2), and - which has a through hole (6) with a stepped portion (7); and - a bonding material (11, 11a, 11c) covering the step portion (7) within the through-hole (6) and in contact with the electrode (3) of the semiconductor element (2).

Description

Background of the inventionField of the invention

[0001] The present disclosure relates to a semiconductor device, a method of manufacturing a semiconductor device, and a power conversion device. Description of the background technology

[0002] As we move toward a decarbonized society, semiconductor devices embodied by power semiconductor devices are used not only in household appliances such as air conditioners, but also in automotive applications such as electric cars and hybrid cars, and in railway applications. In one known configuration of such semiconductor devices, for example, a terminal having a through-hole and an electrode of a semiconductor element are bonded by a bonding material such as solder and electrically connected in a semiconductor device (see, for example, Japanese Patent Application Laid-Open Nos. JP 2017-117846 A and JP 2011-204886 A). Summary of the invention

[0003] However, as the semiconductor devices described above are used in a wide range of products, the frequency of use in high-stress environments (e.g., high-temperature or vibration environments) is increasing. Therefore, high reliability and longer service life of semiconductor devices are required. It is known that the joint section between an electrode on a semiconductor element and a terminal significantly affects the reliability and service life of the semiconductor device.

[0004] The present disclosure provides a semiconductor device that solves the problem as described above, and an object of the present disclosure is to provide a semiconductor device with bonding strength ensured between an electrode of a semiconductor element and a terminal, and a power conversion device including the semiconductor device.

[0005] A semiconductor device according to the present disclosure includes a semiconductor element, a substrate, a terminal, and a bonding material. The semiconductor element includes an electrode. The semiconductor element is mounted on the substrate. The terminal is connected to the electrode of the semiconductor element. The terminal includes a through-hole with a stepped portion. The bonding material covers the stepped portion of the through-hole and is in contact with the electrode of the semiconductor element.

[0006] A power conversion device according to the present disclosure includes a main conversion circuit, a drive circuit, and a control circuit.

[0007] The main conversion circuit includes the semiconductor device described above. The main conversion circuit converts input power and outputs the converted power. The drive circuit outputs a drive signal for driving the semiconductor device to the semiconductor device. The control circuit outputs a control signal for controlling the drive circuit to the drive circuit.

[0008] A method for manufacturing a semiconductor device according to the present disclosure includes the steps of preparing, mounting a semiconductor element, bonding the semiconductor element, mounting a terminal, and bonding the terminal. In the preparing step, a substrate, a semiconductor element having an electrode, and a terminal having a through-hole with a step portion are prepared. In the semiconductor element mounting step, the semiconductor element is mounted on the substrate with a first bonding material interposed therebetween. In the semiconductor element bonding step, the first bonding material is heated to bond the semiconductor element to the substrate with the first bonding material interposed therebetween. In the terminal mounting step, the terminal is mounted on the electrode of the semiconductor element with a second bonding material interposed therebetween.In the lead bonding step, the second bonding material is heated to bond the lead to the electrode with the second bonding material interposed therebetween. In the lead bonding step, the second bonding material covers the stepped portion of the through-hole and is in contact with the electrode of the semiconductor element.

[0009] A method for manufacturing a semiconductor device according to the present disclosure includes the steps of preparing, mounting a semiconductor element, mounting a terminal, and bonding. In the preparing step, a substrate, a semiconductor element having an electrode, and a terminal having a through-hole with a step portion are prepared. In the semiconductor element mounting step, the semiconductor element is mounted on the substrate with a first bonding material interposed therebetween. In the terminal mounting step, the terminal is mounted on the electrode of the semiconductor element with a second bonding material interposed therebetween.In the bonding step, the first bonding material and the second bonding material are heated to bond the semiconductor element to the substrate with the first bonding material interposed therebetween, and to bond the terminal to the electrode with the second bonding material interposed therebetween. In the bonding step, the second bonding material covers the stepped portion of the through-hole and is in contact with the electrode of the semiconductor element.

[0010] A method for manufacturing a semiconductor device according to the present disclosure includes the steps of preparing, mounting a terminal, and bonding the terminal. In the preparing step, a semiconductor element having an electrode and a terminal having a through-hole with a step portion are prepared. In the terminal mounting step, the terminal is mounted on the electrode such that the through-hole overlaps the electrode of the semiconductor element. In the terminal bonding step, a bonding material having flowability is supplied into the interior of the through-hole to bond the terminal to the electrode with the bonding material interposed therebetween. In the terminal bonding step, the bonding material covers the step portion of the through-hole and is in contact with the electrode of the semiconductor element.

[0011] The foregoing and other objects, features, aspects and advantages of the present disclosure will become more apparent from the following detailed description of the present disclosure when taken in conjunction with the accompanying drawings. Short description of the drawings Fig. 1 is a partial plan view illustrating an upper surface of a semiconductor device according to a first embodiment. Fig. 2 is a line II-II in Fig. 1 taken cross-sectional view. Fig. 3 is a partially enlarged cross-sectional view of area III in Fig. 2. Fig. 4 is a partially enlarged cross-sectional view showing a modification of the semiconductor device according to the first embodiment. Fig. 5 is a partially enlarged cross-sectional view showing a modification of the semiconductor device according to the first embodiment. Fig. 6 is a partially enlarged cross-sectional view showing a modification of the semiconductor device according to the first embodiment. Fig. 7 is a partially enlarged cross-sectional view showing a modification of the semiconductor device according to the first embodiment. Fig. 8 is a partially enlarged cross-sectional view showing a modification of the semiconductor device according to the first embodiment. Fig. 9 is a partially enlarged cross-sectional view showing a modification of the semiconductor device according to the first embodiment. Fig. 10 is a flowchart of a method for manufacturing a semiconductor device according to the first embodiment. Fig. 11 is a flowchart of a modification of the method for manufacturing a semiconductor device according to the first embodiment. Fig. 12 is a cross-sectional view of a semiconductor device according to a second embodiment. Fig. 13 is a cross-sectional view of a semiconductor device according to a third embodiment Fig. 14 is a partially enlarged cross-sectional view of an area XIV in Fig. 13. Fig. 15 is a cross-sectional view of a modification of the semiconductor device according to the third embodiment. Fig. 16 is a partially enlarged cross-sectional view of an area XVI in Fig. 15. Fig. 17 is a cross-sectional view of a semiconductor device according to a fourth embodiment. Fig. 18 is a partially enlarged cross-sectional view of an area XVIII in Fig. 17. Fig. 19 is a flowchart of a method of manufacturing a semiconductor device according to the fourth embodiment. Fig. 20 is a cross-sectional view of a semiconductor device according to a fifth embodiment. Fig. 21 is a partially enlarged cross-sectional view of the semiconductor device according to the fifth embodiment after application of a bonding material. Fig. 22 is a partially enlarged cross-sectional view of an area XXII in Fig. 20. Fig. 23 is a cross-sectional view of a modification of the semiconductor device according to the fifth embodiment. Fig. 24 is a partially enlarged cross-sectional view of a modification of the semiconductor device according to the fifth embodiment after application of a bonding material. Fig. 25 is a partially enlarged cross-sectional view of an area XXV in Fig. 23. Fig. 26 is a block diagram illustrating a configuration of a power conversion system in which a power conversion device according to a sixth embodiment is used. Description of the preferred embodiments

[0012] Embodiments of the present disclosure are described below. In the following drawings, unless otherwise specified, the same or corresponding parts are designated by the same reference numerals, and their descriptions will not be repeated. First embodiment<Konfiguration einer Halbleitervorrichtung>

[0013] Fig. 1 is a partial plan view viewed from an upper surface of a semiconductor device 1 according to a first embodiment. Fig. 2 is a line II-II in Fig. 2 taken cross-sectional view. Fig. Fig. 3 is a partially enlarged cross-sectional view of the semiconductor device 1 in a region III in Fig. 2.

[0014] The Fig. 1 to Fig. The semiconductor device 1 shown in Figure 3 is, for example, a power semiconductor device and mainly comprises a semiconductor element 2, a substrate 4, a terminal 5a, a terminal 5b, a terminal 5c, a metal wire interconnection 12, a sealing resin 14, and an insulating heat dissipation film 13. As shown in Fig. 3, the semiconductor element 2 has an electrode 3. As shown in Fig. As shown in Fig. 2, the semiconductor element 2 is mounted on a surface (upper surface) of the substrate 4 with a connecting portion 11c interposed therebetween. The semiconductor element 2 has an electrode 3 on a surface (upper surface) opposite to a surface (lower surface) opposite to the substrate 4. The terminal 5a and the terminal 5b each have a through-hole 6. Inside the through-holes 6 of the terminals 5a, 5b, a plurality of depressed step portions 7 are formed on a side surface of each through-hole 6. The electrode 3 is connected to the terminal 5a by a connecting portion 11a formed of a bonding material 11. The connecting portion 11a fills the inside of the through-hole 6 to cover the step portions 7 formed on the side surface of the through-hole 6 of the terminal 5a.In other words, the electrode 3 is connected through the connecting portion 11a to a portion having the through hole 6 in the terminal 5a.

[0015] The substrate 4 is connected to the terminal 5b through a connecting portion 11b formed of a bonding material 11. The connecting portion 11b fills the interior of the through-hole 6 to cover stepped portions 7 formed on the side surface of the through-hole 6 of the terminal 5b. The substrate 4 is connected to a portion containing the through-hole 6 in the terminal 5b through the connecting portion 11b. The terminal 5c is connected to an electrode (not shown) of the semiconductor element 2 through the metal wire interconnection 12. The substrate 4 is bonded to the heat-dissipating insulating film 13 on a surface (bottom surface) opposite to the surface with the semiconductor element 2 mounted thereon.

[0016] As in Fig. 1 and Fig. 2, two semiconductor elements 2 are mounted on the surface of the substrate 4. The two semiconductor elements 2 each have the electrode 3 (see Fig. 3). The electrodes 3 of the two semiconductor elements 2 are each connected to the terminal 5a by a connecting section 11a. In other words, the terminal 5a has the through-hole 6 in a region located above the semiconductor element 2. In the Fig. 1 and Fig. In the semiconductor device 1 shown in Figure 2, the terminal 5a has two through holes 6. The terminal 5a extends from above the two semiconductor elements 2 to the outside of the sealing resin 14. The terminal 5b is connected to an outer periphery of the upper surface of the substrate 4 by the connecting portion 11b. In a Fig. 1, the terminal 5c extends along a direction in which the terminal 5a extends.

[0017] The semiconductor element 2, the substrate 4, a part of the terminal 5a, a part of the terminal 5b, and a part of the terminal 5c are covered with the sealing resin 14. A part of each of the terminal 5a, the terminal 5b, and the terminal 5c extends from the surface of the sealing resin 14 to the outside to provide connection to an external device outside the sealing resin 14. The terminal 5a, the terminal 5b, and the terminal 5c can be bent, for example, by forming them at a portion extending outside the sealing resin 14. The above portions of the terminal 5a, the terminal 5b, and the terminal 5c are connected to conductors (not shown) such as interconnections or terminals for electrically connecting to a circuit board or other semiconductor device.The conductor and the above portion may be connected by any method, and for example, a fastening member such as a screw may be used to fix the conductor and the above portion.

[0018] As in Fig. 1 and Fig. As shown in Figure 2, the circuit configuration of the semiconductor device 1 is a 2-in-1 type in which two semiconductor elements 2 are mounted in one module. The circuit configuration of the semiconductor device 1 shows an upper arm or a lower arm in an inverter circuit. The circuit configuration of the semiconductor device is not necessarily a 2-in-1 type. For example, a 1-in-1 type or a 6-in-1 type can be used as the circuit configuration.

[0019] The semiconductor element 2 is a power semiconductor element 2 for power control. The number of semiconductor elements 2 mounted on the semiconductor device 1 is at least one or more. A plurality of semiconductor elements 2 can be mounted according to the specifications of the semiconductor device 1. The semiconductor element 2 can be formed using a material such as silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), or diamond, for example. A wide band gap semiconductor material having a wider band gap than silicon can be used as the base material of the semiconductor element 2. When a wide band gap semiconductor material is used as the base material, a semiconductor device 1 with high efficiency and compatibility compatible with high temperatures can be obtained.In particular, when the connecting portion 11a is a sintered material made of silver (Ag) or the like as the bonding material 11, the heat resistance of the connecting portion 11a is improved. In this case, the power semiconductor element 2 made of silicon carbide, which can operate at high temperatures, can be suitably used. As a result, a semiconductor device 1 can be realized that can operate at higher temperatures than a semiconductor element made of silicon as the base material.

[0020] The semiconductor element 2 can be of any type. For example, an insulated-gate bipolar transistor (IGBT), a metal-oxide-semiconductor field-effect transistor (MOSFET), or a Schottky barrier diode can be used. For example, the semiconductor element 2 can be a reverse-conducting IGBT (RC-IGBT) comprising an IGBT and a freewheeling diode integrated on a semiconductor chip. The length of one side of the semiconductor element 2 is, for example, 1.5 mm or more and 15 mm or less.

[0021] As in Fig. As shown in Figure 2, the insulating heat dissipation film 13 is bonded to the substrate 4 on a surface opposite to the surface with the semiconductor element 2. The material forming the substrate 4 may be any material having high thermal conductivity. For example, the substrate 4 may be formed from a metal material such as copper (Cu), aluminum (Al), or a copper-molybdenum (CuMo) alloy. The substrate 4 may be formed from a composite material such as a silicon carbide-aluminum composite material (AlSiC) or a silicon carbide-magnesium composite material (MgSiC).

[0022] The insulating heat dissipation film 13 includes an insulating layer 13a and a metal layer 13b. The insulating layer 13a is bonded to the underside (the surface opposite to the upper surface with the semiconductor element 2 mounted thereon) of the substrate 4. The metal layer 13b is bonded to the surface opposite to the surface bonded to the substrate 4 at the insulating layer 13a. The insulating heat dissipation film 13 has a laminated structure (two-layer structure) in which the insulating layer 13a and the metal layer 13b are laminated. In the metal layer 13b, the surface opposite to the surface bonded to the insulating layer 13a is exposed from the sealing resin 14. The insulating heat dissipation film 13 does not necessarily have to have a two-layer structure.In other words, the insulating heat-dissipating film 13 may include the insulating layer 13a and a plurality of other metal layers 13b. For example, two or more metal layers 13b are laminated in the insulating heat-dissipating film 13.

[0023] The thermal conductivity of the insulating heat-dissipating film 13 is, for example, 2 W / (m·K) or more and 18 W / (m·K) or less. The thickness of the insulating heat-dissipating film 13 is, for example, 0.1 mm or more and 0.2 mm or less. The insulating layer 13a may be formed of, for example, a resin containing a filler. For example, a filler containing aluminum oxide (Al2O3), aluminum nitride (AlN), silicon nitride (Si3N4), silicon dioxide (SiO2), or boron nitride (BN) may be used as the filler. A resin filled with the filler as described above may be used as the material of the insulating layer 13a. For example, epoxy resin may be used as the resin. The material forming the metal layer 13b comprises a material with high thermal conductivity. For example, copper (Cu) or aluminum (Al) may be used as the metal.

[0024] As in Fig. 2 and Fig. 3, the terminal 5a has a through-hole 6. The through-hole 6 is filled with bonding material 11, and the connecting portion 11a is formed such that the terminal 5a and the electrode 3 of the semiconductor element 2 are connected. The terminal 5a has a first main surface 8a opposite the electrode 3 of the semiconductor element 2 and a second main surface 8b opposite the first main surface 8a. The connecting portion 11a is formed such that the interface between the connecting portion 11a and the terminal 5a extends not only on the lateral surface within the through-hole 6, but also on the first main surface 8a and the second main surface 8b of the terminal 5a. The terminal 5b also has a through-hole 6 in the same way as the terminal 5a.The connecting portion 11b is formed so that the terminal 5b and the substrate 4 are connected in the same manner as the connecting portion 11a.

[0025] The material forming terminal 5a, terminal 5b, and terminal 5c is, for example, copper (Cu). The material forming terminal 5a, terminal 5b, and terminal 5c is any material that has electrical conductivity and heat dissipation properties. For example, the material forming terminal 5a, terminal 5b, and terminal 5c can be an alloy containing copper (Cu) or aluminum (Al), or a composite material in which these metals are laminated.

[0026] The thickness of terminal 5a, terminal 5b, and terminal 5c is, for example, 0.3 mm or more and 1.2 mm or less. Terminal 5, terminal 5b, and terminal 5c form an integrated lead frame until a connecting bar cut or conductor cut is performed in a manufacturing process described later. The respective thicknesses of terminal 5a, terminal 5b, and terminal 5c in a Fig. 2 and the respective widths of the connection 5a, the connection 5b and the connection 5c in a Fig. The current carrying capacity of the semiconductor device 1 in the B direction shown in FIG. 1 can be appropriately changed according to the capacity of a current flowing through the terminal 5a, the terminal 5b, and the terminal 5c. For example, the capacity of a current flowing through the metal wire interconnection 12 connected to the electrode (control electrode) of the semiconductor element 2 is relatively smaller than the capacity of a current flowing through the terminal 5a and the terminal 5b. Therefore, the thickness and width of the terminal 5c can be smaller than those of the terminal 5a and the terminal 5b. As a result, the size of the semiconductor device 1 can be reduced. In recent years, the current carrying capacity required for the semiconductor device 1 has tended to increase. For example, the rated current of the semiconductor device 1 sometimes exceeds 1000 A. In such a case, the thickness of the terminal 5a and the terminal 5b can exceed the above-described 1.2 mm.

[0027] The metal constituting the metal wire interconnection 12 is, for example, a metal containing an element selected from the group consisting of aluminum (Al), copper (Cu), silver (Ag), and gold (Au). The metal wire interconnection 12 may be a metal of an alloy selected from the above group. The metal wire interconnection 12 is bonded to the terminal 5c and the electrode of the semiconductor element 2 by means of pressure application and ultrasonic vibration. The metal wire interconnection 12 is an interconnection that enables the flow of current for controlling the semiconductor element 2. Thus, the current capacity required for the metal wire interconnection 12 is relatively small. Accordingly, the connection area between the metal wire interconnection 12 and both the electrode of the semiconductor element 2 and the terminal 5c can be reduced.Thus, the diameter of the metal wire interconnection 12 is, for example, 0.02 mm or more and 0.2 mm or less.

[0028] The material serving as the main component of the sealing resin 14 is, for example, a thermosetting resin. For example, an epoxy resin can be used as the thermosetting resin. The above material constituting the sealing resin 14 can be a resin having thermosetting properties as well as elasticity, adhesion, heat resistance, and insulation properties according to the external size and internal structure of the semiconductor device 1. For example, silicone resin, phenolic resin, polyimide resin, or the like can be used as the material in addition to the epoxy resin. The sealing resin 14 may contain dispersed fine particles or a filler to ensure the strength and thermal conductivity of the semiconductor device 1. The material of the fine particles and the filler can be, for example, an inorganic ceramic material.The inorganic ceramic material is, for example, aluminum oxide (Al2O3), aluminum nitride (AlN), silicon nitride (Si3N4), silicon dioxide (SiO2), boron nitride (BN), diamond, silicon carbide (SiC), or boron trioxide (B2O3). The sealing resin 14 may contain fine particles or a filler to improve heat dissipation from the heating semiconductor element 2 to the outside of the semiconductor device 1.

[0029] As in Fig. 2 and Fig. 3, the semiconductor device 1 according to the present first embodiment is characterized in that a recessed step portion 7 is arranged in the side surface 6a of the through-hole 6 of both the terminal 5a and the terminal 5b. Specifically, as shown in Fig. As shown in Figure 3, the step portion 7 consists of a first step surface 7a, a second step surface 7b, and a third step surface 7c. The first step surface 7a and the second step surface 7b each extend to intersect the side surface 6a of the through-hole 6. The first step surface 7a and the second step surface 7b face each other in parallel. The first step surface 7a and the second step surface 7b extend in a direction perpendicular to the side surface 6a of the through-hole 6.

[0030] The third step surface 7c extends in a direction along the lateral surface 6a of the through-hole 6. The third step surface 7c is, for example, parallel to the extending direction of the lateral surface 6a of the through-hole 6. The third step surface 7c intersects both the first step surface 7a and the second step surface 7b. The third step surface 7c may be orthogonal to the first step surface 7a and the second step surface 7b in a Fig. 3. Viewed from a central axis R of the through-hole 6, the third step surface 7c is located at a position farthest from the central axis R in the step portion 7. Such a step portion 7 is formed in the side surface 6a of the through-hole 6 by a chemical process such as etching or a physical process such as machining. The step portion 7 is formed to extend on an inner peripheral surface of the through-hole 6 in a circumferential direction around the central axis R. The step portion 7 may be formed entirely around the inner peripheral surface of the through-hole 6 or may be formed only at a part in the circumferential direction of the inner peripheral surface.

[0031] The arrangement of such a step portion 7 in the side surface 6a of the through-hole 6 enlarges the connection area between the terminal 5a and the connection portion 11a to achieve an anchoring effect. As a result, the bonding strength between the connection portion 11a and the terminal 5a is significantly increased, and a semiconductor device 1 with high reliability and a long service life can be obtained. The anchoring effect can be achieved by at least one step portion 7. It is preferable to provide a plurality of step portions 7 to increase the anchoring effect. The step portions 7 may be arranged symmetrically with respect to the central axis R of the through-hole 6 to improve the anchoring effect, but may be arranged asymmetrically with respect to the central axis R. As shown in Fig. 4, for example, the step portion 7 may be arranged on only a part of the lateral surface 6a of the through hole 6.

[0032] As in Fig. 5, a step portion 7 in the form of an internal thread may be arranged in the lateral surface 6a of the through hole 6. Fig. 4 and Fig. 5 are partially enlarged cross-sectional views of a modification of the Fig. 1 to Fig. 3 shown semiconductor device 1. Fig. 4 and Fig. 5 correspond Fig. 3. In the Fig. 5, the step portion 7 consists only of a first step surface 7a and a second step surface 7b. The intersection line 7d of the first step surface 7a and the second step surface 7b is arranged spirally around the central axis R. The first step surface 7a and the second step surface 7b intersect the side surface 6a of the through-hole 6 at an angle such that the first step surface 7a and the second step surface 7b intersect each other. In other words, the first step surface 7a and the second step surface 7b are formed such that they are arranged with respect to the side surface 6a in a direction shown in Fig. 5 shown central axis R containing cross-section are inclined.

[0033] As in Fig. 3, a step width t, which is the distance from the side surface 6a of the through-hole 6 to the third step surface 7c, is formed in a plurality of step portions 7 arranged in the thickness direction (the C direction in Fig. 3) of the terminal 5a are aligned substantially uniformly. The step width t is substantially equal to a connection width w between the terminal 5a and the bonding material 11 at a first main surface 8a and a second main surface 8b of the terminal 5a. The step width t may be different from the connection width w. For example, the step width t may be shorter than the connection width w between the terminal 5a and the bonding material 11 at the first main surface 8a and the second main surface 8b of the terminal 5a. However, it is preferable that the step width t is 0.5 times or less of the hole diameter D of the through-hole 6 in order to avoid the formation of voids or the remaining of a solvent.

[0034] The shape of the step section 7 can be any shape and can be changed for editing the step section 7. Fig. 6 and Fig. 7 are partially enlarged cross-sectional views of a modification of the Fig. 1 to Fig. 3 shown semiconductor device 1. Fig. 6 and Fig. 7 correspond Fig. 3. As in Fig. 6, in a modification of the semiconductor device 1, the step portion 7 consists only of the first step surface 7a and the second step surface 7b. In the Fig. 6, the direction of the first step surface 7a and the direction of the second step surface 7b intersect. In other words, the cross-sectional shape of the Fig. 6 shown step section 7 has a V-shape.

[0035] As in Fig. 7, the cross-sectional shape of the step portion 7 in a cross section including the central axis R of the through-hole 6 may be a depressed shape with a curved surface. The step portion 7 in a depressed shape with a curved inner peripheral surface, as shown in Fig. 7 can be formed by processing the inner peripheral surface of the through-hole 6 using a chemical process such as etching. Forming the step portion 7 in such a shape can alleviate stress and strain generated in the connection portion 11a during operation of the semiconductor device 1. However, caution is required because the stress and strain generated in the connection portion 11a sometimes increase with increasing step width t of the step portion 7.

[0036] The material of the bonding material 11 used in the above semiconductor device 1 is, for example, one selected from the group consisting of a solder, a sintered material, and an adhesive. If a solder that is a conductive material containing tin (Sn) is used as the bonding material 11, it is preferable that, when the solder serving as the bonding material 11 is melted, the solder well wets not only the inside including the step portion 7 of the through-hole 6, but also a region adjacent to the through-hole 6 on the first main surface 8a and the second main surface 8b of the terminal 5. In this case, the bonding area at the interface between the bonding material 11 and the terminal 5 can be increased, so that the bonding strength at the interface can be ensured. As shown in Fig. 3, for example, the connecting portion 11a that bonds the terminal 5a and the semiconductor element 2 may be shaped like a rivet. In this case, the interface between the connecting portion 11a and the terminal 5a is formed to extend not only on the side surface 6a of the through-hole 6 including the step portion 7, but also to the first main surface 8a and the second main surface 8b of the terminal 5a. In other words, a part of the connecting portion 11a is exposed on the second main surface 8b of the terminal 5a. A surface of a portion of the connecting portion 11a that protrudes from the second main surface 8b of the terminal 5a is formed with a curved surface.

[0037] The semiconductor element 2 generates heat during operation of the semiconductor device 1. For this reason, a sintered material containing fine particles of metal including silver (Ag) or copper (Cu), which has excellent heat dissipation, can be used as the connecting portion 11a, which is the bonding material 11. If the connecting portion 11a is a sintered material, a solvent contained in the sintered material is well volatilized in a process of heating the sintered material serving as the connecting portion 11a, which is arranged inside the through-hole 6, because the through-hole 6 arranged in the terminal 5 is open at the second main surface 8b, which is the upper surface. Consequently, the solvent can be reliably removed from the sintered material serving as the connecting portion 11a.Such an effect can be similarly achieved in the connecting portion 11b disposed in the through-hole 6 of the terminal 5b. Examples of the solvent include an organic coating provided on the surfaces of fine metal particles so that the fine metal particles do not aggregate, and a solvent mixed with fine metal particles to process the sintered material into a paste.

[0038] If a large amount of solvent remains in the connecting portion 11a after the heating process of the sintered material serving as the connecting portion 11a, voids attributable to the solvent will be generated in the connecting portion 11a. As a result, the step portion 7 will not be filled with the bonding material 11, and the strength of the connecting portion 11a and the connecting portion 11b will become insufficient. Furthermore, if large voids are formed in the connecting portion 11a and the connecting portion 11b, the reliability, durability, and thermal conductivity of the connecting portion 11a and the connecting portion 11b will deteriorate.On the other hand, in the semiconductor device 1 according to the present embodiment, when a sintered material is used as the bonding material 11, the solvent in the sintered material can be well removed from the connecting portion 11a and the connecting portion 11b during the heating process because the through-hole 6 penetrates the terminal 5 (the through-hole 6 has a non-closed shape). Thus, the above-described inconvenience can be prevented.

[0039] Since the wettability of a sintered material is worse than the wettability of a solder, the shape of the connecting portion 11a made of a sintered material is a shape as shown in Fig. 8 shown. Fig. 8 is a partially enlarged cross-sectional view of a modification of the Fig. 1 to Fig. 3 shown semiconductor device 1. Fig. 8 corresponds to Fig. 3. The connecting portion 11a of the semiconductor device 1, which is Fig. 8 is formed of a sintered material. The upper surface of the connecting portion 11a, which is shown in Fig. 8 is a substantially flat plane. The surface of the connecting portion 11a, which is disposed on both the first main surface 8a and the second main surface 8b of the terminal 5a, extends in a direction perpendicular to the first main surface 8a or the second main surface 8b.

[0040] In the connecting portions 11a, 11b formed from the bonding material 11, for example, when a high thermal conductivity of 100 W / (m·K) or more is not required, a sintered material or a resin-containing adhesive may be used as the bonding material 11. When the bonding material 11 is a sintered material or a resin-containing adhesive, the elasticity of the connecting portion 11a and the connecting portion 11b is reduced due to the resin. As a result, the connecting portion 11a and the connecting portion 11b can be obtained with high reliability and a long service life. Furthermore, in a connecting portion 11c that bonds the semiconductor element 2 to the substrate 4, a plate-shaped bonding material 11 may be used, but a paste-like bonding material 11 may be used to improve productivity.The paste-like bonding material 11 can be arranged on the surface of the substrate 4, for example by means of screen printing.

[0041] As in Fig. 9, in the terminal 5a and the terminal 5b, a plating layer 10 may be arranged on a surface in contact with the bonding material 11. Fig. 9 is a partially enlarged cross-sectional view of a modification of the Fig. 1 to 3 shown semiconductor device 1. Fig. 9 corresponds to Fig. 3. The plating layer 10 may be any one selected from the group consisting of a nickel (Ni) plating layer, a silver (Ag) plating layer, and a tin (Sn) plating layer. The thickness of the plating layer 10 is 0.001 mm or more and 0.002 mm or less. Fig. 9, the plating layer 10 is formed on the entire interface between the connecting portion 11a and the terminal 5a; however, the plating layer 10 may be partially disposed at the interface between the connecting portion 11a and the terminal 5a and the interface between the connecting portion 11b and the terminal 5b. <Verfahren zum Herstellen einer Halbleitervorrichtung>

[0042] Fig. 10 is a flowchart illustrating a method for manufacturing a semiconductor device 1 according to the first embodiment. A method for manufacturing the semiconductor device 1 will be described below. As shown in Fig. As shown in Figure 10, a step of preparing the substrate 4 and the semiconductor element 2 (S1) is performed in the method for manufacturing the semiconductor device 1. In this step (S1), necessary components such as the substrate 4, the semiconductor element 2, and the bonding material 11 are prepared in the steps described later.

[0043] Next, a first mounting step (S2) is performed. In this step (S2), the semiconductor element 2 is mounted on a surface of the substrate 4, with a bonding material 11 as a first bonding material interposed therebetween. Specifically, first, a plate-shaped bonding material 11 corresponding to the size of the flat surface of the semiconductor element 2 is arranged at a predetermined position in the surface of the substrate 4. Next, the semiconductor element 2 is mounted on the bonding material 11. A special jig for aligning and fixing can be used, if necessary, so that the substrate 4, the bonding material 11, and the semiconductor element 2 are not misaligned. The special jig is formed, for example, from a carbon material.The special clamping device has an opening for arranging the substrate 4, the bonding material 11 and the semiconductor element 2 so that these components are easily aligned (not shown).

[0044] Next, a first bonding step (S3) is performed. In this step (S3), the semiconductor element 2 and the substrate 4 are bonded with the bonding material 11 interposed therebetween. Specifically, the substrate 4 with the bonding material 11 and the semiconductor element 2 mounted thereon is placed in a reflow device for heating and cooling. Subsequently, the bonding material 11 is melted by heating in the reflow device. Subsequently, the substrate 4 with the bonding material 11 and the semiconductor element 2 mounted thereon is cooled. As a result, the semiconductor element 2 and the substrate 4 are bonded by the connecting portion 11c formed from the solidified bonding material 11.It is necessary to perform heating and cooling according to a temperature profile corresponding to the material composition of the bonding material 11 (for example, a solder, a sintered material, or an adhesive). When using a special jig as described above, the special jig is also placed in the reflow device together with the above substrate 4, and heating and cooling are performed.

[0045] Next, a metal wire interconnection step (S4) is performed. In this step (S4), the terminal 5c connected to the outside is connected to the electrode (control electrode) of the semiconductor element 2 via a metal wire interconnection 12 by means of a wire bonding device (see Fig. 1).

[0046] Next, a second assembly step (S5) is carried out. In this step (S5), the connection 5a (see Fig. 2) on electrode 3 (see Fig. 3) of the semiconductor element 2, wherein the bonding material 11 is arranged therebetween as a second bonding material. The bonding material 11 is a plate-shaped bonding material with a size corresponding to the size of the electrode 3. The terminal 5a has the through-hole 6 with the step portion 7. The terminal 5a is aligned such that the through-hole 6 is positioned on the bonding material 11. Furthermore, the terminal 5b (see Fig. 2) is arranged on the surface of the substrate 4 with the plate-shaped bonding material 11 interposed therebetween. The terminal 5b has the through-hole 6 with the stepped portion 7. The terminal 5b is aligned so that the through-hole 6 is positioned on the bonding material 11. A special jig for alignment and fixing can be used if necessary so that the bonding material 11 applied to the electrode 3 of the semiconductor element 2, the bonding material 11 applied to the surface of the substrate 4, the terminal 5a, and the terminal 5b are not misaligned.

[0047] Next, a second bonding step (S6) is performed. In this step (S6), the electrode 3 of the semiconductor element 2 and the terminal 5a, as well as the substrate 4 and the terminal 5b, are bonded with the bonding material 11 interposed therebetween. Specifically, the substrate 4 with the bonding material 11, the terminal 5a, and the terminal 5b mounted thereon is placed in a reflow device for heating and cooling. Next, the bonding material 11 is melted by heating in the reflow device. The heating temperature in this case is lower than the heating temperature in the first bonding step (S3). Subsequently, the melted bonding material 11 is cooled, whereby the semiconductor element 2 and the terminal 5a, as well as the substrate 4 and the terminal 5b, are bonded by the connecting portion 11a and the connecting portion 11b formed from the bonding material 11.The heating and cooling are performed according to a temperature profile corresponding to a material composition of the bonding material 11 (for example, a solder, a sintered material, and an adhesive). The melting point of the bonding material 11 melted in this step (S6) is lower than the melting point of the bonding material 11 forming the connecting portion 11c used in bonding the substrate 4 and the semiconductor element 2. This is to prevent the bonding material 11, which has already bonded the substrate 4 and the semiconductor element 2 in the first bonding step (S3), from melting during heating in this step (S6).

[0048] After the above step (S6), the connecting portion 11a and the connecting portion 11b located within the through-hole 6 can be visually recognized from the upper surface side (second main surface 8b) of the terminal 5a and the terminal 5b, respectively. Thus, it can be easily confirmed from the upper surface side of the semiconductor device 1 (the second main surface 8b side of the terminal 5a) that the through-hole 6 is filled with the bonding material 11. Furthermore, since the bonding material 11 and the component around the bonding material 11 can be identified from the upper surface side of the semiconductor device 1, automatic inspection by image processing, for example, can be easily performed regarding the state of the connecting portion 11a and the connecting portion 11b.

[0049] Next, a sealing step (S7) is performed. In this step (S7), the semiconductor element 2 is sealed by injection molding or transfer molding using a sealing resin 14. Specifically, the sealing resin 14 in the form of a tablet and an insulating heat dissipation film 13 (see Fig. 2) is prepared. The heat-dissipating insulating sheet 13 is mounted in a mold of a transfer-molding device. Next, the substrate 4, to which the semiconductor element 2, the terminal 5a, the terminal 5b, and the terminal 5c are bonded, is mounted on the heat-dissipating insulating sheet 13. Next, the sealing resin 14 is introduced into the device in the form of a pellet. Then, the interior of the mold is heated, whereby the heat-dissipating insulating sheet 13 and the substrate 4 adhere to each other. At the same time, the semiconductor element 2, the substrate 4, and the terminal 5a, the terminal 5b, and the terminal 5c are sealed by the molten sealing resin 14, except for parts of the terminal 5a, the terminal 5b, and the terminal 5c. Next, a curing process is performed to cure the sealing resin 14.If the terminal 5a, the terminal 5b, and the terminal 5c are formed by a lead frame, the connecting bars, the resin, and the frame of the lead frame are cut off. Then, parts (tip ends) of the terminal 5a, the terminal 5b, and the terminal 5c protruding from the sealing resin 14 are bent by forming. Finally, it is checked whether the electrical characteristics of the semiconductor device 1 are satisfied. In this way, the test shown in . Fig. 1 to Fig. 3, the semiconductor device 1 is manufactured.

[0050] A modification of the method for manufacturing the semiconductor device 1 will now be described. Fig. 11 is a flowchart illustrating a modification of the method for manufacturing the semiconductor device 1 according to the first embodiment. Fig. The method for manufacturing the semiconductor device 1 shown in Figure 11 essentially comprises steps similar to those of the method shown in Fig. 10 for manufacturing the semiconductor device 1, but differs in the steps after the first assembly step (S2) shown in Fig. 10 is shown.

[0051] As in Fig. 11, a step of preparing the substrate 4 and semiconductor element 2 (S1a) and a first mounting step (S2a) are carried out in the same manner as the step (S1) and the step (S2) shown in Fig. 10. A second assembly step (S3a) is then carried out. This step (S3a) is the same as the one shown in Fig. The second assembly step (S5) is shown in Figure 10. Step (S3a) can be performed before the step (S2a) described above.

[0052] Next, a first bonding step (S4a) is performed. In this step (S4a), the first bonding step (S3) and the second bonding step (S6) described in Fig. 10 are performed simultaneously. In other words, the substrate 4 with the semiconductor element 2 and the terminal 5a and the terminal 5b stacked on the upper surface with the bonding material 11 interposed therebetween is placed in a reflow apparatus. By heating and cooling in the reflow apparatus, the bonding between the substrate 4 and the semiconductor element 2, the bonding between the semiconductor element 2 and the terminal 5a, and the bonding between the substrate 4 and the terminal 5b are performed simultaneously.

[0053] Subsequently, a metal wire interconnection step (S5a) and a sealing step (S6a) are carried out in the same manner as the step (S4) and the step (S7) described in Fig. 10. In this way, the Fig. 1 to Fig. 3 can also be obtained.

[0054] In the Fig. 11, the number of times of heating and cooling process by a reflow device can be reduced compared with the method shown in Fig. 10 for manufacturing the semiconductor device 1 can be reduced. As a result, productivity in the manufacturing steps of the semiconductor device 1 can be increased. Furthermore, since the number of heating and cooling processes can be reduced, the thermal history of the semiconductor device 1 can be suppressed. Accordingly, the occurrence of defects resulting from the thermal history, for example, deformation in the connecting portion 11c that bonds the semiconductor element 2 and the substrate 4 or warpage of each component of the semiconductor device 1, can be suppressed.Furthermore, in a case where a special jig is used for aligning the semiconductor element 2, the bonding material 11 and the terminals 5a, 5b, the alignment of those components can be performed in a batch before step (S4a), so that the working processes using a special jig can be simplified compared with the step shown in . Fig. 10. Furthermore, the same bonding material 11 can be used for the bonding material 11 constituting the connecting portion 11a, the connecting portion 11b, and the connecting portion 11c. Thus, the operation can be simplified compared with the case where the type of the bonding material 11 for the connecting portion 11a and connecting portion 11b is changed from that of the connecting portion 11c. Furthermore, an inconvenience such as applying the bonding material 11 of a different design type to each connecting portion can be avoided. <betriebseffekte>

[0055] The semiconductor device 1 according to the present disclosure includes a semiconductor element 2 having an electrode 3, a substrate 4, a terminal 5a, a terminal 5b, a terminal 5c, a metal wire interconnection 12, and a sealing resin 14. The semiconductor element 2 is mounted on the substrate 4 with a bonding material 11 interposed therebetween. The semiconductor element 2 has the electrode 3 on a surface opposite to a surface opposite the substrate 4. The terminal 5c is connected to the electrode 3 of the semiconductor element 2 via the metal wire interconnection 12. The terminal 5a and the terminal 5b each include a through-hole 6 and have a plurality of recessed step portions 7 inside the through-hole 6. The bonding material 11 covers the step portions 7 inside the through-hole 6 and is in contact with the electrode 3 of the semiconductor element 2.In other words, the electrode 3 is connected to a connecting portion 11a containing the bonding material 11 covering the step portions 7 inside the through-hole 6 of the terminal 5a. The substrate 4 is connected to a connecting portion 11b containing the bonding material 11 covering the step portions 7 inside the through-hole 6 of the terminal 5b.

[0056] In this configuration, the connection area between the terminal 5a and the connection portion 11a and the connection area between the terminal 5b and the connection portion 11b are enlarged to achieve an anchoring effect. Thus, the bonding strength of the connection portion 11a can be improved compared with a case where the through-hole 6 does not have step portions 7. As a result, a semiconductor device 1 with high reliability and a long lifetime can be obtained. Furthermore, even if cracking occurs in the connection portion 11a, the complicated shape of the connection portion 11a can suppress crack propagation. Similar effects can also be achieved in the connection portion 11b.

[0057] In the above semiconductor device 1, as shown in Fig. 3, the bonding material 11 is bonded from the inside of the through-hole 6 to the first main surface 8a and the second main surface 8b. In other words, the connecting portion 11a, which bonds the terminal 5a and the semiconductor element 2, is formed such that the interface between the connecting portion 11a and the terminal 5a extends not only on the side surface 6a of the through-hole 6 containing the step portions 7, but also to the first main surface 8a and the second main surface 8b of the terminal 5a. In this configuration, the connecting portion 11a is shaped like a rivet, and the bonding strength of the connecting portion 11a is increased. Similar effects can also be achieved in the connecting portion 11b.

[0058] The material of the bonding material 11 used in the above semiconductor device 1 may include any one selected from the group consisting of a solder, a sintered material, and an adhesive. If the bonding material 11 is a solder, the bonding material 11 adheres to the surface of the terminal 5 (the side surface 6a of the through-hole 6 and the surface of the step portions 7) due to the wettability of the solder, thereby ensuring the bonding strength between the connecting portion 11a and the terminal 5.

[0059] If the bonding material 11 is a sintered material using fine particles of a metal containing silver (Ag) or copper (Cu), the connecting portion 11a with high heat dissipation can be obtained. Furthermore, since the through-hole 6 has a shape that is not closed, the solvent contained in the sintered material can be readily volatilized, and the solvent can be removed from the connecting portion 11a in the heating step for forming the connecting portion 11a. As a result, the step portions 7 of the through-hole 6 can be reliably covered with the bonding material 11, and the formation of voids in the connecting portion 11a can be prevented. If the bonding material 11 is a sintered material or a resin-containing adhesive, the elasticity of the connecting portion 11a and the connecting portion 11b can be reduced.As a result, a semiconductor device 1 with high reliability and long lifetime can be obtained.

[0060] In the above semiconductor device 1, the terminal 5a and the terminal 5b each have a plating layer 10 formed in a region in contact with the bonding material 11. In other words, in the terminals 5a, 5b, the plating layer 10 may be disposed on the interface with the bonding material 11. The above plating layer 10 contains, as a main component, any element selected from the group consisting of nickel (Ni), silver (Ag), gold (Au), and tin (Sn). In other words, the above plating layer 10 may be any element selected from the group consisting of nickel plating, silver plating, gold plating, and tin plating. In this configuration, the adhesion of the terminal 5 to the bonding material 11 at the interface with the connecting portion 11a, 11b can be improved, thereby preventing the occurrence of a non-bonded portion.As a result, the bonding strength between the connecting portion 11a, 11b and the terminal 5 can be ensured. In particular, in a case where the bonding material 11 is a solder, the plating layer 10 improves the wettability of the solder, so that, for example, the bonding material 11 can adhere well to the step portions 7 of the through-hole 6. Second embodiment<Konfiguration einer Halbleitervorrichtung>

[0061] Fig. 12 is a cross-sectional view of the semiconductor device 1 according to a second embodiment. Fig. 12 corresponds to Fig. 2. The Fig. 12 has essentially a configuration similar to that shown in Fig. 1 to Fig. 3, but differs in that a cooler 15 is bonded to a metal layer 13b of the heat-dissipating insulating film 13. Specifically, the cooler 15 is bonded to the metal layer 13b of the heat-dissipating insulating film 13 exposed on the sealing resin 14, with a bonding portion 11d interposed therebetween.

[0062] When the operating temperature of a semiconductor element 2 exceeds a rated value, the switching performance of the semiconductor element 2 deteriorates, and in the worst case, thermal runaway occurs, causing damage to the semiconductor element 2. Therefore, in addition to the substrate 4 with high thermal conductivity, the cooler 15 is disposed with an insulating heat dissipation film 13 interposed therebetween, whereby the heat dissipation and cooling performance in the semiconductor device 1 can be improved. For example, a material selected from the group consisting of the above-described bonding material 11, a thermal grease, and a thermally conductive interlayer material (TIM) can be disposed on the lower surface of the insulating heat dissipation film 13, and the substrate 4 and the cooler 15 can be connected by means of a connecting portion 11d formed from the above material.

[0063] The material of the cooler 15 is, for example, a metal with high thermal conductivity, including aluminum (Al). The cooler 15 has a plurality of radiating fins 15a. The cooling method of the cooler 15 can be air cooling or water cooling. Furthermore, the connecting portion 11d is not necessarily formed, and the substrate 4 and the cooler 15 can be integrated. In this case, since the connecting portion 11d is not formed, there is no interface resulting from the presence of the connecting portion 11d, so that the thermal resistance at the interface can be eliminated. As a result, heat dissipation from the heating semiconductor element 2 and the cooling performance in the semiconductor device 1 are improved. If the substrate 4 and the cooler 15 are integrated, an insulating layer 13a in the form of a flat film is interposed between the substrate 4 and the cooler 15.The material forming the insulating layer 13a may be an inorganic material selected from the group consisting of aluminum oxide (Al2O3), aluminum nitride (AlN), silicon nitride (Si3N4), silicon dioxide (SiO2), and boron nitride (BN), or an organic material selected from the group consisting of an epoxy resin, a polyimide resin, an acrylic resin, and a polyphenylene sulfide (PPS) resin. < Operating effects >

[0064] The above semiconductor device 1 may include a cooler 15 bonded to the substrate 4 with the heat-dissipating insulating film 13 interposed therebetween. Specifically, the semiconductor device 1 may include the cooler 15 bonded to a metal layer 13b of the heat-dissipating insulating film 13 exposed from the sealing resin 14, with a bonding portion 11d interposed therebetween. With this configuration, heat dissipation from the heating semiconductor element 2 and cooling performance in the semiconductor device 1 can be improved.

[0065] The above semiconductor device 1 may include a cooler 15 bonded to the substrate 4. Specifically, the semiconductor device 1 may include the cooler 15 directly bonded to the substrate 4 without interposing the insulating heat dissipation film 13 therebetween. In this configuration, an expensive insulating heat dissipation film 13 is unnecessary in the manufacture of the semiconductor device 1, and therefore, the manufacturing cost of the semiconductor device 1 can be reduced. Third embodiment<Konfiguration einer Halbleitervorrichtung>

[0066] Fig. 13 is a cross-sectional view of a semiconductor device 1 according to a third embodiment. Fig. 13 corresponds to Fig. 2. Fig. 14 is a partially enlarged cross-sectional view of an area XIV in Fig. 13. Fig. 14 corresponds to Fig. 3. The Fig. 13 and Fig. 14 has essentially a configuration similar to that shown in Fig. 1 to Fig. 3, but differs from the semiconductor device 1 shown in Fig. 1 to Fig. 3 shown semiconductor device 1 in the form of the through hole 6. Specifically, as in Fig. 14, in a through-hole 6 provided in the terminal 5, a second opening area S2 of the through-hole 6 on the second main surface 8b is smaller than a first opening area S1 of the through-hole 6 on the first main surface 8a. Viewed from another angle, in the through-hole 6 provided in both the terminal 5a and the terminal 5b, the width of the through-hole 6 on the second main surface 8b is narrower than the width of the through-hole 6 on the first main surface 8a. The extending direction of the lateral surface 6a of the through-hole 6 is inclined with respect to the first main surface 8a. The lateral surface 6a of the through-hole 6 is inclined so as to face the electrode 3 of the semiconductor element 2.

[0067] As in Fig. 13 and Fig. 14, the number of step portions 7 having a recessed shape in a side surface 6a of the through-hole 6 is one. However, in order to improve the anchoring effect, it is preferable that a plurality of step portions 7 are formed. As shown in Fig. 14, the connection width w with the bonding material 11 at the first main surface 8a of the terminal 5a is larger than the step width t. When the bonding material 11 attached to the semiconductor element 2 is heated in a reflow apparatus, particularly when the bonding material 11 is a solder, the bonding material 11 wets the first main surface 8a due to the effect of the wettability of the bonding material 11 and spreads in a direction away from the through-hole 6. For this reason, the connection width w with the bonding material 11 at the first main surface 8a is larger than the step width t. <betriebseffekte>

[0068] In the above semiconductor device 1, the terminal 5a may have a first main surface 8a facing the electrode 3 of the semiconductor element 2 and a second main surface 8b opposite the first main surface 8a. The through-hole 6 may be formed so that it starts from the first main surface 8a and reaches the second main surface 8b. The second opening area S2 of the through-hole 6 on the second main surface 8b may be smaller than the first opening area S1 of the through-hole 6 on the first main surface 8a. In other words, in the above semiconductor device 1, the through-hole 6 arranged in the terminal 5 is shaped so that the second opening area S2 of the through-hole 6 on the second main surface 8b is smaller than the first opening area S1 of the through-hole 6 on the first main surface 8a.In this configuration, a plate-shaped bonding material 11 can be fitted into the inside of the through hole 6 from the first main surface 8a side in the manufacturing step of the semiconductor device 1, so that the bonding material 11 can be easily arranged and fixed. <Konfiguration und Betriebseffekte einer Modifikation>

[0069] Fig. 15 is a cross-sectional view of a modification of the semiconductor device 1 according to the third embodiment. Fig. 15 corresponds to Fig. 13. Fig. 16 is a partially enlarged cross-sectional view of an area XVI in Fig. 15. Fig. 16 corresponds to Fig. 14. The Fig. 15 and Fig. 16 has essentially a configuration similar to that shown in Fig. 13 and Fig. 14, but differs from the semiconductor device shown in Fig. 13 to Fig. 14 in the form of the connecting portion 11a and the connecting portion 11b. As shown in Fig. 16, specifically, at the connecting portion 11a, an upper surface of the bonding material 11 is arranged between the step portion 7 in the through-hole 6 and the second main surface 8b. In other words, the connection interface between the connecting portion 11a and the terminal 5a does not extend to the second main surface 8b, which is the upper surface of the terminal 5a. The connecting portion 11a does not extend to the second main surface 8b. The upper surface of the bonding material 11 has, as shown in Fig. 16, but may have a protruding shape depending on the material of the bonding material 11 and the terminal 5, the heating conditions, or the like. The upper surface is formed by a curved surface. This configuration can also achieve effects similar to those achieved by the Fig. 13 and Fig. 14 shown semiconductor device 1 can be achieved.

[0070] The rated current of the semiconductor device 1 may exceed 1000 A, for example, because the required power capacity of the semiconductor device 1 tends to increase. In this case, the thickness of the terminal 5 sometimes exceeds 1.2 mm. In such a case, the heat capacity of the terminal 5 is large, and the temperature gradient in the thickness direction (the C direction in Fig. 16) of the terminal 5 due to the heat transferred from the semiconductor element 2 and bonding material 11 to the terminal 5 during heating by a reflow device. Consequently, the temperature on the first main surface 8a side is higher than on the second main surface 8b side of the terminal 5a and the terminal 5b. As a result, the bonding material 11 near the first main surface 8a is kept in a molten state for a long time, whereas the bonding material 11 near the second main surface 8b begins to harden earlier at a relatively low temperature. The connecting portion 11a and the connecting portion 11b, as shown in Fig. 15 and Fig. 16 are thus formed. Fourth embodiment<Konfiguration einer Halbleitervorrichtung>

[0071] Fig. 17 is a cross-sectional view of a semiconductor device 1 according to a fourth embodiment. Fig. 17 corresponds to Fig. 2. Fig. 18 is a partially enlarged cross-sectional view of an area XVIII in Fig. 17. Fig. 18 corresponds to Fig. 3. The Fig. 17 and Fig. 18 has essentially a configuration similar to that shown in Fig. 1 to Fig. 3, but differs from the semiconductor device 1 shown in Fig. 1 to Fig. 3 shown semiconductor device 1 in the form of the through hole 6. Specifically, as shown in Fig. 18, a through-hole 6 disposed in the terminal 5 has a shape such that a second opening area S2 of the through-hole 6 on the second main surface 8b is larger than a first opening area S1 of the through-hole 6 on the first main surface 8a. Viewed from another angle, in the through-hole 6 disposed in both the terminal 5a and the terminal 5b, the width of the through-hole 6 on the second main surface 8b is larger than the width of the through-hole 6 on the first main surface 8a. The extending direction of the side surface 6a of the through-hole 6 is inclined with respect to the first main surface 8a. The side surface 6a of the through-hole 6 is inclined so as to face the side (upper side) opposite to the electrode 3 side of the semiconductor element 2 when viewed from the terminal 5.Due to this shape of the through hole 6, the method for producing the in . Fig. 17 and Fig. 18 of the method for manufacturing a semiconductor device 1 shown in Fig. 1 to Fig. 3, as will be described later. <Verfahren zum Herstellen einer Halbleitervorrichtung>

[0072] Now, a method of manufacturing the semiconductor device 1 according to the fourth embodiment will be described. Fig. 19 is a flowchart of a method for manufacturing the semiconductor device 1 according to the fourth embodiment. Fig. 19 for manufacturing the semiconductor device 1 essentially comprises steps similar to those of the method shown in Fig. 10 for manufacturing the semiconductor device 1; however, a second mounting step (S5b) and a second bonding step (S6b) differ from the second mounting step (S5) and the second bonding step (S6) shown in Fig. 10 are shown.

[0073] As in Fig. 19, a step of preparing the substrate 4 and the semiconductor element 2 (S1b), a first mounting step (S2b), a first bonding step (S3b) and a metal wire interconnection step (S4b) are performed in the same manner as the step (S1), the step (S2), the step (S3) and the step (S4) shown in Fig. 10. Subsequently, the second assembly step (S5b) is performed. In this step (S5b), the terminal 5a is aligned with the electrode 3 of the semiconductor element 2 bonded to the substrate 4 without applying a bonding material 11. Furthermore, the terminal 5b is aligned with the substrate 4.

[0074] Next, a second bonding step (S6b) is performed. In this step (S6b), while heating the substrate 4, the semiconductor element 2, and the terminal 5a and the terminal 5b, the molten bonding material 11 as a bonding material 11 having fluidity is injected into the through-hole 6 from the upper surface side (the second main surface 8b) of the terminal 5a and the terminal 5b, for example, by means of a syringe. In this case, since the second opening area S2 of the through-hole 6 on the second main surface 8b of both the terminal 5a and the terminal 5b is larger than the first opening area S1 of the through-hole 6 on the first main surface 8a, the position where the molten bonding material 11 is to be applied is easily determined.

[0075] Subsequently, a sealing step (S6a) is carried out in the same manner as in Fig. 10 is carried out. The step (S7) shown in Fig. 17 and Fig. 18 can be obtained in this way. <betriebseffekte>

[0076] In the above semiconductor device 1, in the terminal 5, the second opening area S2 of the through-hole 6 on the second main surface 8b may be larger than the first opening area S1 of the through-hole 6 on the first main surface 8a. In other words, the through-hole 6 arranged in the terminal 5 is shaped so that the second opening area S2 of the through-hole 6 on the second main surface 8b is larger than the first opening area S1 of the through-hole 6 on the first main surface 8a. In this configuration, when the molten bonding material 11 is applied to the through-hole 6 from the second main surface 8b side, the application position of the molten bonding material 11 can be easily determined. Such a manufacturing method is effective, for example, in a case where it is difficult to attach and align a plate-shaped bonding material 11 on the electrode 3.

[0077] For example, if a solder is used as the bonding material 11, due to the wettability of the solder, the solder applied to the upper surface side of the through-hole 6 wets and spreads to a tiny portion in the side surface 6a of the through-hole 6. Thus, even if the application of the solder is slightly offset, the semiconductor element 2 and the terminal 5 are smoothly bonded. If a sintered material is used as the bonding material 11, if a sintered material is applied by the above-described method, sintering of the sintered material can progress during the application process. Furthermore, even in a case where an adhesive is used as the bonding material 11, if the adhesive is applied by the above-described method, curing of the adhesive can progress.In this case, the viscosity of the bonding material 11 may be adjusted so that it is easily applied before the bonding material 11 is applied to the through hole 6 of the terminal 5 at room temperature with a syringe or the like. Fifth embodiment<Konfiguration einer Halbleitervorrichtung>

[0078] Fig. 20 is a cross-sectional view of a semiconductor device 1 according to a fifth embodiment. Fig. 20 corresponds to Fig. 2. Fig. 21 is a partially enlarged view immediately after the bonding material 11 is applied to the electrode 3 of the semiconductor element 2 in a method of manufacturing a semiconductor device 1 according to the fifth embodiment. Fig. 22 is a partially enlarged cross-sectional view of an area XXII in Fig. 20. Fig. 22 corresponds to Fig. 3. The Fig. 20 to Fig. 22 has essentially a configuration similar to that shown in Fig. 1 to Fig. 3, but differs from the semiconductor device 1 shown in Fig. 1 to Fig. 3 in the form of the through-hole 6. Specifically, a step portion 7 having a projecting shape is formed in the side surface 6a of the through-hole 6 in the Fig. 20 to Fig. 22. In the through-hole 6, the first opening area S1 and the second opening area S2 are larger than a smallest hole area S3 in a narrow region L.

[0079] The narrow region L, which is a first region, is a region inside the through-hole 6 and is spaced from the first main surface 8a by a first distance I in the C direction, which is a direction along the central axis R of the through-hole 6. The narrow region L has the smallest hole area S3, that is, a smallest hole area in the through-hole 6. The step portion 7 has a protruding shape in the Fig. 21 (cross section including the central axis R of the through-hole 6). A third step surface 7c in the step portion 7 is located at a position closest to the central axis R of the through-hole 6. The hole surface of the through-hole 6 is substantially uniform except for a portion where the step portion 7 exists in the C direction. In other words, the side surface 6a of the through-hole 6 is substantially perpendicular to the first main surface 8a and the second main surface 8b in a region excluding the step portion 7.

[0080] The connecting portion 11a formed from the bonding material 11 is connected to the electrode 3 of the semiconductor element 2 and is in contact with a portion adjacent to the through-hole 6 in the first main surface 8a of the terminal 5a. The connecting portion 11a fills an area on the side closer to the first main surface 8a than the step portion 7 in the through-hole 6. A part of the connecting portion 11a is arranged to extend above the step portion 7. A part of the connecting portion 11a is in contact with the third step surface 7c, which is an end surface of the step portion 7, and a first step surface 7a, which is a top surface. The top end of the bonding material 11 does not reach the second main surface 8b.The upper surface of the bonding material 11 is shaped like a curved surface protruding toward the second main surface 8b. The shape of the through-hole 6 of the terminal 5b and the shape of the connecting portion 11b connected to the terminal 5b are similar to the shape of the through-hole 6 of the terminal 5a and the shape of the connecting portion 11a connected to the terminal 5a described above.

[0081] In a process for producing the Fig. 20 can essentially use a method similar to the method for manufacturing the semiconductor device 1 shown in Fig. 1 to Fig. 3 shown semiconductor device 1 can be used. For example, if the semiconductor device shown in Fig. 10 is used, after the step (S1) to step (S4) are carried out, in the second assembly step (S5) as shown in Fig. 21, a plate-shaped bonding material 11 having an area equal to or slightly smaller than a first opening area S1 of the through-hole 6 on the first main surface 8a is first applied to the electrode 3 of the semiconductor element 2 and to the substrate 4 (see Fig. 20). Subsequently, the terminal 5a and the terminal 5b are arranged such that the through-hole 6 overlaps the bonding material 11. By doing so, the bonding material 11 overlaps the through-hole 6 or the upper portion of the bonding material 11 is inserted into the interior of the through-hole 6, thereby facilitating the arrangement and fixing of the terminal 5a and the terminal 5b to the bonding material 11. Subsequently, the second bonding step (S6) is carried out in Fig. 10, whereby the bonding material 11 inside the through-hole 6 as in Fig. 22. After that, the sealing step (S7) is carried out in Fig. 10, which led to the Fig. 20 shown semiconductor device 1.

[0082] The first opening area S1 may be different from the second opening area S2. In view of the bonding strength, it is preferable that the first opening area S1 be larger than the second opening area S2. Furthermore, since the second opening area S2 is larger than the smallest hole area S3, the manufacturing method described in the fourth embodiment can be used as the method for manufacturing the semiconductor device 1 according to the present embodiment. <betriebseffekte>

[0083] In the above semiconductor device 1, the through-hole 6 may have the narrow region L serving as a first region where the area in the radial direction of the through-hole 6 is the smallest. The first opening area S1 of the through-hole 6 on the first main surface 8a and the second opening area S2 of the through-hole 6 on the second main surface 8b may be larger than the area in the narrow region L (smallest hole area S3). In this configuration, a plate-shaped bonding material 11 having an area equal to or slightly smaller than the first opening area S1 is used to facilitate relative alignment and fixation between the bonding material 11 and both the terminal 5a and the terminal 5b. Further, as shown in Fig. 22, the connecting portion is shaped like a rivet, which increases the bonding strength of the connecting portion 11a. <Konfiguration und Betriebseffekte einer Modifikation>

[0084] Fig. 23 is a cross-sectional view of a modification of the semiconductor device 1 according to the fifth embodiment. Fig. 23 corresponds to Fig. 20. Fig. Fig. 24 is a partially enlarged view in a state in which the bonding material 11 is deposited on the electrode 3 of the semiconductor element 2 in a method of manufacturing the semiconductor device shown in Fig. 23 shown semiconductor device 1 is attached. Fig. 24 corresponds to Fig. 21. Fig. 25 is a partially enlarged cross-sectional view of an area XXV in Fig. 23. Fig. 25 corresponds to Fig. 22.

[0085] The Fig. 23 and Fig. 25 has essentially a configuration similar to that shown in Fig. 20 to Fig. 22, but differs from the semiconductor device 1 shown in Fig. 20 to Fig. 22 in the form of the through-hole 6. Specifically, the side surface 6a is inclined with respect to the first main surface 8a and the second main surface 8b so that the narrow region L is formed at a central portion in a direction along the central axis R in the through-hole 6. In other words, the side surface 6a of the through-hole 6 intersects the first main surface 8a and the second main surface 8b at an angle so that the hole area gradually increases from the narrow region L toward both the first main surface 8a and the second main surface 8b. In the narrow region L, a depressed step portion 7 is arranged in the side surface 6a. The third step surface 7c is arranged at a position farther from the central axis R than the first step surface 7a and the second step surface 7b.The first step surface 7a and the second step surface 7b extend in a direction orthogonal to the central axis R. The recessed step portion 7 is formed in a ring shape so as to extend around the central axis R in the circumferential direction. The step portion 7 may be formed only at a part in the circumferential direction.

[0086] As in Fig. 25, the connecting portion 11a created from the bonding material 11 connects the electrode 3 and the terminal 5a in the same manner as the connecting portion 11a shown in Fig. 22. The connecting portion 11a is connected to the electrode 3 of the semiconductor element 2 and in contact with a portion adjacent to the through-hole 6 in the first main surface 8a of the terminal 5a. The surface (side surface) of the connecting portion 11a, located between the electrode 3 and the first main surface 8a, is depressed and curved. The connecting portion 11a fills an area closer to the first main surface 8a than the step portion 7 in the through-hole 6 and the interior of the step portion 7 in a depressed shape. A part of the connecting portion 11a is arranged to extend above the step portion 7. A part of the connecting portion 11a is in contact with a part of a side surface 6a located above the step portion 7 (the second main surface 8b side).The upper end of the bonding material 11 does not reach the second main surface 8b. The upper surface of the bonding material 11 is shaped like a curved surface protruding toward the second main surface 8b. The shape of the through-hole 6 of the terminal 5b and the shape of the connecting portion 11b connected to the terminal 5b shown in FIG. Fig. 23 is similar to the shape of the through hole 6 of the terminal 5a and the shape of the connecting portion 11a connected to the terminal 5a, which was described above.

[0087] In a process for producing the Fig. 23 can essentially use a method similar to the method for manufacturing the semiconductor device 1 shown in Fig. 20 shown semiconductor device 1. In the method for producing the semiconductor device shown in Fig. 23 is assembled in the second assembly step (S5) in Fig. 10, as in Fig. 24, a plate-shaped bonding material 11 having an area equal to or slightly smaller than the first opening area S1 of the through-hole 6 on the first main surface 8a is applied to the electrode 3 of the semiconductor element 2 and to the substrate 4 (see Fig. 23). The terminal 5a and the terminal 5b are then arranged so that the through-hole 6 overlaps the bonding material 11.

[0088] In this configuration, as in the process for producing the Fig. 20, a plate-shaped bonding material 11 having an area equal to or slightly smaller than the first opening area S1 is used to facilitate arrangement and fixing of the terminal 5a and the terminal 5b to the bonding material 11. As shown in Fig. 25, furthermore, since the connecting portion 11a, 11b has a complicated shape (a structure in which the connecting area with the side surface 6a of the through-hole 6 is relatively large) near the step portion 7, the bonding strength of the connecting portion 11a and the connecting portion 11b can be increased. Sixth embodiment

[0089] In the present embodiment, the semiconductor device according to the foregoing first to fifth embodiments is applied to a power conversion device. Although the present disclosure is not limited to any specific power conversion device, a case where the present disclosure is applied to a three-phase inverter will be described as the sixth embodiment.

[0090] Fig. 26 is a block diagram illustrating a configuration of a power conversion system in which a power conversion device according to the present embodiment is used.

[0091] The Fig. The power conversion system illustrated in Figure 26 includes a power source 20, a power conversion device 16, and a load 21. The power source 20 is a DC power source for supplying DC power to the power conversion device 16. The power source 20 may be configured with a variety of sources and may be configured with, for example, a DC system, a solar battery, or a storage battery, or may be configured with a rectifying circuit or an AC / DC converter connected to an AC system. The power source 20 may be configured with a DC / DC converter that converts DC power output from a DC system into a prescribed power.

[0092] The power conversion device 16 is a three-phase inverter connected between the power source 20 and the load 21 to convert the DC power supplied by the power source 20 into AC power and supply the AC power to the load 21. As shown in Fig. 26, the power conversion device 16 includes a main conversion circuit 17 for converting DC power into AC power and outputting the AC power, a drive circuit 18 for outputting a drive signal for driving each switching element in the main conversion circuit 17, and a control circuit 19 for outputting a control signal for controlling the drive circuit 18 to the drive circuit 18.

[0093] The load 21 is a three-phase motor driven by AC power supplied by the power conversion device 16. The load 21 is a motor that is not limited to any specific applications and is installed in a variety of electrical instruments and used, for example, as a motor for hybrid vehicles, electric vehicles, railway vehicles, elevators, or air conditioning systems.

[0094] The details of the power conversion device 16 are described below. The main conversion circuit 17 includes switching elements and freewheeling diodes (not shown), and the switching elements perform a switching operation to convert DC power supplied from the power source 20 into AC power to be supplied to the load 21. There are a variety of circuit configurations of the main conversion circuit 17. The main conversion circuit 17 according to the present embodiment may be a three-phase, two-level, full-bridge circuit and include six switching elements and six freewheeling diodes connected in anti-parallel to the respective switching elements. The semiconductor device 1 according to any one of the foregoing first to fifth embodiments is used for each switching element in the main conversion circuit 17.Six switching elements are connected in pairs in series to form upper and lower arms, and the upper and lower arms form each phase (U-phase, V-phase, W-phase) of a full-bridge circuit. The output terminals of the upper and lower arms, i.e., three output terminals of the main conversion circuit 17, are connected to the load 21.

[0095] The drive circuit 18 generates a drive signal for driving a switching element in the main conversion circuit 17 and supplies the drive signal to the control electrode of the switching element of the main conversion circuit 17. Specifically, a drive signal to turn on a switching element and a drive signal to turn off a switching element are output to the control electrode of each switching element according to the control signal from the control circuit 19, which will be described later. When the switching element is kept ON, the drive signal is a voltage signal (ON signal) equal to or higher than a threshold voltage of the switching element. When the switching element is kept OFF, the drive signal is a voltage signal (OFF signal) equal to or lower than a threshold voltage of the switching element.

[0096] The control circuit 19 controls the switching elements of the main conversion circuit 17 so as to supply a desired power to the load 21. Specifically, the time during which each switching element of the main conversion circuit 17 is to be turned on (ON time) is calculated based on the power to be supplied to the load 21. For example, the main conversion circuit 17 can be controlled by PWM control, which modulates the ON time of the switching elements according to the voltage to be supplied. A control command (control signal) is output to the drive circuit 18 so that, at each time, an ON signal is output to a switching element to be turned ON and an OFF signal is output to a switching element to be turned OFF. The drive circuit 18 outputs an ON signal or an OFF signal as a drive signal to the control electrode of each switching element according to the control signal.

[0097] In the power conversion device according to the present embodiment, since the semiconductor device according to any one of the first to fifth embodiments is used as each switching element in the main conversion circuit 17, a power conversion device with high reliability and long life can be realized.

[0098] In the present embodiment, a two-level power conversion device was described. However, the present embodiment is not limited to this and can be applied to a variety of power conversion devices. In the present embodiment, a two-level power conversion device was described; however, the first to fifth embodiments can be applied to a three-level or more power conversion device, or to a single-phase inverter when supplying power to a single-phase load. When supplying power to a DC load or the like, the present disclosure can also be applied to a DC / DC converter or an AC / DC converter.

[0099] The power conversion device to which the present disclosure is applied is not limited to the case where the load is a motor, and may be used as a power supply device for electrical discharge machines or laser machines or induction heating cooking devices or wireless charging systems, or may be used as a power conditioner for photovoltaic systems or power storage systems.< / betriebseffekte> < / betriebseffekte> < / betriebseffekte> < / betriebseffekte>

Claims

[1] Semiconductor device (1), comprising: - a semiconductor element (2) having an electrode (3); - a substrate (4) having the semiconductor element (2) mounted thereon; - a connection (5a), - which is arranged so that it is opposite the electrode (3) of the semiconductor element (2), and - which has a through hole (6) with a stepped portion (7); and - a bonding material (11, 11a, 11c) covering the step portion (7) within the through-hole (6) and in contact with the electrode (3) of the semiconductor element (2). [2] A semiconductor device (1) according to claim 1, wherein: - the connection (5a) has: - a first main surface (8a) facing the electrode (3) of the semiconductor element (2), and - has a second main surface (8b) opposite to the first main surface (8a), - the through hole (6) is formed so that it starts from the first main surface (8a) and reaches the second main surface (8b), and - a second opening area (S2) of the through-hole (6) on the second main surface (8b) is smaller than a first opening area (S1) of the through-hole (6) on the first main surface (8a). [3] A semiconductor device (1) according to claim 1, wherein: - the connection (5a) has: - a first main surface (8a) facing the electrode (3) of the semiconductor element (2), and - a second main surface (8b) opposite to the first main surface (8a), - the through hole (6) is formed so that it starts from the first main surface (8a) and reaches the second main surface (8b), and - a second opening area (S2) of the through-hole (6) on the second main surface (8b) is larger than a first opening area (S1) of the through-hole (6) on the first main surface (8a). [4] A semiconductor device (1) according to claim 1, wherein: - the connection (5a) - a first main surface (8a) facing the electrode (3) of the semiconductor element (2), and - has a second main surface (8b) opposite to the first main surface (8a), - the through hole (6) is formed so that it starts from the first main surface (8a) and reaches the second main surface (8b), and - the through-hole (6) has a first region in which an area in a radial direction of the through-hole (6) is smallest, and - a first opening area (S1) of the through-hole (6) on the first main surface (8a) and a second opening area (S2) of the through-hole (6) on the second main surface (8b) are larger than the area in the first region. [5] The semiconductor device (1) according to any one of claims 2 to 4, wherein the bonding material (11, 11a, 11c) extends from the interior of the through-hole (6) to the first main surface (8a) and to the second main surface (8b). [6] The semiconductor device (1) according to any one of claims 1 to 4, wherein a material constituting the bonding material (11, 11a, 11c) includes one selected from the group consisting of a solder, a sintered material, and an adhesive. [7] The semiconductor device (1) according to any one of claims 1 to 4, wherein the terminal (5a) has a plating layer (10) formed in a region in contact with the bonding material (11, 11a, 11c). [8] A semiconductor device (1) according to claim 7, wherein the plating layer (10) contains, as a main component, at least one element selected from the group consisting of nickel, silver, gold and tin. [9] A semiconductor device (1) according to any one of claims 1 to 4, wherein the substrate (4) contains aluminum or copper as a main component. [10] A semiconductor device (1) according to any one of claims 1 to 4, further comprising an insulating heat dissipation film (13) bonded to a surface opposite to a surface having the semiconductor element (2) on the substrate (4), wherein the insulating heat dissipation foil (13) an insulating layer (13a) and a metal layer (13b) laminated onto the insulating layer (13a). [11] The semiconductor device (1) according to claim 10, further comprising a cooler (15) connected to the substrate (4) with the insulating heat dissipation film (13) interposed therebetween. [12] Semiconductor device (1) according to one of claims 1 to 4, further comprising a cooler (15) connected to the substrate (4). [13] A semiconductor device (1) according to any one of claims 1 to 4, further comprising a sealing resin (14) covering the semiconductor element (2), the substrate (4) and a part of the terminal (5a). [14] A semiconductor device (1) according to any one of claims 1 to 4, wherein the semiconductor element (2) is an insulated gate bipolar transistor. [15] A semiconductor device (1) according to any one of claims 1 to 4, wherein the semiconductor element (2) comprises a wide band gap semiconductor. [16] Power conversion device comprising: - a main conversion circuit (17) comprising a semiconductor device (1) according to claim 1, wherein the main conversion circuit converts input power and outputs the converted power; - a drive circuit (18) for outputting a drive signal for driving the semiconductor device to the semiconductor device; and - a control circuit (19) for outputting a control signal for controlling the drive circuit (18) to the drive circuit (18). [17] A method of manufacturing a semiconductor device (1), wherein: - the procedure has: - a step (S1) of preparing a substrate (4), a semiconductor element (2) having an electrode (3), and a terminal (5a) having a through-hole (6) with a step portion (7); - a step (S2) of mounting the semiconductor element (2) on the substrate (4) with a first bonding material (11, 11c) arranged therebetween; - a step (S3) of heating the first bonding material (11, 11c) to bond the semiconductor element (2) to the substrate (4) with the first bonding material (11, 11c) arranged therebetween; - a step (S5) of mounting the terminal (5a) on the electrode (3) of the semiconductor element (2) with a second bonding material (11, 11a) arranged therebetween; and - a step (S6) of heating the second bonding material (11, 11a) to bond the terminal (5a) to the electrode (3) with the second bonding material (11, 11a) arranged therebetween, - in the step (S6) for bonding the terminal (5a), the second bonding material (11, 11a) covers the step portion (7) of the through-hole (6) and is in contact with the electrode (3) of the semiconductor element (2). [18] A method of manufacturing a semiconductor device (1), wherein: - the procedure has: - a step (S1a) of preparing a substrate (4), a semiconductor element (2) having an electrode (3), and a terminal (5a) having a through-hole (6) with a step portion (7); - a step (S2a) of mounting the semiconductor element (2) on the substrate (4) with a first bonding material (11, 11c) arranged therebetween; - a step (S3a) of mounting the terminal (5a) on the electrode (3) of the semiconductor element (2) with a second bonding material (11, 11a) arranged therebetween; and - a step (S4a) of heating the first bonding material (11, 11c) and the second bonding material (11, 11a) to bond the semiconductor element (2) to the substrate (4) with the first bonding material (11, 11c) arranged therebetween and to bond the terminal (5a) to the electrode (3) with the second bonding material (11, 11a) arranged therebetween, and - in the bonding step (S4a), the second bonding material (11, 11a) covers the step portion (7) of the through-hole (6) and is in contact with the electrode (3) of the semiconductor element (2). [19] A method of manufacturing a semiconductor device (1), wherein: - the procedure has: - a step (S1b) of preparing a semiconductor element (2) having an electrode (3) and a terminal (5a) having a through-hole (6) with a step portion (7); - a step (S5b) of mounting the terminal (5a) on the electrode (3) so that the through-hole (6) overlaps the electrode (3) of the semiconductor element (2); and - a step (S6b) of supplying a bonding material (11, 11a, 11c) having flowability into the interior of the through-hole (6) to bond the terminal (5a) to the electrode (3) with the bonding material (11, 11a, 11c) arranged therebetween, and - in the step (S6b) for bonding the terminal (5a), the bonding material (11, 11a, 11c) covers the step portion (7) of the through-hole (6) and is in contact with the electrode (3) of the semiconductor element (2).

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