Gate driver, circuit and method

Abstract

A gate driver includes a supply voltage terminal, a bootstrap terminal connected to the supply voltage terminal, a driver having a power input terminal connected to the bootstrap terminal and an output connected to a gate control signal output terminal and configured to generate a gate drive signal at the gate control signal output terminal based on a voltage at the power input terminal, a clamp driver connected to the bootstrap terminal, a clamp transistor connected between a clamp signal input terminal and a reference voltage terminal and having a gate connected to the clamp driver, and an energy harvesting circuit connected between the clamp signal input terminal and the gate of the clamp transistor.

Description

TECHNICAL FIELD

[0001] The present disclosure relates generally to electronic circuits, and more particularly to a gate driver that reduces conduction activations, a circuit including a gate driver, and a corresponding method. BACKGROUND

[0002] A power semiconductor device comprises a semiconductor structure configured to conduct a load current along a load current path between two load terminal structures of the device. The load current path can be controlled by a gate electrode of the power semiconductor device. SUMMARY

[0003] This Summary is provided to introduce, in a simplified form, a selection of concepts that are further described below in the Detailed Description. This Summary is not intended to identify key factors or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.

[0004] According to some embodiments, a gate driver includes a supply voltage terminal, a bootstrap terminal connected to the supply voltage terminal, a driver having a power input terminal connected to the bootstrap terminal and an output connected to a gate control signal output terminal and configured to generate a gate drive signal at the gate control signal output terminal based on a voltage at the power input terminal, a clamp driver connected to the bootstrap terminal, a clamp transistor connected between a clamp signal input terminal and a reference voltage terminal and having a gate connected to the clamp driver, and an energy harvesting circuit connected between the clamp signal input terminal and the gate of the clamp transistor.

[0005] According to some embodiments, a circuit comprises a supply voltage terminal, a bootstrap terminal connected to the supply voltage terminal, a bootstrap capacitor connected to the bootstrap terminal, a high-side transistor, a low-side transistor, a high-side gate driver connected to the high-side transistor and having a power input terminal connected to the bootstrap terminal, a low-side gate driver connected to the low-side transistor, a controller configured to generate a start pulse using the low-side gate driver to charge the bootstrap capacitor, a clamp driver, a clamp transistor connected between a gate of the high-side transistor and a reference voltage terminal and having a gate connected to the clamp driver, and an energy harvesting circuit,which is connected between the gate of the high-side transistor and the gate of the clamping transistor and is configured to harvest energy from the gate of the high-side transistor in response to the start pulse and to activate the clamping transistor using the harvested energy.

[0006] According to some embodiments, a system comprises means for generating a start pulse, means for harvesting energy to be injected into a clamp signal input terminal in response to the start pulse, and means for activating a clamp transistor connected between the clamp signal input terminal and a reference voltage terminal using the harvested energy to provide a low-impedance path from the clamp signal input terminal to the reference voltage terminal.

[0007] According to some embodiments, a method comprises the steps of generating a start pulse, harvesting energy to be injected into a clamp signal input terminal in response to the start pulse, and activating a clamp transistor connected between the clamp signal input terminal and a reference voltage terminal using the harvested energy to provide a low-impedance path from the clamp signal input terminal to the reference voltage terminal.

[0008] To achieve the foregoing and related purposes, the following description and the accompanying drawings set forth certain illustrative aspects and implementations. These indicate only a few of the various ways in which one or more aspects may be employed. Other aspects, advantages, and novel features of the disclosure will become apparent from the following detailed description taken in conjunction with the accompanying drawings. DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic diagram of a circuit, such as for driving a load, according to some embodiments. Fig. 2 is a diagram of a circuit, such as for protection, according to some embodiments. Fig. 3 is a signal diagram illustrating the operation of a protection circuit according to some embodiments. Fig. 4 illustrates a method for driving a gate, such as a transistor, according to some embodiments. DETAILED DESCRIPTION

[0009] The claimed subject matter will now be described with reference to the drawings, wherein like reference numerals are used to refer to like elements throughout. In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the claimed subject matter. However, it may be apparent that the claimed subject matter may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form to facilitate description of the claimed subject matter.

[0010] Equivalent or identical elements, or elements with equivalent or identical functionality, are denoted by equivalent or identical reference numerals in the following description. Since the same or functionally equivalent elements are denoted by the same reference numerals in the figures, repeated descriptions for elements denoted by the same reference numerals can be omitted. Therefore, descriptions provided for elements with the same or identical reference numerals are interchangeable.

[0011] In this regard, directional terminology such as "above," "below," "below," "over," "front," "back," "rear," "leading," "trailing," etc., may be used with reference to the orientation of the figures just described. Because portions of embodiments may be positioned in a number of different orientations, the directional terminology is used for the purpose of illustration and is in no way limiting. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope defined by the claims. The following detailed description is, therefore, not to be taken in a limiting sense.

[0012] It should be understood that when an element is described as being "connected" or "coupled" to another element, it may be directly connected or coupled to the other element, or intervening elements may be present. In contrast, when an element is described as being "directly connected" or "directly coupled" to another element, no intervening elements are present. Other words used to describe the relationship between elements should be interpreted in a similar way (e.g., "between" versus "directly between," "adjacent" versus "directly adjacent," etc.).

[0013] In embodiments described herein or shown in the drawings, any direct electrical connection or coupling, i.e., any connection or coupling without additional intervening elements, may also be implemented by an indirect connection or coupling, i.e., a connection or coupling with one or more additional intervening elements, or vice versa, as long as the general purpose of the connection or coupling, for example, to transmit a certain type of signal or to transmit a certain type of information, is substantially maintained. Features from different embodiments may be combined to form further embodiments. For example, variations or modifications described with respect to one of the embodiments may also be applicable to other embodiments, unless stated otherwise.

[0014] The term "substantially" may be used herein to account for small manufacturing tolerances (e.g., within 5%) that are considered acceptable in the industry without departing from the aspects of the embodiments described herein.

[0015] Gate drivers are used to control power semiconductor devices to enable load current to be controlled. Example applications include motor controllers, inverters, power supplies, voltage converters, or other applications. Low-threshold power semiconductor devices, such as gallium nitride (GaN) devices, are susceptible to short circuits caused by activations where a voltage at the source of the power semiconductor device causes the power semiconductor device to activate, an effect known as the Miller effect. A Miller clamp circuit may be provided to clamp the gate voltage of the power semiconductor device to a reference voltage corresponding to an off state, such as ground, to prevent spurious activations.To activate the Miller clamp circuit, a supply voltage is required to allow a clamping transistor to clamp the gate voltage. However, during a gate driver startup cycle, a bootstrap technique can be used to clamp the voltage, V. CCprovided to the integrated gate driver circuit is used to charge a bootstrap capacitor to generate the supply voltage. During the startup cycle, the supply voltage is insufficient to drive the Miller clamp circuit. For example, the power semiconductor devices may include a high-side switch and a low-side switch. The low-side switch may be activated using a drive signal to charge the bootstrap capacitor. Since the Miller clamp circuit cannot be activated, activations of the low-side switch may generate a voltage at the gate of the high-side switch sufficient to cause spurious activation of the high-side switch due to the Miller effect.

[0016] With reference to Fig. 1, a schematic diagram of a load drive circuit 100 is provided according to some embodiments. The load drive circuit 100 includes a gate driver 102 and a load driver 104. In some embodiments, the gate driver 102 includes a high-side driver 106H having an output connected to a gate control signal output terminal 108 to provide a gate drive signal (HO), a protection circuit 110, and a bootstrap circuit 112 configured to provide a bootstrap voltage (V B ) at a bootstrap output terminal 114 from a supply voltage (V CC) provided at a supply voltage terminal 116S. In some embodiments, the bootstrap circuit 112 includes a resistor 118 in series with a bootstrap diode 120 connected between the supply voltage terminal 116 and the bootstrap output terminal 114. The bootstrap output terminal 114 is connected to a power input terminal 106S of the high-side driver 106H. The high-side driver 106H generates the gate drive signal at the gate control signal output terminal 108 based on the voltage at the power input terminal 106S. A reference terminal 106R of the high-side driver 106H is connected to a reference voltage terminal 116R. In some embodiments, the voltage at the reference voltage terminal 116R is ground. The protection circuit 110 is connected between the bootstrap output terminal 114 and a clamp signal input terminal 122 to protect elements of the load driver 104.

[0017] In some embodiments, the load driver 104 includes a high-side transistor 124H and a low-side transistor 124L connected at a node 124N. A drain of the high-side transistor 124H is connected to a bus voltage (V BUS) and a source of low-side transistor 124L is connected to ground through a resistor 124R. High-side transistor 124H and low-side transistor 124L control power provided to a load connected to load driver 104, such as a motor, a voltage bus, or other load. Clamp signal input terminal 122 is connected to a gate of high-side transistor 124H. A bootstrap capacitor 126 is connected between bootstrap output terminal 114 and reference voltage terminal 116R for storing a bootstrap voltage for supplying power to high-side driver 106H. Optional filter elements, such as resistors 128 and capacitors 130, may be provided between the gate control signal output terminal 108 and the gate of the high-side transistor 124H or between the gate and drain of the high-side transistor 124H to influence the switching behavior of the high-side transistor 124H.Optional filter elements, such as resistors 132 and capacitors 134, may be provided for the low-side transistor 124L. For ease of illustration, the driver circuit for the low-side transistor 124L is represented by a low-side driver 106L. The low-side driver 106L may be provided within the gate driver 102, or a separate gate driver may be provided to drive the low-side transistor 124L. Other structures and / or configurations of the load driver 104 are within the scope of the present disclosure.

[0018] During a startup cycle, a series of startup pulses is provided by the low-side driver 106L to the low-side transistor 124L, creating a path to charge the bootstrap capacitor 126 from the supply voltage terminal 116S. Until the bootstrap capacitor 126 is sufficiently charged, there is insufficient voltage to activate the protection circuit 110 to bypass the Miller current in the high-side transistor 124H.

[0019] Fig. 2 is a diagram of a protection circuit 110 according to some embodiments. In some embodiments, the protection circuit 110 includes a clamp circuit 200, an energy harvesting circuit 202, an electrostatic discharge (ESD) circuit 204, and a startup circuit 206. The clamp circuit 200 shunts the Miller current injected into the clamp signal input terminal 122 to the reference voltage terminal 116R. The energy harvesting circuit 202 harvests the Miller current injected into the clamp signal input terminal 122 during a startup period to activate the clamp circuit 200 until the bootstrap capacitor 126 is charged to enable normal operation of the clamp circuit 200. The ESD circuit 204 protects against an electrostatic voltage applied to the clamp signal input terminal 122.The startup circuit 206 provides an additional DC-coupled path from the bootstrap output terminal 114 to the clamp circuit 200 to enable the clamp circuit 200 to fully operate at a minimum supply for the given technology node.

[0020] The clamp circuit 200 includes a clamp transistor 208 (e.g., n-type) connected between the clamp signal input terminal 122 and the reference voltage terminal 116R, and a clamp driver 210. In some embodiments, the clamp driver 210 includes a pull-up transistor 212 (e.g., p-type) connected to the bootstrap output terminal 114, a pull-down transistor 214 (e.g., n-type) connected to the reference voltage terminal 116R, and a decoupling diode 216 connected between the pull-up transistor 212 and the pull-down transistor 214. The decoupling diode 216 is connected to the gate of the clamp transistor 208. During normal operation, when the bootstrap voltage V B is applied, the pull-up transistor 212 is switched on by a voltage of V Bderived voltage is activated to activate the clamping transistor 208. Other structures and / or configurations of the clamping circuit 200 are within the scope of the present disclosure.

[0021] The energy harvesting circuit 202 is connected between the clamp signal input terminal 122 and the gate of the clamp transistor 208. In some embodiments, the energy harvesting circuit 202 includes a transistor 218 (e.g., p-type), a resistor 220 connected between a drain and a gate of the transistor 218, a capacitor 222 connected between the gate and a source of the transistor 218, and a decoupling diode 224 connected to the gate of the transistor 218. The energy harvesting circuit 202 is an active AC clamp circuit that converts the AC Miller current at the clamp signal input terminal 122 resulting from startup pulses used to charge the bootstrap capacitor 126 to activate the clamp transistor 208. Current at the clamp signal input terminal 122 charges the capacitor 222 to generate a DC signal to charge the gate of the clamp transistor 208.Other structures and / or configurations of the energy harvesting circuit 202 are within the scope of the present disclosure.

[0022] The ESD circuit 204 is connected between the clamp signal input terminal 122 and the reference voltage terminal 116R. In some embodiments, the ESD circuit 204 includes one or more Zener diodes 204Z. Other structures and / or configurations of the ESD circuit 204 are within the scope of the present disclosure.

[0023] Startup circuit 206 is connected between bootstrap output terminal 114 and the gate of clamping transistor 208. In some embodiments, startup circuit 206 includes a resistor 226 connected to bootstrap output terminal 114, a transistor 228 (e.g., n-type) connected between resistor 226 and reference voltage terminal 116R and having a gate connected to an undervoltage lockout (UVLO) terminal 230, a transistor 232 (e.g., p-type) having a drain connected to bootstrap output terminal 114 and a gate connected to resistor 226 and transistor 228, and a decoupling diode 234 connected between a source of transistor 232 and the gate of clamping transistor 208. Other structures and / or configurations of the startup circuit 206 are within the scope of the present disclosure.

[0024] During a startup cycle, a series of startup pulses, such as a pulse-width modulation (PWM) signal, is provided by low-side driver 106L to low-side transistor 124L, creating a path to charge bootstrap capacitor 126 from supply voltage terminal 116S. Until bootstrap capacitor 126 is sufficiently charged, there is insufficient voltage to activate clamp circuit 200 to bypass the Miller current in high-side transistor 124H using clamp driver 210. The Miller current (i.e., drain-to-gate current) is present at clamp signal input terminal 122. The energy harvesting circuit 202 converts the AC Miller current to a DC voltage and stores (i.e., accumulates) the DC voltage on a gate of the clamping transistor 208. This stored voltage activates the clamping transistor 208 and shunts any subsequent Miller current.The decoupling diodes 216, 224, 234 prevent the voltage stored on the gate of the clamping transistor 208 from decaying.

[0025] Fig. 3 is a signal diagram 300 illustrating the operation of the protection circuit 110 according to some embodiments. Fig. 3 contains a low-side transistor drive signal 302 (V LS ), a drain-to-gate current signal 304 (I G ), which represents a Miller current in the high-side transistor 124H, a clamp current signal 306 (I CLAMP ) representing a current at the clamp signal input terminal 122, and a clamp voltage signal 308 (V CLAMP), which represents a voltage at the gate of clamp transistor 208. Startup pulses 302P in the low-side transistor drive signal 302 provided by the low-side driver 106L activate the low-side transistor 124L to charge the bootstrap capacitor 126. Due to the Miller effect, the gate-to-source voltage across the high-side transistor 124H from the first startup pulse 302P in the low-side transistor drive signal 302 induces an AC gate current pulse 304P in the high-side transistor 124H, as shown in the gate current signal 304. A corresponding current pulse 306P can be seen in the clamp current signal 306 at the clamp signal input terminal 122. The energy harvesting circuit 202 converts the current pulse 306P into a DC voltage 308D on the gate of the clamping transistor 208 to activate the clamping transistor 208 and bypass the Miller current of subsequent startup pulses 302P in the low-side transistor drive signal 302.In some embodiments, the protection circuit 110 activates the clamp transistor 208 after a startup pulse 302P in the low-side transistor drive signal 302 and the corresponding Miller current pulse 304P.

[0026] Fig.4 illustrates a method 400 for driving a transistor gate according to some embodiments. At 402, a start pulse is generated. In some embodiments, the start pulse includes a pulse 302P provided by the low-side driver 106L in the low-side transistor drive signal 302 to enable the low-side transistor 124L to charge the bootstrap capacitor 126. At 404, energy injected into the clamp signal input terminal 122 is harvested in response to the start pulse, for example, by the energy harvesting circuit 202. At 406, the clamp transistor 208, coupled between the clamp signal input terminal 122 and the reference voltage terminal 116R, is activated using the harvested energy to provide a low-impedance path from the clamp signal input terminal 122 to the reference voltage terminal 116R.

[0027] The protection circuit 110 mitigates start-up effects on power transistor devices with low threshold voltage, such as GaN devices. Here, a low threshold voltage is, for example, a threshold voltage of about 2.5 V, about 2 V, about 1.5 V, or about or below 1 V. The threshold voltage of the power transistor device may be a function of temperature and decrease with increasing temperature, and the given example values may refer to a typical operating condition of the device in a specific application, a standard temperature used for testing the device, a maximum rated operating temperature of the device, or a typical ambient temperature. Here, a relevant temperature range may be from about 0°C to about 200°C.Spurious activations of the low-threshold voltage power transistor devices can be suppressed by activating a clamp circuit using energy harvested from the Miller current induced during the startup cycle. Shoot-through in the half-bridge defined by transistors 124H, 124L is also suppressed.

[0028] According to some embodiments, the protection circuit may suppress spurious activations of power transistor devices in cases where the power transistor threshold voltage has a value lower than or on the order of the minimum operating voltage of the gate driver logic (e.g., the power transistor threshold voltage is within a range of 50% of the minimum operating voltage of the gate driver logic), and / or when the power transistor threshold voltage has a value lower than or on the order of an activation voltage for activating the clamping transistor (e.g., the power transistor threshold voltage is within a range of 50% of the activation voltage of the clamping transistor). For example, the minimum operating voltage of the gate driver logic may be about 1.5 V, and the power transistor threshold voltage may be below 1.5 V or may be in a range up to about 2.3 V.As another example, the clamp transistor activation voltage may be about 1.2 V, and the power transistor threshold voltage may be below 1.2 V or in a range up to about 2 V. These voltages are only exemplary values and should not be construed as limiting.

[0029] According to some embodiments, a gate driver includes a supply voltage terminal, a bootstrap terminal connected to the supply voltage terminal, a driver having a power input terminal connected to the bootstrap terminal and an output connected to a gate control signal output terminal and configured to generate a gate drive signal at the gate control signal output terminal based on a voltage at the power input terminal, a clamp driver connected to the bootstrap terminal, a clamp transistor connected between a clamp signal input terminal and a reference voltage terminal and having a gate connected to the clamp driver, and an energy harvesting circuit connected between the clamp signal input terminal and the gate of the clamp transistor.

[0030] According to some embodiments, the energy harvesting circuit includes an active AC clamp connected to the clamp signal input terminal and a decoupling diode connected between the active AC clamp and the gate of the clamp transistor.

[0031] According to some embodiments, the active AC clamp comprises a second clamp transistor connected between the clamp signal input terminal and the decoupling diode, a resistor connected between the clamp signal input terminal and a gate of the second clamp transistor, and a capacitor connected between the gate of the second clamp transistor and the decoupling diode.

[0032] According to some embodiments, the clamp driver comprises a decoupling diode, a pull-up transistor connected between the bootstrap terminal and the decoupling diode, and a pull-down transistor connected between the decoupling diode and the reference voltage terminal.

[0033] According to some embodiments, the gate driver comprises a startup circuit comprising a decoupling diode connected to the gate of the clamping transistor, a startup transistor connected between the bootstrap terminal and the decoupling diode, a resistor connected between the bootstrap terminal and a gate of the startup transistor, and a blocking transistor connected between the gate of the startup transistor and the reference voltage terminal.

[0034] According to some embodiments, the gate driver includes an electrostatic discharge protection device connected between the clamp signal input terminal and the reference voltage terminal.

[0035] According to some embodiments, the electrostatic discharge protection device comprises a Zener diode.

[0036] According to some embodiments, a circuit comprises a supply voltage terminal, a bootstrap terminal connected to the supply voltage terminal, a bootstrap capacitor connected to the bootstrap terminal, a high-side transistor, a low-side transistor, a high-side gate driver connected to the high-side transistor and having a power input terminal connected to the bootstrap terminal, a low-side gate driver connected to the low-side transistor, a controller configured to generate a start pulse using the low-side gate driver to charge the bootstrap capacitor, a clamp driver, a clamp transistor connected between a gate of the high-side transistor and a reference voltage terminal and having a gate connected to the clamp driver, and an energy harvesting circuit,which is connected between the gate of the high-side transistor and the gate of the clamping transistor and is configured to harvest energy from the gate of the high-side transistor in response to the start pulse and to activate the clamping transistor using the harvested energy.

[0037] According to some embodiments, the energy harvesting circuit includes an active AC clamp connected to the gate of the high-side transistor and a decoupling diode connected between the active AC clamp and the gate of the clamping transistor.

[0038] According to some embodiments, the active AC clamp comprises a second clamping transistor connected between the gate of the high-side transistor and the decoupling diode, a resistor connected between the gate of the high-side transistor and a gate of the second clamping transistor, and a capacitor connected between the gate of the second clamping transistor and the decoupling diode.

[0039] According to some embodiments, the clamp driver comprises a decoupling diode, a pull-up transistor connected between the bootstrap terminal and the decoupling diode, and a pull-down transistor connected between the decoupling diode and the reference voltage terminal.

[0040] According to some embodiments, the circuit comprises a startup circuit comprising a decoupling diode connected to the gate of the clamping transistor, a startup transistor connected between the bootstrap terminal and the decoupling diode, a resistor connected between the bootstrap terminal and a gate of the startup transistor, and a blocking transistor connected between the gate of the startup transistor and the reference voltage terminal.

[0041] According to some embodiments, the circuit includes an electrostatic discharge protection device connected between the gate of the high-side transistor and the reference voltage terminal.

[0042] According to some embodiments, the electrostatic discharge protection device comprises a Zener diode.

[0043] According to some embodiments, a method comprises the steps of generating a start pulse, harvesting energy to be injected into a clamp signal input terminal in response to the start pulse, and activating a clamp transistor connected between the clamp signal input terminal and a reference voltage terminal using the harvested energy to provide a low-impedance path from the clamp signal input terminal to the reference voltage terminal.

[0044] According to some embodiments, activating the clamping transistor comprises the steps of: connecting an active AC clamp to the clamping signal input terminal, connecting a decoupling diode between the active AC clamp and a gate of the clamping transistor, and preventing the discharge of the harvested energy to the gate of the clamping transistor using the decoupling diode.

[0045] According to some embodiments, connecting the active AC clamp to the clamp signal input terminal comprises the steps of: connecting a second clamp transistor between the clamp signal input terminal and the decoupling diode, connecting a resistor between the clamp signal input terminal and a gate of the second clamp transistor, and connecting a capacitor between the gate of the second clamp transistor and the decoupling diode, and harvesting the energy injected into the clamp signal input terminal comprises storing the harvested energy on the gate of the clamp transistor by charging the capacitor.

[0046] According to some embodiments, the method comprises the steps of: connecting a clamp driver to the gate of the clamp transistor, the clamp driver comprising a second decoupling diode, a pull-up transistor connected between a bootstrap terminal connected to a supply voltage terminal and the second decoupling diode to activate the clamp transistor, and a pull-down transistor connected between the second decoupling diode and the reference voltage terminal to deactivate the clamp transistor, and preventing the discharge of the harvested energy to the gate of the clamp transistor using the second decoupling diode.

[0047] According to some embodiments, the method comprises the steps of: connecting a startup circuit to a bootstrap voltage generated by the start pulse by connecting a decoupling diode to a gate of the clamping transistor, connecting a startup transistor between a bootstrap terminal and the decoupling diode, connecting a resistor between the bootstrap terminal and a gate of the startup transistor, and connecting a blocking transistor between the gate of the startup transistor and the reference voltage terminal, the method comprising preventing the discharge of the harvested energy on the gate of the clamping transistor using the decoupling diode.

[0048] According to some embodiments, the method comprises the steps of: connecting an electrostatic discharge protection device between the clamp signal input terminal and the reference voltage terminal.

[0049] Although the subject matter has been described in language specific to structural features or method steps, it should be understood that the subject matter of the appended claims is not necessarily limited to the specific features or steps described above. Rather, the specific features and steps described above are disclosed as exemplary forms of implementing at least some of the claims.

[0050] Various modes of operation of embodiments are provided herein. The order in which some or all of the modes of operation are described should not be construed to imply that these modes of operation necessarily depend on the order. Alternative orders may be understood with the aid of this description. Further, it is understood that not all steps are necessarily present in every embodiment provided herein. Furthermore, it is understood that not all steps are necessary in some embodiments.

[0051] Furthermore, "exemplary" and / or the like are used herein to serve as an example, case, illustration, etc., and not necessarily as advantageous. Instead, the use of the word "example" and / or the like is intended to represent a possible aspect and / or implementation that may relate to the techniques presented herein. Such examples are not necessary or intended to be limiting of such techniques. Various embodiments of such techniques may include such an example alone or in combination with other features, and / or may vary and / or omit the illustrated example.

[0052] As used in this application, "or" is intended to mean an inclusive "or" rather than an exclusive "or." Furthermore, "a" and "an" as used in this application and the appended claims are generally intended to mean "one or more" unless otherwise specified or the context clearly indicates that they are directed to a singular form. In addition, at least one of A and B and / or the like generally means A or B, or both A and B. Further, to the extent that "includes," "comprises," "has," "with," or variations thereof are used, such terms are intended to be inclusive in a manner similar to the term "comprising." In addition, unless otherwise specified, "first," "second," or the like are not intended to imply a temporal aspect, a spatial aspect, an ordering, etc. Rather, such terms are used merely as identifiers, names, etc.used for features, elements, items, etc. For example, a first element and a second element generally correspond to element A and element B, or two different elements, or two identical elements, or the same element.

[0053] Although the disclosure has been shown and described with respect to one or more implementations, equivalent changes and modifications will occur to others skilled in the art based on a reading and understanding of this description and the accompanying drawings. The disclosure encompasses all such modifications and changes and is limited only by the scope of the following claims. In particular, with respect to the various functions performed by the components described above (e.g., elements, resources, etc.), unless otherwise specified, the terms used to describe such components are intended to correspond to any component that performs the stated function of the described component (e.g., that is functionally equivalent), even if it is not structurally equivalent to the disclosed structure.Moreover, although a particular feature of the disclosure may be disclosed with respect to only one of several implementations, such a feature may be combined with one or more other features of the other implementations as may be desired and advantageous for a given or particular application. Furthermore, to the extent the terms "include," "comprise," "has," "with," or variations thereof are used in either the detailed description or the claims, such terms are intended to be inclusive in a manner similar to the term "comprising."

Claims

[1] Gate driver, comprising: a supply voltage connection; a bootstrap connector connected to the supply voltage connector; a driver having a power input terminal connected to the bootstrap terminal and an output connected to a gate control signal output terminal, and configured to generate a gate drive signal at the gate control signal output terminal based on a voltage at the power input terminal; a clamp driver connected to the bootstrap connector; a clamp transistor connected between a clamp signal input terminal and a reference voltage terminal and having a gate connected to the clamp driver; and an energy harvesting circuit connected between the clamp signal input terminal and the gate of the clamp transistor. [2] The gate driver of claim 1, wherein the energy harvesting circuit comprises: an active AC terminal connected to the clamp signal input terminal; and a decoupling diode connected between the active AC terminal and the gate of the clamping transistor. [3] The gate driver of claim 2, wherein the active AC terminal comprises: a second clamping transistor connected between the clamping signal input terminal and the decoupling diode; a resistor connected between the clamp signal input terminal and a gate of the second clamp transistor; and a capacitor connected between the gate of the second clamping transistor and the decoupling diode. [4] The gate driver of claim 1, wherein the clamp driver comprises: a decoupling diode; a pull-up transistor connected between the bootstrap terminal and the decoupling diode; and a pull-down transistor connected between the decoupling diode and the reference voltage terminal. [5] Gate driver according to claim 1, comprising: a startup circuit comprising: a decoupling diode connected to the gate of the clamping transistor; a startup transistor connected between the bootstrap terminal and the decoupling diode; a resistor connected between the bootstrap terminal and a gate of the startup transistor; and a blocking transistor connected between the gate of the startup transistor and the reference voltage terminal. [6] Gate driver according to claim 1, comprising: an electrostatic discharge protection device connected between the clamp signal input terminal and the reference voltage terminal. [7] Gate driver according to claim 6, wherein: the electrostatic discharge protection device comprises a Zener diode. [8] Circuit comprising: a supply voltage connection; a bootstrap connector connected to the supply voltage connector; a bootstrap capacitor connected to the bootstrap terminal; a high-side transistor; a low-side transistor; a high-side gate driver connected to the high-side transistor and having a power input terminal connected to the bootstrap terminal; a low-side gate driver connected to the low-side transistor; a controller configured to generate a start pulse using the low-side gate driver to charge the bootstrap capacitor; a clamp driver; a clamping transistor connected between a gate of the high-side transistor and a reference voltage terminal and having a gate connected to the clamping driver; and an energy harvesting circuit connected between the gate of the high-side transistor and the gate of the clamping transistor and configured to harvest energy from the gate of the high-side transistor in response to the start pulse and to activate the clamping transistor using the harvested energy. [9] The circuit of claim 8, wherein the energy harvesting circuit comprises: an active AC terminal connected to the gate of the high-side transistor; and a decoupling diode connected between the active AC terminal and the gate of the clamping transistor. [10] The circuit of claim 9, wherein the active AC terminal comprises: a second clamping transistor connected between the gate of the high-side transistor and the decoupling diode; a resistor connected between the gate of the high-side transistor and a gate of the second clamping transistor; and a capacitor connected between the gate of the second clamping transistor and the decoupling diode. [11] The circuit of claim 8, wherein the clamp driver comprises: a decoupling diode; a pull-up transistor connected between the bootstrap terminal and the decoupling diode; and a pull-down transistor connected between the decoupling diode and the reference voltage terminal. [12] Circuit according to claim 8, comprising: a startup circuit comprising: a decoupling diode connected to the gate of the clamping transistor; a startup transistor connected between the bootstrap terminal and the decoupling diode; a resistor connected between the bootstrap terminal and a gate of the startup transistor; and a blocking transistor connected between the gate of the startup transistor and the reference voltage terminal. [13] Circuit according to claim 8, comprising: an electrostatic discharge protection device connected between the gate of the high-side transistor and the reference voltage terminal. [14] A circuit according to claim 13, wherein: the electrostatic discharge protection device comprises a Zener diode. [15] Method comprising: Generating a start pulse; Harvesting energy which is fed into a clamp signal input terminal in response to the start pulse; and Activating a clamp transistor connected between the clamp signal input terminal and a reference voltage terminal using the harvested energy to provide a low impedance path from the clamp signal input terminal to the reference voltage terminal. [16] The method of claim 15, wherein activating the clamping transistor comprises: Connecting an active AC terminal to the clamp signal input terminal; Connecting a decoupling diode between the active AC terminal and a gate of the clamping transistor; and Preventing the discharge of the harvested energy to the gate of the clamping transistor using the decoupling diode. [17] The method of claim 16, wherein: Connecting the active AC terminal to the clamp signal input terminal includes: Connecting a second clamping transistor between the clamping signal input terminal and the decoupling diode; Connecting a resistor between the clamp signal input terminal and a gate of the second clamp transistor; and Connecting a capacitor between the gate of the second clamping transistor and the decoupling diode; and Harvesting the energy fed into the clamp signal input terminal includes: Storing the energy gained on the gate of the clamping transistor by charging the capacitor. [18] A method according to claim 16, comprising: Connecting a clamp driver to the gate of the clamp transistor, the clamp driver comprising: a second decoupling diode; a pull-up transistor connected between a bootstrap terminal connected to a supply voltage terminal and the second decoupling diode to activate the clamping transistor; and a pull-down transistor connected between the second decoupling diode and the reference voltage terminal to deactivate the clamping transistor; and Preventing the discharge of the harvested energy to the gate of the clamping transistor using the second decoupling diode. [19] A method according to claim 15, comprising: Connecting a startup circuit to a bootstrap voltage generated by the start pulse by: Connecting a decoupling diode to a gate of the clamping transistor; Connecting a startup transistor between a bootstrap terminal and the decoupling diode; Connecting a resistor between the bootstrap terminal and a gate of the startup transistor; and Connecting a blocking transistor between the gate of the startup transistor and the reference voltage terminal, where: the procedure includes: Preventing the discharge of the harvested energy to the gate of the clamping transistor using the decoupling diode. [20] A method according to claim 15, comprising: Connect an electrostatic discharge protection device between the clamp signal input terminal and the reference voltage terminal.

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