Circuit unit, circuit arrangement and method for reducing switching losses of a semiconductor switch
The circuit unit with an auxiliary switch and logic-controlled capacitor system addresses switching loss and EMC issues by optimizing capacitor usage based on current thresholds, achieving low losses and improved EMC across varying currents.
Patent Information
- Application Number
- DE102024204845
- Authority / Receiving Office
- DE · DE
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-05-27
- Publication Date
- 2025-11-27
AI Technical Summary
Existing semiconductor switch technologies face challenges in reducing switching losses, particularly at high switching currents, and improving electromagnetic compatibility (EMC), which are not adequately addressed by existing zero-volt switching (ZVS) methods.
A circuit unit comprising a semiconductor switch, an auxiliary switch, a capacitor, and a logic unit that determines current thresholds to control the auxiliary switch's state before the semiconductor switch turns off, minimizing switching losses by optimizing capacitor usage based on current levels.
The solution effectively reduces switching losses across a wide range of currents, including low and high currents, while maintaining voltage-free switching, thereby enhancing EMC performance.
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Abstract
Description
State of the art
[0001] The present invention relates to a circuit unit, a circuit arrangement and a method for reducing switching losses of a semiconductor switch.
[0002] Methods for zero-volt switching (ZVS) are known from the prior art, in which semiconductor switches are always switched on to reduce switching losses when a voltage applied across the semiconductor switches is essentially zero.
[0003] Furthermore, it is known from the prior art that switching losses at high switching currents can be reduced by connecting an external capacitor in parallel with a semiconductor switch. In addition, this reduces the Δd / Δt of the semiconductor switch, thereby improving the electromagnetic compatibility (EMC) of a circuit containing the semiconductor switch(es). Disclosure of the invention
[0004] According to a first aspect of the present invention, a circuit unit for reducing switching losses of a semiconductor switch is proposed, wherein the circuit unit comprises such a semiconductor switch, an auxiliary switch, a capacitor (which may be a single capacitor or may be composed of a plurality of capacitors connected in parallel) and a logic unit.
[0005] The semiconductor switch can be configured, for example, as a single semiconductor switch or as a parallel circuit consisting of multiple semiconductor switches. Since the semiconductor switch is the actual switch for blocking or conducting a load current, it can also be considered the main switch of the circuit unit.
[0006] The capacitor corresponds to a capacitor externally connected to the semiconductor switch and does not represent the internal capacitance of the semiconductor switch.
[0007] A series circuit consisting of the auxiliary switch and the capacitor is connected in parallel to a load section of the semiconductor switch. This explicitly does not preclude the possibility that other electrical components, such as a damping resistor, may be connected in parallel and / or in series with the capacitor.
[0008] The logic unit, which can be designed as an integrated and / or discrete logic circuit, is configured to determine the current of an electric current flowing along the load path of the semiconductor switch when the semiconductor switch is switched on. This determination can be based, for example, on a measurement and / or an estimate of the current to be switched by the semiconductor switch.
[0009] The logic unit can also be a subunit of a control unit and / or a driver unit, which is intended to control the semiconductor switch.
[0010] According to the invention, the logic unit is further configured to close the auxiliary switch before the semiconductor switch is turned off, or to keep it in a closed state, if the measured current exceeds a predefined current threshold. The logic unit is also configured, according to the invention, to open the auxiliary switch before the semiconductor switch is turned off, or to keep it in an open state, if the measured current does not exceed the predefined current threshold.
[0011] Depending on the design of the auxiliary switch and / or the design of the logic unit, it may be useful or necessary for the auxiliary switch to be controlled via a driver unit for the auxiliary switch connected between the logic unit and the auxiliary switch, which converts the respective control signals provided by the logic unit for switching the auxiliary switch on and off into suitable control signals for the auxiliary switch.
[0012] The capacitance value of the capacitor and the current threshold are advantageously determined depending on an expected range of current to be switched by means of the semiconductor switch, so that the lowest possible overall losses of the circuit unit can be achieved when switching both high and low currents.
[0013] In an exemplary case, where the circuit unit is used, for example, in a bidirectional charger, where a first current and a second current, which is higher than the first current, are to be switched at different times by means of the circuit unit, the capacitance value of the capacitor and the current threshold value can be designed advantageously with regard to these expected currents.
[0014] Furthermore, the circuit unit according to the invention can be used in numerous other applications, such as in switched-mode power supplies and other applications that differ from these.
[0015] It should be noted in general that the current threshold can be designed as an unchanging or as an adjustable current threshold, whereby in the latter case the current threshold can be adapted in a suitable manner depending on current boundary conditions such as changing currents to be switched, etc.
[0016] In summary, the present invention offers the advantage that low switching losses can be achieved over a wide operating range.
[0017] Particularly in connection with voltage-free switching (or quasi-voltage-free switching, in which a certain residual voltage is applied to the semiconductor switch before a switching operation), switching losses can be kept low, while by switching off the external capacitance at low currents (i.e., currents that are below the current threshold), voltage-free (or quasi-voltage-free) switching is also made possible at these low currents.
[0018] The dependent claims describe preferred embodiments of the invention.
[0019] In a preferred embodiment of the present invention, the semiconductor switch is configured as a power transistor and / or as a Si-, SiC-, or GaN-based semiconductor switch and / or as a MOSFET, HEMT, IGBT, JFET, FinFET, CAVET, or as a bipolar transistor. More preferably, the auxiliary switch is also configured as a semiconductor switch (e.g., in the form of one of the aforementioned types) and / or as an electromechanical switch. The selection of a specific type of auxiliary switch is preferably based on a required switching frequency and / or a permissible space requirement and / or permissible costs and / or a required current and / or voltage handling capacity of the auxiliary switch.
[0020] In a further advantageous embodiment of the present invention, the current threshold is an upper threshold of a hysteresis loop, and the logic unit is configured to move the auxiliary switch from a closed to an open state only when a lower current threshold of the hysteresis loop, which is smaller than the upper current threshold, is undershot. Such a hysteresis loop is particularly advantageous when dealing with non-monononically increasing and / or decreasing currents that are to be switched by means of the semiconductor switch, in order to avoid unwanted switching back and forth between the state with the capacitor connected and the state with the capacitor disconnected at currents close to the current threshold. This reduces, among other things, instabilities in a higher-level circuit using the switching unit and / or switching losses.The use of such hysteresis can be particularly advantageous, for example, when the circuit unit according to the invention is used as part of a dual-active bridge, a resonant converter, or a different application with similar load current profiles. Alternatively or additionally, the circuit unit is configured to determine the current to be switched by the semiconductor switch essentially immediately before the semiconductor switch begins to turn off. This also reduces or eliminates unwanted switching between the states with the capacitor switched on and off, for example, in connection with the aforementioned non-monotically increasing and / or decreasing currents to be switched by the semiconductor switch.
[0021] Advantageously, the capacitor is a first capacitor, and the circuit unit includes at least one second capacitor. Depending on the requirements of the circuit unit according to the invention and / or the prevailing boundary conditions, it is possible for the capacitance value of the second capacitor to be identical to or different from that of the first capacitor. Furthermore, the auxiliary switch is a first auxiliary switch, and the circuit unit includes at least one second auxiliary switch. Additionally, the current threshold corresponds to a first current threshold. A series connection consisting of the second auxiliary switch and the second capacitor is connected in parallel to the load path of the semiconductor switch.The logic unit is configured to close the second auxiliary switch before the semiconductor switch turns off, or to keep it closed, if the measured current exceeds a second predefined current threshold that is higher than the first. The logic unit is further configured to open the second auxiliary switch before the semiconductor switch turns off, or to keep it open, if the measured current does not exceed the second predefined current threshold. This allows the capacitance of a capacitor connected in parallel to the semiconductor switch to be more accurately matched to the current being switched.In other words, the second auxiliary switch and the second capacitor offer the possibility of providing an additional gradation of the parallel capacitance, which further reduces switching losses, especially with varying currents being switched. This approach is particularly advantageous for providing additional auxiliary switches and corresponding capacitors to achieve even finer gradations and adaptation to the specific currents being switched. It should be noted that the logic unit can also be composed of multiple logic units, each of which can be designed to control one or more auxiliary switches.
[0022] Furthermore, the circuit unit is advantageously configured to determine the current strength of the current to be switched by means of the semiconductor switch based on a current measurement within the semiconductor switch (e.g. based on a measuring shunt) and / or a voltage measurement across the load path of the semiconductor switch and / or information provided from outside (e.g. from a higher-level unit that sets and / or monitors a current to be switched, etc.) and / or an operating state of the circuit unit and / or an operating state of a higher-level circuit arrangement containing the circuit unit.
[0023] Particularly preferably, the semiconductor switch and / or the auxiliary switch and / or the capacitor and / or the logic unit are integrated, in particular partially or completely monolithically integrated. For this purpose, the aforementioned components or a part thereof are, for example, each mounted on separate chips forming a module and / or on individual chips. Alternatively or additionally, a measuring unit for determining the current to be switched (which, for example, measures a current and / or a voltage and / or a temperature from which the current to be switched can be derived) and / or a first driver circuit for controlling the semiconductor switch and / or a second driver circuit for controlling the auxiliary switch are integrated with the circuit unit, in particular partially or completely monolithically integrated with the circuit unit.
[0024] In a further advantageous embodiment of the present invention, at least the semiconductor switch and the auxiliary switch are formed on substrates that are electrically isolated from each other. Alternatively or additionally, the capacitor is connected to the circuit unit with low inductance so that the capacitance of the capacitor can be effective in a relevant frequency range without being affected by a connection with excessively high inductance. This is particularly advantageous when the capacitor is designed as a discrete component, which is, for example, electrically connected to the semiconductor switch and / or the auxiliary switch via bond wires.
[0025] According to a second aspect of the present invention, a circuit arrangement is proposed which comprises at least one circuit unit according to the first aspect of the invention and a control unit, wherein the control unit is configured to switch on the semiconductor switch of the at least one circuit unit in a substantially de-energized state. The features, combinations of features, and the advantages arising therefrom correspond to those described in connection with the first aspect of the invention in such a way that, to avoid repetition, reference is made to the above descriptions.
[0026] In an advantageous embodiment of the circuit arrangement according to the invention, the circuit arrangement is configured to determine the turn-on loss of the semiconductor switch based on a current and / or a planned switching state of the auxiliary switch and to adjust the auxiliary switch in accordance with the determined current when the semiconductor switch is turned off only if a predefined maximum permissible turn-on loss of the semiconductor switch is not exceeded. In this way, it can be ensured, for example, that the overall balance of turn-on and turn-off losses is kept as small as possible by avoiding switching the capacitor on or off in a manner that is unfavorable with regard to a turn-on loss.
[0027] According to a third aspect of the present invention, a method for reducing switching losses of a semiconductor switch is proposed, the method comprising: a first step for determining the current of an electric current flowing along a load path of the semiconductor switch, which is to be switched by means of the semiconductor switch, while the semiconductor switch is in a switched-on state; a second step for closing an auxiliary switch, which is connected in series with a capacitor in parallel to the load path of the semiconductor switch, or for holding the auxiliary switch in a closed state before a switch-off operation of the semiconductor switch, if the determined current exceeds a predefined current threshold, or for opening the auxiliary switch or holding the auxiliary switch in an open state before a switch-off operation of the semiconductor switch.if the measured current does not exceed the predefined current threshold. The features, combinations of features, and the advantages arising therefrom correspond to those described in connection with the first and second mentioned aspects of the invention, so clearly that reference is made to the above statements to avoid repetition. Brief description of the drawings
[0028] Exemplary embodiments of the invention are described in detail below with reference to the accompanying drawings. The drawing shows: Fig. 1 an exemplary first embodiment of a circuit arrangement according to the invention with a circuit unit according to the invention; Fig. 2 a first exemplary embodiment of a partially integrated circuit unit according to the invention; Fig. 3 a second exemplary embodiment of a partially integrated circuit unit according to the invention; and Fig. 4 an exemplary second embodiment of a circuit arrangement according to the invention with two circuit units according to the invention. Embodiments of the invention
[0029] Fig. Figure 1 shows an exemplary embodiment of a circuit arrangement according to the invention with a circuit unit, wherein the circuit arrangement comprises a semiconductor switch T1, here designed as a HEMT, a first auxiliary switch S1, also designed as a semiconductor switch, a second auxiliary switch S2, a first capacitor C1, a second capacitor C2, a logic unit 10, a control unit 50, a first gate driver 30, and a second gate driver 35. Furthermore, the parasitic capacitances Cm, Cgs, and Cds of the semiconductor switch T1 are shown.
[0030] A series circuit consisting of the first auxiliary switch S1 and the first capacitor C1 and a series circuit consisting of the second auxiliary switch S2 and the second capacitor C2 are each connected in parallel to a load section of the semiconductor switch T1.
[0031] The control unit 50 is configured to output control signals to the first gate driver 30 for switching on and off the semiconductor switch T1, on the basis of which the gate driver 30 is configured to output corresponding gate voltages to a gate of the semiconductor switch T1.
[0032] The logic unit 10 is configured, based on a voltage measurement unit 20, to determine the current IL of an electric current flowing along the load path, which is to be switched by the semiconductor switch T1, when the semiconductor switch T1 is in the on state. For this purpose, the logic unit 10 has access to information about a characteristic curve of the semiconductor switch T1, based on which the logic unit 10 is configured to convert the measured voltage values across the load path into the currently present load current IL. The information about the characteristic curve is stored, for example, in a memory unit (not shown) which is connected to the logic unit 10.
[0033] Based on this configuration, the logic unit 10 is set up to close or keep closed the first auxiliary switch S1 before switching off the semiconductor switch T1 if the measured current exceeds a predefined first current threshold, and to open or keep open the first auxiliary switch S1 before switching off the semiconductor switch T1 if the measured current does not exceed the predefined current threshold.
[0034] The logic unit 10 is further configured to close or keep closed the second auxiliary switch S2 before switching off the semiconductor switch T1 if the measured current exceeds a second predefined current threshold that is greater than the first current threshold, and to open or keep open the second auxiliary switch S2 before switching off the semiconductor switch T1 if the measured current does not exceed the second predefined current threshold.
[0035] Preferably, at least the semiconductor switch T1, the first auxiliary switch S1, the second auxiliary switch S2, the first capacitor C1 and the second capacitor are integrated monolithically or non-monolithically.
[0036] It should be noted that the logic unit 10 can be connected to the control unit 50 via information technology in order to receive information about a switching state and / or future switching times of the semiconductor switch T1 from the control unit 50, on the basis of which suitable times for determining the load current IL to be switched can be determined.
[0037] Alternatively or additionally, the logic unit 10 can be configured to determine a current switching state of the semiconductor switch T1 based on the voltage measurement using the voltage measuring unit 20.
[0038] It should also be noted that the logic unit 10 and / or the control unit 50 and / or the first gate driver 30 and / or the second gate driver 35 and / or the voltage measurement unit 20 may be integrated together in one or more components.
[0039] In a case where currents are to be switched by means of the circuit arrangement according to the invention which do not represent monotonically decreasing and / or increasing load currents, the logic unit 10 is preferably configured to perform a respective switching on and off of the respective auxiliary switches S1, S2 on the basis of hysteresis corresponding to the respective auxiliary switches S1, S2 in order to prevent an undesired switching back and forth of the auxiliary switches S1, S2 due to non-monotically increasing or decreasing load currents.
[0040] Based on the in Fig. In the circuit unit described in section 1 or the higher-level circuit arrangement, a particularly low-loss switching operation for the semiconductor switch T1 can be realized by activating and deactivating the first capacitor C1 and the second capacitor C2 depending on a respective existing or expected load current.
[0041] Fig. Figure 2 shows a first exemplary embodiment of a partially integrated circuit unit according to the invention.
[0042] In this embodiment, a semiconductor switch T1, an auxiliary switch S1, and a capacitor C1 are monolithically integrated on a single substrate 40. Accordingly, the drain terminals 60, 62 of the semiconductor switch T1 and the auxiliary switch S1 are electrically connected to each other, while the respective source terminals 70, 72 of the semiconductor switch T1 and the auxiliary switch S1 are connected to each other via the capacitor C1.
[0043] It should be noted that a logic unit (see Fig. 1) the circuit arrangement according to the invention may additionally be integrated monolithically or non-monolithically with the components T1, S1, C1 described above.
[0044] Fig. Figure 3 shows a second exemplary embodiment of a partially integrated circuit unit according to the invention.
[0045] In this embodiment, a semiconductor switch T1 and an auxiliary switch S1 are monolithically integrated together on a first substrate 40, while a capacitor C1 is formed on a separate second substrate 45. The capacitor C1 is electrically connected to the semiconductor switch T1 and the auxiliary switch S1, preferably in the form of a low-inductance connection, for example by means of bond wires or by means of other electrical conductors. The first substrate 40 and the second substrate 45 and the components T1, C1, C2 mounted on them are preferably formed as a single encapsulated module.
[0046] It should be noted that a logic unit (see Fig. 1) the circuit arrangement according to the invention may additionally be integrated monolithically or non-monolithically with the components T1, S1, C1 described above.
[0047] Fig. Figure 4 shows a second embodiment of a circuit arrangement according to the invention, designed as a buck converter, with two circuit units according to the invention, in which an input voltage UE is converted into a desired output voltage UA by means of respective switches T1, T2 (here each designed as HEMT transistors), a half-bridge of the circuit arrangement, a suitable control of the switches T1, T2 and an inductor L.
[0048] The switches T1, T2 are appropriately controlled via a first control unit 50 and a second control unit 50' (which can be the same control unit), respective (not shown) gate drivers and respective gate resistors RG1, RG2.
[0049] The control units 50, 50' are also designed to ensure that switches T1, T2 are switched on essentially without voltage, based on a suitable switching scheme, in order to keep switching losses of switches T1, T2 as low as possible.
[0050] Furthermore, the parasitic capacitances Cm, Cgs, Cds, Cm', Cgs' and Cds' of the two switches T1, T2 are shown. For the sake of clarity, the parasitic inductances of switches T1, T2 and the circuit arrangement are not shown here.
[0051] Since the components described above correspond to a buck converter from the prior art, the specific functioning of the underlying buck converter will not be discussed in order to avoid repetition, and reference will instead be made to the prior art.
[0052] In contrast to the prior art, the present circuit arrangement (i.e., the buck converter) is based on two circuit units according to the invention, which consist of a first auxiliary switch S1, a first capacitor C1, a second auxiliary switch S2, a second capacitor C2 and a logic unit 10.
[0053] The logic unit 10 is set up on the basis of an (not shown) information technology connection with the first control unit 50 and the second control unit 50', to switch the respective auxiliary switches S1, S2 on and off independently of each other in order to reduce switching losses of the switches T1, T2 depending on the respective load currents to be switched according to the invention.
Claims
[1] Circuit unit comprising for reducing switching losses of a semiconductor switch (T1): - the semiconductor switch (T1), - an auxiliary switch (S1), - a capacitor (C1), and - a logic unit (10), wherein - a series circuit consisting of the auxiliary switch (S1) and the capacitor (C1) is connected in parallel to a load section of the semiconductor switch (T1), and - the logic unit (10) is set up, - to determine the current (IL) of an electric current flowing along the load path, which is to be switched by means of the semiconductor switch (T1) in an switched-on state, - to close the auxiliary switch (S1) before a switch-off operation of the semiconductor switch (T1) or to keep it in a closed state if the measured current exceeds a predefined current threshold, and - to open the auxiliary switch (S1) before switching off the semiconductor switch (T1) or to keep it in an open state if the measured current does not exceed the predefined current threshold. [2] Circuit unit according to claim 1, wherein - the semiconductor switch (T1) as - Power transistor, and / or - Si-, SiC-, or GaN-based semiconductor switch, and / or - MOSFET, HEMT, IGBT, JFET, FinFET, CAVET, or is configured as a bipolar transistor, and / or - the auxiliary switch (S1) is a semiconductor switch and / or an electromechanical switch. [3] Circuit unit according to one of the preceding claims, wherein - the current threshold is an upper threshold of a hysteresis and the logic unit (10) is configured to move the auxiliary switch (S1) from a closed state to an open state only when a lower current threshold of the hysteresis, which is smaller than the upper current threshold, is undershot, and / or - the circuit unit is set up to determine the current strength of the current to be switched by means of the semiconductor switch (T1) essentially immediately before the start of a switching-off process of the semiconductor switch (T1). [4] Circuit unit according to one of the preceding claims, wherein - the capacitor is a first capacitor (C1) and the circuit unit has at least one second capacitor (C2), - the auxiliary switch is a first auxiliary switch (S1) and the circuit unit has at least one second auxiliary switch (S2), - the current threshold is a first current threshold, - a series circuit consisting of the second auxiliary switch (S2) and the second capacitor (C2) is connected in parallel to the load section of the semiconductor switch (T1), and - the logic unit (10) is set up, - to close or keep the second auxiliary switch (S2) in a closed state before the semiconductor switch (T1) is switched off, if the measured current exceeds a second predefined current threshold that is greater than the first current threshold, and - to open the second auxiliary switch (S2) before switching off the semiconductor switch (T1) or to keep it in an open state if the measured current does not exceed the second predefined current threshold. [5] Circuit unit according to one of the preceding claims, wherein the circuit unit is configured to determine the current strength of the current to be switched by means of the semiconductor switch (T1) based on - a current measurement within the semiconductor switch (T1), and / or - a voltage measurement across the load path of the semiconductor switch (T1), and / or - information provided from outside, and / or - to determine an operating state of the circuit unit and / or an operating state of a higher-level circuit arrangement containing the circuit unit. [6] Circuit unit according to one of the preceding claims, wherein - the semiconductor switch (T1) and / or the auxiliary switch (S1) and / or the capacitor (C1) and / or the logic unit (10) are integrated, in particular partially or completely monolithically integrated, and / or - a measuring unit (20) for determining the current strength of the current to be switched and / or a first driver circuit (30) for controlling the semiconductor switch (T1) and / or a second driver circuit (35) for controlling the auxiliary switch (S1) are integrated with the circuit unit, in particular partially or completely monolithically integrated with the circuit unit. [7] Circuit unit according to claim 6, wherein - at least the semiconductor switch (T1) and the auxiliary switch (S2) are formed on substrates (40, 45) that are electrically isolated from each other, and / or - the capacitor (C1) is connected to the circuit unit with low inductance. [8] having a circuit arrangement - at least one circuit unit according to one of the preceding claims, and - a control unit (50), wherein - the control unit (50) is configured to switch on the semiconductor switch (T1) of the at least one circuit unit in a substantially de-energized manner. [9] Circuit arrangement according to claim 8, wherein the circuit arrangement is configured to determine a turn-on loss of the semiconductor switch (T1) on the basis of a current and / or a planned switching state of the auxiliary switch (S1) and to adjust the auxiliary switch (S1) in accordance with the determined current when switching off the semiconductor switch (T1) only if a predefined maximum permissible turn-on loss of the semiconductor switch (T1) is not exceeded. [10] Method comprising a method for reducing the switching losses of a semiconductor switch (T1): - a first step in determining the current (IL) of an electric current flowing along a load path of the semiconductor switch (T1) while the semiconductor switch (T1) is in an on state, - a second step - to close an auxiliary switch (S1) which is connected in series with a capacitor (C1) in parallel to the load path of the semiconductor switch (T1) or to hold the auxiliary switch (S1) in a closed state before a switching-off process of the semiconductor switch (T1) if the measured current (IL) exceeds a predefined current threshold value, or - to open the auxiliary switch (S1) or to hold the auxiliary switch (S1) in an open state prior to switching off the semiconductor switch (T1) if the measured current (IL) does not exceed the predefined current threshold.
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