Semiconductor manufacturing processes

Abstract

Semiconductor manufacturing process which uses a wafer (W1) which is formed with an annular protruding sub-region (X1) in a rear surface (W1b) of the wafer (W1), wherein the process comprises: - a holding step (S110, S110B) for holding the wafer (W1) by supporting the protruding portion (X1) of the wafer (W1); and - a cutting step (S120) for cutting the wafer (W1) with a blade (BL1) from one side of a front surface (W1a) of the wafer (W1) such that the protruding portion (X1) is separated from the wafer (W1), wherein in the holding step (S110, S110B): - the protruding sub-area (X1) of the wafer (W1) is supported by the side of the front surface (W1a) of the wafer (W1) and - the back surface (W1b) of the wafer (W1) is facing upwards.

Description

Technical area

[0001] The present invention relates to a semiconductor manufacturing method using a wafer formed with an annular protruding portion. General state of the art

[0002] The thinning of a wafer used in the manufacture of a power semiconductor used for electrical power control is being advanced. Generally, the thinner the wafer, the more likely it is to warp. If any warp is present in the wafer, there is a possibility that normal processing of the wafer may not be possible.

[0003] Patent Document 1 discloses a configuration for reducing warpage of a wafer (hereinafter also referred to as "related configuration A"). In related configuration A, only a region corresponding to a device region in a back surface of the wafer is ground. Thereby, a recessed portion is formed in the back surface of the wafer and an annular reinforcement portion is created on the back surface of the wafer. Note that it is necessary that the annular reinforcement portion be separated from the wafer before dicing processing is performed on the wafer. State-of-the-art documentPatent document

[0004] Patent Document 1: Japanese Patent JP 5 390 740 B2

[0005] JP 2016-157 903 A relates to a wafer manufacturing method designed to prevent an underlying wafer from detaching from an adhesive tape used.A wafer dividing method includes a holding step of holding a back surface of the wafer on a chuck table, a circular dividing groove forming step for cutting the wafer along a circular boundary of a circular recess and an annular projection by a cutting blade to form a circular dividing groove on a front surface, an annular projection peeling step of peeling the annular projection downward to position the front surface on an outer peripheral side of the wafer lower than the back surface of the wafer on which the circular recess is formed; a cutting step of starting cutting from the front surface of the wafer along a predetermined dividing line to cut the wafer into small pieces, and a processing set carrying out step of conveying a processing set out of the chuck table.Thus, the annular projection can be safely removed from an adhesive tape with the dividing groove as a boundary and an adjacent device.

[0006] JP H06-275712 A discloses a cutting device in which chips generated when cutting a groove in a semiconductor wafer by a rotating blade are prevented from adhering to the wafer. A top surface of a semiconductor wafer, turned upside down from a front side to the back side, is supported by a horizontal bottom surface of a holder movable in a horizontal direction. The holder is moved, and a groove is cut into a bottom surface of the wafer by an upper end of a rotating blade rotating at a lower, predetermined position of the holder. Coolant is discharged from a water supply pipe to a portion on the bottom surface of the wafer to be cut by the blade, and a flow direction of the coolant is determined by a cover disposed near an upper end of the blade.The coolant in a cover is concentrically drained from a drain port at one end of the cover to effectively wash away chips from the underside of the wafer. The chips are separated from the wafer by their own weight and fall off, rather than clinging to the wafer as a water reservoir. SummaryProblem to be solved by the invention

[0007] In order to separate the wafer from the annular protruding portion (reinforcing portion), the wafer is generally cut with a blade from a front surface side in a state where a front surface of the wafer is facing upward. A device such as a semiconductor device or the like is formed on the front surface of the wafer. Therefore, in the above-described cutting method, there is a problem that sharp chips generated during wafer cutting scatter on the front surface of the wafer and easily adhere to the device such as the semiconductor device or the like.

[0008] Consequently, it is necessary to limit the scattering of sharp fragments on the front surface of the wafer. Note that in the related configuration A, this requirement cannot be met.

[0009] The present invention is made to solve the above-described problem, and it is an object of the present invention to provide a semiconductor manufacturing method capable of suppressing scattering of sharp chips on a front surface of a wafer. Means to solve the problem

[0010] The object underlying the invention is achieved in a semiconductor manufacturing method according to the invention with the features of claim 1. Advantageous further developments are the subject of the respective dependent claims.

[0011] To achieve the above-described object, a semiconductor manufacturing method according to one aspect of the present invention is a manufacturing method that uses a wafer formed with an annular protruding portion on a back surface of the wafer. The semiconductor manufacturing method includes a holding step of holding the wafer by supporting the protruding portion of the wafer with the back surface facing upward, and a cutting step of cutting the wafer with a blade from a front surface side of the wafer so that the protruding portion is separated from the wafer. At this time, in the holding step, the protruding portion of the wafer is supported from the front surface side of the wafer, and the back surface of the wafer is facing upward. Effects of the invention

[0012] According to the present invention, the wafer is cut with the blade from the front surface side of the wafer in the state where the protruding portion of the wafer is supported with the back surface facing upward. That is, the wafer is cut in a state where the front surface of the wafer is facing downward.

[0013] This causes sharp chips generated during wafer cutting to fall downward. Accordingly, scattering of sharp chips on the front surface of the wafer can be suppressed.

[0014] The objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description and the accompanying drawings. Short description of the drawings Fig. 1 illustrates views showing a configuration of a wafer used in a first embodiment of the present invention. Fig. 2 is a view for describing a semiconductor manufacturing method Pr according to the first embodiment of the present invention. Fig. 3 is a flowchart of the semiconductor manufacturing method Pr according to the first embodiment of the present invention. Fig. 4 is a view for describing a semiconductor manufacturing method Pra according to a second embodiment of the present invention. Fig. 5 is a flowchart of the semiconductor manufacturing method Pra according to the second embodiment of the present invention. Fig. 6 is a view for describing a semiconductor manufacturing method Prb according to a third embodiment of the present invention. Fig. 7 is a flowchart of the semiconductor manufacturing method Prb according to the third embodiment of the present invention. Fig. 8 is a view for describing a semiconductor manufacturing method Prn as a comparative example. Description of embodiments

[0015] Embodiments of the present invention will be described below with reference to the drawings. In the following drawings, the same components are designated by the same reference numerals. The names and functions of the components designated by the same reference numerals are the same. Accordingly, detailed descriptions of a portion of the components designated by the same reference numerals need not be repeated.

[0016] It should be noted that dimensions, a material, a shape, a relative arrangement of each of the components, and the like exemplified in the embodiments can be appropriately changed according to a configuration of an apparatus to which the present invention is applied, various conditions, and the like. <Erste Ausführungsform>

[0017] Fig. 1 illustrates views showing a configuration of a wafer W1 used in a first embodiment of the present invention. Fig. 1(a) is a perspective view of the wafer W1. Fig. 1(b) is a cross-sectional view of the wafer W1 taken along a line A1-A2 in Fig. 1(a).

[0018] Referring to Fig. 1(a) and Fig. 1(b), the wafer W1 includes a front surface W1a and a back surface W1b. The front surface W1a is formed with a plurality of semiconductor devices Dv1. Dicing lines S1 are formed between the plurality of semiconductor devices Dv1. In the following description, a region where the plurality of semiconductor devices Dv1 are formed in the wafer W1 is also referred to as a "device region RgD." The device region RgD corresponds to a central portion of the wafer W1.

[0019] The back surface W1b is a surface of the wafer W1 on an opposite side of the front surface W1a. A protruding portion X1 is formed in the back surface W1b. A shape of the protruding portion X1 is a ring shape (closed loop shape).

[0020] A shape of the wafer W1 is circular in a plan view. In the following description, a rim portion of the wafer W1 in a plan view is also referred to as a "rim portion Wp." A shape of the rim portion Wp in a plan view is an annular shape. The protruding portion X1 is formed in the rim portion Wp of the wafer W1. Therefore, the wafer W1 has a disk-shaped depressed portion V1. The depressed portion V1 is a portion within the annular protruding portion X1 in the back surface W1b of the wafer W1. In the following description, a bottom surface of the depressed portion W1 is also referred to as a "bottom surface V1b." The bottom surface V1b is a part of the back surface W1b. Furthermore, in the following description, a depth of the depressed portion V1 is also referred to as "depth d1."

[0021] Note that in Fig. 1(a), a cutting line CL1 is shown. The cutting line CL1 is a line used to separate the protruding portion X1 from the wafer W1. Specifically, the cutting line CL1 is a line indicating a position where the wafer W1 is cut with a blade BL1, which will be described later. A shape of the cutting line CL1 is circular. Note that an area surrounded by the cutting line CL1 in the wafer W1 is the device area RgD.

[0022] In the following description, a step of removing the protruding portion X1 from the wafer W1 is also referred to as “semiconductor manufacturing method Pr”.

[0023] Next, the semiconductor manufacturing process Pr in the present embodiment will be described. The semiconductor manufacturing process Pr is a step included in a manufacturing process for manufacturing the semiconductor devices Dv1. The semiconductor manufacturing process Pr is a manufacturing process using the wafer W1.

[0024] Fig. Figure 2 is a view for describing the semiconductor manufacturing method Pr according to the first embodiment of the present invention. The semiconductor manufacturing method Pr is carried out using a grinding device (not shown). The grinding device includes the blade BL1, a work table Tb1, and a stage St1 arranged in Fig. 2. The platform St1 is attached to the grinding device.

[0025] Note that in Fig. 2, to simplify understanding of the position where the wafer W1 is to be cut, two blades BL1 are shown. However, the grinder actually performs a cutting step described later using only one blade BL1. The grinder also has a function of moving the chuck table Tb1.

[0026] In Fig. 2, an X direction, a Y direction, and a Z direction are orthogonal to each other. The X direction, the Y direction, and the Z direction shown in the subsequent figures are also orthogonal to each other. In the following description, a direction including the X direction and a direction opposite to the X direction (-X direction) is also referred to as the "X-axis direction." Furthermore, in the following description, a direction including the Y direction and a direction opposite to the Y direction (-Y direction) is also referred to as the "Y-axis direction." In the following description, a direction including the Z direction and a direction opposite to the Z direction (-Z direction) is also referred to as the "Z-axis direction."

[0027] In the following description, a plane containing the X-axis and Y-axis directions is also referred to as the "XY plane." A plane containing the X-axis and Z-axis directions is also referred to as the "XZ plane." A plane containing the Y-axis and Z-axis directions is also referred to as the "YZ plane."

[0028] The shape of the work table Tb1 is columnar. The size of the work table Tb1 in a plan view (XY plane) is smaller than the size of the recessed portion V1 in a plan view (XY plane). The platform St1 is provided with a through hole H1. The shape of the through hole H1 is columnar.

[0029] In the following description, a space where the through hole H1 is provided is also referred to as "space Sp1." Furthermore, in the following description, a portion of the stage St1 in contact with the space Sp1 (through hole H1) is also referred to as "rim portion Stp." A shape of the rim portion Stp in a plan view (XY plane) is a ring shape. Furthermore, in the following description, a device having a function of moving the wafer W1 is also referred to as "wafer moving device." The wafer moving device has a function of gripping the wafer W1 or the like.

[0030] Note that before the semiconductor manufacturing process Pr is carried out, a dicing tape Tp1 is previously bonded to the entire back surface W1b of the wafer W1. When the semiconductor manufacturing process Pr is carried out, the dicing tape Tp1 is bonded as shown in Fig. 2, is adhered to the entire back surface W1b of the wafer W1. That is, the dicing tape Tp1 in question is adhered to the back surface W1b of the wafer W1 so as to cover the protruding portion X1. Furthermore, the dicing tape Tp1 is adhered to a bottom surface V1b of the recessed portion V1.

[0031] In the following description, a state of the subject wafer W1 in which the dicing tape Tp1 is adhered to the entire back surface W1b of the wafer W1 is also referred to as the "with-tape state." Note that the dicing tape Tp1 has a characteristic that the adhesion of the subject dicing tape Tp1 decreases when the subject dicing tape Tp1 is irradiated with ultraviolet rays.

[0032] Fig. 3 is a flowchart of the semiconductor manufacturing method Pr according to the first embodiment of the present invention. In the semiconductor manufacturing method Pr, processing is first performed in step S110.

[0033] In step S110, a holding step is performed. In the holding step, the wafer W1 is placed on the rim portion Stp of the platform St1 by the wafer moving device. In the following description, a state of the wafer W1 in which the back surface W1b is facing upward is also referred to as a "back surface facing upward state."

[0034] Specifically, in the holding step, the wafer moving device places the collar portion Wp (protruding portion X1) of the wafer W1 on the platform St1 (collar portion Stp) so that the space Sp1 (through hole H1) under the central portion of the wafer W1 is supported in the back surface facing upward state. That is, the holding step is a step in which the wafer W1 in question is held in the back surface facing upward state by the platform St1 (collar portion Stp) supporting the protruding portion X1 of the wafer W1.

[0035] Furthermore, in the holding step, after the wafer W1 is placed on the platform St1, the grinding device sets the chuck Tb1 inside the recessed portion V1 of the wafer W1. This allows the chuck Tb1 to be located in the recessed portion V1 of the wafer W1. The chuck Tb1 sucks and holds the bottom surface V1b of the wafer W1 via the dicing belt Tp1. Accordingly, the wafer W1 is securely fixed (held) by the platform St1 and the chuck Tb1. Next, processing is performed in step S120.

[0036] In step S120, the cutting step is performed. The cutting step is a step for cutting the wafer W1 with the blade BL1 of the grinding device. The cutting step is performed in a state in which the front surface W1a of the wafer W1, as shown in Fig. 2, is facing downwards.

[0037] Specifically, in the cutting step, the grinding device cuts the wafer W1 in question with the blade BL1 from one side of the front surface W1a of the wafer W1, so that the protruding portion X1 is separated from the wafer W1. Note that the grinding device cuts the wafer W1 by moving the blade BL1 along the aforementioned cutting line CL1. This concludes the semiconductor manufacturing process Pr.

[0038] As described above, according to the present embodiment, the wafer W1 in question is cut with the blade BL1 from the front surface W1a side of the wafer W1 in question in the state where the protruding portion X1 of the wafer W1 is supported with the rear surface W1b facing upward. That is, the wafer W1 is cut in the state where the front surface W1a of the wafer W1 is facing downward.

[0039] This causes sharp chips generated during wafer cutting to fall downward. Accordingly, scattering of sharp chips on the front surface of the wafer can be suppressed.

[0040] Here, a comparative example to be compared with the present embodiment will be described. In the following description, the semiconductor manufacturing method Pr as the comparative example will also be referred to as "semiconductor manufacturing method Prn." The semiconductor manufacturing method Prn is a manufacturing method to be compared with the semiconductor manufacturing method Pr of the present embodiment. Fig. 8 is a view for describing the semiconductor manufacturing method Prn as the comparative example.

[0041] In the semiconductor manufacturing process Prn is, as in Fig. 8, the front surface W1a of the wafer W1 is facing upward with the dicing belt facing upward, and the wafer W1 in question is supported by the chuck table Tb1 and a support member 10. Specifically, the chuck table Tb1 supports the bottom surface V1b of the recessed portion V1 of the wafer W1 via the dicing belt Tp1. Furthermore, the support member 10 holds the protruding portion X1 in question by supporting the protruding portion X1 of the wafer W1 via the dicing belt Tp1.

[0042] A thickness of the protruding portion X1 of the wafer W1 varies for each wafer W1. Furthermore, a thickness of the device region RgD of the wafer W1 varies for each type of semiconductor device Dv1. Therefore, in the semiconductor manufacturing process Prn, a spacer 11 is used to adjust a height of a front surface of the support member 10 that supports the protruding portion X1.

[0043] The spacer 11 is a member corresponding to a variation in the thickness of the protruding portion X1. Therefore, according to the variation in the thickness of the protruding portion X1, the spacer 11 is used with a different height. In addition, the spacer 11 is also a member corresponding to a step equivalent to a difference between the thickness of the protruding portion X1 and the thickness of the device region RgD in the wafer W1. That is, the spacer 11 is a member corresponding to the thickness of the device region RgD and the thickness of the protruding portion X1 in the wafer W1.

[0044] In the semiconductor manufacturing process Prn, a cutting step N is carried out in the state of Fig. 8. In cutting step N, the grinding device cuts the wafer W1 in question with the blade BL1 from the front surface W1a side of the wafer W1. Note that if the height of the spacer 11 used in the semiconductor manufacturing process Prn is not correct, the protruding portion X1 will not be securely fixed.

[0045] If the cutting step N is performed in a state where the protruding portion X1 is not securely fixed, the wafer W1 will vibrate, and a crack will occur in the wafer W1. In this case, there is a possibility that a defect will occur in the semiconductor devices Dv1. The defect in question is, for example, a defect that deteriorates the electrical characteristics of the semiconductor devices D1.

[0046] Therefore, in the semiconductor manufacturing process Prn, since an operation for exchanging the spacer 11 is required for each type of semiconductor devices Dv1 in the wafer W1, there is a problem that the work efficiency is poor.

[0047] In the semiconductor manufacturing process Prn, the cutting step N is carried out in the state of Fig. 8. Therefore, there is a high probability that the sharp chips generated when the cutting step N is performed will adhere to the semiconductor devices Dv1.

[0048] On the other hand, in the semiconductor manufacturing method Pr of the present embodiment, as shown in Fig. As shown in Figure 2, the wafer W1 is securely fixed (held) in the state with its rear surface facing upward by the platform St1 and the chuck table Tb1. This allows the protruding portion X1 to be securely fixed (held) without using the spacer 11, as in the semiconductor manufacturing process Prn.

[0049] Furthermore, in the semiconductor manufacturing process Pr, the preceding cutting step is performed in the state where the wafer W1 is securely held. This can prevent the wafer W1 from vibrating when the cutting step is performed. This can prevent a crack from occurring in the wafer W1.

[0050] Furthermore, in the semiconductor manufacturing process Pr, the spacer 11 is not used, and the spacer 11 corresponds to the step corresponding to the difference between the thickness of the protruding portion X1 and the thickness of the device region RgD in the wafer W1. Therefore, a process for replacing the spacer 11 for each type of semiconductor device Dv1 in the wafer W1 is not required. Accordingly, work efficiency can be increased.

[0051] In the semiconductor manufacturing process Pr, the cutting step is carried out in the state of Fig. 2. Therefore, the sharp chips generated during the cutting step fall toward the lower side of the wafer W1. This can limit the adhesion of sharp chips to the semiconductor devices Dv1. Accordingly, the occurrence of poor appearance of the semiconductor devices Dv1 can be prevented. <Zweite Ausführungsform>

[0052] A configuration of the present embodiment is a configuration in which a step using ultraviolet rays is added to the preceding semiconductor manufacturing process Pr (hereinafter also referred to as "configuration CtA"). In the following description, the semiconductor manufacturing process Pr using the configuration CtA is also referred to as "semiconductor manufacturing process Pra."

[0053] Fig. 4 is a view for describing the semiconductor manufacturing method Pra according to a second embodiment of the present invention. Fig. 5 is a flowchart of the semiconductor manufacturing method Pra according to the second embodiment of the present invention. In Fig. 5 is a processing in the same step number as the step number in Fig. 3 illustrates processing similar to that described in the first embodiment, and therefore a detailed description will not be repeated. The following description focuses on points different from the first embodiment.

[0054] In the semiconductor manufacturing method Pra, the wafer W1 with the tape is used as in the first embodiment. In the semiconductor manufacturing method Pra, the holding step in step S110 is performed as in the first embodiment. At this time, the rim portion Wp (protruding portion X1) of the wafer W1 is placed on the stage St1 (rim portion Stp) so that the space Sp1 exists under the central portion of the wafer W1 in the back surface facing upward state.

[0055] After step S110, processing is performed in step S200. Step S200 includes steps S120 and S130. In step S120, the cutting step is performed as in the first embodiment.

[0056] In step S130, an ultraviolet ray irradiation step is performed. The ultraviolet ray irradiation step is performed in parallel with the cutting step (S120). Specifically, the cutting step and the ultraviolet ray irradiation step are performed simultaneously. "Simultaneously" in the present embodiment also includes a meaning of "almost simultaneously." In the ultraviolet ray irradiation step, an ultraviolet ray irradiation device 7 is used. The ultraviolet ray irradiation device 7 is a device that has a function of irradiating the entire annular protruding portion X1 with ultraviolet rays.

[0057] In the step of irradiation with ultraviolet rays, as in Fig. As shown in Figure 4, the ultraviolet ray irradiation device 7 irradiates the protruding portion X1 of the wafer W1 with the ultraviolet ray band. Specifically, in the ultraviolet ray irradiation step, the ultraviolet ray irradiation device 7 irradiates the entire annular protruding portion X1 with ultraviolet rays from an upper side of the annular protruding portion X1.

[0058] Since this allows the dicing band Tp1 to be irradiated with ultraviolet rays, adhesion of the dicing band Tp1 in question decreases. Accordingly, processing for peeling the dicing band Tp1 from the protruding portion X1 is easily performed, and the semiconductor manufacturing process Pra ends at the aforementioned step.

[0059] As described above, according to the present embodiment, the dicing step and the ultraviolet ray irradiation step are performed simultaneously. Therefore, the processing for peeling the dicing tape Tp1 from the protruding portion X1 can be easily performed, and the protruding portion X1 is separated from the wafer W1. Accordingly, the time required to complete the manufacturing of the semiconductor devices Dv1 can be shortened. As a result, the productivity of the semiconductor devices Dv1 can be increased. <Dritte Ausführungsform>

[0060] A configuration of the present embodiment is a configuration in which a larger-sized chuck table is used in the foregoing semiconductor manufacturing process Pr (hereinafter also referred to as "configuration CtB"). In the following description, the semiconductor manufacturing process Pr using the configuration CtB is also referred to as "semiconductor manufacturing process Prb."

[0061] Fig. 6 is a view for describing the semiconductor manufacturing method Prb according to a third embodiment of the present invention. Fig. 7 is a flowchart of the semiconductor manufacturing method Prb according to the third embodiment of the present invention. In Fig. 7 is a processing in the same step number as the step number in Fig. 3 illustrates processing similar to that described in the first embodiment, and therefore a detailed description will not be repeated. The following description focuses on points different from the first embodiment.

[0062] In the semiconductor manufacturing method Prb, processing is first performed in step S110B. In step S110B, a holding step B is performed. In the holding step B, a work table Tb1m is used.

[0063] A shape of the clamping table Tb1m is columnar. A size of the clamping table Tb1m in a plan view (XY plane) is smaller than the size of the recessed portion V1 in a plan view (XY plane). In addition, a volume of the clamping table Tb1m is larger than a volume of the clamping table Tb1 in Fig.2. Specifically, a diameter of the clamping table Tb1m in a plan view (XY plane) is larger than a diameter of the clamping table Tb1 in a plan view (XY plane).

[0064] In the holding step B, the wafer moving device places the rim portion Wp (projecting portion X1) of the wafer W1 on the platform St1 (rim portion Stp) so that the space Sp1 exists under the central portion of the wafer W1 in the rear surface facing upward state.

[0065] Furthermore, in the holding step B, after the wafer W1 is placed on the platform St1, the grinding device places the chuck Tb1m inside the recessed portion V1 of the wafer W1. Specifically, the grinding device places the chuck Tb1m inside the recessed portion V1 such that a rim portion of the chuck Tb1m overlaps with the rim portion Stp of the platform St1 by only a length Ln in a plan view (XY plane).

[0066] After the holding step B is performed, the cutting step (S120) is performed as in the first embodiment. Therefore, when the cutting step (S120) is performed, the collar portion Wp (protruding portion X1) of the wafer W1 is placed on the stage St1 (collar portion Stp) so that the space Sp is present under the central portion of the wafer W1 in the back surface facing upward state.

[0067] Furthermore, when the cutting step is performed, the chuck table Tb1m is in the recessed portion V1 of the wafer W1. Furthermore, when the cutting step is performed, the rim portion of the chuck table Tb1m overlaps the rim portion Stp of the platform St1 in a plan view (XY plane). This allows the wafer W1 to be securely fixed by the platform St1 and the chuck table Tb1m in a state where the front surface W1a of the wafer W1 is parallel to an upper surface of the platform St1.

[0068] The cutting step (S120) is performed in the state where the wafer W1 is securely fixed. This can prevent the wafer W1 from vibrating when the wafer W1 is cut. Accordingly, the occurrence of a crack in the wafer W1 can be prevented. Explanation of reference symbols BL1 blade Tb1, Tb1m clamping table Tp1 fragmentation belt W1 wafer X1 protruding part

Claims

[1] A semiconductor manufacturing method using a wafer (W1) formed with an annular protruding portion (X1) in a back surface (W1b) of the wafer (W1), the method comprising: - a holding step (S110, S110B) for holding the wafer (W1) by supporting the protruding portion (X1) of the wafer (W1); and - a cutting step (S120) for cutting the wafer (W1) with a blade (BL1) from one side of a front surface (W1a) of the wafer (W1) so that the protruding portion (X1) is separated from the wafer (W1), wherein in the holding step (S110, S110B): - the protruding portion (X1) of the wafer (W1) is supported by the side of the front surface (W1a) of the wafer (W1) and - the rear surface (W1b) of the wafer (W1) faces upwards. [2] A semiconductor manufacturing method according to claim 1, wherein: - a dicing tape (Tp1) is bonded to the rear surface (W1b) of the wafer (W1) such that the dicing tape (Tp1) covers the protruding portion (X1), - the semiconductor manufacturing method further comprises a step (S130) of irradiating with ultraviolet rays, which is carried out in parallel with the cutting step (S120), and - in the step (S130) of irradiating with ultraviolet rays, the protruding partial area (X1) is irradiated with ultraviolet rays. [3] A semiconductor manufacturing method according to claim 1, wherein: - the protruding portion (X1) is formed in a crown portion (Wp) of the wafer (W1) and - when the cutting step (S120) is executed, (a1) the crown portion (Wp) of the wafer (W1) is placed on a platform (St1) such that a space (Sp1) is present under a central portion of the wafer (W1) with the rear surface (W1b) facing upwards, (a2) the clamping table (Tb1m) is placed in an inner portion of the annular protruding portion (X1) in the rear surface (W1b) of the wafer (W1) and (a3) a crown portion of the clamping table (Tb1m) overlaps a portion in contact with the space (Sp1) of the platform (St1) in a plan view.

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