Power module semiconductor housing and semiconductor device

Abstract

A power module semiconductor package (1) comprises a substrate (5), a first power semiconductor device (17), a second power semiconductor device (41), a heat spreader (31), a sealing resin (53), and the like. Viewed from a top view from a second main surface (5b) of the substrate (5), the first power semiconductor device (17) includes a region (18) that does not overlap with the second power semiconductor device (41) and the substrate (5). The non-overlapping region (18) is located at a substrate opening (7) of the substrate (5). A first signal electrode (21) of the first power semiconductor device (17) and a first signal terminal (37a) are electrically connected to each other by a first bond wire (47) through the substrate opening (7).

Description

TECHNICAL AREA

[0001] The present disclosure relates to a power module semiconductor package and a semiconductor device. STATE OF THE ART

[0002] A semiconductor device of a type that has a conduction path in a vertical direction to accommodate high voltage and high current is generally called a power semiconductor device. Examples of power semiconductor devices include an insulated-gate bipolar transistor (IGBT), a metal-oxide-semiconductor field-effect transistor (MOSFET), a bipolar transistor, and a diode.

[0003] There is a power module semiconductor package in which a power semiconductor device is mounted on a printed circuit board and encapsulated with a sealing resin. Such a power module semiconductor package is connected to a heat sink, a control component, and the like, and is used as a semiconductor device (or power conversion equipment) in a wide range of fields, such as industrial equipment, automobiles, railways, and the like.

[0004] As the size and weight of equipment containing a semiconductor device (or power conversion equipment) have decreased in recent years, there is a corresponding need for smaller and lighter power module semiconductor packages. A well-known design for a power module semiconductor package is an injection-molded semiconductor package featuring a sealing resin formed using an injection molding process. Injection-molded semiconductor packages are undergoing intensive development due to their high productivity and reliability.

[0005] To ensure heat dissipation, an injection-molded semiconductor package incorporates a power semiconductor device mounted on a heat spreader, which is a metal element. The power semiconductor device has an electrode electrically connected by a bond wire to a conductor frame, which serves as an external connection. Furthermore, an end section of the conductor frame, acting as an external connection point, protrudes from the sealant resin. Additionally, to ensure heat dissipation, the heat spreader has a bottom surface (a front surface) that is exposed within the sealant resin.

[0006] The injection-molded semiconductor package also features a heat sink that is integrated with the exposed heat spreader to ensure heat dissipation during operation. The heat sink is in the form of a fin. The heat spreader and heat sink are joined together by a heat-dissipating and insulating layer. The injection-molded semiconductor package with the attached heat sink is commonly used as a semiconductor device (or power conversion equipment).

[0007] Power module semiconductor packages are disclosed, for example, in patent literature PTLs 1, 2 and 3. LIST OF CAPLETS PATENT LITERATURE PTL 1: Japanese Disclosure Document No. 2011-258594 PTL 2: Japanese Disclosure Document No. 2013-110181 PTL 3: Japanese Disclosure Document No. 2015-070269 BRIEF DESCRIPTION OF THE INVENTIONAL PROBLEM

[0008] As explained above, since the size and weight of equipment containing a semiconductor device (or power conversion equipment) are constantly decreasing, there is also a need for a power module semiconductor package that is smaller in size and the like.

[0009] The present disclosure was prepared in the context of such a development and one objective of it is to provide a power module semiconductor package capable of miniaturization, and another objective of it is to provide a semiconductor device as power conversion equipment with such a power module semiconductor package applied thereto. SOLUTION TO THE PROBLEM

[0010] A power module semiconductor package according to the present disclosure comprises a substrate, a first power semiconductor device, a second power semiconductor device, an external main terminal, a signal terminal, and a sealing resin. The substrate has a first main surface and a second main surface, which are opposite each other. The first power semiconductor device is mounted on the substrate at the first main surface. The second power semiconductor device is mounted on the substrate at the second main surface. The external main terminal includes a first external main terminal, which is electrically connected to the first power semiconductor device, and a second external main terminal, which is electrically connected to the second power semiconductor device.The signal connection includes a first signal terminal, which is electrically connected to the first power semiconductor device, and a second signal terminal, which is electrically connected to the second power semiconductor device. The sealing resin seals the first and second power semiconductor devices such that the external main terminal and the signal terminal protrude. The external main terminal is located on a side opposite the side on which the signal terminal is located with respect to the first and second power semiconductor devices. The first and second power semiconductor devices are electrically connected to each other via a through-hole via that penetrates the substrate.Viewed from a top-down perspective of the substrate's second main surface, the first power semiconductor device includes an area that does not overlap with the second power semiconductor device or the substrate. The first power semiconductor device and the first signal terminal are electrically connected by a bond wire that links the non-overlapping area of ​​the first power semiconductor device and the first signal terminal.

[0011] A semiconductor device according to the present disclosure is a semiconductor device comprising the power module semiconductor package described above and including a heat sink, a main conversion circuit, and a control circuit. The heat sink is attached to the power module semiconductor package. The main conversion circuit receives power, converts the received power, and outputs the converted power. The control circuit outputs a control signal to the main conversion circuit to control the main conversion circuit. ADVANTAGEOUS EFFECTS OF THE INVENTION

[0012] The power module semiconductor package disclosed herein comprises the first power semiconductor device, which, viewed from a top view of the second main surface of the substrate, has a region that does not overlap with the second power semiconductor device and the substrate. The first power semiconductor device and the first signal terminal are electrically connected by a bond wire that connects the non-overlapping region of the first power semiconductor device and the first signal terminal. This allows for a reduction in size and weight.

[0013] The semiconductor device disclosed herein has a cooler attached to the power module semiconductor housing described above. This makes it possible to reduce the size and weight of the semiconductor device. BRIEF DESCRIPTION OF THE DRAWINGS Fig. Figure 1 is a top view showing the structure of a power module semiconductor package according to a first embodiment. Fig. 2 is a cross-section along a Fig. 1 shown cross-sectional line II-II in the same embodiment. Fig. Figure 3 is another top view showing the structure of the power module semiconductor housing in the same embodiment. Fig. Figure 4 is a cross-section representing a step in a method for manufacturing the power module semiconductor housing in the same embodiment. Fig. 5 is a cross-section representing a step that follows the one in Fig. Step 4, as shown, is carried out in the same embodiment. Fig. 6 is a cross-section representing a step following the one in Fig. Step 5, as shown, is carried out in the same embodiment. Fig. 7 is a cross-section representing a step following the one in Fig. Step 6, as shown, is carried out in the same embodiment. Fig. 8 is a cross-section representing a step following the one in Fig. Step 7, as shown, is carried out in the same embodiment. Fig. Figure 9 is a top view showing the structure of a power module semiconductor package according to a first comparative example. Fig. 10 is a cross-section along a Fig. 9 shown cross-sectional line XX. Fig. Figure 11 is a cross-section representing a structure of a power module semiconductor package according to a second comparative example. Fig. Figure 12 is a top view showing the structure of a power module semiconductor package according to a second embodiment. Fig. 13 is a cross-section along a Fig. 12 shown cross-sectional line XIII-XIII in the same embodiment. Fig. Figure 14 is another top view showing the structure of the power module semiconductor housing in the same embodiment. Fig. Figure 15 is a cross-section representing a step in a method for manufacturing the power module semiconductor housing in the same embodiment. Fig. 16 is a cross-section representing a step following the one in Fig. Step 15 is performed in the same embodiment. Fig. 17 is a cross-section representing a step following the one in Fig. Step 16 is performed in the same embodiment. Fig. 18 is a cross-section representing a step following the one in Fig. Step 17 is performed in the same embodiment. Fig. 19 is a cross-section representing a step that follows the one in Fig. Step 18 is performed in the same embodiment. Fig. Figure 20 is a cross-section representing a structure of a power module semiconductor housing according to a third embodiment. Fig. Figure 21 is a cross-section representing a structure of a power module semiconductor housing according to a fourth embodiment. Fig. 22 is a cross-section representing a structure of a power module semiconductor housing according to a fifth embodiment. Fig. Figure 23 is a cross-section representing a structure of a power module semiconductor housing according to a sixth embodiment. Fig. Figure 24 is a cross-section representing a structure of a first example of a semiconductor device according to a seventh embodiment. Fig. Figure 25 is a cross-section showing the structure of a second example of the semiconductor device in the same embodiment. Fig. Figure 26 is a block diagram of a semiconductor device according to an eighth embodiment. DESCRIPTION OF EXECUTION FORMS

[0014] It should be noted that throughout this description, a power semiconductor device sealed with a compression resin is referred to as a power module semiconductor package. The power module semiconductor package with an attached heat sink, such as a heat sink, is referred to as a semiconductor device or power conversion equipment.

[0015] Furthermore, in each embodiment, a power module semiconductor housing and the like are described as required using an XYZ coordinate axis (three-dimensional coordinate axes). First embodiment

[0016] An example of a power module semiconductor package according to a first embodiment is described. As in the Fig. 1, Fig. 2 and Fig. As illustrated in Figure 3, a power module semiconductor housing 1 according to the first embodiment comprises a substrate 5, a first power semiconductor device 17, a second power semiconductor device 41, a heat distributor 31, a metal block 27, a first bond wire 47, a second bond wire 49, a third bond wire 51, a sealing resin 53 and the like.

[0017] The substrate 5 has a first main surface 5a and a second main surface 5b, which are opposite each other. A first interconnect layer 13 and a first external main terminal 11 are formed on the first main surface 5a of the substrate 5. A second interconnect layer 35, a second external main terminal 33, and a signal terminal 37 are formed on the second main surface 5b of the substrate 5. The first interconnect layer 13 and the second interconnect layer 35 are electrically connected to each other by a via 9 that penetrates the substrate 5. The signal terminal 37 includes a first signal terminal 37a and a second signal terminal 37b. The substrate 5 has a substrate opening 7 that is configured to penetrate the substrate 5.

[0018] A first main electrode 19 and a first signal electrode 21 are formed on the first power semiconductor device 17. A second main electrode 43 and a second signal electrode 45 are formed on the second power semiconductor device 41. The first main electrode 19 for the first power semiconductor device 17 is bonded to the first intermediate layer 13 by solder 23. The metal block 27 is bonded to the first external main terminal 11 by solder 23.

[0019] The heat distributor 31 is bonded by solder 25 on one side opposite, with respect to the first power semiconductor device 17 and the metal block 27, on the side to which the substrate 5 is bonded. The second power semiconductor device 41 is bonded by solder 39 to the second intermediate layer 35.

[0020] Viewed from a top view from the second principal surface 5b of the substrate 5 (i.e., an XY plane), the first power semiconductor device 17 includes a region 18 (an offset region) that does not overlap with the second power semiconductor device 41 and the substrate 5, and the non-overlapping region 18 is located at the substrate opening 7 of the substrate 5. The first signal electrode 21 of the first power semiconductor device 17 and the first signal terminal 37a are electrically connected to each other by the first bond wire 47 through the substrate opening 7.

[0021] The second signal electrode 45 of the second power semiconductor device 41 and the second signal terminal 37b are electrically connected to each other by the second bond wire 49. The second main electrode 43 of the second power semiconductor device 41 and the second external main terminal 33 are electrically connected to each other by the third bond wire 51.

[0022] The sealing resin 53 is designed to seal the first power semiconductor device 17, the second power semiconductor device 41 and the like in such a way that the first external main connection 11, the second external main connection 33 and the signal connection 37 protrude and the heat distributor 31 has an exposed front surface (or a bottom surface).

[0023] The power module semiconductor package 1 is described in more detail. The first power semiconductor device 17 and the second power semiconductor device 41 are semiconductor elements for power control, such as an insulated-gate bipolar transistor (IGBT) or a MOS field-effect transistor (MOSFET), a freewheeling diode, or the like.

[0024] The heat distributor 31, for example, is made of a metal with excellent heat conductivity, such as copper or aluminum. While the first power semiconductor device 17 is bonded to the heat distributor 31 by the solder 25, the bonding material is not limited to the solder 25 and can, for example, be sintered silver or a conductive adhesive, or a liquid-phase diffusion bonding technique can be used.

[0025] The metal block 27 is made of a conductive metal, such as copper or aluminum. The metal block 27 has essentially the same thickness as the first power semiconductor device 17 (along the Z-axis). While the metal block 27 is bonded to the heat spreader 31 by the solder 25, it can be bonded using sintered silver, a conductive adhesive, or a liquid-phase diffusion bonding technique. The metal block 27 electrically connects the heat spreader 31 and the first external main terminal 11, enabling them to conduct a current flowing from the first power semiconductor device 17, through the heat spreader 31, to the first external main terminal 11.

[0026] Provided that the heat distributor 31 and the first external main connection 11 can be electrically connected, the metal block 27 is not exclusive and, for example, a solder ball, a metal ball, or the like can be used. Furthermore, a heat distributor 31 can be provided with a projection beforehand by forging.

[0027] It is assumed that substrate 5 is an organic insulating substrate based on glass epoxy. An insulating film with a polymer material applied to it, such as liquid crystal polymer or polyimide, can be used as substrate 5. Alternatively, a ceramic or similar inorganic insulating substrate can be used as substrate 5.

[0028] The first intermediate layer 13 and the first external main connection 11, which are formed on the first main surface 5a of the substrate 5, are formed, for example, by structuring a copper or similar metal layer by etching. The second intermediate layer 35 and the second external main connection 33, which are formed on the second main surface 5b of the substrate 5, are also formed by structuring a copper or similar metal layer by etching.

[0029] The first main electrode 19 of the first power semiconductor device 17 is bonded to the first intermediate layer 13 by the solder 23. The metal block 27 is bonded to the first external main terminal 11 by the solder 23. The bonding material is not limited to the solder 23 and can be, for example, sintered silver or a conductive adhesive, or a liquid-phase diffusion bonding technique can be used.

[0030] The second power semiconductor device 41 is bonded (on its back surface) to the second interconnect layer 35 by the solder 39. The bonding material is not limited to the solder 39 and can, for example, be sintered silver or a conductive adhesive, or a liquid-phase diffusion bonding technique can be used. The first main electrode 19 of the first power semiconductor device 17 and the second power semiconductor device 41 (on its back surface) are electrically connected via the first interconnect layer 13, the via 9, and the second interconnect layer 35.

[0031] The first bond wire 47, which electrically connects the first signal electrode 21 of the first power semiconductor device 17 and the first signal terminal 37a, is positioned to pass through the substrate opening 7. The second bond wire 49, which electrically connects the second signal electrode 45 of the second power semiconductor device 41 and the second signal terminal 37b, is positioned to cross the substrate opening 7. The third bond wire 51, which electrically connects the second main electrode 43 of the second power semiconductor device 41 and the second external main terminal 33, is positioned on one side opposite the side where the substrate opening 7 is located with respect to the second power semiconductor device 41 (i.e., in a negative direction along the X-axis). The power module semiconductor housing 1 according to the first embodiment is configured as described above.

[0032] The following describes how a current flows through the power module semiconductor housing 1. First, the power module semiconductor housing 1 receives an external current at the second external main terminal 33. The current received at the second external main terminal 33 flows through the third bond wire 51 into the second main electrode 43 of the second power semiconductor device 41.

[0033] The current flowing into the second main electrode 43 originates from the back face of the second power semiconductor device 41, passes through the second interconnect layer 35, and flows through the via 9 and the first interconnect layer 13 into the first main electrode 19 of the first power semiconductor device 17. The current flowing into the first main electrode 19 is output from the back face of the first power semiconductor device 17 through the heat spreader 31, the metal block 27, and the first external main terminal 11 outside the power module semiconductor housing 1.

[0034] Meanwhile, a signal current is output from the first signal electrode 21 of the first power semiconductor device 17 via the first bond wire 47 to the first signal terminal 37a. Furthermore, a signal current is output from the second signal electrode 45 of the second power semiconductor device 41 via the second bond wire 49 to the second signal terminal 37b.

[0035] An example of a method for manufacturing the power module semiconductor housing 1 described above will now be briefly described.

[0036] First, as in Fig. As shown in Figure 4, the first power semiconductor device 17 and the metal block 27 are bonded to a surface of the heat distributor 31 by the solder 25. Subsequently, the substrate 5 is produced, which has the first main surface 5a and the second main surface 5b opposite each other (see Figure 4). Fig. 5) The first intermediate connection layer 13 and the first external main connection 11 are pre-formed on the first main surface 5a of the substrate 5. Furthermore, the second intermediate connection layer 35, the second external main connection 33, and the signal connection 37 are pre-formed on the second main surface 5b of the substrate 5. Additionally, the substrate opening 7 is formed in the substrate 5 such that it penetrates the substrate 5.

[0037] Then, as in Fig. As shown in Figure 5, the first main electrode 19 of the first power semiconductor device 17 and the first intermediate layer 13 are bonded together by the solder 23, and the metal block 27 and the first external main terminal 11 are bonded together by the solder 23. Subsequently, as shown in Fig. Figure 6 shows the second intermediate layer 35 and the second power semiconductor device 41 (on its back surface) being bonded together by the solder 39.

[0038] Then, as in Fig. Figure 7 shows the first signal electrode 21 of the first power semiconductor device 17 and the first signal terminal 37a being electrically connected to each other by the first bond wire 47 through the substrate opening 7. The second signal electrode 45 of the second power semiconductor device 41 and the second signal terminal 37b are electrically connected to each other by the second bond wire 49 such that it extends across the substrate opening 7. The second main electrode 43 of the second power semiconductor device 41 and the second external main terminal 33 are electrically connected to each other by the third bond wire 51.

[0039] Subsequently, the first power semiconductor device 17, the second power semiconductor device 41 and the like, which are mounted on the substrate 5, are placed, for example, in an injection mold (not shown) and filled with the sealing resin 53 (see Fig. 8) The power module semiconductor housing 1, which is sealed with the sealing resin 53, is then removed from the injection mold and thus completed, as described in Fig. 8 shown.

[0040] In the power module semiconductor package 1 described above, the first power semiconductor device 17, viewed from the top view of the second main surface 5b of the substrate 5 (i.e., the XY plane), is provided with a region 18 (an offset region) that does not overlap with the second power semiconductor device 41 and the substrate 5. The power module semiconductor package 1 can thus be miniaturized. This is described in comparison to a power module semiconductor package according to a comparative example.

[0041] First, a power module semiconductor package is described according to a first comparative example. As in the Fig. 9 and Fig. As shown in Figure 10, two copper structures 505 are formed on a main surface of an insulating substrate 503 in a power module semiconductor package 501 according to the first comparative example. A first power semiconductor device 507 is bonded to one copper structure 505. A second power semiconductor device 509 is bonded to the other copper structure 505.

[0042] A signal terminal 515 and the first power semiconductor device 507 are electrically connected by a bond wire 519. A first external main terminal 511 and the first power semiconductor device 507 are electrically connected via a copper structure 505. The first power semiconductor device 507 and the second power semiconductor device 509 are electrically connected by the bond wire 519 and the other copper structure 505.

[0043] The signal terminal 515 and the second power semiconductor device 509 are electrically connected by the bond wire 519. A second external main terminal 513 and the second power semiconductor device 509 are also electrically connected by the bond wire 519. The signal terminal 515, the first external main terminal 511, and the second external main terminal 513 are each formed from a conductor frame 517.

[0044] In the power module semiconductor package 501 according to the first comparative example, two copper structures 505 are formed on a main surface of the insulating substrate 503, and the first power semiconductor device 507 is bonded to one copper structure 505, and the second power semiconductor device 509 is bonded to the other copper structure 505. Furthermore, the signal terminal 515, the first external main terminal 511, and the second external main terminal 513, which are formed from the conductor frame 517, are arranged such that they surround the insulating substrate 503. Therefore, there is a limitation in miniaturizing the power module semiconductor package 501.

[0045] The power module semiconductor package 501 is described according to a second comparative example. As in Fig. As shown in Figure 11, an organic layer 559 is configured to surround a heat distributor 551. On a surface of the heat distributor 551 and the like, a plurality of organic layers 559 and a plurality of clad interconnect layers 557, including vias, are stacked in layers to form a stack of layers. In the stack of layers, the first power semiconductor device 507 and the second power semiconductor device 509 are arranged such that the second power semiconductor device 509 is superimposed on the first power semiconductor device 507. At an outer circumferential section of the stack of layers, the clad interconnect layer 557, which serves as the first external main terminal 511, second external main terminal 513, and signal terminal 515, is exposed.

[0046] It is extremely difficult to manufacture the power module semiconductor package 501 according to the second comparative example using existing manufacturing equipment with solder, bond wire, or the like. Furthermore, forming the plated interlink layer takes a long time, resulting in increased manufacturing costs.

[0047] In contrast to the first and second comparative examples, the power module semiconductor package 1 according to the first embodiment comprises the first power semiconductor device 17, which is bonded to the substrate 5 on the first main surface 5a, and the second power semiconductor device 41, which is bonded to the substrate on the second main surface 5b. Furthermore, the first power semiconductor device 17, viewed from the top view of the second main surface 5b of the substrate 5 (i.e., the XY plane), includes the region 18 (an offset region) that does not overlap with the second power semiconductor device 41 and the substrate 5. The first signal electrode 21, located in the non-overlapping region 18, and the signal terminal 37 are electrically connected by the first bond wire 47.

[0048] Thus, in the power module semiconductor housing 1 described above, the first power semiconductor device 17 and the second power semiconductor device 41 are stacked in one direction along the Z-axis, and the first power semiconductor device 17 is provided with the area 18 (an offset area) which does not overlap with the second power semiconductor device 41 and the substrate 5.

[0049] This enables the power module semiconductor package 1 to be manufactured using existing manufacturing equipment with solder, bond wire, and / or the like, while miniaturizing the power module semiconductor package 1. As a result, the size and therefore the weight of the power module semiconductor package 1 can be reduced, and it can also be manufactured at a reduced cost. Second embodiment

[0050] Now, an example of a power module semiconductor package according to a second embodiment is described. As in the Fig. 12, Fig. 13 and Fig. As shown in Figure 14, in the second embodiment of the power module semiconductor housing 1, a metal frame 55 is used instead of the heat distributor 31 and the metal block 27 in the power module semiconductor housing 1 described above. The metal frame 55 has a section (or a chip connection area) on which the first power semiconductor device 17 is mounted, the first external main connection 11 and the signal connection 37, which are formed in one piece.

[0051] Viewed from the top of the second main surface 5b (i.e., the XY plane), the first power semiconductor device 17 includes the region 18 (an offset region) which does not overlap with the second power semiconductor device 41 and the signal terminal 37. The signal terminal 37 is located at a distance from the non-overlapping region 18 in one direction along the X-axis.

[0052] The first signal electrode 21 of the first power semiconductor device 17, located in the non-overlapping region 18, and the signal terminal 37 are electrically connected to each other by the first bond wire 47. The metal frame 55 has a surface exposed on a back surface of the sealing resin 53 (or on one side thereof in a negative direction along the Z-axis).

[0053] The rest of the configuration is similar to that of the power module semiconductor package 1, which is located in the Fig. 1 to 3 are shown, and accordingly identical elements are marked identically and not described again unless necessary.

[0054] An example of a method for manufacturing the power module semiconductor package 1 described above will now be described. First, the metal frame 55 is manufactured (see Fig. 15). The metal frame 55 has a section (or chip termination area) on which the first power semiconductor device 17, the first external main terminal 11, and the signal terminal 37 are mounted, forming a single piece. Subsequently, as described in Fig. Figure 15 shows the back surface of the first power semiconductor device 17 and the metal frame 55 bonded together by the solder 25.

[0055] Subsequently, the substrate 5 is produced, which has the first main surface 5a and the second main surface 5b opposite each other (see Fig. 16). The first intermediate connection layer 13 is formed in advance on the first main surface 5a of the substrate 5. The second intermediate connection layer 35 and the second external main connection 33 are formed on the second main surface 5b of the substrate 5. Subsequently, as in Fig. Figure 16 shows the first power semiconductor device 17 and the first intermediate layer 13 of the substrate 5 being bonded together by the solder 23. The first external main connection 11 of the metal frame 55 is bonded to the first main surface 5a of the substrate 5.

[0056] Then, as in Fig. As shown in Figure 17, the second intermediate layer 35 of the substrate 5 and the second power semiconductor device 41 (on its back surface) are bonded together by the solder 39. Subsequently, as shown in Fig. Figure 18 shows the first signal electrode 21 of the first power semiconductor device 17 and the first signal terminal 37a electrically connected by the first bond wire 47. The second signal electrode 45 of the second power semiconductor device 41 and the second signal terminal 37b are electrically connected by the second bond wire 49. The second main electrode 43 of the second power semiconductor device 41 and the second external main terminal 33 are electrically connected by the third bond wire 51.

[0057] Subsequently, the first power semiconductor device 17, the second power semiconductor device 41 and the like, which are mounted on the substrate 5, are placed, for example, in an injection mold (not shown) and filled with the sealing resin 53 (see Fig. 19). The power module semiconductor housing 1, sealed with the sealing resin 53, is then removed from the injection mold and thus completed, as described in Fig. 19 shown.

[0058] The power module semiconductor package 1 according to the second embodiment comprises the first power semiconductor device 17, which is bonded to the substrate 5 on the first main surface 5a, and the second power semiconductor device 41, which is bonded to the substrate on the second main surface 5b. Furthermore, the first power semiconductor device 17, viewed from the top view of the second main surface 5b of the substrate 5 (i.e., the XY plane), includes the region 18 (an offset region) which does not overlap with the second power semiconductor device 41 and the signal terminal 37. The first signal electrode 21, located in the non-overlapping region 18, and the signal terminal 37 are electrically connected to each other by the first bond wire 47.

[0059] This enables the power module semiconductor package 1 to be manufactured using existing manufacturing equipment with solder, bond wire, and / or the like, while miniaturizing the power module semiconductor package 1. As a result, the size and therefore the weight of the power module semiconductor package 1 can be reduced, and it can also be manufactured at a reduced cost.

[0060] Furthermore, in the power module semiconductor package 1 described above, the substrate 5 is used without the substrate opening 7. Additionally, the first external main terminal 11 and the signal terminal 37 are formed from the metal frame 55. This can contribute to a reduction in manufacturing costs, including the costs required for the substrate 5. Furthermore, it is unnecessary to route the first bond wire 47 through a substrate opening, which can simplify wire bonding. Third embodiment

[0061] An example of a power module semiconductor package according to a third embodiment is described. As in Fig. As shown in Figure 20, the power module semiconductor housing 1 according to the third embodiment has a metal plate 61 which is joined to a surface of the heat distributor 31 on one side opposite a side to which the first power semiconductor device 17 is bonded, with an insulating material 63 inserted between them. The metal plate 61 is exposed by the sealing resin 53.

[0062] The insulating material 63 can be an inorganic filler, such as aluminum oxide, boron nitride, silicon dioxide, or aluminum nitride, which exhibits excellent thermal conductivity, to provide insulation and heat dissipation simultaneously. Alternatively, the insulating material 63 can be a thermally conductive film with a thermosetting resin mixed in. The remainder of the configuration is similar to that of the power module semiconductor package 1, which is described in the Fig. 1 to 3 are shown, and accordingly identical elements are marked identically and not described again unless necessary.

[0063] The power module semiconductor housing 1 described above exhibits an effect, such as miniaturization and the like, as described in the first embodiment, and additionally the following effect.

[0064] The insulating material 63 is inserted between the heat distributor 31 and the metal plate 61. This provides insulation between a cooler, such as a heat sink, which is attached to the metal plate 61, for example, and the first power semiconductor device 17 or the like. As a result, the cooler can be more securely attached to the metal plate 61, for example, by using a metal bonding material such as solder. Fourth embodiment

[0065] An example of a power module semiconductor package according to a fourth embodiment is described. As in Fig. As shown in Figure 21, the power module semiconductor housing 1 according to the fourth embodiment has the metal plate 61, which is joined to a surface of the metal frame 55 on one side opposite a side to which the first power semiconductor device 17 is bonded, with the insulating material 63 inserted between them. The metal plate 61 is exposed by the sealing resin 53.

[0066] The insulating material 63 consists of an inorganic filler, such as aluminum oxide, boron nitride, silicon dioxide, or aluminum nitride, or a thermally conductive film with a thermosetting resin mixed in, to provide insulation and heat dissipation simultaneously. The rest of the configuration is similar to that of the power module semiconductor package 1, which is described in the Fig. 12 to 14 is shown, and accordingly identical elements are marked identically and not described again unless necessary.

[0067] The power module semiconductor housing 1 described above exhibits an effect, such as miniaturization and the like, as described in the second embodiment, and additionally the following effect.

[0068] The insulating material 63 is inserted between the metal frame 55 and the metal plate 61. This provides insulation between a heat sink, for example attached to the metal plate 61, and the first power semiconductor device 17 or the like. As a result, the heat sink can be more securely attached to the metal plate 61, for example by using a metal bonding material such as solder. Fifth embodiment

[0069] An example of a power module semiconductor package according to a fifth embodiment is described. As in Fig. As shown in Figure 22, the power module semiconductor package 1 according to the fifth embodiment comprises an insulating substrate 65. A first copper structure 67 is bonded to one surface (or a lower surface) of the insulating substrate 65. A second copper structure 69 is bonded to the other surface (or an upper surface) of the insulating substrate 65.

[0070] The second copper structure 69 and the first intermediate interconnect layer 13 are bonded together by the solder 23. Furthermore, the second copper structure 69 and the metal block 27 are bonded together by the solder 23. The first copper structure 67 is exposed by an area of ​​the sealing resin 53. The remainder of the configuration is similar to that of the power module semiconductor package 1, which is located in the Fig. 1 to 3 are shown, and accordingly identical elements are marked identically and not described again unless necessary.

[0071] The power module semiconductor housing 1 described above exhibits an effect, such as miniaturization and the like, as described in the first embodiment, and additionally the following effect.

[0072] The insulating substrate 65 is inserted between the first copper structure 67 and the second copper structure 69. This provides insulation between a heat sink, for example attached to the first copper structure 67, and the first power semiconductor device 17 or the like. As a result, the heat sink can be more securely attached to the first copper structure 67, for example by using a metal bonding material such as solder. Sixth embodiment

[0073] An example of a power module semiconductor package according to a sixth embodiment is described. As in Fig. As shown in Figure 23, the power module semiconductor housing 1 according to the sixth embodiment comprises the insulating substrate 65. The first copper structure 67 is bonded to one surface (or the lower surface) of the insulating substrate 65. The second copper structure 69 is bonded to the other surface (or the upper surface) of the insulating substrate 65.

[0074] The second copper structure 69 and the first intermediate interconnect layer 13 are bonded together by the solder 23. Furthermore, the second copper structure 69 and the first external main terminal 11 are bonded together by the solder 71. The first copper structure 67 is exposed by an area of ​​the sealing resin 53. The remainder of the configuration is similar to that of the power module semiconductor package 1, which is located in the Fig. 12 to 14 is shown, and accordingly identical elements are marked identically and not described again unless necessary.

[0075] The power module semiconductor housing 1 described above exhibits an effect, such as miniaturization and the like, as described in the second embodiment, and additionally the following effect.

[0076] The insulating substrate 65 is inserted between the first copper structure 67 and the second copper structure 69. This provides insulation between a heat sink, for example attached to the first copper structure 67, and the first power semiconductor device 17 or the like. As a result, the heat sink can be more securely attached to the first copper structure 67, for example by using a metal bonding material such as solder. Seventh embodiment

[0077] A semiconductor device is described as a power conversion equipment, i.e., the power module semiconductor housing 1 with a heat sink attached to it. (First example)

[0078] As in Fig. As shown in Figure 24, a semiconductor device 3 according to a first example has a heat sink 75 joined to a surface (a lower surface) of the heat distributor 31, which is exposed by the sealing resin 53, with an insulating material 73 inserted between them. The remainder of the configuration is similar to that of the power module semiconductor housing 1 shown in the Fig. 1 to 3 are shown, and accordingly identical elements are marked identically and not described again unless necessary.

[0079] The semiconductor device 3 according to the first example described above exhibits an effect, such as miniaturization and the like, as described in the first embodiment, and additionally the following effect.

[0080] The semiconductor device 3 according to the first example has a heat sink 75 attached to a power module semiconductor package. The power module semiconductor package generates heat, which is transferred to the heat sink 75 via the insulating material 73. As a result, the semiconductor device 3 can also be heat-dissipating. (Second example)

[0081] As in Fig. As shown in Figure 25, the semiconductor device 3, according to a second example, comprises the insulating substrate 65, and the first copper structure 67 is bonded to one surface (or a bottom surface) of the insulating substrate 65, and the second copper structure 69 is bonded to the other surface (or a top surface) of the insulating substrate. The heat sink 75 is bonded to the first copper structure 67 by a conductive metal bonding material 77, which is exposed by a surface of the sealing resin 53.

[0082] The rest of the configuration is similar to that of the power module semiconductor package 1, which is in Fig. 22 is shown, and accordingly identical elements are marked identically and not described again unless necessary.

[0083] The semiconductor device 3 according to the second example described above exhibits an effect, such as miniaturization and the like, as described in the fifth embodiment, and additionally the following effect.

[0084] The semiconductor device 3 according to the second example has the insulating substrate 65, which is inserted between the first copper structure 67 and the second copper structure 69. This provides insulation between the heat sink 75, which is attached to the first copper structure 67, and the first power semiconductor device 17 or the like. This allows the heat sink 75 to be bonded to the first copper structure 67 by the conductive metal bonding material 77, and heat generated in the power module semiconductor package 1 to be efficiently transferred to the heat sink 75 via the conductive metal bonding material 77. Consequently, the semiconductor device 3 can also be heat-dissipating. Eighth embodiment

[0085] Below, a semiconductor device is described as power conversion equipment in which a cooler, such as a heat sink, is attached to the power module semiconductor housing 1 described in the first to sixth embodiments, or the semiconductor device 3 as power conversion equipment described in the seventh embodiment. Although the present disclosure is not limited to a specific semiconductor device, a case in which the present disclosure is applied to a three-phase inverter is described below as the eighth embodiment.

[0086] Fig. Figure 26 is a block diagram illustrating a configuration of a power conversion system to which the semiconductor device according to the present embodiment is applied. The Fig. The illustrated power conversion system 26 consists of a power supply 100, a semiconductor device 200, and a load 300. The power supply 100 is a DC power supply and provides DC power to the semiconductor device 200. The power supply 100 can be configured in a variety of ways and can, for example, be a DC system, a solar battery, or a storage battery. Furthermore, the power supply 100 can be configured with a rectifier circuit or an AC / DC converter connected to an AC system. Alternatively, the power supply 100 can be configured with a DC / DC converter that receives DC power from a DC system and converts the received power into a predetermined power output.

[0087] The semiconductor device 200 is a three-phase inverter connected between the power supply 100 and the load 300. It receives direct current from the power supply 100, converts the received direct current into alternating current, and supplies the alternating current to the load 300. As shown in Fig. As shown in Figure 26, the semiconductor device 200 comprises a main conversion circuit 201 to convert DC power to AC power and output the AC power, and a control circuit 203 to output a control signal to the main conversion circuit 201 to control the main conversion circuit 201.

[0088] The Consumer 300 is a three-phase electric motor driven by alternating current power received by the semiconductor device 200. It should be noted that the Consumer 300 is not limited to a specific application and is an electric motor that can be mounted on a variety of electrical equipment, for example, as an electric motor for a hybrid vehicle, an electric vehicle, a rail vehicle, an elevator, or an air conditioner.

[0089] The semiconductor device 200 is described in more detail below. The main conversion circuit 201 includes a switching element and a freewheeling diode (not shown). When the switching element is switched, DC power received from the power supply 100 is converted into AC power and thus supplied to the load 300. Although there are a variety of specific circuit configurations for the main conversion circuit 201, the main conversion circuit 201 according to the present embodiment is a two-stage, three-phase full-bridge circuit and can be composed of six switching elements and six freewheeling diodes connected antiparallel to the respective switching elements.

[0090] At least one of the switching elements and freewheeling diodes of the main conversion circuit 201 is a switching element or freewheeling diode contained in a semiconductor module 202 corresponding to the power module semiconductor housing 1 according to at least one of the first to seventh embodiments described above. Of the six switching elements, every two switching elements are connected in series to form an upper and a lower arm, and each of the upper and lower arms configures the phases (a U-phase, a V-phase, a W-phase) of the full bridge circuit. The output terminals of the upper and lower arms, i.e., the three output terminals of the main conversion circuit 201, are connected to the load 300.

[0091] Furthermore, the main conversion circuit 201 includes a driver circuit (not shown) to control each switching element. The main conversion circuit may have the driver circuit integrated into the semiconductor module 202, or it may include the driver circuit separately from the semiconductor module 202. The driver circuit generates a driver signal to control the switching elements of the main conversion circuit 201 and delivers the driver signal to a control electrode of each switching element of the main conversion circuit 201. In particular, in response to a control signal described later, the control circuit 203 outputs a driver signal to turn on a switching element and a driver signal to turn off a switching element to the control electrode of each switching element.When the switching element is held on, the driver signal is a voltage signal that is equal to or higher than the threshold voltage of the switching element (an ON signal), whereas when the switching element is held off, the driver signal is a voltage signal that is equal to or lower than the threshold voltage of the switching element (an OFF signal).

[0092] The control circuit 203 controls the switching elements of the main conversion circuit 201 so that the load 300 receives the desired power. Specifically, it calculates a time for which each switching element of the main conversion circuit 201 should be switched on (i.e., an ON time), based on the power to be supplied to the load 300. For example, it can control the main conversion circuit 201 by means of PWM control, whereby a switching element has an ON time that is modulated according to the voltage to be output. It outputs a control command (a control signal) to the driver circuit contained in the main conversion circuit 201, so that at any given time, the ON signal is output to a switching element to be switched on, and at any given time, the OFF signal is output to a switching element to be switched off.In response to the control signal, the driver circuit outputs the ON signal or the OFF signal as a driver signal to the control electrode of each switching element.

[0093] In the semiconductor device 200 according to the present embodiment, the power module semiconductor housing 1 according to the first to seventh embodiments is used as the semiconductor module 202, which configures the main conversion circuit 201, and thus miniaturization, weight reduction and the like can be achieved.

[0094] While the present embodiment describes an example in which the present invention is applied to a two-stage three-phase inverter, the present disclosure is not limited thereto and is applicable to a variety of semiconductor devices. Although the present embodiment was described for a two-stage semiconductor device, it can be a three-stage or multi-stage semiconductor device, and the present disclosure can be applied to a single-phase inverter when electrical power is supplied to a single-phase load. The present disclosure is also applicable to a DC / DC / DC converter or an AC / DC converter when power is supplied to a DC load or the like.

[0095] Furthermore, a semiconductor device to which the present disclosure is applied is not limited to a case in which a consumer is an electric motor as described above, and can be used as a power supply device for an electric spark machine, a laser material processing machine, an induction heater or a contactless power supply system, and can also be used as a power improver for a photovoltaic power generation system, a power storage system or the like.

[0096] The power module semiconductor housings and the like described in the embodiments can be combined with each other in various ways as required.

[0097] The embodiments disclosed herein are for illustrative purposes only and are not limiting. This disclosure is defined by the content of the claims and not by the scope described above, and is intended to include any modifications that are within the meaning and scope equivalent to the content of the claims. COMMERCIAL APPLICABILITY

[0098] The present disclosure is effectively used for a power module semiconductor housing comprising a power semiconductor device mounted therein, and a semiconductor device comprising the power module semiconductor housing and a cooler. REFERENCE MARK LIST

[0099] 1 Power module semiconductor package, 3 Semiconductor device, 5 Substrate, 5a First main surface, 5b Second main surface, 7 Substrate opening, 9 Via, 11 First external main terminal, 13 First interleaved layer, 15 Solder, 17 First power semiconductor device, 18 Non-overlapping area, 19 First main electrode, 21 First signal electrode, 23, 25 Solder, 27 Metal block, 29 Solder, 31 Heat spreader, 33 Second external main terminal, 35 Second interleaved layer, 37 Signal terminal, 37a First signal terminal, 37b Second signal terminal, 39 Solder, 41 Second power semiconductor device, 43 Second main electrode, 45 Second signal electrode, 47 First bond wire, 49 Second bond wire, 51 Third bond wire, 53 Gasket resin, 55 Metal frame, 61 Metal plate, 63 Insulating material, 65 insulating substrate, 67 first copper structure, 69 second copper structure, 71 solder, 73 insulating material, 75 heat sink, 77 conductive metal bonding material, 100 power supply,200 Semiconductor device, 201 Main conversion circuit, 202 Semiconductor module, 203 Control circuit, 300 Consumer. QUOTES INCLUDED IN THE DESCRIPTION

[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0000] JP 2015-070269

[0007]

Claims

[1] Power module semiconductor package, comprising: a substrate having a first major surface and a second major surface opposite each other; a first power semiconductor device mounted on the first main surface of the substrate; a second power semiconductor device mounted on the second main surface of the substrate; an external main terminal including a first external main terminal electrically connected to the first power semiconductor device and a second external main terminal electrically connected to the second power semiconductor device; a signal terminal including a first signal terminal electrically connected to the first power semiconductor component and a second signal terminal electrically connected to the second power semiconductor component; and a sealing resin which seals the first power semiconductor device and the second power semiconductor device such that the external main terminal and the signal terminal protrude, wherein the external main terminal is arranged on a side opposite to a side on which the signal terminal is arranged with respect to the first power semiconductor component and the second power semiconductor component, wherein the first power semiconductor component and the second power semiconductor component are electrically connected to one another via a via penetrating the substrate, in a plan view from the second main surface of the substrate, the first power semiconductor component includes a region that does not overlap with the second power semiconductor component and the substrate, wherein the first power semiconductor component and the first signal terminal are electrically connected to each other by a bonding wire which connects the non-overlapping region of the first power semiconductor component and the first signal terminal. [2] Power module semiconductor package according to claim 1, wherein the substrate has a substrate opening penetrating it, and in plan view from the second main surface of the substrate, the non-overlapping region is located at the substrate opening. [3] The power module semiconductor package according to claim 2, further comprising a heat spreader bonded on a side opposite, with respect to the first power semiconductor device, to a side to which the substrate is bonded, and electrically connected to the first external main terminal and the first power semiconductor device. [4] Power module semiconductor package according to claim 3, wherein a first metal plate is joined on a side opposite, with respect to the heat spreader, to a side to which the first power semiconductor device is bonded, with a first insulating material interposed therebetween, and the first metal plate is exposed from the sealing resin. [5] The power module semiconductor package according to claim 1, further comprising a metal frame including the first external main terminal and the signal terminal, wherein the signal terminal is arranged at a distance from the non-overlapping region in a plan view from the second main surface of the substrate. [6] The power module semiconductor package according to claim 5, wherein the metal frame is bonded on a side opposite, with respect to the first power semiconductor device, to a side to which the substrate is bonded. [7] Power module semiconductor package according to claim 5, wherein a second metal plate is joined on a side opposite, with respect to the metal frame, to a side to which the first power semiconductor device is bonded, with a second insulating material interposed therebetween, and the second metal plate is exposed from the sealing resin. [8] The power module semiconductor package according to claim 1 or 5, further comprising an insulating substrate joined on a side opposite, with respect to the first power semiconductor device, to a side to which the substrate is bonded, wherein the insulating substrate includes: an insulating plate having a third main surface and a fourth main surface opposite each other, a first conductive structure formed on the third main surface of the insulating plate, and a second conductive structure formed on the fourth main surface of the insulating plate, the first conductive structure is exposed from the sealing resin and the first power semiconductor component and the first external main terminal are bonded to the second conductive structure. [9] A semiconductor device comprising the power module semiconductor package according to any one of claims 1 to 8, comprising: a cooler attached to the power module semiconductor package; a main conversion circuit for receiving power, converting the received power, and outputting the converted power; and a control circuit for outputting a control signal to the main conversion circuit for controlling the main conversion circuit.

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