Semiconductor device and method for its manufacture

Abstract

A groove (6) is provided on the upper surface of a heat sink (5) along an outer periphery of an insulating substrate (1). A first solder joint material (7) is placed in the groove (6). A second solder joint material (8) is provided on the upper surface of the heat sink (5) and connects the upper surface of the heat sink (5) to the first metal structure (1b). The first solder joint material (7) and the second solder joint material (8) are of different types. The melting point of the first solder joint material (7), which is placed in the groove (6), is lower than the melting point of the second solder joint material (8).

Description

Area

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing the same. background

[0002] In a semiconductor power module, a solder bonding material is used when connecting an insulating substrate to a heat sink. To improve the thermal shock resistance of a solder bonding material, it has been proposed to provide a groove in a heat sink along the outer peripheral part of an insulating substrate (see, for example, PTL1). Citation listPatent literature

[0003] [PTL 1] JP H9-252082A SummaryTechnical problem

[0004] Filling the groove with the solder bonding material can increase the thickness of the solder bonding material at the outer peripheral part of the insulating substrate. This can prevent cracks in the solder bonding material from occurring due to thermal stress generated during operation of the semiconductor device and stress on the insulating substrate and the semiconductor chip. However, there has been a problem in that solder pores occur in the grooves and reduce the reliability of the semiconductor device.

[0005] The present disclosure has been made to solve the above-mentioned problems, and an object thereof is to obtain a semiconductor device and a method for manufacturing the same which are capable of improving reliability. Solution to the problem

[0006] A semiconductor device according to the present disclosure includes: an insulating substrate comprising an insulating layer, a first metal pattern provided on a lower surface of the insulating layer, and a second metal pattern provided on an upper surface of the insulating layer; a semiconductor chip connected to the second metal pattern; a heat sink provided below the insulating substrate and having an upper surface on which a groove is provided along an outer periphery of the insulating substrate; a first solder bonding material filled in the groove;and a second solder bonding material provided on the upper surface of the heat sink and the first solder bonding material and bonding the upper surface of the heat sink and the first metal structure, wherein the first solder bonding material and the second solder bonding material are of different types, and a melting point of the first solder bonding material is lower than a melting point of the second solder bonding material; Advantageous effects of the invention

[0007] In the present disclosure, the first solder bonding material and the second solder bonding material are of different types, and the melting point of the first solder bonding material with which the groove is filled is set to be lower than the melting point of the second solder bonding material. Since the first solder bonding material melts first during reflow, air bubbles in the first solder bonding material move upward from the groove due to pressure from above. As a result, solder pores within the groove are reduced, thus improving reliability. Short description of the characters Fig. 1 is a sectional view showing a semiconductor device according to an embodiment. Fig. 2 is a plan view showing a heat sink and insulating substrates according to the embodiment. Fig. 3 is a sectional view showing a method of manufacturing a semiconductor device according to the embodiment. Fig. 4 is a sectional view showing a method of manufacturing a semiconductor device according to the embodiment. Fig. 5 is a sectional view showing a modification of the method for manufacturing a semiconductor device according to the embodiment. Fig. 6 is a sectional view showing a modification of the method for manufacturing a semiconductor device according to the embodiment. Description of the embodiments

[0008] Fig. 1 is a sectional view showing a semiconductor device according to an embodiment. Fig. 2 is a plan view showing a heat sink and insulating substrates according to the embodiment. The insulating substrates 1 each include an insulating layer 1a, a first metal pattern 1b provided on the lower surface of the insulating layer 1a, and a second metal pattern 1c provided on the upper surface of the insulating layer 1a. A semiconductor chip 3 is bonded to a second metal pattern 1c of an insulating substrate 1 by means of a solder bonding material 4. A heat sink 5 is provided below the insulating substrate 1. The material of the heat sink 5 is, for example, copper.

[0009] A groove 6 is provided on the upper surface of the heat sink 5 along the outer periphery of the respective insulating substrate 1. The insulating substrate 1 is square in plan view, and the groove 6 is formed in the shape of a square frame. The inner periphery of the groove along 6 lies within the outer periphery of the insulating substrate 1 in plan view, and the outer periphery of the groove 6 coincides with or lies outside the outer periphery of the insulating substrate 1.

[0010] The groove 6 is filled with a first solder bonding material 7. A second solder bonding material 8 is provided on the upper surface of the heat sink 5 and the first solder bonding material 7, and connects the upper surface of the heat sink 5 and the first metal structure 1b.

[0011] Filling the groove 6 with the first solder bonding material 7 can increase the thickness of the solder bonding material at the outer peripheral part of the insulating substrate 1. This can prevent the occurrence of a crack in the solder bonding material due to: thermal stress generated during operation of the semiconductor device; and stress on the insulating substrate 1 and the semiconductor chip 3.

[0012] L > 2H is satisfied, where: H is the distance between the top surface of the heat sink 5 and the first metal structure 1b; and L is the distance between the bottom surface of the groove 6 and the first metal structure 1b. This makes the thickness of the solder bonding material on the outer periphery of the insulating substrate 1 twice that of the conventional one, thereby reducing stress and preventing cracking. Furthermore, the thickness of the solder bonding material below the semiconductor chip 3 is identical to that of the conventional one, so the heat dissipation ability is not reduced.

[0013] Next, a method for manufacturing a semiconductor device according to an embodiment will be described. Fig. 3 and Fig. 4 are sectional views showing a method of manufacturing a semiconductor device according to the embodiment. As shown in Fig. 3, cut solder is placed as the first solder bonding material 7 along the groove 6 provided on the upper surface of the heat sink 5. Next, as shown in Fig. 4, cut solder as the second solder bonding material 8 is placed on the upper surface of the heat sink 5 and the first solder bonding material 7. Next, the insulating substrate 1 is placed on the second solder bonding material 8 such that the groove 6 is arranged along the outer periphery of the insulating substrate 1, and the first solder bonding material 7 and the second solder bonding material 8 are reflowed to bond the upper surface of the heat sink 5 and the first metal pattern 1b. Next, the semiconductor chip 3 is bonded to the second metal pattern 1c. The semiconductor device according to the embodiment is manufactured through the above steps.

[0014] The Fig. 5 and Fig. 6 are sectional views showing a modification of the method for manufacturing a semiconductor device according to the embodiment. As shown in Fig. 5, a solder paste is applied as the first solder bonding material 7 along the groove 6. Next, as shown in Fig. 6, cut solder is placed as the second solder bonding material 8 on the upper surface of the heat sink 5 and the first solder bonding material 7. The subsequent steps are identical to the above. By first placing the first solder bonding material 7 in the groove 6 and then placing the second solder bonding material 8, it is possible to assemble solder bonding materials made of different materials.

[0015] In the present embodiment, the first solder bonding material 7 and the second solder bonding material 8 are of different types, and the melting point of the first solder bonding material 7 with which the groove 6 is filled is made lower than the melting point of the second solder bonding material 8. Since the first solder bonding material 7 melts first during reflow, the air bubbles in the first solder bonding material 7 move upward from the groove 6 due to pressure from above. As a result, solder pores within the groove 6 are reduced, so reliability can be improved. Note that the pores in the second solder bonding material 8 on the heat sink 5 can be confirmed even after reflow, and therefore can be corrected by external rework.

[0016] The semiconductor chip 3 is not limited to a semiconductor chip formed of silicon, but may instead be formed of a wide-bandgap semiconductor having a wider bandgap than that of silicon. The wide-bandgap semiconductor is, for example, a silicon carbide, a gallium nitride-based material, or diamond. A semiconductor chip formed of such a wide-bandgap semiconductor has high withstand voltage and high allowable current density, and can therefore be miniaturized. The use of such a miniaturized semiconductor chip enables the miniaturization and high integration of the semiconductor device in which the semiconductor chip is integrated.Since the semiconductor chip has high heat resistance, a cooling fin of a heat sink can be miniaturized, and a water-cooled part can be air-cooled, leading to further miniaturization of the semiconductor device. Furthermore, since the semiconductor chip has low power loss and high efficiency, a highly efficient semiconductor device can be achieved. List of reference symbols

[0017] 1 insulating substrate; 1a insulating layer; 1b first metal structure; 1c second metal structure; 3 semiconductor chip; 5 heat sink; 6 groove; 7 first solder bonding material; 8 second solder bonding material QUOTES CONTAINED IN THE DESCRIPTION

[0000] This list of documents submitted by the applicant was generated automatically and is included solely for the convenience of the reader. This list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions. Cited patent literature

[0000] JP H9-252082A

[0003]

Claims

[1] Semiconductor device comprising: ▪ an insulating substrate comprising an insulating layer, a first metal pattern provided on a lower surface of the insulating layer, and a second metal pattern provided on an upper surface of the insulating layer; ▪ a semiconductor chip connected to the second metal structure; ▪ a heat sink provided below the insulating substrate and having an upper surface in which a groove is provided along an outer periphery of the insulating substrate; ▪ a first brazing material filled in the groove; and ▪ a second solder bonding material provided on the upper surface of the heat sink and the first solder bonding material and connecting the upper surface of the heat sink and the first metal structure, where ▪ the first solder joint material and the second solder joint material are of different types, and ▪ a melting point of the first solder joint material is lower than a melting point of the second solder joint material. [2] The semiconductor device according to claim 1, wherein L > 2H is satisfied, where H is a distance between the top surface of the heat sink and the first metal structure, and L is a distance between a bottom surface of the groove and the first metal structure. [3] A semiconductor device according to claim 1 or 2, wherein the semiconductor chip is formed of a wide bandgap semiconductor. [4] A method for manufacturing a semiconductor device comprising: ▪ Placing a first solder bonding material along a groove provided on an upper surface of a heat sink; ▪ Placing a second solder bonding material on the upper surface of the heat sink and the first solder bonding material; ▪ placing an insulating substrate on the second solder bonding material such that the groove is arranged along an outer periphery of the insulating substrate, the insulating substrate having an insulating layer, a first metal structure provided on a lower surface of the insulating layer, and a second metal structure provided on an upper surface of the insulating layer, and reflowing the first solder bonding material and the second solder bonding material to bond the upper surface of the heat sink and the first metal structure; and ▪ Connecting a semiconductor chip to the second metal structure, where ▪ the first solder joint material and the second solder joint material are of different types, and ▪ a melting point of the first solder joint material is lower than a melting point of the second solder joint material. [5] A method of manufacturing a semiconductor device according to claim 4, wherein cut solder is placed as the first solder bonding material along the groove. [6] A method of manufacturing a semiconductor device according to claim 4, wherein a solder paste is applied as the first solder bonding material along the groove.

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