BASE PLATE AND ELECTRONIC DEVICE

Abstract

A base plate comprises a device area and at least one bond area, wherein the bond area is closer to any edge of the base plate than the device area. The base plate comprises a substrate, a plurality of device groups, a plurality of signal line groups, and a plurality of bridges. The plurality of device groups are each arranged along a first direction and a second direction. The first direction and the second direction intersect, and the first direction and the second direction are parallel to the substrate. A device group comprises at least one electronic element. A signal line group comprises a plurality of signal lines, wherein the plurality of signal lines extend along the second direction and are spaced apart along the first direction. The bridge comprises a conductive portion.At least two signal lines in at least one of the signal line groups are electrically connected to one another via the conductive section; and / or at least one signal line in at least one of the signal line groups comprises at least two subsections arranged spaced apart along the second direction, and two adjacent subsections in the same signal line are electrically connected to one another via the conductive section. At least a partial region on a side of each of the bridges remote from the substrate can reflect light.

Description

Technical FieldThe present disclosure relates to the field of display technology, and more particularly, to a base plate and an electronic device.Prior ArtA base plate usually comprises electronic elements and signal lines. The signal lines are electrically connected to the electronic elements to achieve signal transmission.Disclosure of the InventionIn one aspect, a base plate is provided that has a plurality of edges. The base plate comprises a device area and at least one bonding area, wherein the bonding area is close to any edge of the base plate relative to the device area. The base plate includes a substrate, a plurality of device groups, a plurality of signal line groups, and a plurality of bridges. The plurality of device groups are located on one side of the substrate and in the device area. The plurality of device groups are arranged along a first direction and a second direction, respectively. The first direction and the second direction intersect and are parallel to the substrate. A device group comprises at least one electronic element. The plurality of signal line groups and the plurality of device groups are located on the same side of the substrate. A signal line group includes a plurality of signal lines, the plurality of signal lines extending along the second direction and spaced along the first direction. Each of the signal lines extends from the bonding area to the device area and is electrically connected to a column of device groups, which column of device groups is arranged along the second direction. The plurality of bridges and the plurality of device groups are located on the same side of the substrate, and at least one bridge is located in the device area. The bridge includes a conductive portion. At least two signal lines in at least one signal line group are electrically connected to each other via the conductive portion. And / or at least one signal line in at least one signal line group includes at least two sub-portions spaced along the second direction, and two adjacent sub-portions in the same signal line are electrically connected to each other via the conductive portion. At least a portion on a side of any bridge remote from the substrate may reflect light.In some embodiments, at least a portion of a surface of the conductive portion remote from the substrate may reflect light.In some embodiments, the bridge further comprises a first encapsulant covering the conductive portion. The material of the first encapsulant comprises at least one of a light transmissive material and a reflective material.In some embodiments, the bridge further comprises a first encapsulant covering the conductive portion. At least a portion of a surface of the first encapsulant remote from the substrate may reflect light.In some embodiments, the conductive portion includes a main body and two interconnects. The two joints are connected to two ends of the main body, respectively. The maximum distance between a substrate-facing surface of the main body and the substrate is greater than the maximum distance between a substrate-facing surface of any compound and the substrate.In some embodiments, a shape of an orthographic projection of the main body on the substrate is a first rectangle, wherein a length of the first rectangle is in the range of 0.5 mm to 25 mm, and a width of the first rectangle is in the range of 0.2 mm to 3 mm. And / or a form of an orthographic projection of any connection on the substrate is a second rectangle, wherein a length of the second rectangle is in the range of 0.2 mm to 3 mm and a width of the second rectangle is in the range of 0.2 mm to 3 mm.In some embodiments, the maximum distance between the substrate-facing surface of the main body and the substrate-facing surface of the joint is the first distance, which is in the range of 0.1 mm to 0.8 mm. And / or the maximum distance between the surface of the main body facing away from the substrate and the surface of the connection facing the substrate is the second distance, which is in the range of values from 0.2 mm to 1 mm.In some embodiments, the base plate further includes a first reflective layer. The first reflective layer is located on a side of the plurality of device groups, the plurality of signal line groups, and the plurality of bridges remote from the substrate. The first reflective layer has a plurality of first functional regions. An orthographic projection of the bridge on the substrate lies in a region of an orthographic projection of the first functional region on the substrate. On the first reflective layer, a plurality of first linear slits are opened, and each of the first linear slits passes through the first reflective layer in a direction perpendicular to the substrate. The first functional region is formed by surrounding the plurality of spaced-apart first linear slots.In some exemplary embodiments, the ratio of an area of the orthographic projection of any bridge on the substrate to an area of the first functional region in which the orthographic projection of this bridge is located on the substrate is in the range of values from 0.5 to 2.In some embodiments, a length of the first linear slot is in the range of 1 mm to 5 mm and a width of the first linear slot is in the range of 50 μm to 300 μm.In some embodiments, a plurality of second linear slits are opened on the first reflective layer, and each of the second linear slits passes through the first reflective layer in a direction perpendicular to the substrate, and each of the second linear slits is located in the first functional region. An orthographic projection of an edge of the second linear slit on the substrate at least partially overlaps the orthographic projection of the bridge on the substrate.In some embodiments, the ratio of a length of the second linear slot to the length of the longest side of the bridge is in the range of 0.9 to 1.5.In some embodiments, the length of the second linear slot is in the range of 1 mm to 35 mm and a width of the second linear slot is in the range of 50 μm to 300 μm.In some embodiments, the electronic element comprises an optical element, and the base plate further comprises a second encapsulant covering the optical element, wherein the material of the second encapsulant is a light transmissive material. A first through hole is opened on the first reflective layer. An orthographic projection of the optical element on the substrate is located in a region surrounded by an orthographic projection of an edge of the first through hole on the substrate.In some embodiments, the electronic element comprises a non-optical element, and the base plate further comprises a third encapsulant covering the non-optical element and covered by the first reflective layer.In some embodiments, the first reflective layer has a second functional region in which at least part of an orthographic projection of the non-optical element is located on the substrate. On the first reflective layer, a plurality of third linear slits are opened, and each of the third linear slits passes through the first reflective layer in a direction perpendicular to the substrate, and each of the third linear slits is located in the second functional region. An orthographic projection of an edge of the third linear slit on the substrate at least partially overlaps the orthographic projection of the non-optical element on the substrate.In some embodiments, at least two third linear slits are located in the same second functional region, and the orthogonal projections of the edges of the at least two third linear slits located in the same second functional region on the substrate are arranged in an X-shape.In some embodiments, two third linear slots are located in the same second functional region. The ratio of the length of the third linear slot to the maximum dimension of the non-optical element is in the range of 0.9 to 2.5. and / or the ratio of the length of the third linear slot to the maximum dimension of the third encapsulation is in the range of 0.9 to 2.5.In some embodiments, the conductive portion is a surface-mounted device (SMD) resistor or a conductive adhesive.In another aspect, an electronic device is provided. The electronic device includes a base plate as described above.Brief Description of the DrawingsIn order to more clearly explain the technical solutions in the present disclosure, the drawings that need to be used in some embodiments of the present disclosure will be briefly presented below. Obviously, the drawings in the following description are only drawings of some embodiments of the present disclosure. And, those skilled in the art can also obtain other drawings based on these drawings. Moreover, the drawings in the following description may be considered as schematic representations and are not intended to limit the actual dimension of the product, the actual operation of the method, the actual timing of the signals, etc., involved in the embodiments. FIG. 1A is a structural diagram of an electronic device according to some embodiments; FIG. 1B is a structural diagram of an electronic device according to other embodiments; FIG. 2A is a structural diagram of a base plate according to some embodiments; FIG. 2B is a structural diagram of a base plate according to other embodiments; FIG. 2C is a structural diagram of a device group according to some embodiments; FIG. 2D is a structural diagram of a driver chip and a device group according to some embodiments; FIG. 2E is a structural diagram of a driver chip and a device group according to other embodiments; FIG. 3A is a structural diagram of a base plate according to still other embodiments; FIG. 3B is a structural diagram of a base plate according to still other embodiments; FIG. 4A is a structural diagram of a base plate according to still other embodiments; FIG. 4B is a structural diagram of a base plate according to still other embodiments; FIG. 4C is a partial structural illustration of a baseplate in accordance with some embodiments; FIG. 4D is a partial structural diagram of a base plate according to other embodiments; FIG. 4E is an enlarged partial view of the region Q 3 in FIG. 4D ; FIG. 5A is a diagram illustrating the positional relationship between a first wiring portion and the second reflective layer according to some embodiments; FIG. 5B is a cross-sectional view taken along the A-A direction in FIG. 5A ; FIG. 5C is a diagram illustrating the positional relationship between a first wiring portion and the second reflective layer according to other embodiments; FIG. 5D is a cross-sectional view taken along the B-B direction in FIG. 5C ; FIG. 6A is a structural diagram of a base plate according to still other embodiments; FIG. 6B is a structural diagram of a base plate according to still other embodiments; FIG. 6C is a structural diagram of a bridge according to some embodiments; FIG. 6D is a partial structural diagram of a base plate according to still other embodiments; FIG. 6E is a partial structural diagram of a base plate according to still other embodiments; FIG. 6F is a structural diagram of a base plate according to still other embodiments; FIG. 6G is a structural diagram of a base plate according to still other embodiments; FIG. 7A is a cross-sectional view taken along the C 1-C 1 direction in FIG. 6F ; FIG. 7B is another cross-sectional view taken along the C 1-C 1 direction in FIG. 6F ; FIG. 7C is still another cross-sectional view taken along the C 1-C 1 direction in FIG. 6F ; FIG. 7D is still another cross-sectional view taken along the C 1-C 1 direction in FIG. 6F ; FIG. 7E is a structural diagram of a base plate according to still other embodiments; FIG. 8A is a structural diagram of a base plate according to still other embodiments; FIG. 8B is a structural diagram of a conductive portion according to some embodiments; FIG. 8C is a structural diagram of a conductive portion according to other embodiments; FIG. 8D is a structural diagram of a conductive portion according to still other embodiments; FIG. 9A is a cross-sectional view taken along the C 2-C 2 direction in FIG. 6G ; FIG. 9B is another cross-sectional view taken along the C 2-C 2 direction in FIG. 6G ; FIG. 9C is still another cross-sectional view taken along the C 2-C 2 direction in FIG. 6G ; FIG. 9D is a structural diagram of a base plate according to still other embodiments; FIG. 9E is a cross-sectional view taken along the D 1-D 1 direction in FIG. 9D ; FIG. 9F is a cross-sectional view taken along the D 2-D 2 direction in FIG. 9D ; FIG. 9G is a structural diagram of a base plate according to still other embodiments.DETAILED EMBODIMENTSThe technical solutions in some embodiments of the present disclosure will be clearly and fully described below in conjunction with the drawings, and it is apparent that the described embodiments only represent a part and not all of the embodiments of the present disclosure. Based on the embodiments in the present disclosure, all other embodiments that will be reached by those skilled in the art also fall within the scope of protection of the present disclosure.Unless the context requires otherwise, throughout the specification and claims, the term "comprise" and its other forms, such as the third person, singular "comprises" and the presentip "comprising" are interpreted as open and comprising, and mean "including, but not limited to.". In the explanation of the specification, the terms "one embodiment," "some embodiments," "exemplary embodiments," "example," "specific example," or "some examples," and the like are intended to indicate that certain features, structures, materials, or characteristics associated with an embodiment or example, respectively, are included in at least one embodiment or example of the present disclosure. The schematic representations of the terms mentioned above do not necessarily relate to the same exemplary embodiment or example. Moreover, the particular features, structures, materials, or characteristics mentioned may be included in one or a plurality of embodiments or examples in any suitable manner.Hereinafter, the terms "first / r / s" and "second / r / s" are used only for descriptive purposes and cannot be understood to indicate or indicate a relative meaning or imply the number of technical features indicated. Thus, the features defined by the terms "first / r / s" and "second / r / s" may expressly or implicitly comprise one or a plurality of these features. In the description of the embodiments of the present disclosure, "a plurality of" means two or more unless otherwise specified.In describing some embodiments, the term "connect" and its derivatives may be used. For example, some embodiments may be described using the term "connect" to indicate that two or more parts are in direct physical or electrical contact with each other."At least one of A, B and C" has the same meaning as "at least one of A, B or C", and both include the following combinations of A, B and C: only A, only B, only C, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B and C."A and / or B" includes the following three combinations: only A, only B, and a combination of A and B.As used herein, "about," "substantially," or "approximately" includes the stated value and an average within an acceptable range of deviation from a particular value, the acceptable range of deviation being determined, for example, by those skilled in the art in consideration of the errors associated with the particular measurement and measurement of the particular dimension (i.e., the constraints of the measurement system).As used herein, "parallel," "perpendicular," "equal" includes both the described situation and a situation similar to the described situation, where the range of this similar situation is within an acceptable range of deviation, the acceptable range of deviation being determined, for example, by those skilled in the art in consideration of the errors associated with the measurement in question and the measurement of the particular dimension (i.e., the constraints of the measurement system). The term "parallel" comprises, for example, absolutely parallel and approximately parallel, wherein the acceptable deviation range for approximately parallel can be within 5° deviation, for example. The term "perpendicular" comprises, for example, absolutely perpendicular and approximately perpendicular, wherein the acceptable deviation range for approximately perpendicular can also be, for example, within 5° deviation. "Equal" comprises absolutely equal and approximately equal, wherein the acceptable deviation range for "substantially equal" means that the difference between two is less than or equal to 5% of one of the two.It is to be understood that when a layer or element is mentioned on another layer or a base plate, this can mean that the layer or element is directly located on the other layer or the base plate or that an intermediate layer is present between the layer or element and the other layer or the base plate.Example embodiments are described herein using cross-sectional and / or plan views that are idealised example drawings. In the drawings, the thickness of the layers and regions is shown to be increased for clarity. Accordingly, variations in the shapes in the drawings, for example due to manufacturing techniques and / or tolerances, may be contemplated. Example embodiments should therefore not be construed as limited to the shapes of the regions depicted herein, but are intended to include variations in the shapes resulting from, for example, manufacturing. For example, an etched region shown as a rectangle typically has curved features. Accordingly, the regions shown in the drawings are substantially schematic, and their shapes should not illustrate the actual shapes of regions of a device and should not limit the scope of the exemplary embodiments.FIG. 1A is a structural diagram of an electronic device according to some embodiments.As shown in FIG. 1A, an embodiment of the present disclosure provides an electronic device 200. In some examples, the electronic device 200 may be a product having an image display function. For example, the electronic device 200 may be used for displaying static images such as images or photos. The electronic device 200 may also be used for displaying dynamic images such as videos or game screens.In some examples, the electronic device 200 may include a laptop, a mobile phone, a wireless device, a personal data assistant (PDA), a handheld or portable computer, a GPS receiver / navigator, a camera, an MP4 video player, a camcorder, a game console, a wristwatch, a watch, a calculator, a television monitor, a flat panel display, a computer monitor, a vehicle display (e.g., an odometer display, etc.), a navigation device, a cockpit control and / or a cockpit display, a camera view display (e.g., a rear camera display in a vehicle), an electronic photograph, an electronic advertising board or electronic sign, a projector, a package and an aesthetic structure (e.g., a display for images of a piece of ornament), etc.In other examples, the electronic device 200 may also be a product without an image display function.The embodiments of the present disclosure do not further limit the electronic device 200. Hereinafter, the electronic device 200 as a product having an image display function will be taken as an example for explanation.FIG. 1B is a structural diagram of an electronic device according to other embodiments.As shown in FIG. 1B, in some embodiments, the electronic device 200 may include a base plate 100 and a display panel 210. For example, the base plate 100 serves to radiate light to the outside, and the display panel 210 is located on the light exit side of the base plate 100 and serves to display image information.In some examples, the display panel 210 is a liquid crystal display panel and the base plate 100 is used to provide backlight to the display panel 210.In some examples, the base plate 100 may be used to emit white light or blue light. The display panel 210 may filter or convert the light emitted from the base plate 100 to obtain red light, green light, and blue light, so that the electronic device 200 may realize full color image display.The display panel 210 will be described below using the example of the display panel 210 as a liquid crystal display panel.In some examples, as shown in FIG. 1B, the display panel 210 includes an array base plate 216, an opposing base plate 214, and a liquid crystal layer 212 between the array base plate 216 and the opposing base plate 214. It should be understood that the light emitted from the base plate 100 may penetrate the array base plate 216 and irradiate the liquid crystal layer 212. The liquid crystal layer 212 includes liquid crystal molecules. By controlling the deflection angle of the liquid crystal molecules, the intensity of the light passing through the liquid crystal layer 212 and radiating onto the opposing base plate 214 can be controlled, whereby the electronic device 200 can implement an image display function.In some examples, the opposing base plate 214 may include a red filter film, a green filter film, and a blue filter film when the base plate 100 is used to emit white light. By controlling the intensity of light irradiated on the red filter film, the green filter film, and the blue filter film, different intensities of red light, green light, and blue light can be obtained, so that the electronic device 200 can display color images.In other examples, the opposing base plate 214 may include a color conversion film when the base plate 100 is used to emit blue light. The color conversion film may be, for example, a quantum dot film. After blue light irradiates the red quantum dot film, it may be converted into red light. After blue light irradiates the green quantum dot film, it may be converted into green light. The red and green light converted by the quantum dot film is mixed with the blue light emitted from the base plate 100, so that the electronic device 200 can achieve a full-color graphic display.In still other examples, the opposing base plate 214 may not include a quantum dot film and the base plate 100 may include a quantum dot film when the base plate 100 is used to emit blue light. For example, the quantum dot film may be arranged on a side of the light emitting device (e.g. an electronic element 120) remote from the substrate 101 in the base plate 100. In some examples, the display panel 210 includes a common electrode and a plurality of pixel electrodes. An electric field may be generated between the common electrode and each pixel electrode. By controlling the voltage value of each pixel electrode, the intensity of the electric field generated between the common electrode and each pixel electrode can be controlled, thereby controlling the deflection angle of the liquid crystal molecules in the liquid crystal layer 212, i.e., controlling the intensity of the light passing through the liquid crystal layer 212.In some examples, pixel electrodes may be disposed on array base plate 216. The common electrode may be disposed on the array base plate 216 or the opposing base plate 214.FIG. 2A is a structural diagram of a base plate according to some embodiments. FIG. 2B is a structural diagram of a base plate according to other embodiments. FIG. 2C is a structural diagram of a device group according to some embodiments. FIG. 2D is a structural diagram of a driver chip and a device group according to some embodiments. FIG. 2E is a structural diagram of a driver chip and a device group according to other embodiments. Next, an example of the base plate 100 will be described with reference to FIGS. 2A to 2E.In some embodiments, the base plate 100 includes a plurality of edges P as shown in FIGS. 2A and 2B. It is understood that the edge P of the base plate 100 may be a straight portion or a curved portion. In some examples, the base plate 100 may be square or rectangular, i.e., the base plate 100 may have four edges P as shown in FIGS. 2A and 2BIn other examples, the base plate 100 may also have polygonal or other irregular shapes. The embodiments of the present disclosure do not further limit the shape of the base plate 100 and the number of edges P of the base plate 100.As shown in FIGS. 2A and 2B, the base plate 100 includes an equipment area AA and at least one bonding area BB. The bonding area BB is closer to each edge P of the base plate 100 than the device area AA.It is understood that an edge of the bonding area BB located near the bonding area AA is adjacent to an edge of the bonding area AA located near the bonding area BB. Note that in the drawings of the description of the present disclosure, using the example of FIGS. 2A and 2B, the edge of the device area AA illustrated in the dotted box and the edge of the bonding area BB are spaced apart from each other, which serves only to clearly distinguish the device area AA and the bonding area BB, and does not further restrict the edge positions of the device area AA and the bonding area BB.The bonding area BB is closer to an arbitrary edge P of the base plate 100 than the device area AA. In other words, the bonding area BB may be located between the device area AA and an arbitrary edge P.In some examples, the bonding region BB is located on a side of the device region AA along the second direction Y as shown in FIGS. 2A and 2B. For example, the second direction Y may be a vertical direction.In some examples, the number of bonding regions BB may be one, as shown in FIG. 2A. In other examples, a plurality of bonding regions BB may also be present, as shown in FIG. 2B. For example, the number of bonding regions BB may be two, three, or four.It is to be understood that, as shown in FIG. 2B, when there are a plurality of bonding regions BB, the plurality of bonding regions BB are located on the same side of the device region AA, i.e., the plurality of bonding regions BB are located on the same edge P.In some examples, when there are a plurality of bonding regions BB, the plurality of bonding regions BB may be spaced apart along the first direction X as shown in FIG. 2B. For example, the first direction X may be a horizontal direction and the first direction X may be perpendicular to the second direction Y. It is understood that the plurality of bonding regions BB may be arranged at the same distance from each other, or the distance between any two adjacent bonding regions BB in the plurality of bonding regions BB may be different.As shown in FIGS. 2A and 2B, the base plate 100 includes a substrate 101 and a plurality of device groups 110. The plurality of device groups 110 are located on one side of the substrate 101 and the plurality of device groups 110 are located in the device area AA. The plurality of device groups 110 are respectively arranged along the first direction X and the second direction Y, wherein the first direction X and the second direction Y intersect and the first direction X and the second direction Y are parallel to the substrate 101. A device group 110 comprises at least one electronic element 120.In some examples, the substrate 101 is a rigid substrate. In other examples, the substrate 101 is a flexible substrate. The material of the substrate 101 includes, for example, one of plastic, FR-4 material, resin, glass, quartz, polyimide (abbreviated to PI), or polymethyl methacrylate (abbreviated to PMMA).It should be understood that the plurality of device groups 110 are located on the same side of the substrate 101 and in the device area AA. In some examples, the plurality of device groups 110 are spaced apart from each other along the first direction X; and the distance between two adjacent device groups 110 along the first direction X is equal or approximately equal. The plurality of device groups 110 are spaced apart from each other along the second direction Y; and the distance between two adjacent device groups 110 along the second direction Y is equal to or approximately equal to each other. In this way, as shown in FIGS. 2A and 2B, the plurality of device groups 110 may be arranged in rows along the first direction X and in columns along the second direction Y. It is understood that a plurality of rows of device groups 110 are spaced apart from each other along the second direction Y, and a plurality of columns of device groups 110 are spaced apart from each other along the first direction X.Note that in the drawings of the description of the present disclosure, in order to clearly illustrate the structure of the base plate 100, only four rows and three columns of device groups 110 are shown (e.g., FIG. 2A ) or four rows and six columns of device groups 110 are shown (e.g., FIG. 2B ). The number and arrangement manner of the device groups 110 in the embodiments of the present disclosure are not further limited herein.It is understood that a device group 110 may include an electronic element 120 or a plurality of electronic elements 120.In some examples, the plurality of electronic elements 120 may be elements of the same type or elements of different types when a device group 110 includes a plurality of electronic elements 120. When the base plate 100 is used for emitting light, for example, the electronic element 120 may be a light emitting device. A plurality of light emitting devices included in a device group 110 may be used to emit light of the same color, and a plurality of light emitting devices included in a device group 110 may also be used to emit light of different colors. Alternatively, in the plurality of electronic elements 120 included in a device group 110, one part (one or more) thereof is light emitting devices for emitting light, and the other part (one or more) thereof is other components (such as sensor chips, etc.) to implement other functions.In some examples, a device group 110 may include six electronic elements 120, as shown in FIGS. 2A and 2B. In other examples, a device group 110 may also include four electronic elements 120, as shown in FIG. 2C. In still other examples, a device group 110 may also include two, three, or five electronic elements 120. It is understood that the number of electronic elements 120 included in different device groups 110 may be the same or different. The embodiments of the present disclosure do not further limit the number of electronic elements 120 in a device group 110.In some examples, as shown in FIG. 2C, the distance between two electronic elements 120 adjacent along the first direction X is approximately 13.775 mm when a device group 110 includes four electronic elements 120.When a device group 110 includes a plurality of electronic elements 120, in some examples, as shown in FIGS. 2A and 2B, the plurality of electronic elements 120 may be arranged in a matrix, i.e., the plurality of electronic elements 120 may be arranged at four vertices of a rectangle or a square, which improves the regularity of the arrangement of the plurality of electronic elements 120.In other examples, when a device group 110 includes a plurality of electronic elements 120, the plurality of electronic elements 120 in a device group 110 may also be disposed at vertices of a hexagon, octagon, or other irregular shapes. Alternatively, the plurality of electronic elements 120 in a device group 110 can also be arranged in a circular or elliptical manner in order to meet different usage requirements.In some examples, the plurality of electronic elements 120 in the device group 110 are electrically connected via connection wires 112, as shown in FIG. 2C. For example, there may be a plurality of connection wires 112. The plurality of electronic elements 120 in a device group 110 may be connected in series via the plurality of connection wires 112. In this way, by providing an electrical signal to any electronic element 120 in a device group 110, the electrical signal can be provided to any electronic element 120 in a device group 110, thereby improving the wiring friendliness of the baseplate 100.As can be seen from the foregoing, in some examples, the base plate 100 may be used to provide a light source. At this time, the electronic element 120 may be a light emitting device. For example, the electronic element 120 may be a light emitting diode (LED).In some examples, the electronic element 120 may be one of a conventional LED, a mini light emitting diode (abbreviated: mini LED), or a micro light emitting diode (abbreviated: micro LED).Conventional LEDs are, for example, LEDs having a dimension greater than or equal to 500 μm. Mini LEDs are, for example, LEDs having a dimension greater than or equal to 100 μm and less than 500 μm. Micro LEDs are, for example, LEDs with a dimension of less than 100 μm. In some examples, micro-LEDs may have a dimension less than or equal to 50 μm.In some examples, the electronic elements 120 in each device group 110 may be used to emit light of the same color. For example, the electronic elements 120 in each device group 110 are all used for emitting white light, or the electronic components in each device group 110 are all used for emitting blue light, so that the base plate 100 can emit light of a certain color.In some examples, the light brightness of each electronic element 120 in a device group 110 is the same. The brightness of the electronic elements 120 in different device groups 110 may be the same or different. By controlling the light brightness of the electronic elements 120 in different device groups 110, the brightness of different areas of the base plate 100 may be controlled to meet different usage requirements.As can be seen from the above, in some embodiments, the electronic device 200 includes a base plate 100 and a display panel 210. Here, the base plate 100 may be used to provide a light source. In other embodiments, the electronic device 200 may not include the display panel 210 but only the base plate 100. Here, the base plate 100 is used for displaying image information, and the electronic elements 120 in each device group 110 may emit light of different colors.For example, when the base plate 100 is used for displaying image information, one part (one or more) of the device groups 110 is used for emitting red light, and another part (one or more) of the device groups 110 is used for emitting green light, and still another part (one or more) of the device groups 110 is used for emitting blue light. By controlling the luminous intensities of the electronic elements 120 in different device groups 110, different intensities of red light, green light, and blue light can be obtained, so that the electronic device 200 can achieve full-color image display.The embodiments of the present disclosure will be described as an example using base plate 100 as a light source providing part for electronic device 200.In some examples, the base plate 100 further includes a plurality of signal line groups 130 as shown in FIGS. 2A and 2B. The plurality of signal line groups 130 and the plurality of device groups 110 are located on the same side of the substrate 101. A signal line group 130 includes a plurality of signal lines 131. The plurality of signal lines 131 all extend along the second direction Y, and the plurality of signal lines 131 are arranged at intervals along the first direction X. Each signal line 131 extends from the bonding area BB to the device area AA, and each signal line 131 is electrically connected to a column of device groups 110 arranged along the second direction Y.It is understood that the lengths of the plurality of signal lines 131 are not exactly the same. The length of a portion of the signal lines along the second direction Y is basically equal to the length of a column of device groups 110 along the second direction Y, while the length of another portion of the signal lines along the second direction Y is less than the length of a column of device groups along the second direction Y.It is understood that the plurality of signal line groups 130 and the plurality of device groups 110 are located on the same side of the substrate 101, so that the signal lines 131 in the signal line group 130 may be electrically connected to the device group 110.In some examples, a plurality of signal line groups 130 are arranged on the same layer, that is, a plurality of signal line groups 130 are arranged on the same conductive layer. It is understood that in addition to the plurality of signal line groups 130, other wiring lines (e.g., connection wires 112) may also be provided on the conductive layer.In other examples, the signal lines 131 in the plurality of signal line groups 130 may be disposed on different conductive layers. For example, the signal lines 131 in the plurality of signal line groups 130 may be respectively arranged on two conductive layers.It is understood that the plurality of signal line groups 130 are arranged on different conductive layers, and thus the wiring flexibility of the signal lines 131 is higher. However, when the orthographic projections of two signal lines 131 located on different conductive layers overlap on the substrate 101, a short circuit may easily occur, which affects the yield of the base plate 100. Further, since the base plate 100 includes at least two conductive layers, the preparation steps of the base plate 100 can also be increased, thereby increasing the production cost of the base plate 100.It should be understood that disposing a plurality of signal line groups 130 on the same layer can reduce the steps of patterning the conductive layer, thereby simplifying the preparation process of the base plate 100, reducing the number of masks (mask), and reducing the cost of the base plate 100; moreover, it can also reduce the occurrence of defects such as short circuits of the base plate 100 and improve the yield of the base plate 100.In the embodiments of the present disclosure, a plurality of signal line groups 130 are arranged on the same layer as an example for illustration.As shown in FIG. 2A, a signal line group 130 includes a plurality of signal lines 131. It is understood that the signal lines 131 are used for transmitting signals, for example analog electrical signals or digital electrical signals. In some examples, a plurality of signal line groups 130 may be used for transmitting different signals or for transmitting the same signals. Each signal line 131 in a signal line group 130 is used for transmitting the same signal.In some examples, the signal line 131 is made of metal or a metal alloy. For example, the material of the signal line 131 may include copper or aluminum to improve the electrical conductivity of the signal line 131.In some examples, the number of signal lines 131 included in each signal line group 130 may be the same or different. The distance between any two adjacent signal lines 131 in a signal line group 130 along the first direction X may be the same or different.In some examples, the bonding region BB is provided with a bonding pin (not shown). The number of bond pins may be a multiple. A plurality of bonding pins are arranged at intervals along the first direction X. The signal line 131 is electrically connected to the bonding pin in the bonding area BB.For example, as shown in FIGS. 2A and 2B, one end of an arbitrary signal line 131 is electrically connected to the bonding pin in the bonding area BB, and the other end extends along the second direction Y (or along the first direction X and the second direction Y) to extend from the bonding area BB to the device area AA and to be electrically connected to a column of device groups 110 arranged along the second direction Y. It should be understood that the signal line 131 may be directly electrically connected to the electronic element 120 in the device group 110 or may be electrically connected to the electronic element 120 in the device group 110 via other components or conductive patterns.In some examples, at least one signal line 131 is provided between two columns of device groups 110 spaced apart from each other along the first direction X to improve area utilization of the substrate 101.In some examples, as shown in FIG. 2A, the number of the bonding region BB is one, and a plurality of bonding pins are provided in one bonding region BB. For example, different signal line groups 130 are electrically connected to different bond pins in order to reduce mutual interference of the signals during signal transmission. A plurality of signal lines 131 in the same signal line group 130 may be electrically connected to one bond pin or to a plurality of bond pins.In some examples, when the number of the bonding region BB is one, the number of signal lines 131 in a signal line group 130 is the same as the number of columns in which the device group 110 is arranged. That is, as shown in FIG. 2A, when the plurality of device groups 110 are arranged in three columns along the second direction Y, one signal line group 130 includes three signal lines 131. It is understood that three signal lines 131 in a signal line group 130 may be electrically connected to three bonding pins or may be electrically connected to one bonding pin.In other examples, as shown in FIG. 2B, the number of bonding regions BB is a multiple, and a plurality of signal lines 131 in a signal line group 130 is electrically connected to a bonding region BB among the plurality of bonding regions BB.For example, as shown in FIG. 2B, the signal line group 130 includes a first signal line group 130 a, a second signal line group 130 b, and a third signal line group 130 c. The first signal line group 130 aincludes a first signal line 131 a, the second signal line group 130 bincludes a second signal line 131 b, and the third signal line group 130 cincludes a third signal line 131 c.Note that the first signal line group 130 a, the second signal line group 130 b, and the third signal line group 130 care used only for distinguishing the three signal line groups 130 connected to different bonding regions BB, respectively, and are not used for further limiting the signal line group 130. The first signal line 131 a, the second signal line 131 b, and the third signal line group 130 cfunction to distinguish only the signal lines 131 in the first signal line group 130 a, the second signal line group 130 b, and the third signal line group 130 c, and not to further limit the signal lines 131.In some examples, the signal line group 130 a, the second signal line group 130 b, and the third signal line group 130 care used for transmitting the same signal.For example, as shown in FIG. 2B, the bonding region BB includes a first bonding region BB 1, a second bonding region BB 2, and a third bonding region BB 3. It should be noted that the first bonding region BB 1, the second bonding region BB 2, and the third bonding region BB 3 serve only to distinguish three different bonding regions BB and not to further limit the bonding region BB.For example, as shown in FIG. 2B, a plurality of first signal lines 131 ain the first signal line group 130 aare electrically connected to the bonding pin in the first bonding region BB 1. The plurality of second signal lines 131 bin the second signal line group 130 bis electrically connected to the bonding pin in the second bonding region BB 2. The third signal line 131 cin the third signal line group 130 cis electrically connected to the bonding pin in the third bonding region BB 3. In this way, a plurality of signal lines 131 in a signal line group 130 can be electrically connected to a bonding region BB among a plurality of bonding regions BB.Such an arrangement enables different bonding regions BB to transmit signals to different signal line groups 130, thereby reducing interference during signal transmission and improving the reliability of the base board 100.In some examples, as shown in FIG. 2B, the signal line 131 (e.g., the first signal line 131 a) in a signal line group 130 (e.g., the first signal line group 130 a) is electrically connected to the bonding pin in the bonding region (e.g., the first bonding region BB 1) near this signal line group 130 to shorten the length of the signal line 131, reduce the voltage drop of the signal line 131, and improve the reliability of the signal transmission. Moreover, the amount of material used in the signal line 131 can also be reduced, thereby reducing the cost of the base plate 100.In some examples, the base plate 100 further includes a first driver chip 103 as shown in FIG. 2A. The first driver chip 103 is electrically connected to at least one device group 110. That is, in some examples, as shown in FIG. 2D, the first driver chip 103 is electrically connected to only one device group 110. In other examples, as shown in FIG. 2E, the first driver chip 103 is electrically connected to a plurality of (e.g., four) device groups 110 arranged sequentially along the second direction Y.It is understood that a signal line 131 may be electrically connected to the first driver chip 103 or to a device group 110 or a plurality of device groups 110.In some examples, a plurality of device groups 110 arranged along the second direction Y are electrically connected to a first driver chip 103. In other examples, the plurality of device groups 110 arranged along the second direction Y are each electrically connected to the plurality of first driver chips 103. For example, when the plurality of device groups 110 arranged along the second direction Y are each electrically connected to the plurality of first driver chips 103, the plurality of first driver chips 103 electrically connected to a column of device groups 110 are arranged spaced apart from each other along the second direction Y.FIG. 3A is a structural diagram of a base plate according to still other embodiments. FIG. 3B is a structural diagram of a base plate according to still other embodiments.As can be seen from the above, the base plate 100 includes a plurality of signal line groups 130. Hereinafter, the signal line group 130 will be further illustrated by way of example with reference to FIGS. 3A and 3B.In some examples, as shown in FIGS. 3A and 3B, the plurality of signal line groups 130 includes a first voltage line group 150 including a plurality of first voltage lines 151. For example, the first voltage line 151 is used to supply power to the electronic elements 120 in each device group 110.For example, as shown in FIGS. 3A and 3B, one end of the first power line 151 is electrically connected to the bonding pin within the bonding area BB, and the other end extends to the device area AA and is electrically connected to a column of device groups 110, which column of device groups is arranged along the second direction Y. That is, a column of device groups 110 arranged along the second direction Y shares a first voltage line 151.In some examples, as shown in FIG. 3A, the device area AA includes a central area AA 1 and an edge area AA 2, wherein the edge area AA 2 surrounds the central area AA 1. A plurality of device groups 110 are located in the central area AA1. A part (one or more) of the signal lines 131 may be located only in the edge area AA 2, and another part (one or more) of the signal lines 131 may be located in the edge area AA 2 and the central area AA 1.As shown in FIG. 3A, an edge region AA 2 located between the central region AA 1 and the bonding region BB along the second direction Y may be defined as a lower edge region AA 22; two edge regions located adjacent to the lower edge region AA 22 along the second direction and located on both sides of the central region AA 1 along the first direction X are defined as lateral edge regions AA 21. That is, the edge portion AA 2 includes the side edge portion AA 21 and the lower edge portion AA 22. For example, the lower edge region AA 22 may also be referred to as a fan-out region (Fanout).In some examples, a first power line 151 in the first power line group 150 may be located in the lateral edge region AA 21, as shown in FIG. 3A.In some examples, as shown in FIG. 3A, the base plate 100 further includes a circuit board 107 electrically connected to the bonding region BB. For example, as shown in FIG. 3A, the circuit board 107 includes a flexible printed circuit board (FPC) 105 and a printed circuit board (PCB) 106. One end of the flexible circuit board 105 is bonded and connected to the bonding pin in the bonding area BB, and the other end is bonded and connected to the printed circuit board 106, so that signals can be transmitted between the plurality of signal line groups 130 and the printed circuit board 106, thereby realizing the driving of the plurality of device groups 110.In some examples, the power supply external to the baseplate 100 is electrically connected to the first power line 151 via the printed circuit board 106 and the bond pins, such that the power supply may power the electronic elements 120 in a column of device groups 110 via the first power line 151.In some examples, as shown in FIGS. 3A and 3B, the plurality of signal line groups 130 also include a second voltage line group 160 including a plurality of second voltage lines 161. The second ground (GND) line 161 is used to ground the first driver chip 103.In some examples, as shown in FIGS. 3A and 3B, one end of the second power line 161 is electrically connected to the bonding pin in the bonding area BB, and the other end extends to the device area AA and is electrically connected to the first driver chip 103. As can be seen from the above, the first driver chip 103 is electrically connected to the device group 110, so that the second power line 161 may be electrically connected to the device group 110 via the first driver chip 103.In some examples, as shown in FIG. 3A, a second power line 161 in the second power line group 160 may be located in the lateral edge region AA 21.In some examples, as shown in FIGS. 3A and 3B, the baseplate 100 further includes a second driver chip 104. For example, the second driver chip 104 may be disposed on the printed circuit board 106. For example, the second driver chip 104 is a Tx IC (Transmit Integrated Circuit: ) and the first driver chip 103 is an Rx IC (Receive Integrated Circuit: ). The signal transmitted from the second driver chip 104 is transmitted to the first driver chip 103 via the bond pin and the signal line group 130 (e.g., the second power line group 160), thereby realizing the driving of the device group 110.In some examples, one end of a second power line 161 is electrically connected to the ground terminal of the second driver chip 104 via the bonding pin of the bonding area BB. The other end is electrically connected to the ground terminal of the first driver chip 103 to ground the first driver chip 103.In some examples, as shown in FIG. 3B, when a column of device groups 110 arranged along the second direction Y is electrically connected to a plurality of first driver chips 103, the plurality of first driver chips 103 electrically connected to the same column of device groups 110 may share a second voltage line 161.In some examples, as shown in FIGS. 3A and 3B, the plurality of signal line groups 130 also include a power supply line group 135 including a plurality of power supply lines 132.In some examples, the power line (Pwr) 132 is used to power the first driver chip 103. For example, as shown in FIGS. 3A and 3B, one end of the power supply line 132 is electrically connected to the bonding pin in the bonding area BB, and the other end extends to the device area AA and is electrically connected to a power terminal of the first driver chip 103. From the above, it can be seen that the first driver chip 103 is electrically connected to the device group 110, so that the power supply line 132 can be electrically connected to the device group 110 via the first driver chip 103.In some examples, as shown in FIG. 3B, when a column of device groups 110 arranged along the second direction Y is electrically connected to a plurality of first driver chips 103, the plurality of first driver chips 103 electrically connected to the same column of device groups 110 may share a power supply line 132.In some examples, as shown in FIG. 3A, the plurality of signal line groups 130 also include a data line group 136 including a plurality of data lines 133.In some examples, data line (Data) 133 is used to transmit data signals. For example, as shown in FIG. 3A, one end of the data line 133 is electrically connected to the bonding pin in the bonding area BB, and the other end extends to the device area AA and is electrically connected to the first driver chip 103. From the above, it is understood that the first driver chip 103 is electrically connected to the device group 110, so that the data line 133 may be electrically connected to the device group 110 via the first driver chip 103.In some examples, the second driver chip 104 includes a first data terminal to an Nth data terminal. One end of a data line 133 is electrically connected to the first data terminal of the second driver chip 104 via the bond pin and the printed circuit board 106, and the other end is electrically connected to the (one or more) data terminal of the first driver chip 103 electrically connected to a column of device groups 110. One end of the other data line 133 is electrically connected to the second data terminal of the second driver chip 104 via the bond pin and the printed circuit board 106, and the other end is electrically connected to the (one or more) data terminal of the first driver chip 103 electrically connected to the other column of device groups 110; and so on to the Nth data terminal. Of course, N is a positive integer. In some examples, the value of N is the same as the number of columns of the device group 110 arranged along the second direction Y.In some examples, as shown in FIG. 3B, a first driver chip 103 is electrically connected to a device group 110. For example, the plurality of first driver chips 103 electrically connected to a column of device groups 110 includes a first first driver chip 103 a, a second first driver chip 103 b, a third first driver chip 103 c, up to the mthfirst driver chip 103 m. It is understood that the plurality of first driver chips 103 are arranged in cascade.Note that the first first driver chip 103 a, the second first driver chip 103 b, the third first driver chip 103 c, through the m-th first driver chip 103 m, are used only for distinguishing the plurality of first driver chips 103 electrically connected to a column of device groups 110, and are not for further limiting the first driver chip 103.For example, the first driver chip 103 ato the m-th first driver chip 103 mare sequentially removed from the bonding region BB along the second direction Y. Clearly, m is greater than 3 and m is a positive integer.In some examples, as shown in FIGS. 3A and 3B, the plurality of signal line groups 130 also include an input-output line group 137 including an input-output line (also referred to as an addressing signal line) 134.As shown in FIG. 3B, the first driver chip 103A includes, for example, an input terminal Din and an output terminal Dout. In some examples, as shown in FIG. 3B, there are a plurality of input-output lines 134. Among them, one end of an input-output line 134 is electrically connected to the input terminal of the second driver chip 104 via a bonding pin, and the other end is electrically connected to the input terminal Din of the first first driver chip 103 a. One end of the other input-output line 134 is electrically connected to the output terminal Dout of the first first driver chip 103 a, and the other end is electrically connected to the input terminal Din of the second first driver chip 103 b. One end of the still other input-output line 134 is electrically connected to the output terminal Dout of the second first driver chip 103 band the other end is electrically connected to the input terminal Din of the third first driver chip 103 c, and so on, up to the m-th first driver chip 103 mthat is farthest from the bonding region BB along the second direction Y.For example, the output terminal Dout of the m-th first driver chip 103 mis electrically connected to the bonding pin in the bonding area BB via the input-output line 134. That is, a plurality of first driver chips 103 (e.g., the first first driver chip 103 ato the m-th first driver chip 103 m) electrically connected to a column of device groups 110 are cascaded via the input-output line 134.In this way, the signal output by the second driver chip 104 may be transmitted to the plurality of first driver chips 103 via the input-output line 134 and then fed back to the second driver chip 104 via the input-output line 134, so that the second driver chip 104 may realize the driving of the plurality of first driver chips 103.In some examples, as shown in FIG. 3A, the input-output lines 134 surround the second voltage line 161 to save wiring space and improve the area utilization rate of the substrate 101.In some examples, as shown in FIG. 3B, the first driver chip 103 includes a logic control module 1031. For example, the logic control module 1031 may include a logic circuit. In some examples, the data signal on the input line 134 may be input to the logic control module 1031 via the input terminal Din. In some examples, the signal on the power supply line 132 may be input to the logic control module 1031 via the power terminal (the terminal connected to the power supply line 132) of the first driver chip 103. It is understood that the logic control module 1031 may drive the electronic element 120 according to the received signal.In some examples, the ground plate 100 also includes the electrostatic loop 108 (see FIG. 2A ). The electrostatic loop 108 is disposed around the plurality of device groups 110 and electrically connected to the bonding region BB. For example, both ends of the electrostatic loop 108 are electrically connected to the bonding pin in the bonding area BB. In this way, the electrostatic loop 108 may surround not only a plurality of device groups 110 but also a plurality of signal line groups 130 electrically connected to the plurality of device groups 110.It should be appreciated that the electrostatic loop 108 can emit static electricity, thereby protecting the plurality of device groups 110 and the plurality of signal line groups 130, and improving reliability when using the base plate 100.FIG. 4A is a structural diagram of a base plate according to still other embodiments. FIG. 4B is a structural diagram of a base plate according to still other embodiments. FIG. 4C is a partial structural illustration of a baseplate in accordance with some embodiments. FIG. 4D is a partial structural diagram of a base plate according to other embodiments.In some examples, as shown in FIGS. 4A and 4B, the base plate 100 includes a second reflective layer 194. The second reflective layer 194 is located on a side of the plurality of signal line groups 130 away from the substrate 101 and covers the plurality of signal line groups 130 (i.e., covers the plurality of signal lines 131). It is understood that the second reflective layer 194 may also cover the connection wires 112 because the connection wires 112 and the plurality of signal line groups 130 are disposed on the same layer.For example, the second reflective layer 194 is an insulating reflective material. On the one hand, the second reflective layer 194 may play a role in electrical isolation to reduce the risk of shorts and other defects in the baseplate 100. On the other hand, the second reflective layer 194 may reflect light (e.g., light emitted from the electronic element 120), thereby increasing the brightness of the base plate 100 and reducing the power consumption of the base plate 100.Moreover, the provision of the second reflective layer 194 to cover the plurality of signal line groups 130 and the plurality of connection wires 112 can also protect the plurality of signal line groups 130 and the plurality of connection wires 112, thereby extending the life of the base plate 100.In some examples, the material of the second reflective layer 194 comprises white ink. For example, the material of the second reflective layer 194 may include at least one of photosensitive white ink and curable white ink.In some examples, the second reflective layer 194 is opened with a first welding hole M 2 passing through the second reflective layer 194 in a direction perpendicular to the substrate 101 to expose a portion of the signal line 131. For example, as shown in FIGS. 4A and 4B, the region where the signal line 131 is exposed through the first welding hole M 2 may be referred to as a first pad 1312.In some examples, a signal line 131 may be provided with a plurality of first pads 1312. In other examples, a signal line 131 may also be provided with only a first pad 1312. In still other examples, a signal line 131 may also be provided with no first pad 1312.As can be seen from the above, the first driver chip 103 may be electrically connected to the plurality of signal lines 131. In some examples, the first driver chip 103 is located on a side of the signal line 131 remote from the substrate 101. The first driver chip 103 includes a plurality of pins, one pin being welded to a first pad 1312.In some examples, the first driver chip 103 may have four pins such that the first driver chip 103 may be welded to the four first pads 1312. In other examples, the first driver chip 103 may also include six pins, eight pins, or twelve pins, etc. The embodiments of the present disclosure do not further limit the number of pins of the first driver chip 103.In some examples, as shown in FIGS. 4C and 4D, the input-output line 134 includes an input line 1341 and an output line 1342. The four pins of the first driver chip 103 are respectively welded to the first pad 1312 on the input line 1341, the first pad 1312 on the output line 1342, the first pad 1312 on the second voltage line 161, and the first pad 1312 on the power supply line 132.In some examples, a plurality of (e.g., four) first pads 1312 soldered to the first driver chip 103 may be exposed through a first weld hole M 2. In other examples, the plurality of (for example, four) first pads 1312 soldered to the first driver chip 103 are exposed by the plurality of first welding holes M 2, respectively.In some examples, the dimension of the first pad 1312 is positively correlated with the dimension of the pin of the first driver chip 103. That is, the larger the dimension of the pin of the first driver chip 103, the larger the area of the orthogonal projection of the first pad 1312 on the substrate 101 is, so that the pin of the first driver chip 103 can be welded to the first pad 1312.In some examples, the areas of the orthogonal projections of the plurality of first pads 1312 on the substrate 101 may be the same or different.In some examples, a ratio value of the area of orthogonal projection of the pin of a first driver chip 103 on the substrate 101 to the area of orthogonal projection of the first pad 1312 soldered to the pin of the first driver chip 103 on the substrate 101 may be in a range of values between 0.8 and 2.In some examples, the area of the orthogonal projection of the pin of a first driver chip 103 on the substrate 101 may be smaller than the area of the orthogonal projection of the first pad 1312 soldered to the pin of the first driver chip 103 on the substrate 101 to improve the ease of welding between the pin of the first driver chip 103 and the first pad 1312.The ratio value of the area of the orthogonal projection of the pin of a first driver chip 103 on the substrate 101 to the area of the orthogonal projection of the first pad 1312 soldered to the pin of the first driver chip 103 on the substrate 101 may be, for example, 0.9, 1.0, 1.5 or 1.8, etc.In some examples, a second weld hole M 3 is also opened on the second reflective layer 194 (see FIG. 7E ). The second welding hole M 3 passes through the second reflective layer 194 in a direction perpendicular to the substrate 101 to expose a portion of the bonding wire 112. For example, the area on the connecting wire 112 exposed by the second welding hole M 3 may be referred to as a second pad 1313 (see FIGS. 6F and 6G ).In some examples, the electronic element 120 includes two pins, one pin welded to the second pad 1313 on one connection wire 112 and the other pin welded to the second pad 1313 on the other connection wire 112. In this way, a plurality of electronic elements 120 may be connected in series via a plurality of connection wires 112.In some examples, two second pads 1313 welded to the electronic element 120 may be exposed through a second welding hole M 3. In other examples, two second pads 1313 welded to the electronic element 120 are exposed by two second welding holes M3, respectively.In some examples, the dimension of the second pad 1313 is positively correlated with the dimension of the pin of the electronic element 120. That is, the larger the dimension of the pin of the electronic element 120, the larger the area of the orthogonal projection of the second pad 1313 on the substrate 101 is, so that the pin of the electronic element 120 can be welded to the second pad 1313.In some examples, the areas of the orthogonal projections of the plurality of second pads 1313 on the substrate 101 may be the same or different.In some examples, a ratio value of the area of orthogonal projection of the pin of the electronic element 120 on the substrate 101 to the area of orthogonal projection of the second pad 1313 soldered to the pin of the electronic element 120 on the substrate 101 may be in a range of values between 0.8 and 2.In some examples, the area of the orthogonal projection of the pin of one of the electronic element 120 on the substrate 101 may be smaller than the area of the orthogonal projection of the second pad 1313 soldered to the pin of the electronic element 120 on the substrate 101 to improve the convenience of welding between the pin of the electronic element 120 and the second pad 1313.The ratio value of the area of the orthogonal projection of the pin of an electronic element 120 on the substrate 101 to the area of the orthogonal projection of the second pad 1313 soldered to the pin of the electronic element 120 on the substrate 101 may be, for example, 0.9, 1.0, 1.5 or 1.8, etc.The manufacturing method of the base plate 100 will be explained below by way of example.In some examples, the substrate 101 is made of glass. For example, a magnetron sputtering (Sputter) process may be used to form a buffer layer 102 (Buffer) on one side of the substrate 101 (see FIG. 7E). For example, the buffer layer may be a PVX (German Complete Designation: Passivation Layer, Chinese Designation: ). layer.On a side of the buffer layer 102 remote from the substrate 101, a conductive layer is formed. The material of the conductive layer comprises, for example, copper. In some examples, a magnetron sputtering process may be used to form a conductive layer on the side of the buffer layer 102 remote from the substrate 101. In other examples, an electroplating process may also be used to form a conductive layer on the side of the buffer layer 102 remote from the substrate 101. In further examples, a magnetron sputtering process and an electroplating process may also be used to form a conductive layer on the side of the buffer layer 102 remote from the substrate 101.Through processes such as cleaning (English full name: cleaning), coating (English full name: coating), baking, imaging (English full name: photo), developing, hard baking, etching (English full name: etch) and stripping, the conductive layer is patterned to form a plurality of signal line groups 130 and a plurality of connection wires 112.A passivation layer 109 is formed on a side of the patterned conductive layer remote from the substrate 101 (see FIG. 7E ). It is understood that the material of the passivation layer 109 comprises an insulating material which plays a role in the protection of the conductive layer on the one hand and a role in the electrical insulation on the other hand. It should be appreciated that the passivation layer 109 may expose the pads (including the first pad 1312 and the second pad 1313, etc.).A second reflective layer 194 is formed on a side of the passivation layer 109 remote from the substrate 101. The second reflective layer 194 may cover the conductive layer (i.e., covers the plurality of signal line groups 130 and the plurality of connection wires 112) to perform the function of electrical insulation as well as the function of light reflection.In some examples, a printing process, a 3D printing process, or an exposure and development process (such as LDI Laser Direct Imaging ) etc. may be used to directly form a patterned second reflective layer 194 on the side of the passivation layer 109 remote from the substrate 101 such that the first pad 1312 may be exposed through the first weld hole M 2 and the second pad 1313 may be exposed through the second weld hole M 3, which simplifies the preparation process of the base plate 100 and lowers the cost of the base plate 100.In other examples, a photoresist layer may also be formed on a side of the second reflective layer 194 remote from the conductive layer by processes such as coating (English Complete Designation), imaging (English Complete Designation: Photo), and developing. The etching process patterns the resist layer to expose the second reflective layer 194 at the location where the piercing (including the first weld hole M 2 and the second weld hole M 3) is to be performed. The exposed second reflective layer 194 is removed using an etching process to form the first welding hole M 2 and the second welding hole M 3, so that the first pad 1312 may be exposed through the first welding hole M 2 and the second pad 1313 may be exposed through the second welding hole M 3.FIG. 4E is an enlarged fragmentary view of the region Q 3 in FIG. 4D.The inventor of the present disclosure has found that the following technical problems exist in the above-mentioned embodiments.From the above, it is understood that a part (one or more) of the signal lines 131 needs to be electrically connected to the plurality of first driver chips 103 arranged along the second direction Y. Using the power supply line 132 as an example, as shown in FIGS. 4D and 4E, a part of the wiring portion (such as the first wiring portion 131 dshown in FIGS. 4D and 4E ) of the power supply line 132 is to be disposed between two adjacent first pads 1312 along the first direction X.It should be appreciated that the width of the first conductive path portion 131 d(e.g. the width along the first direction X) is relatively small, as the first conductive path portion 131 dis located between two adjacent first pads 1312, which increases the risk that the first conductive path portion 131 dmay crack, affects the current value that the first conductive path portion 131 dmay lead, and also results in the heat dissipation of the first conductive path portion 131 dincreases, which reduces the reliability of the base plate 100.FIG. 5A is a diagram illustrating the positional relationship between a first conductive line portion and the second reflective layer according to some embodiments. FIG. 5B is a cross-sectional view taken along the A-A direction in FIG. 5A. FIG. 5C is a diagram illustrating the positional relationship between a first conductive path portion and the second reflective layer according to other embodiments. FIG. 5D is a cross-sectional view taken along the B-B direction in FIG. 5C.In some examples, as shown in FIGS. 5A and 5B, a first weld hole M 2 may be formed by a printing process, a 3D printing process, or an exposure and development process, etc., and a first weld hole M 2 may expose a plurality of (e.g., four) first pads 1312. It is understood that the first conductive path portion 131 dis located between two adjacent first pads 1312, so that the first conductive path portion 131 dmay also be exposed through the first welding hole M 2.Since a distance between two adjacent first pads 1312 and the first conductive path portion 131 dlocated between these two adjacent first pads 1312 is small, and the first pad 1312 and the first conductive path portion 131 dare both exposed through the first welding hole M 2, the solder (e.g., solder) easily falls between the first pad 1312 and the first conductive path portion 131 dwhen the first driver chip 103 is welded to the first pad 1312, resulting in a short circuit between the first pad 1312 and the first conductive path portion 131 d.In other examples, as shown in FIGS. 5C and 5D, first, the second reflective layer 194 may be formed, and then photolithography or other processes are used to pattern the second reflective layer 194 to form the first weld hole M 2, such that only a first pad 1312 may be exposed through a first weld hole M 2, i.e., the second reflective layer 194 may cover the first conductive trace portion 131 dbetween the two adjacent first pads 1312, thereby reducing the risk that the solder may result in a short circuit between the first conductive trace portion 131 dand the first pad 1312.However, the use of processes such as photolithography requires the use of a mask (Mask), which is complex and increases the cost of the base plate 100. Moreover, the thickness of the second reflective layer 194 is about 50 μm to 60 μm (e.g., 55 μm), and the height of the solder pin of the first driver chip 103 is about 15 μm or even less (e.g., 8 μm). In this case, the arrangement of the second reflective layer 194 to cover the first conductive path portion 131 dmay increase the welding difficulties between the pin of the first driver chip 103 and the first pad 1312, resulting in poor contact of the base plate 100 and impairing the reliability of the base plate 100.When the distance between two adjacent first pads 1312 is small, the first conductive line portion 131 dmay not be disposed between two adjacent first pads 1312 even when a first welding hole M 2 exposes only one first pad 1312, which increases the wiring difficulty of the base plate 100.For example, the distance between two adjacent first pads 1312 of 70 μm and the width of the first conductive path portion 131 dof 30 μm are taken as an example; when the first conductive path portion 131 dis located at the intermediate position between two adjacent first pads 1312, the distance between the first conductive path portion 131 dand the first pad 1312 is 20 μm. In the conventional design, the distance between the first conductive line portion 131 dand the first pad 1312 needs to be greater than or equal to 42 μm.In other words, when the distance between two adjacent first pads 1312 is small, the solder also leads to a short circuit between the first conductive line portion 131 dand the first pad 1312 when welding even if the second reflective layer 194 is provided to cover the first conductive line portion 131 d, which reduces the yield of the base plate 100.In addition, the dimension of the base plate 100 of 34 inches (e.g., the base plate 100 is square and the length of the diagonal is 34 inches) is taken as an example. A plurality of signal line groups 130 are provided on the same conductive layer, resulting in a longer signal line 131, thereby increasing the risk of breakage of the signal line 131.FIG. 6A is a structural diagram of a base plate according to still other embodiments. FIG. 6B is a structural diagram of a base plate according to still other embodiments. FIG. 6C is a structural diagram of a bridge, in accordance with some embodiments. FIG. 6D is a partial structural diagram of a base plate according to still other embodiments. FIG. 6E is a partial structural diagram of a base plate according to still other embodiments. FIG. 6F is a structural diagram of a base plate according to still other embodiments. FIG. 6G is a structural diagram of a base plate according to still other embodiments.Based on this, in some embodiments, and as shown in FIGS. 6A and 6B, the baseplate 100 further includes a plurality of bridges 140. The plurality of bridges 140 and the plurality of device groups 110 are located on the same side of the substrate 101, and at least one bridge 140 is located in the device area AA, and the bridge 140 includes a conductive portion 147.From the above, it can be seen that the plurality of signal line groups 130 and the plurality of device groups 110 are located on the same side of the substrate 101. The plurality of bridges 140 and the plurality of device groups 110 are located on the same side of the substrate 101. In this case, the plurality of bridges 140, the plurality of signal line groups 130, and the plurality of device groups 110 are arranged on the same side of the substrate 101.It is understood that the second reflective layer 194 covers the plurality of signal line groups 130, and a part of the bridge 140 is located on a side of the second reflective layer 194 remote from the substrate 101.In some examples, a portion (one or more) of the plurality of bridges 140 is in the device area AA and another portion (one or more) is in the bonding area BB. In other examples, the plurality of bridges 140 are all located in the device area AA. In some examples, a bridge 140 may be located in the device area AA and the bonding area BB.In some examples, as shown in FIG. 6C, the bridge 140 may extend along the first direction X, may also extend along the second direction Y, and may also extend along a direction intersecting the first direction X (or the second direction Y). For example, the acute angle between the extending direction of the bridge 140 and the first direction X (or the second direction Y) may be greater than 0° and less than 90°. It is understood that the extending directions of the plurality of bridges 140 may be the same or different.In some examples, the length L 5 of the bridge 140 is in the range of 1 mm to 30 mm, as shown in FIG. 6C. For example, the length L 5 of the bridge 140 may be in the range of 5 mm to 25 mm, 10 mm to 20 mm, or 13 mm to 18 mm. The length L 5 of the bridge 140 may be, for example, 5 mm, 10 mm, 15 mm, 20 mm or 25 mm, etc. The lengths L 5 of the plurality of bridges 140 may be the same or different.As shown in FIGS. 6A and 6B, the bridge 140 includes a conductive portion 147. It is understood that the conductive portion 147 plays an electrically conductive role. In some examples, as shown in FIG. 6A, the conductive portion 147 is made of conductive material such as copper or aluminum. In other examples, as shown in FIG. 6B, the conductive portion 147 may also be a resistor or a capacitor.It should be appreciated that the resistor, illustratively the conductive portion 147 as a resistor, may include a weld portion 1473, as shown in FIG. 6B. In some examples, the weld portion 1473 includes a pin of a resistor. In other examples, the welding portion 1473 also includes, in addition to the pin of the resistor, the solder (e.g., solder tin) coated on the pin of the resistor. In still other examples, the weld portion 1473 may include only the solder. For example, the number of the welding portions 1473 may be two, and the two welding portions 1473 are welded to two third pads 1314, respectively.It should be appreciated that the conductive portions 147 in the plurality of bridges 140 may be the same or different.At least one bridge 140 is located in the device area AA, so that at least one conductive portion 147 may be disposed in the device area AA, so that the conductive portion 147 may be electrically connected to the signal line 131.In some examples, at least two signal lines 131 in at least one signal line group 130 are electrically connected via the conductive portion 147, as shown in FIG. 6D.It is understood that after at least two signal lines 131 in a signal line group 130 are electrically connected via the conductive portion 147, the voltage drop of the signal lines 131 can be reduced, which facilitates the reduction of the width of the signal lines 131 along the first direction X. From the above, it is understood that the signal line 131 may be located in the side edge region AA 21 as shown in FIG. 6D. By electrically connecting the signal line 131 in one signal line group 130 located in the side edge region AA 21 to the other signal lines 131 in the signal line group 130 via the conductive portion 147, the width of the signal line 131 located in the side edge region AA 21 is suitably reduced, so that the width of the side edge region AA 21 is reduced, which is advantageous for realizing a narrow frame of the base plate 100.Also, after at least two signal lines 131 in a signal line group 130 are electrically connected via the conductive portion 147, if the voltage drop of the signal lines 131 is reduced, it is advantageous to achieve reduction in the thickness of the signal line 131, reduction in the amount of material used for the signal line 131, and reduction in the cost of the base board 100.As can be seen from the above, in some examples, a part (one or more) of the signal lines 131 in the first direction X needs to be extended in the lower edge region AA 22 before being extended along the second direction Y into the central region AA 1 to electrically connect to the equipment group 110.In some examples, as shown in FIG. 6D, at least one conductive portion 147 is located in the central area AA 1, and at least two signal lines 131 in a signal line group 130 may be electrically connected in the central area AA 1 through the conductive portion 147. In this way, the plurality of electrically connected signal lines 131 can be electrically connected together together with the bonding pin in the bonding region BB. On the one hand, the signal lines 131 need not extend along the first direction X in the lower edge region AA 22, thereby reducing the space occupied by the signal lines 131 in the lower edge region AA 22, which helps reduce the width of the lower edge region AA 22 and allow a narrow frame of the base plate 100. On the other hand, the convenience of electrical connection between the plurality of signal lines 131 and the bonding pins can also be improved, thereby improving the wiring friendliness of the base plate 100.In some examples, as shown in FIG. 6D, the conductive portion 147 electrically connecting at least two signal lines 131 is located between two device groups 110 adjacent along the second direction Y. With such an arrangement, the conductive portion 147 can be disposed outside the region where the device group 110 is located, thereby reducing the influence of the conductive portion 147 on the light emission of the electronic elements 120 in the device group 110 and improving the reliability of the base plate 100.It is understood that the device group 110 includes a plurality of electronic elements 120. The area where a device group 110 is located is a closed virtual area formed by connecting the boundaries of the outermost electronic element 120 of the device group 110 sequentially in the clockwise or counterclockwise direction. In some examples, if a plurality of electronic elements 120 in the device group 110 are arranged in a matrix, the area where a device group 110 is located is rectangular and the plurality of electronic elements 120 in the device group 110 is located within the rectangular area.In other examples, the conductive portion 147 electrically connecting at least two signal lines 131 may also overlap with the area where the device group 110 is located, thereby improving the wiring flexibility of the base board 100.That is, the arrangement that at least two signal lines 131 in at least one signal line group 130 are electrically connected via the conductive portion 147 is advantageous for decreasing the width of the signal lines 131 along the first direction X, thereby also facilitating the reduction of the width of the side frame of the base plate 100. By allowing at least two signal lines 131 in at least one signal line group 130 to be electrically connected in the central region AA 1, when electrically connecting to the bonding region BB, the signal lines 131 do not need to extend along the first direction X in the lower edge region AA 22, which helps reduce the width of the lower edge region AA 22 and reduce the width of the lower frame of the base plate 100. Moreover, it is also advantageous to achieve the reduction in the thickness of the signal line 131, the reduction in the amount of material used for the signal line 131, and the reduction in the cost of the base board 100 by electrically connecting at least two signal lines 131 in at least one signal line group 130 via the conductive portion 147.As can be seen from the above, the plurality of signal line groups 130 include a first voltage line group 150 and a second voltage line group 160. In some examples, as shown in FIG. 6D, at least two first voltage lines 151 in the first voltage line group 150 may be electrically connected via the conductive portion 147. At least two second voltage lines 161 in the second voltage line group 160 may also be electrically connected via the conductive portion 147. In other examples, in addition to the first power line group 150 and the second power line group 160, in other signal line groups 130 (such as the power supply line group 135 or the input-output line group 137), at least two signal lines 131 (the power supply lines 132 or the input-output lines 134) may be formed to be electrically connected via the conductive portion 147.In some examples, a first voltage line 151 located in the edge region AA 21 is taken as an example, as shown in FIG. 6D. The first power line 151 located in the edge region AA 21 is electrically connected to the other first power lines 151 in the first power line group 150 via the conductive portion 147, so that the range of values of the width of the first power line 151 located in the edge region AA 21 along the first direction X can be reduced to 0.5 mm to 10 mm. For example, the value of the width of the first voltage line 151 along the first direction X may be 0.5 mm, 1 mm, 5 mm, or 6.412 mm.From the above, it is understood that, as shown in FIG. 6E, a plurality of electronic elements 120 in the device group 110 are electrically connected via the connection wires 112. In some examples, as shown in FIG. 6F, a plurality of connection wires 112 are arranged in a device group 110 at intervals. One pin of the electronic element 120 is welded to the second pad 1313 on one connection wire 112, and the other pin is welded to the second pad 1313 on the other connection wire 112. In this way, after being welded to the bonding wire 112, the electronic element 120 may be located in the region Q 5 (see FIG. 6E for a positional relationship diagram between the electronic element 120 and the bonding wire 112 after welding). Similarly, as shown in FIG. 6F, after the first driver chip 103 is welded to the first pad 1312, it may be located in the region Q 4.In some examples, as shown in FIGS. 6D and 6E, the base plate 100 further includes a conductive pattern 170, the conductive pattern 170 being disposed in the same layer as the plurality of signal line groups 130 and the plurality of connection wires 112. In some examples, the plurality of signal line groups 130, the plurality of connection wires 112, and the plurality of conductive patterns 170 are in the same layer and are made of the same material.It is understood that "the same layer" refers to a specific pattern formed by a patterning process in different regions after an entire layered structure is formed with a single film forming process. Depending on the various specific patterns, the patterning process may include at least one exposure, development, or etching process, and each specific pattern may be continuous or discontinuous. These specific patterns may also have different heights or different thicknesses.In some examples, as shown in FIG. 6D, the signal line 131 may be electrically connected to the bonding region BB via the conductive pattern 170. It is understood that the conductive pattern 170 has high current carrying capacity, and the reliability of the electrical connection between the signal line 131 and the bonding pin is improved by electrically connecting the signal line 131 to the bonding pin in the bonding area BB via the conductive pattern 170.In some examples, the width of the conductive pattern 170 along the first direction X is about 12.5 mm to increase the current carrying capacity of the conductive pattern 170, so that the reliability of the electrical connection between the signal line 131 and the bond pin is improved.In some examples, as shown in FIG. 6E, at least two signal lines 130 in a signal line group 130 are electrically connected via the conductive pattern 170 and the conductive portion 147. Since the conductive pattern 170 is electrically conductive, it is understood that it may compensate for the voltage drop of the signal line 131.That is, by electrically connecting the conductive pattern 170 to the signal line 131, the resistance value of the signal transmission path (i.e., the signal line 131 and the conductive pattern 170 after electrical connection) and the voltage drop of the signal transmission path (i.e., the signal line 131 and the conductive pattern 170 after electrical connection) can be reduced; thus, the signal loss during transmission can be reduced, the reliability of signal transmission can be improved, and the light emission performance of the electronic element 120 can be improved.It is understood that since the voltage drop of the signal line 131 after the electrical connection between the conductive pattern 170 and the signal line 131 can be reduced, the voltage drop of the signal line 131 due to the compensating effect of the conductive pattern 170 can still satisfy the requirements even if the width of the signal line 131 along the first direction X is set smaller or the thickness of the signal line 131 is set smaller.That is, by disposing the conductive pattern170 so as to be electrically connected to the signal line 131, it is advantageous on the one hand to reduce the width of the signal line 131 along the first direction X, and thus to reduce the space occupied by the signal line 131 on the substrate 101, and to increase the wiring friendliness of the base 100, which is advantageous for realizing a narrow frame of the base 100. On the other hand, it is also advantageous to reduce the thickness of the signal line 131, thereby reducing the amount of material for the signal line 131 and the cost of the base board 100.For example, depending on various requirements, an area of an orthographic projection of the conductive pattern 170 on the substrate 101 may be set differently to improve the applicability of the base plate 100.In some examples, as shown in FIG. 6F, at least one signal line 131 in at least one signal line group 130 includes at least two sub-portions 1311 spaced apart along the second direction Y. Two adjacent sub-portions 1311 in the same signal line 131 are electrically connected via the conductive portion 147.From the above, it can be seen that a part (one or more) of the signal lines 131 includes a first conductive path portion 131 dlocated between two adjacent first pads 1312, which increases the risk of breakage of the first conductive path portion 131 dand also the risk of short-circuit between the first conductive path portion 131 dand the first pad 1312.In some examples, as shown in FIG. 6F, two sub-portions 1311 of the same signal line 131 are spaced apart from each other along the second direction Y, and other signal lines 131 (for example, the second power line 161) are located between the two spaced apart sub-portions 1311. It is understood that when two adjacent sub-portions 1311 of the same signal line 131 are electrically connected via the conductive portion 147, there is no need to provide a first wiring portion 131 dbetween two adjacent first pads 1312.By electrically connecting two adjacent sub-portions 1311 via the conductive portion 147 to omit the need to provide a first conductive path portion 131 d, on the one hand, the first conductive path portion 131 dis prevented from breaking or heating between two adjacent first pads 1312, thereby improving the reliability of the base plate 100. On the other hand, a short circuit between the first conductive line portion 131 dand the first pad 1312 is avoided, thereby improving the yield of the base plate 100. Moreover, since no first conductive line portion 131 dis provided between two adjacent first pads 1312, a first welding hole M 2 may be disposed to expose a plurality of first pads 1312, which simplifies the manufacturing process of the base plate 100 and lowers the cost of the base plate 100.Moreover, the electrical connection between two sub-portions 1311 is achieved by the conductive portion 147, whereby the length of each sub-portion 1311 can be shortened, and thus defects such as breakage or heat generation due to an excessive length of the signal line 131 can be reduced and the reliability of the base plate 100 is improved. It is understood that the lengths of the sub-portions 1311 included in a signal line 131 may be the same or different. The distance between two adjacent subsections 1311 along the second direction Y may be the same or different.In some examples, the conductive portion 147 is located along the first direction X on one side of two adjacent first pads 1312.It is understood that by adjusting the width and thickness of the conductive portion 147, the current carrying capacity of the conductive portion 147 can be adjusted. In some examples, the width and thickness of the conductive portion 147 may be increased such that the conductive portion 147 has a greater current carrying capacity. It is understood that the larger the current carrying capacity of the conductive portion 147 is, the smaller the current carrying capacity of the sub-portion 1311 can be set, which benefits the reduction of the width of the sub-portion 1311 along the first direction X as well as the thickness of the sub-portion 1311, etc., which is advantageous for realizing a narrow frame of the base plate 100 as well as the reduction of the cost of the base plate 100.In other examples, the width and thickness of the conductive portion 147 may also be reduced such that the conductive portion 147 has a lower current carrying capacity to meet different usage requirements and improve the applicability of the baseplate 100.As can be seen from the above, the base plate 100 includes a second reflective layer 194 covering the plurality of signal line groups 130. In some examples, a third weld hole M 4 is opened on the second reflective layer 194 (see FIG. 8A ). The third welding hole M 4 passes through the second reflective layer 194 in a direction perpendicular to the substrate 101 to expose a portion of the sub-portion 1311. For example, as shown in FIG. 6G, the area of the subsection 1311 exposed by the second welding hole M 3 may be referred to as a third pad 1314.In some examples, a plurality of third pads 1314 may be provided on a subsection 1311. In other examples, only a third pad 1314 may be provided on a subsection 1311.One end of the conductive portion 147 is welded to the third pad 1314 on one sub-portion 1311, and the other end is welded to the third pad 1314 on the other sub-portion 1311, so that two sub-portions 1311 spaced apart from each other along the second direction Y may be electrically connected via the conductive portion 147.In some examples, a second weld hole M 3 exposes a third pad 1314, such that the second reflective layer 194 may cover the wiring lines between two third pads 1314 to prevent the conductive portion 147 from being shorted to the wiring lines between two third pads 1314, improving the reliability of the baseplate 100. It is understood that the passivation layer 109 may expose the third pad 1314.In some examples, the areas of the orthogonal projections of the plurality of third pads 1314 on the substrate 101 may be the same or different.In some examples, the dimension of the third pad 1314 is positively correlated with the dimension of an end of the conductive portion 147 being welded to the third pad 1314. That is, the larger the area of the orthogonal projection of the end of the conductive portion 147 welded to the third pad 1314 on the substrate 101, the larger the area of the orthogonal projection of the third pad 1314 on the substrate 101.In some examples, the area of the orthogonal projection of the end of the conductive portion 147 welded to the third pad 1314 on the substrate 101 is a rectangle, wherein the length of the rectangle is 1.5 mm and the width is 1 mm. For example, the value of the ratio of the area of orthogonal projection of the end of the conductive portion 147 welded to the third pad 1314 on the substrate 101 to the area of orthogonal projection of the third pad 1314 welded to an end of the conductive portion 147 on the substrate 101 is in a range of 0.8 to 2.In some examples, the area of orthogonal projection of the end of the conductive portion 147 welded to the third pad 1314 on the substrate 101 may be smaller than the area of orthogonal projection of the third pad 1314 welded to an end of the conductive portion 147 on the substrate 101.The ratio value of the area of orthogonal projection of the end of the conductive portion 147 welded to the third pad 1314 on the substrate 101 to the area of orthogonal projection of the third pad 1314 welded to an end of the conductive portion 147 on the substrate 101 may be, for example, 0.9, 1.0, 1.5, or 1.8, etc.In some examples, at least a portion of a side of any bridge 140 remote from the substrate 101 may reflect light.As can be seen from the above, the base plate 100 can be used to provide a light source. The second reflective layer 194 covers the plurality of signal line groups 130 and the plurality of connection wires 112 and may play a role in reflection of light, thereby increasing brightness of the base plate 100 and reducing power consumption of the base plate 100.It is understood that a portion of the bridge 140 is located on a side of the second reflective layer 194 remote from the substrate 101, i.e., the bridge 140 may cover a portion of the second reflective layer 194. Therefore, it can be provided that at least a partial region of a side of any bridge 140 remote from the substrate 101 can reflect light.In this way, the intensity of light absorbed by the bridge 140 is reduced, phenomena such as black spots or shadows caused by the bridge 140 on the base plate 100 are improved, and the influence of the bridge 140 on the brightness of the base plate 100 is reduced, and the optical performance of the base plate 100 is improved. That is, by allowing at least a portion of a side of any bridge 140 remote from the substrate 101 to reflect light, the utilization degree of the light incident on the region on the base plate 100 where the bridge 140 is located can be improved.It is understood that the side of the bridge 140 remote from the substrate 101 is the surface of the side of the bridge 140 remote from the substrate 101, or a location between the surface of the side of the bridge 140 remote from the substrate 101 and the surface of the side of the bridge 140 close to the substrate 101.In some examples, at least a portion on the surface of the side of the conductive portion 147 remote from the substrate 101 may reflect light.In some examples, at least a portion on the surface of the side of the conductive portion 147 remote from the substrate 101 may be formed white, such that at least a portion of the side of the conductive portion 147 remote from the substrate 101 may reflect light.As can be seen from the above, the conductive portion 147 may be a conductive material, a capacitor, a resistor, or the like. In some examples, if the conductive portion 147 is made of conductive material, the conductive portion 147 may be configured to include a white conductive material to reflect light. In some examples, taking the example of the conductive portion 147 as a resistor, the surface of the side of the resistor remote from the substrate 101 may be formed white to reflect light.It is understood that the arrangement that at least a portion on the surface of the side of the conductive portion 147 remote from the substrate 101 can reflect light can improve the utilization degree of the light incident on the region on the base plate 100 where the bridge 140 is located, thereby improving brightness uniformity of the base plate 100 at various positions, and also increasing brightness of the base plate 100, reducing power consumption of the base plate 100, and improving optical performance of the base plate 100.It is understood that in various bridges 140, the shape and area of the reflective region on the surface of the side of the conductive portion 147 remote from the substrate 101 may be the same or different. In some examples, the entire area of the surface of the side of each bridge 140 remote from the substrate 101 may reflect light.FIG. 7A is a cross-sectional view taken along the C 1-C 1 direction in FIG. 6F. FIG. 7B is another cross-sectional view taken along the C 1-C 1 direction in FIG. 6F. FIG. 7C is still another cross-sectional view taken along the C 1-C 1 direction in FIG. 6F. FIG. 7D is still another cross-sectional view taken along the C 1-C 1 direction in FIG. 6F.Note that FIGS. 7A to 7D show the cross-sectional views along the C 1-C 1 direction in FIG. 6F according to various embodiments. In the following, the bridge 140 will be further illustrated by way of example with reference to FIGS. 7A to 7D.As can be seen from the above, the third welding hole M 4 is opened in the second reflective layer 194, and the sub-portion 1311 exposed by the third welding hole M 4 may form a third pad 1314. In some examples, the edge of the third weld hole M 4 is spaced apart from the edge of the subsection 1311, as shown in FIG. 7A. In other examples, the edge of the third weld hole M 4 overlaps the edge of the subsection 1311, as shown in FIG. 7B.In some examples, as shown in FIGS. 7A to 7D, the bridge 140 further includes a first encapsulant 148 covering the conductive portion 147. The material of the first encapsulant 148 comprises at least one of a light transmissive material and a reflective material.It is understood that the first encapsulant 148 covers the conductive portion 147 to protect the conductive portion 147 such that corrosion of the conductive portion 147 caused by external water or oxygen, etc. is reduced and the life of the conductive portion 147 is prolonged. In some examples, the first encapsulant 148 is made of insulating material and may thus act as electrical insulation, thereby reducing the risk of a short circuit between the conductive portion 147 and other conductive structures and improving the reliability of the base plate 100.In some examples, as shown in FIGS. 7A to 7D, the first encapsulant 148 may cover not only the conductive portion 147 but also the second reflective layer 194 located in the surrounding area of the conductive portion 147. In other words, the first encapsulant 148 may overlap the second reflective layer 194 in the area around the conductive portion 147, thereby improving the packaging protection effect of the first encapsulant 148 for the conductive portion 147.In some examples, as shown in FIGS. 7A and 7B, the first encapsulant 148 may cover the second reflective layer 194 in a larger area around the conductive portion 147. In other examples, the first encapsulant 148 may also cover only the second reflective layer 194 in a smaller area around the conductive portion 147, as shown in FIGS. 7C and 7D.In some examples, if the material of the first encapsulant 148 comprises a light transmissive material, the light may pass through the first encapsulant 148 and irradiate the surface of the side of the conductive portion 147 remote from the substrate 101. Under the reflection by the surface of the side of the conductive section 147 remote from the substrate 101, the light exits the base plate 100 through the first encapsulation 148.In some examples, if the material of the first encapsulant 148 comprises a reflective material, the light radiating onto the bridge 140 may be radiated from the base plate 100 due to the reflection of the first encapsulant 148.That is, when the material of the first encapsulant 148 comprises a light transmissive material, the light may emit under the reflection of the conductive portion 147 from the base plate 100. When the material of the first encapsulant 148 comprises a reflective material, the light may emit under the reflection of the first encapsulant 148 from the base plate 100.In some examples, the material of the first encapsulant 148 comprises a light transmissive material and a reflective material such that the light may be radiated outward from the base plate 100 under the reflection of both the conductive portion 147 and the first encapsulant 148.When at least a portion of the surface of the side of the conductive portion 147 remote from the substrate 101 may reflect light and the first encapsulant 148 comprises a reflective material, it is understood that the light may be reflected from the surface of the side of the conductive portion 147 remote from the substrate 101 even though the light passes through the first encapsulant 148. Therefore, the brightness of the base plate 100 is improved, and the influence of the bridge 140 on the brightness of the base plate 100 is reduced.In some examples, when the first encapsulant 148 comprises a reflective material, the material of the first encapsulant 148 may comprise white ink or white adhesive. For example, the white ink may be at least one of photosensitive white ink and curable white ink. When the first encapsulant 148 comprises a transparent material, the material of the first encapsulant 148 may include a transparent adhesive.In other examples, the surface of the side of the conductive portion 147 remote from the substrate 101 may not reflect light. In this case, at least a partial region of the surface of the side of the first encapsulation 148 remote from the substrate 101 can reflect light.That is, if the surface of the side of the conductive portion 147 remote from the substrate 101 cannot reflect light, at least a portion of the surface of the side of the first encapsulant 148 remote from the substrate 101 may be provided to reflect light. Since the first encapsulant 148 covers the conductive portion 147, the light incident on the bridge 140 may be radiated outwardly from the base plate 100 under the reflection of the first encapsulant 148, thereby reducing the influence of the bridge 140 on the brightness of the base plate 100. Therefore, the utilization efficiency of light incident on the area of the base plate 100 where the bridge 140 is located can be improved, and brightness uniformity of the base plate 100 can be increased.It is understood that the manufacturing process of the base plate 100 may be simplified and the cost of the base plate 100 may be lowered by not being able to reflect light on the surface of the side of the conductive portion 147 remote from the substrate 101 and the first encapsulant 148 being able to reflect light.In some examples, the material of the first encapsulant 148 comprises a reflective material such that at least a portion of the surface of the side of the first encapsulant 148 remote from the substrate 101 may reflect light. For example, the reflective material may be white ink or white adhesive. For example, the white ink may be at least one of photosensitive white ink and curable white ink.In some examples, the conductive portion 147 is an SMD resistor or conductive adhesive, as shown in FIGS. 7B and 7C.As can be seen from the above, the conductive portion 147 serves to conduct electricity. In some examples, the conductive portion 147 is an SMD resistor, as shown in FIG. 7 c. It is understood that the SMD resistor comprises two pins, one of which is welded to the third pad 1314 on one subsection 1311 and the other pin is welded to the third pad 1314 on another subsection 1311. This allows the SMD resistor to electrically connect two sub-portions 1311 spaced apart from each other.In other examples, the conductive portion 147 may also be other conductive devices such as capacitors. It should be appreciated that the configuration of the conductive portion 147 as different conductive devices have different control effects on current flowing through the conductive portion 147 to meet different usage requirements.In some examples, the conductive portion 147 may also be a metal sheet or metal wire, for example, a copper sheet, an aluminum sheet, a copper wire, or an aluminum wire, or the conductive portion 147 may also be a conductive adhesive tape.Taking the example of the conductive portion 147 as an SMD resistor or conductive adhesive, the manufacturing method of the base plate 100 will be described below.As can be seen from the above, the pads (including the first pad 1312, the second pad 1313, and the third pad 1314) of the passivation layer 109 may be exposed. In some examples, the exposed pads (including the first pad 1312, the second pad 1313, and the third pad 1314) of the passivation layer 109 may be subjected to a chemical nickel immersion gold process before forming the second reflective layer 194. It is understood that in the chemical nickel immersion gold method, a chemical redox effect is used to form a nickel-gold layer on the surface of the pad side remote from the substrate 101, to improve the dissolution and corrosion resistance of the pads (including the first pad 1312, the second pad 1313, and the third pad 1314), as well as to increase the welding results.In other examples, before forming the passivation layer 109, Organic Solubility Preservatives (Chinese name: )- treatment may also be performed on the surface of the side of the plurality of signal line groups 130 remote from the substrate 101 and on the surface of the side of the plurality of connection wires 112 remote from the substrate 101. It is understood that the OSP treatment serves to form an organic protective layer on the surface of the side of the plurality of signal line groups 130 and the plurality of bonding wires 112 remote from the substrate 101 to improve the oxidation phenomenon of the signal line group 130 and the bonding wire 112. It is understood that after performing the OSP treatment of the signal line group 130 and the connection wire 112, there is no need to treat the pads (including the first pad 1312, the second pad 1313, and the third pad 1314) with the chemical nickel immersion gold method.As can be seen from the above, after the formation of the passivation layer 109, a patterned second reflective layer 194 may be formed on the side of the passivation layer 109 remote from the substrate 101 such that the second reflective layer 194 may expose the first pad 1312, the second pad 1313, and the third pad 1314.In some examples, if the conductive portion 147 is an SMD resistor, a welding process may be used to weld the pins of the SMD resistor to the third pad 1314. That is, the electronic element 120 is welded to the second pad 1313, the first driver chip 103 is welded to the first pad 1312, and the SMD resistor is welded to the third pad 1314.For example, the solder may be preformed on the pins of the electronic element 120 or the solder may be applied to the second pad 1313. Similarly, the solder may be preformed on the pins of the first driver chip 103, or the solder may be applied to the first pad 1312. It is also possible to either preform the solder on one end of the SMD resistor or apply the solder to the third pad 1314. The solder may be, for example, solder tin.For example, a crystal bonding process may be used to place the electronic element 120 on a side of the second pad 1313 remote from the substrate 101 and place the first driver chip 103 on a side of the first pad 1312 remote from the substrate 101. For example, surface mounted technology (or SMT) may be used to place the SMD resistor through fasteners (e.g., a placement machine) on a side of the third pad 1314 remote from the substrate 101. Using a reflow welding process, the electronic element 120 is welded to the second pad 1313, the first driver chip 103 is welded to the first pad 1312, and the SMD resistor is welded to the third pad 1314.In other examples, when the conductive portion 147 is a conductive adhesive, a printing method or process may be used to electrically connect the conductive adhesive to the third pad 1314. The conductive adhesive may be, for example, silver adhesive, nano-silver adhesive, copper adhesive, etc.In some examples, the conductive adhesive may be formed after the electronic element 120 is welded to the second pad 1313 and the first driver chip 103 is welded to the first pad 1312.In some examples, the conductive adhesive may be formed by a printing process via pneumatic valves or solenoid valves. In other examples, the conductive adhesive may be formed using a printing process through steps such as pre-making a steel mesh.It is understood that after the formation of the conductive adhesive, a high temperature is required to cure the conductive adhesive. Taking the example of the conductive adhesive Ag adhesive (i.e., silver adhesive), the cure temperature may be about 150° C. and the cure time may be about 1 hour.It will be understood that, with different lengths, widths and thicknesses of the conductive adhesive, the resistance of the conductive adhesive will be different. Hereinafter, the conductive adhesive is used as an Ag adhesive (i.e., silver adhesive) as an example. Referring to Table 1, the resistance values of the conductive adhesive at various lengths, widths and thicknesses are exemplified. Table 1 Table 1Ag adhesive1.65E-07 (1.65×10-7)15021.18526121.67.00E-07 (7.00×10-7)1500.51.410.46311119215.34E-07 (5.34×10-7)15011.111.23710054.8As shown in Table 1, Ag adhesive having different resistivity is selected and coated with needles to form a conductive portion 147. Ag adhesive has different resistance values depending on the length, width and thickness.For example, for Cu wiring formed by electroplating or magnetron sputtering, when the resistivity of the Cu wiring is set to 1.75E-08 (1.75×10 -8), the length is set to 1 m, the width is set to 0.31 mm, and the thickness is set to 2.7 μm, the resistance value of the Cu wiring is about 21 Ω. That is, Ag adhesive is used as the conductive portion 147, and by controlling the length, width, thickness, etc. of the Ag adhesive, the resistance value of the Ag adhesive may be the same as the resistance value of the Cu wiring, or even the resistance value of the Ag adhesive may be smaller than that of the Cu wiring. Therefore, the voltage drop of the conductive portion 147 is reduced, and thus the reliability of the base plate 100 is improved.In some examples, the base plate 100 needs to be subjected to an Electrical Test (ET) after the formation of the conductive portion 147. For example, the base plate 100 may be turned on to observe whether the electronic element 120 may emit light. When the base plate 100 fails during the lighting test, RW (Rework, Chinese name: ) needs to be performed on the failed parts (e.g., the electronic element 120, the first driver chip 103, or the conductive portion 147, etc.).FIG. 7E is a structural diagram of a base plate according to still other embodiments.From the above, it can be seen that the second reflective layer 194 is provided with a second welding hole M 3 that can expose the second pad 1313, and the electronic element 120 is welded to the second pad 1313, as shown in FIG. 7E.In some examples, as shown in FIG. 7E, the base plate 100 further includes a plurality of reflective portions 195, wherein a reflective portion 195 abuts an edge of a second weld hole M 3. That is, the reflective portion 195 may surround the second pad 1313.It is understood that the reflecting portion 195 plays a role in light reflection. In some examples, the material of the reflective portion 195 comprises a white adhesive. In this way, the light emitted from the electronic element 120 after being irradiated on the reflecting portion 195 can be irradiated outside the base plate 100 under the reflection of the reflecting portion 195, thereby increasing the brightness of the base plate 100 and reducing the power consumption of the base plate 100.In some examples, the reflective portion 195 may be formed by coating after the electronic element 120 is welded to the second pad 1313.In some examples, a portion (one or more) of the reflective portions 195 is disposed in one-to-one correspondence adjacent to the edge of the second weld hole M 3 and another portion (one or more) of the reflective portions 195 is disposed in one-to-one correspondence adjacent to the edge of the first weld hole M 2 and yet another portion (one or more) of the reflective portions 195 is disposed in one-to-one correspondence adjacent to the edge of the third weld hole M 4. That is, the reflective portion 195 may surround not only the second pad 1313, but also the first pad 1312 and the third pad 1314, thereby improving the reflection effect of the reflective portion 195 on light, and thus improving the brightness of the base plate 100.FIG. 8A is a structural diagram of a base plate according to still other embodiments. FIG. 8B is a structural diagram of a conductive portion according to some embodiments. FIG. 8C is a structural diagram of a conductive portion according to other embodiments. FIG. 8D is a structural diagram of a conductive portion according to still other embodiments.In some examples, as shown in FIGS. 8A and 8B, the conductive portion 147 includes a main body 1471 and two interconnects 1472. The two links 1472 are connected to two ends of the main body 1471, respectively. The maximum distance between a surface of the main body 1471 facing the substrate 101 and the substrate 101 is larger than the maximum distance between a surface of any joint 1472 facing the substrate 101 and the substrate 101.It is understood that the main body 1471 and the joint 1472 may be fixedly connected, and that the main body 1471 and the joint 1472 may also be detachably connected.In some examples, as shown in FIGS. 8A and 8B, the main body 1471 includes a first sub-body portion 1471 aand a second sub-body portion 1471 b. The number of the second sub-body portions 1471 bis two, and the two second sub-body portions 1471 bare connected to both ends of the first sub-body portion 1471 a, respectively. Each connection 1472 is connected to an end of the second sub-body portion 1471 b, which end is remote from the first sub-body portion 1471 a. It should be appreciated that the joint 1472 is used for welding to the third pad 1314.It is to be understood that the maximum distance between a surface of the main body 1471 facing the substrate 101 and the substrate 101 is the maximum distance between a surface of the sub-body portion 1471 a facing the substrate 101 and a surface of a side of the substrate 101 close to the main body 1471, as shown in FIG. 8A.In some examples, the extension direction of the first sub-body portion 1471 ais parallel or approximately parallel to the substrate 101, i.e. the surface of the first sub-body portion 1471 afacing the substrate 101 has the same or approximately the same distance from the substrate 101 at different locations.It is understood that, as shown in FIG. 8A, the maximum distance between the surface of the interconnection 1472 facing the substrate 101 and the substrate 101, that is, the maximum distance between the surface of the interconnection 1472 facing the substrate 101 and a surface of a side of the substrate 101 close to the interconnection 1472, is.In some examples, the extension direction of the connection 1472 is parallel or approximately parallel to the substrate 101, i.e. the surface of the connection 1472 facing the substrate 101 is at the same or approximately the same distance from the substrate 101 at different locations.In some examples, the extension direction of the first sub-body portion 1471 a intersects the extension direction of the second sub-body portion 1471 b, such that the conductive portion 147 may be curved or nearly curved, such that the maximum distance between a surface of the main body 1471 facing the substrate 101 and the substrate 101 may be greater than the maximum distance between a surface of any connection 1472 facing the substrate 101.It is understood that, as shown in FIG. 8A, a signal line 131 is provided between two adjacent third pads 1314. Since the second reflective layer 194 covers the signal line 131, the conductive portion 147 must extend not only over the signal line 131 but also over the second reflective layer 194 covering the signal line 131.The thickness of the second reflective layer 194 is normally thicker. Therefore, by making the maximum distance between a surface of the main body 1471 facing the substrate 101 and the substrate 101 larger than the maximum distance between a surface of any joint 1472 facing the substrate 101 and the substrate 101, the main body 1471 can escape the second reflective layer 194 to reduce interference between the main body 1471 and the second reflective layer 194, the convenience and reliability of welding between the conductive portion 147 and the third pad 1314 can be improved, thereby improving the reliability of the base plate 100.In some examples, as shown in FIGS. 8C and 8D, the shape of the orthographic projection of the main body 1471 on the substrate 101 is a first rectangle, wherein the length L 1 of the first rectangle is in the range of 0.5 mm to 25 mm, and the width L 2 of the first rectangle is in the range of 0.2 mm to 3 mm.In some examples, the length L 1 of the first rectangle may be in the range of 3 mm to 20 mm, 5 mm to 15 mm, or 8 mm to 12 mm, etc. In some examples, the value of the length L 1 of the first rectangle may be 5.8 mm, 6.35 mm, 12 mm, 16 mm, or 22 mm, etc.In some examples, the width L 2 of the first rectangle may be in the range of 0.5 mm to 2.5 mm, 1 mm to 2 mm, or 1.2 mm to 1.8 mm, etc. In some examples, the value of the width L 2 of the first rectangle may be 0.85 mm, 1.0 mm, 2.2 mm, or 2.8 mm, etc.In some examples, the shape of the orthographic projection of any connection 1472 on the substrate 101 is a second rectangle, where the length L3 of the second rectangle is in the range of 0.2 mm to 3 mm, and the width L4 of the second rectangle is in the range of 0.2 mm to 3 mm.In some examples, the length L 3 of the second rectangle may be in the range of 0.5 mm to 2.5 mm, 1 mm to 2 mm, or 1.2 mm to 1.5 mm, etc. In some examples, the value of the length L 3 of the second rectangle may be 1 mm, 1.5 mm, 1.8 mm, or 2.2 mm, etc.In some examples, the width L 4 of the second rectangle may be in the range of 0.5 mm to 2.5 mm, 1 mm to 2 mm, or 1.2 mm to 1.5 mm, etc. In some examples, the value of the width L 4 of the second rectangle may be 1 mm, 1.5 mm, 1.8 mm, or 2.2 mm, etc.In some examples, the width L 4 of the second rectangle and the width L 2 of the first rectangle may be the same or different.It is understood that by setting the length L 1 of the first rectangle, the width L 2 of the first rectangle, the length L 3 of the second rectangle, and the width L 4 of the second rectangle to different values, two third pads 1314 are electrically connected at different distances via the conductive portion 147, thereby satisfying different usage requirements and improving the applicability of the conductive portion 147.In some examples, as shown in FIG. 8D, the maximum distance between the surface of the main body 1471 facing the substrate 101 and the surface of the joint 1472 facing the substrate 101 is a first distance H 1, wherein the first distance H 1 is in the range of 0.1 mm to 0.8 mm.In some examples, the range of values of the first distance H 1 may be 0.2 mm to 0.6 mm, 0.3 mm to 0.5 mm, or 0.35 mm to 0.48 mm, etc. In some examples, the value of the first distance H 1 may be 0.2 mm, 0.30 mm, or 0.7 mm, etc.In some examples, the maximum distance between the surface of the main body 1471 facing away from the substrate 101 and the surface of the connection 1472 facing towards the substrate 101 is a second distance H 2, wherein the second distance H 2 is in the range of 0.2 mm to 1 mm.In some examples, the range of values of the second distance H 2 may be 0.25 mm to 0.9 mm, 0.3 mm to 0.8 mm, or 0.4 mm to 0.7 mm, etc. In some examples, the value of the second distance H 2 may be 0.3 mm, 0.50 mm, or 0.8 mm, etc.It is understood that by setting the first distance H 1 and the second distance H 2 to different values, different usage requirements are satisfied and the reliability of the base plate 100 is improved.It will be appreciated that the sum of the length L1 of the first rectangle and the length L3 of the second rectangle is the length of the orthographic projection of the conductive portion 147 on the substrate 101. In some examples, the length of the orthographic projection of the conductive portion 147 on the substrate 101 may be 5 mm, 9.6 mm, 15 mm, etc.FIG. 9A is a cross-sectional view taken along the C 2-C 2 direction in FIG. 6G. FIG. 9B is another cross-sectional view taken along the C 2-C 2 direction in FIG. 6G. FIG. 9C is still another cross-sectional view taken along the C 2-C 2 direction in FIG. 6G.Note that FIGS. 9A to 9C show the cross-sectional views along the C 2-C 2 direction in FIG. 6G according to various embodiments. Hereinafter, the base plate 100 will be further illustrated by way of example with reference to FIGS. 9A to 9C.In some examples, as shown in FIGS. 9A to 9C, the base plate 100 further includes a first reflective layer 191. The first reflective layer 191 is located on a side of the plurality of device groups 110, the plurality of signal line groups 130, and the plurality of bridges 140 remote from the substrate 101.It is understood that the first reflective layer 191 plays a role in light reflection. In some examples, the first reflective layer 191 is a reflective piece.As can be seen from the above, in some examples, as shown in FIG. 9A, the bridge 140 includes a conductive portion 147 and a first encapsulant 148 covering the conductive portion 147. In this case, the first reflective layer 191 covers the plurality of bridges 140, i.e. the first reflective layer 191 may be located on a side of the first encapsulant 148 remote from the substrate 101.In other examples, as shown in FIGS. 9B and 9C, the first reflective layer 191 covers the plurality of bridges 140 when the bridge 140 includes only the conductive portion 147 and not the first encapsulant 148. That is, the first reflective layer 191 may be located on a side of the conductive portion 147 remote from the substrate 101.As can be seen from the above, the conductive portion 147 may be a conductive material or a resistor. In some examples, as shown in FIG. 9B, when the conductive portion 147 is a conductive material, the conductive material is welded to the third pad 1314, and the first reflective layer 191 is located on the side of the conductive material remote from the substrate 101. In some examples, the first reflective layer 191 may abut a surface of a side of the conductive material remote from the substrate 101. In other examples, there may also be a gap between the first reflective layer 191 and the surface of the side of the conductive material remote from the substrate 101.In other examples, as shown in FIG. 9C, when the conductive portion 147 is a resistor, the resistor welding portion 1473 is welded to the third pad 1314, and the first reflective layer 191 is located on the side of the electronic element remote from the substrate 101. In some examples, the first reflective layer 191 may abut a surface of a side of the resistor remote from the substrate 101. In other examples, there may also be a gap between the first reflective layer 191 and the surface of a side of the resistor remote from the substrate 101.It should be understood that the first reflective layer 191 is provided to cover the plurality of device groups 110, the plurality of signal line groups 130, and the plurality of bridges 140, so that the first reflective layer 191 can reflect light, thereby improving brightness of the base plate 100 and reducing power consumption of the base plate 100.FIG. 9D is a structural diagram of a base plate according to still other embodiments.As shown in FIG. 9D, the first reflective layer 191 includes a plurality of first function regions Q 1. The orthographic projection of the bridge 140 on the substrate 101 is within the range of the orthographic projection of the first function regions Q 1 on the substrate 101. On the first reflective layer 191, a plurality of first linear slits G 1 are opened, and each of the first linear slits G 1 passes through the first reflective layer 191 in a direction perpendicular to the substrate 101. The first functional region Q 1 is formed by surrounding the plurality of spaced-apart first linear slits G 1.It should be appreciated that the orthographic projection of the bridge 140 on the substrate 101 is within the range of the orthographic projection of the first functional regions Q 1 on the substrate 101, which means that the bridge 140 may be within the first functional region Q 1.In some examples, the number of first functional regions Q 1 is the same as the number of bridges 140; the orthographic projection of a bridge 140 on the substrate 101 is within the range of the orthographic projection of a first functional region Q 1 on the substrate 101. In other examples, the number of first functional regions Q 1 is less than the number of bridges 140; the orthographic projection of one or more bridges 140 on the substrate is within the range of the orthographic projection of a first functional region Q 1 on the substrate 101.It is understood that the bridge 140 is located on a side of the plurality of signal line groups 130 away from the substrate 101 and the first reflective layer 191 covers the bridge 140 such that the bridge 140 applies a voltage to the first reflective layer 191. Therefore, by each of the first linear slits G 1 passing through the first reflective layer 191 in a direction perpendicular to the substrate 101, the first linear slit G 1 can absorb the stress of the first reflective layer 191.As shown in FIG. 9D, the plurality of first linear slits G 1 are arranged surroundingly to form the first functional region Q 1 in which the bridge 140 is located, so that the first linear slits G 1 can absorb the stress caused by the bridge 140 onto the first reflective layer 191, thereby reducing the risk that the first reflective layer 191 shrinks under the action of stress, resulting in the electrical elements (e.g., the electronic element 120, the first driver chip 103, or the bridge 140, etc.) falling off to improve the reliability of the base plate 100.In some examples, different first function regions Q 1 may be formed by surrounding different numbers of first linear slits G 1. It is understood that the shapes and areas of different first functional regions Q 1 may be the same or different.In some examples, the ratio of the area of the orthographic projection of any bridge 140 on the substrate 101 to the area of the first functional region Q 1 where the orthographic projection of the bridge 140 is on the substrate 101 is in the range of 0.5 to 2.In some examples, the ratio of the area of the orthographic projection of any bridge 140 on the substrate 101 to the area of the first functional region Q 1 where the orthographic projection of the bridge 140 is on the substrate 101 may be in the range of 0.6 to 1.8, 0.8 to 1.5, or 0.9 to 1.4, etc.In some examples, the ratio of the area of the orthographic projection of any bridge 140 on the substrate 101 to the area of the first functional region Q 1 where the orthographic projection of the bridge 140 is on the substrate 101 may be 0.8, 0.9, 1.0, or 1.2, etc.It is understood that setting the range of values of the ratio of the area of the orthographic projection of any bridge 140 on the substrate 101 to the area of the first functional region Q 1 where the orthographic projection of the bridge 140 is on the substrate 101 to 0.5 to 2 can reduce the absolute value of the difference between the area of the orthographic projection of any bridge 140 on the substrate 101 and the area of the first functional region Q 1 where this bridge 140 is located, thereby improving the stress absorption effect of the first linear slit G 1 and increasing the reliability of the base plate 100.In some examples, the length of the first linear slot G 1 is in the range of 1 mm to 5 mm and the width of the first linear slot G 1 is in the range of 50 μm to 300 μm.In some examples, the length of the first linear slot G 1 may be in the range of 1.5 mm to 4.5 mm, 2 mm to 4 mm, or 2.5 mm to 3.5 mm. In some examples, the length of the first linear slot G 1 may be 1.2 mm, 2.8 mm, 3.4 mm, or 4.8 mm, etc.In some examples, the width of the first linear slot G 1 may be in the range of 100 μm to 250 μm, 120 μm to 220 μm, or 150 μm to 200 μm, etc. In some examples, the width of the first linear slot G 1 may be 80 μm, 120 μm, 220 μm, or 280 μm, etc.It is understood that the length and the width of the plurality of first linear slits G 1 may be the same or different.It is understood that setting the length and the width of the first linear slit G 1 to different values may meet different usage requirements and improve the reliability of the base plate 100.In some examples, as shown in FIGS. 9A to 9C, a plurality of second linear slits G 2 are opened on the first reflective layer 191, and each of the second linear slits G 2 passes through the first reflective layer 191 in a direction perpendicular to the substrate 101, and each of the second linear slits G 2 is located in the first functional region Q 1 as shown in FIG. 9D. An orthographic projection of an edge of the second linear slit G 2 on the substrate 101 at least partially overlaps the orthographic projection of the bridge 140 on the substrate 101.In some examples, the second linear slot G 2 may extend along the first direction X. In other examples, the second linear slot G 2 may extend along the second direction Y. In still other examples, the second linear slit G 2 may extend in a direction intersecting both the first direction X and the second direction Y.From the above, it can be seen that the orthographic projection of the bridge 140 on the substrate 101 is within the range of the orthographic projection of the first function region Q 1 on the substrate 101. In this way, by arranging the second linear slit G 2 in the first functional region Q 1, it can be achieved that an orthographic projection of an edge of the second linear slit G 2 on the substrate 101 can at least partially overlap the orthographic projection of the bridge 140 on the substrate 101. In other words, the arrangement position of the second linear slot G 2 may correspond to the arrangement position of the bridge 140.In some examples, the orthographic projection of an edge of the second linear slit G 2 on the substrate 101 is in the range of the orthographic projection of the bridge 140 on the substrate 101.It should be appreciated that the second linear slot G 2 may absorb the stress caused by the bridge 140 onto the first reflective layer 191, thereby reducing the risk of the first reflective layer 191 shrinking under the effect of stress, which results in the electrical elements (e.g., the electronic element 120, the first driver chip 103 or the bridge 140, etc.) falling off to improve the reliability of the baseplate 100.From the above, it can be seen that at least a portion of a side of a bridge 140 remote from the substrate 101 can reflect light. In some examples, a portion of a bridge 140 side remote from the substrate 101 exposed by the second linear slit G 2 may reflect light to reduce the influence of the bridge 140 on the brightness of the base 100, thereby improving the utilization level of the light incident on the portion on the base 100 where the bridge 140 is located and improving the brightness uniformity of the base 100.In other examples, the entire area on the side of the bridge 140 remote from the base plate 100 may reflect light, thereby improving reliability of light reflection of the bridge 140.In some examples, the ratio of a length of the second linear slot G 2 to the length of the longest side of the bridge 140 is in the range of 0.9 to 1.5.It should be appreciated that the ratio of a length of the second linear slot G 2 to the length of the longest side of the bridge 140 is the ratio of a length of the second linear slot G 2 to the length of the longest side of a bridge 140 whose orthogonal projection on the substrate 101 intersects the orthographic projection of an edge of the second linear slot G 2 on the substrate 101.As can be seen from the above, in some examples, the bridge 140 includes a conductive portion 147 and a first encapsulant 148, and the first encapsulant 148 covers the conductive portion 147. Here, the length of the longest side of the bridge 140 is the length of the longest side of the first encapsulant 148.In other examples, the bridge 140 includes only the conductive portion 147 and not the first encapsulant 148. In this case, the length of the longest side of the bridge 140 is the length of the longest side of the conductive portion 147.In some examples, the ratio of a length of the second linear slot G 2 to the length of the longest side of the bridge 140 may be in the range of 0.95 to 1.3, 1.0 to 1.25, or 1.1 to 1.15, etc. In some examples, the ratio of the length of the second linear slot G 2 to the length of the longest side of the bridge 140 may be 0.95, 1.0, 1.1, or 1.2, etc.It should be understood that setting the range of values of the ratio of the length of the second linear slit G 2 to the length of the longest side of the bridge 140 to 0.9 to 1.5 can reduce the absolute value of the difference between the length of the second linear slit G 2 and the length of the longest side of the bridge 140, thereby improving the stress absorption effect of the second linear slit G 2 and increasing the reliability of the base plate 100.In some examples, the length of the second linear slot G 2 is in the range of 1 mm to 35 mm, and the width of the second linear slot G 2 is in the range of 50 μm to 300 μm.In some examples, the length of the second linear slot G 2 may be in the range of 5 mm to 30 mm, 10 mm to 25 mm, or 15 mm to 20 mm, etc. In some examples, the length of the second linear slot G 2 may be 1.2 mm, 8 mm, or 12 mm, 18 mm, 22 mm, 25 mm, or 32 mm, etc.In some examples, the width of the second linear slit G 2 may be in the range of 100 μm to 250 μm, 120 μm to 220 μm, or 150 μm to 200 μm, etc. In some examples, the width of the second linear slot G 2 may be 80 μm, 120 μm, 220 μm, or 280 μm, etc.It is understood that the length of the second linear slot G 2 and the length of the first linear slot G 1 may be the same or different. The width of the second linear slit G 2 and the width of the first linear slit G 1 may be the same or different. The length and the width of the plurality of second linear slits G 2 may be the same or different.It is understood that setting the length and the width of the second linear slit G 2 to different values may meet different usage requirements and improve the reliability of the base plate 100.FIG. 9E is a cross-sectional view taken along the D 1-D 1 direction in FIG. 9D. FIG. 9F is a cross-sectional view taken along the D 2-D 2 direction in FIG. 9D. FIG. 9G is a structural diagram of a base plate according to still other embodiments.Note that in some examples, the first reflective layer 191 may cover the non-optical element 122, such that the non-optical element 122 is not illustrated in FIG. 9D. In other examples, referring to FIG. 9G, the first reflective layer 191 may also expose the non-optical element 122. Next, referring to FIGS. 9D to 9G, the positional relationship between the optical element 122, and the non-optical element 123 and the first reflective layer 191 is exemplified.In some examples, as shown in FIG. 9E, the electronic element 120 comprises an optical element 121; the base plate 100 further comprises a second encapsulant 192, wherein the second encapsulant 192 covers the optical element 121 and the material of the second encapsulant 192 is a light transmissive material.In some examples, the optical element 121 may be a light emitting device, such as a mini-LED, to emit light to the outside. In other examples, the optical element 121 may also be a photosensitive element, such as a photodiode or phototransistor, to convert a received optical signal into an electrical signal.As shown in FIG. 9E, the second encapsulant 192 covers the optical element 121, thereby packaging and protecting the optical element 121 and extending the lifetime of the optical element 121. Moreover, the material of the second encapsulant 192 is a light transmissive material, thereby reducing light blocking by the second encapsulant 192 and increasing the intensity of light that may pass through the second encapsulant 192.In this way, when the optical element 121 is a light emitting device (e.g., a mini-LED), the light emitted by the optical element 121 may pass through the second encapsulant 192 and be emitted outside the base plate 100. When the optical element 121 is a photosensitive element, external light may pass through the second encapsulant 192 and enter the optical element 121. That is, by the material of the second encapsulant 192 comprising a light transmissive material, the influence of the second encapsulant 192 on the optical element 121 may be reduced, thereby improving the reliability of the base plate 100.In some examples, the material of the second encapsulant 192 comprises transparent adhesives.In some examples, the second encapsulant 192 may be mushroom-shaped or nearly mushroom-shaped.In some examples, as shown in FIG. 9D, a first through hole M 1 is opened on the first reflective layer 191. An orthographic projection of the optical element 121 on the substrate 101 is located in a region surrounded by an orthographic projection of an edge of the first through hole M 1 on the substrate 101.Since the optical element 121 needs to emit light to the outside or receive light from the outside, it is understood that by providing the orthographic projection of the optical element 121 on the substrate 101 in a range surrounded by an orthographic projection of an edge of the first through hole M 1 on the substrate 101, the optical element 121 is made to be exposed through the first through hole M 1, thereby preventing the first reflective layer 191 from blocking the optical element 121, improving the optical performance of the base plate 100.In some examples, the orthographic projection of the second encapsulant 192 on the substrate 101 is also in the area surrounded by an orthographic projection of an edge of the first through hole M 1 on the substrate 101. In other words, the second encapsulant 192 may also be exposed through the first through hole M 1.In some examples, as shown in FIG. 9F, the electronic element 120 includes a non-optical element 122. The base plate 100 further comprises a third encapsulant 193 covering the non-optical element 122 and covered by the first reflective layer 191.It should be understood that the non-optical element 122 is an electronic element that does not need to emit light and does not need to receive external light. In some examples, the non-optical element 122 may be a driver IC (Integrated Circuit, Chinese Name: ) or a sensor, etc.As shown in FIG. 9F, the third encapsulant 193 covers the non-optical element 122, thereby packaging and protecting the non-optical element 122, and extending the lifetime of the non-optical element 122.In some examples, the material of the third encapsulant 193 may be a light transmissive material, for example transparent silicone. In other examples, the material of the third encapsulant 193 may also be a reflective material, for example white silicone. The embodiments of the present disclosure do not further limit the material of the third encapsulant 193.In some examples, as shown in FIGS. 9D and 9F, the first reflective layer 191 includes a second functional region Q 2 in which at least a portion of the orthographic projection of the non-optical element 122 is located on the substrate 101. On the first reflective layer 191, a plurality of third linear slits G 3 are opened, and each of the third linear slits G 3 passes through the first reflective layer 191 in a direction perpendicular to the substrate 101, and each of the third linear slits G 3 is located in the second function region Q 2. An orthographic projection of an edge of the third linear slit G 3 on the substrate 101 at least partially overlaps the orthographic projection of the non-optical element 122 on the substrate 101.It should be appreciated that the orthographic projection of the non-optical element 122 on the substrate 101 is within the range of the orthographic projection of the second functional region Q 2 on the substrate 101, which means that the non-optical element 122 may be located in the second functional region Q 2.In some examples, the number of second functional regions Q 2 is equal to the number of non-optical elements 122, so an orthographic projection of a non-optical element 122 on the substrate 101 is in the range of the orthographic projection of a second functional region Q 2 on the substrate 101. In other examples, the number of second functional regions Q 2 is less than the number of non-optical elements 122, so the orthographic projection of one or more non-optical elements 122 on the substrate 101 is in the range of the orthographic projection of a second functional region Q 2 on the substrate 101.It is understood that the non-optical element 122 is located on a side of the plurality of signal line groups 130 remote from the substrate 101, the third encapsulant 193 covers the non-optical element 122, and the first reflective layer 191 covers the third encapsulant 193, such that the non-optical element 122 and the third encapsulant 193 cause a voltage to the first reflective layer 191.Therefore, by each of the third linear slits G 3 passing through the first reflective layer 191 in a direction perpendicular to the substrate 101 and each of the third linear slits G 3 being located in the second functional region Q 2, an orthographic projection of an edge of the third linear slit G 3 on the substrate 101 at least partially overlaps the orthographic projection of the non-optical element 122 on the substrate 101, the third linear slit G 3 can absorb the stress of the first reflective layer 191 caused by the non-optical element 122 and the third encapsulant 193, thereby reducing the risk that the first reflective layer 191 shrinks under the action of stress, resulting in the electrical elements (e.g., the electronic element 120, the first driver chip 103, or the bridge 140, etc.) falling off, This is to improve the reliability of the base plate 100.In some examples, the orthographic projection of the edge of the third linear slit G 3 on the substrate 101 falls within the range of the orthographic projection of the non-optical element 122 on the substrate 101.In some examples, the number of the third linear slits G 3 located in the same second function region Q 2 may be one or more. In various second functional regions Q 2, the number of the third linear slits G 3 may be the same or different.In some examples, as shown in FIG. 9D, at least two third linear slits G 3 are located in the same second functional region Q 2, and the orthogonal projections of the edges of the at least two third linear slits G 3 located in the same second functional region Q 2 on the substrate 101 are arranged in an X shape.In some examples, the number of the third linear slits G 3 located in the same second functional region Q 2 is two, and the extension directions of the two third linear slits G 3 located in the same second functional region Q 2 intersect, so that the orthogonal projections of the edges of the two third linear slits G 3 located in the same second functional region Q 2 may be arranged on the substrate 101 in an X shape.In other examples, as shown in FIG. 9D, the number of the third linear slits G 3 located in the same second functional region Q 2 may be three or four. For example, when the number of the third linear slits G 3 located in the same second functional region Q 2 is three, two of the third linear slits G 3 extend in the same direction and are spaced apart from each other, and the other third linear slit G 3 is located between the two spaced apart third linear slits G 3 and an extending direction thereof intersects the extending direction of the two spaced apart third linear slits G 3, so that the orthogonal projections of the edges of the three third linear slits G 3 located in the same second functional region Q 2 may be arranged on the substrate 101 in an X shape.For example, when the number of the third linear slits G 3 located in the same second functional region Q 2 is four, two of the third linear slits G 3 extend in the same direction and are arranged spaced apart from each other, and the other two third linear slits G 3 also have the same extending direction and are arranged spaced apart from each other. And, the extending direction of the two third equal-extending linear slits G 3 intersects the extending direction of the other two third equal-extending linear slits G 3, so that the orthogonal projections of the edges of the four third linear slits G 3 located in the same second functional region Q 2 may be arranged on the substrate 101 in an X shape.In some examples, the number of third linear slits G 3 located in the same second functional region Q 2 may also be five, six, or more. The embodiments of the present disclosure do not further limit the number of the third linear slits G 3 located in the same second functional region Q 2.It is understood that by arranging the orthogonal projections of the edges of the at least two third linear slits G 3 located in the same second functional region Q 2 on the substrate 101 in an X shape, the absorption effect of the third linear slit G 3 for the stress of the first reflective layer 191 can be improved, thereby reducing the risk that the first reflective layer 191 shrinks under the action of stress, resulting in the electrical elements (e.g., the electronic element 120, the first driver chip 103, or the bridge 140, etc.) falling off to improve the reliability of the base plate 100.In other examples, as shown in FIG. 9G, the orthographic projection of the edges of the third linear slits G 3 located in the same second functional region Q 2 on the substrate 101 may also be arranged in a "cross" shape.In still other examples, the orthographic projection of the edges of the third linear slits G 3 located in the same second functional region Q 2 on the substrate 101 may also be arranged in a " "- shape.As can be seen from the above, in some examples, the first reflective layer 191 covers the third encapsulant 193. In other examples, as shown in FIG. 9G, a second through hole M 5 is opened on the first reflective layer 191. The second through hole M 5 passes through the first reflective layer 191 in a direction perpendicular to the substrate 101, and through this second through hole M 5, the third encapsulant 193 and the non-optical element 122 may be exposed, thereby preventing the third encapsulant 193 and the non-optical element 122 from causing stresses to the first reflective layer 191, reducing the risk that the first reflective layer 191 shrinks under the action of stress, resulting in the electrical elements (e.g., the electronic element 120, the first driver chip 103 or the bridge 140, etc.) falling off to improve the reliability of the base plate 100.In some examples, as shown in FIG. 9D, two third linear slits G 3 are located in the same second function region Q 2. The ratio of the length of the third linear slit G 3 to the maximum dimension of the non-optical element 122 is in the range of 0.9 to 2.5.It should be understood that the ratio of the length of the third linear slit G 3 to the maximum dimension of the non-optical element 122 is a ratio of the length of the third linear slit G 3 to the maximum dimension of a non-optical element 122, whose orthogonal projection on the substrate 101 intersects the orthographic projection of an edge of the third linear slit G 3 on the substrate 101.For example, if the shape of the orthographic projection of the non-optical element 122 on the substrate 101 is a square, rectangular, or other irregular polygon, the maximum dimension of the non-optical element 122 is the length of the diagonal of the orthographic projection of the non-optical element 122 on the substrate 101. If the shape of the orthographic projection of the non-optical element 122 on the substrate 101 is circular or approximately circular, the maximum dimension of the non-optical element 122 is the diameter of the orthographic projection of the non-optical element 122 on the substrate 101.In some examples, the lengths of the two third linear slots G 3 located in the same second functional region Q 2 are equal or approximately equal. In some examples, the ratio of the length of the third linear slit G 3 to the maximum dimension of the non-optical element 122 may also be in the range of 0.95 to 21 to 1.8, or 1.1 to 1.5, etc. For example, the ratio of the length of the third linear slit G 3 to the maximum dimension of the non-optical element 122 may be 0.95, 1.0, 1.5, or 2.2, etc.It is understood that setting the range of values of the ratio of the length of the third linear slit G 3 to the maximum dimension of the non-optical element 122 to 0.9 to 2.5 can reduce the absolute value of the difference between the length of the third linear slit G 3 and the maximum dimension of the non-optical element 122, thereby improving the absorption effect of the third linear slit G 3 for the stress of the first reflective layer 191 and increasing the reliability of the base plate 100.In some examples, the ratio of the length of the third linear slot G 3 to the maximum dimension of the third encapsulant 193 is in the range of 0.9 to 2.5.It is understood that the ratio of the length of the third linear slit G 3 to the maximum dimension of the third encapsulant 193 is a ratio of the length of the third linear slit G 3 to the maximum dimension of a third encapsulant 193 whose orthogonal projection on the substrate 101 intersects the orthographic projection of an edge of the third linear slit G 3 on the substrate 101.For example, if the shape of the orthographic projection of the third encapsulant 193 on the substrate 101 is a square, rectangular, or other irregular polygon, the maximum dimension of the third encapsulant 193 is the length of the diagonal of the orthographic projection of the third encapsulant 193 on the substrate 101. If the shape of the orthographic projection of the third encapsulant 193 on the substrate 101 is circular or approximately circular, the maximum dimension of the third encapsulant 193 is the diameter of the orthographic projection of the third encapsulant 193 on the substrate 101.In some examples, the lengths of the two third linear slots G 3 located in the same second functional region Q 2 are equal or approximately equal. In some examples, the ratio of the length of the third linear slot G 3 to the maximum dimension of the third encapsulant 193 may also be in the range of 0.95 to 21 to 1.8, or 1.1 to 1.5, etc. For example, the ratio of the length of the third linear slot G 3 to the maximum dimension of the third encapsulant 193 may be 0.95, 1.0, 1.5 or 2.2, etc.It is understood that setting the range of values of the ratio of the length of the third linear slit G 3 to the maximum dimension of the third encapsulant 193 to 0.9 to 2.5 may reduce the absolute value of the difference between the length of the third linear slit G 3 and the maximum dimension of the third encapsulant 193, thereby improving the absorption effect of the third linear slit G 3 for the stress of the first reflective layer 191 and increasing the reliability of the base plate 100.In some examples, a third through hole (not shown in figures) is opened on the first reflective layer 191. The base plate 100 further comprises a support structure. One end of the support structure is connected to the second reflective layer 194 via the third through hole, and the other end extends in a direction away from the substrate 101. For example, the direction of extension of the support structure extends perpendicular or approximately perpendicular to the substrate 101.It should be understood that the base plate 100 includes an optical film layer and a condenser lens for improving the light output rate of the base plate 100. The optical film layer and the converging lens are located on a side of the first reflecting layer 191 remote from the substrate 101. The support structure plays a role in supporting the optical film layer and the converging lens.In some examples, the support structure may be conical or frustoconical to improve support reliability.The above embodiments are only specific embodiments of the present disclosure, but the scope of the present disclosure is not limited thereto. Any changes or substitutions that would occur to those skilled in the art within the technical scope disclosed by the present disclosure should be covered within the scope of this disclosure. Therefore, the scope of the present disclosure should be subject to the scope of the claims.

Claims

A base plate having a plurality of edges, comprising a device area and at least one bonding area that is closer to any edge of the base plate than the device area, the base plate comprising: - a substrate; - a plurality of device groups located on a side of the substrate and in the device area, the plurality of device groups being arranged along a first direction and a second direction, respectively, wherein the first direction and the second direction intersect and the first direction and the second direction are parallel to the substrate, wherein a device group comprises at least one electronic element; a plurality of signal line groups located on the same side of the substrate as the plurality of device groups, a signal line group comprising a plurality of signal lines extending along the second direction and spaced apart along the first direction, each of the signal lines extending from the bonding area to the device area and electrically connected to a column of device groups located along the second direction; and a plurality of bridges located on the same side of the substrate as the plurality of device groups, at least one of the bridges being located in the device area, the bridge comprising a conductive portion; wherein at least two signal lines in at least one of the signal line groups are electrically connected to one another via the conductive section, and / or at least one signal line in at least one of the signal line groups comprises at least two subsections arranged at a distance along the second direction, wherein two adjacent subsections in the same signal line are electrically connected to one another via the conductive section; wherein at least one subsection on a side of each of the bridges remote from the substrate can reflect light.The base plate of claim 1, wherein at least a portion of a surface of the conductive portion remote from the substrate is capable of reflecting light.The base plate of claim 2, wherein the bridge further comprises a first encapsulant covering the conductive portion, wherein the material of the first encapsulant comprises at least one of a light transmissive material and a reflective material.The base plate of claim 1, wherein the bridge further comprises a first encapsulant covering the conductive portion, wherein at least a portion of a surface of the first encapsulant remote from the substrate may reflect light.The base plate according to any one of claims 1 to 4, wherein the conductive portion comprises: a main body, two joints each connected to two ends of the main body, wherein the maximum distance between a substrate-facing surface of the main body and the substrate is larger than the maximum distance between a substrate-facing surface of each of the joints and the substrate.The baseplate of claim 5, wherein a shape of an orthographic projection of the main body on the substrate is a first rectangle, wherein a length of the first rectangle is in the range of 0.5 mm to 25 mm and a width of the first rectangle is in the range of 0.2 mm to 3 mm; and / or wherein a shape of an orthographic projection of each of the joints on the substrate is a second rectangle, wherein a length of the second rectangle is in the range of 0.2 mm to 3 mm and a width of the second rectangle is in the range of 0.2 mm to 3 mm.The baseplate of claim 6, wherein the maximum distance between the substrate-facing surface of the main body and the substrate-facing surface of the joint is the first distance that is in the range of 0.1 mm to 0.8 mm; and / or wherein the maximum distance between the substrate-facing surface of the main body and the substrate-facing surface of the joint is the second distance that is in the range of 0.2 mm to 1 mm.The base plate according to any one of claims 1 to 7, further comprising a first reflective layer located on a side of the plurality of device groups, the plurality of signal line groups, and the plurality of bridges remote from the substrate; wherein the first reflective layer has a plurality of first functional regions, wherein an orthographic projection of the bridge on the substrate is in a region of an orthographic projection of the first functional region on the substrate; wherein a plurality of first linear slits are opened on the first reflective layer, each of the first linear slits passes through the first reflective layer in a direction perpendicular to the substrate, wherein the first functional region is formed by being arranged surrounding the plurality of spaced-apart first linear slits.Base plate according to Claim 8, wherein the ratio of an area of the orthographic projection of each of the bridges on the substrate to an area of the first functional region in which the orthographic projection of this bridge on the substrate is situated is in the range of values from 0.5 to 2.The base plate according to claim 8 or 9, wherein a length of the first linear slit is in the range of 1 mm to 5 mm, and a width of the first linear slit is in the range of 50 μm to 300 μm.The base plate of any one of claims 8 to 10, wherein on the first reflective layer, a plurality of second linear slits are opened, each of the second linear slits passes through the first reflective layer in a direction perpendicular to the substrate, and each of the second linear slits is located in the first functional region; wherein an orthographic projection of an edge of the second linear slit on the substrate at least partially overlaps the orthographic projection of the bridge on the substrate.The base plate of claim 11, wherein the ratio of a length of the second linear slot to the length of the longest side of the bridge is in the range of 0.9 to 1.5.The base plate according to claim 11 or 12, wherein the length of the second linear slit is in the range of 1 mm to 35 mm, and a width of the second linear slit is in the range of 50 μm to 300 μm.The base plate according to any one of claims 8 to 13, wherein the electronic element comprises an optical element, and the base plate further comprises a second encapsulant covering the optical element, wherein the material of the second encapsulant is a light transmissive material, wherein a first through hole is opened on the first reflective layer, wherein an orthographic projection of the optical element on the substrate is located in a region surrounded by an orthographic projection of an edge of the first through hole on the substrate.The base plate of any of claims 8 to 14, wherein the electronic element comprises a non-optical element, and the base plate further comprises a third encapsulant covering the non-optical element and covered by the first reflective layer.The base plate of claim 15, wherein the first reflective layer has a second functional region in which at least a portion of an orthographic projection of the non-optical element is located on the substrate, a plurality of third linear slits are opened on the first reflective layer, and each of the third linear slits passes through the first reflective layer in a direction perpendicular to the substrate, and each of the third linear slits is located in the second functional region, an orthographic projection of an edge of the third linear slit on the substrate at least partially overlaps the orthographic projection of the non-optical element on the substrate.The base plate of claim 16, wherein at least two of the third linear slits are located in the same second functional region, and the orthogonal projections of the edges of the at least two of the third linear slits located in the same second functional region are arranged on the substrate in an X shape.The base plate of claim 17, wherein two of the third linear slots are in the same second functional range, wherein the ratio of the length of the third linear slot to the maximum dimension of the non-optical element is in the range of 0.9 to 2.5; and / or wherein the ratio of the length of the third linear slot to the maximum dimension of the third encapsulant is in the range of 0.9 to 2.5.The base plate according to any one of claims 1 to 18, wherein the conductive portion is an SMD resistor or a conductive adhesive.An electronic device comprising a base plate according to any one of claims 1 to 19.

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