Semiconductor device and method for its manufacture

DE112023001095T5Pending Publication Date: 2024-12-19HITACHI LTD
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Patent Information

Application Number
DE112023001095
Authority / Receiving Office
DE · DE
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-09-05
Filing Date
2023-04-19
Publication Date
2024-12-19

AI Technical Summary

Technical Problem

Existing semiconductor devices with integrated temperature sensors face challenges in achieving accurate temperature detection while minimizing thermal resistance, as incorporating sensors within the chip reduces active area and increases heat generation, and external mounting can elevate thermal resistance and impair heat dissipation.

Method used

A semiconductor device design featuring a temperature sensor positioned between the semiconductor chip and sense terminals, covered with resin for insulation, and connected via conductive bonding materials, allowing for accurate temperature detection without compromising the chip's active area or increasing thermal resistance.

Benefits of technology

This configuration enhances temperature detection accuracy, reduces heat generation, and maintains effective heat dissipation, thereby improving the performance and reliability of the semiconductor device by minimizing thermal resistance.

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Abstract

To provide a semiconductor device that incorporates a highly accurate temperature sensing function while suppressing the need for increased heat resistance, a semiconductor device is used that includes: a semiconductor chip having a main surface covered with a first electrode and containing a semiconductor element; a main terminal bonded to a section of the first electrode by a conductive first bonding material and electrically connected to the semiconductor element;A plurality of sensing terminals, insulated from the main terminal and the first electrode, spaced apart from the main terminal in plan view and having a lesser thickness than the main terminal; a temperature sensor having a first surface connected to the respective surfaces of the plurality of sensing terminals on the semiconductor chip side by second bonding materials having conductivity; and a resin covering the surfaces of the respective sections of the main terminal, the plurality of sensing terminals, the first electrode, and the temperature sensor, covering a section of the first surface of the temperature sensor and positioned between the temperature sensor and the first electrode. Here, the temperature sensor and the plurality of sensing terminals overlap with the semiconductor chip in plan view.
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Description

Semiconductor device and manufacturing method thereof

[0001] The present invention relates to a semiconductor device including a power element and a method for manufacturing the same.

[0002] In recent years, power conversion devices using semiconductor devices (semiconductor modules) equipped with SiC (silicon carbide) power semiconductor chips have begun to be introduced onto the market. Wide bandgap power semiconductors, such as SiC, have lower conduction losses than conventional Si (silicon) power semiconductors, making it possible to fabricate compact semiconductor modules using small semiconductor chips. However, as chip size decreases, the heat dissipation area of ​​the chip also decreases, tending to increase thermal resistance. In addition, depending on the power conversion device, a chip temperature detection function may be required to protect against overheating, requiring more precise temperature management of the semiconductor module.

[0003] Patent document 1 (JP 2022-78954 A) describes a chip package having a chip with a chip temperature sensor at the end of its underside, and a carrier connected to the underside of the chip via a solder ball and with a carrier temperature sensor on the surface facing the chip temperature sensor.

[0004] Patent Document 2 (JP 2016-163535 A) describes a package that has a transistor equipped with a temperature sensor and a diode, and is cooled by a cooler supplied with a cooling medium. In this package, the transistor equipped with the temperature sensor is placed on the upper side to quickly detect a decrease in cooling function when the cooling medium decreases.

[0005] Patent Document 3 (JP 2016-115727 A) describes a method in which a first semiconductor chip equipped with a power semiconductor and another second semiconductor chip are stacked and joined together, and a heating detection circuit is provided on the top surface of the second semiconductor chip directly below the first semiconductor chip.

[0006] JP 2022-78954 A JP 2016-163535 A JP 2016-115727 A

[0007] As a temperature detection function for overheat protection, a method of forming a temperature sensor within a semiconductor chip has been proposed, as in Patent Document 1. However, when a temperature sensor is formed within a power semiconductor chip, the active area is reduced and loss increases, resulting in an increase in the amount of heat generated by the semiconductor chip. Furthermore, as in Patent Documents 2 and 3, methods of mounting a temperature sensor directly above or below the semiconductor chip have been proposed, but because no consideration is given to heat dissipation from the semiconductor chip, there is a concern that the thermal resistance of the semiconductor chip may increase significantly.

[0008] An object of the present invention is to provide a semiconductor device that has a highly accurate temperature detection function while suppressing an increase in thermal resistance.

[0009] Other objects and novel features will become apparent from the description of this specification and the accompanying drawings.

[0010] A brief summary of a representative embodiment of the present invention will be given below.

[0011] In one embodiment, the semiconductor device includes a semiconductor chip having a main surface covered with a first electrode and including a semiconductor element, a main terminal bonded to a portion of the first electrode via a conductive first bonding material and electrically connected to the semiconductor element, a plurality of sense terminals insulated from the main terminal and the first electrode, spaced apart from the main terminal in a plan view, and thinner than the main terminal, a temperature sensor having a first surface connected to a surface of each of the plurality of sense terminals facing the semiconductor chip via a conductive second bonding material, and a resin covering a portion of each of the main terminal, the plurality of sense terminals, the first electrode, and the temperature sensor, covering a portion of the first surface of the temperature sensor, and interposed between the temperature sensor and the first electrode. The temperature sensor and the plurality of sense terminals overlap the semiconductor chip in a plan view.

[0012] In one embodiment, a method for manufacturing a semiconductor device includes the steps of: (a) preparing a support, a semiconductor substrate including a conductor including a first protrusion formed on the support and a plurality of second protrusions each shorter than the first protrusion, a surface electrode covering a main surface, and a semiconductor element electrically connected to the surface electrode; and a temperature sensor; (b) bonding upper surfaces of the plurality of second protrusions to the temperature sensor via a conductive second bonding material; (c) bonding upper surfaces of the first protrusions to the surface electrode via the conductive first bonding material; (d) after steps (b) and (c), embedding a resin between the conductor and the semiconductor substrate and the surface electrode; and (e) after step (d), removing the support to expose a portion of the resin. The surface of the temperature sensor opposite the semiconductor substrate is covered with the second bonding material and the resin.

[0013] The effects obtained by the representative inventions disclosed in this application will be briefly explained as follows.

[0014] According to the present invention, it is possible to provide a semiconductor device that has a highly accurate temperature detection function while suppressing an increase in thermal resistance.

[0015] 13 is a plan view showing a semiconductor device according to a first embodiment. A cross-sectional view taken along line A-A in FIG. 1. A cross-sectional view illustrating a method for manufacturing a semiconductor device according to the first embodiment. A cross-sectional view illustrating a method for manufacturing a semiconductor device subsequent to FIG. 3. A cross-sectional view illustrating a method for manufacturing a semiconductor device subsequent to FIG. 4. A cross-sectional view illustrating a method for manufacturing a semiconductor device subsequent to FIG. 5. A cross-sectional view illustrating a method for manufacturing a semiconductor device subsequent to FIG. 6. A cross-sectional view showing a semiconductor device according to a first modification of the first embodiment. A cross-sectional view illustrating a method for manufacturing a semiconductor device subsequent to FIG. 9. A cross-sectional view illustrating a method for manufacturing a semiconductor device subsequent to FIG. 10. A cross-sectional view illustrating a method for manufacturing a semiconductor device subsequent to FIG. 11. A plan view showing a semiconductor device according to a second embodiment. A cross-sectional view taken along line B-B in FIG. 13. A cross-sectional view taken along line CC in FIG. 13. An enlarged cross-sectional view showing a portion of a semiconductor device according to a second embodiment. A plan view showing a temperature distribution in a semiconductor device. A cross-sectional view showing a semiconductor device according to a second modification of the second embodiment. A cross-sectional view showing a semiconductor device according to a second modification of the second embodiment.

[0016] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In all drawings for explaining the embodiments, components having the same functions are designated by the same reference numerals, and repeated explanations thereof will be omitted. Furthermore, in the following embodiments, explanations of identical or similar parts will not be repeated unless specifically required. Furthermore, in the drawings for explaining the embodiments, hatching may be used even in plan views or perspective views to make the configuration easier to understand. Furthermore, in the drawings for explaining the embodiments, hatching may be omitted in cross-sectional views to make the configuration easier to understand.

[0017] <Details of Room for Improvement> First, details of room for improvement regarding semiconductor devices equipped with temperature sensors will be described. Among semiconductor chips used in semiconductor modules, SiC power semiconductor chips using SiC (silicon carbide) substrates in particular can be made smaller in size than Si (silicon) power semiconductor chips. In this case, the heat dissipation area of ​​the semiconductor chip is also reduced, which may increase thermal resistance. Therefore, a temperature detection function for the semiconductor chip may be essential in some cases to protect the semiconductor chip from malfunction or destruction due to excessive temperature rise of the semiconductor chip.

[0018] In a semiconductor module capable of detecting the temperature of a semiconductor chip, it is conceivable to install a temperature sensor at a position distant from the semiconductor chip in the lateral direction (direction along the main surface of the semiconductor chip). However, in this case, there is room for improvement in that the accuracy of temperature detection is low.

[0019] Another approach is to form an element used as a temperature sensor on the semiconductor chip to detect the temperature of the semiconductor chip. This temperature sensor is, for example, a sense element having a structure similar to the main MOSFET (Metal Oxide Semiconductor Field Effect Transistor) provided on the semiconductor chip. However, in this case, providing the sense element on the semiconductor substrate reduces the active area (the main element formation area different from the sense element) and increases loss, resulting in a second room for improvement: an increase in the amount of heat generated by the semiconductor chip.

[0020] In addition, to detect the temperature of a semiconductor chip, it is possible to arrange a temperature sensor so that it overlaps the semiconductor chip in a direction perpendicular to the main surface of the semiconductor chip, i.e., directly above or below the semiconductor chip. In this case, the temperature sensor may be sandwiched between the semiconductor chip and another substrate, etc., which may increase the thermal resistance of the temperature sensor. Therefore, it is necessary to devise a way to improve the heat dissipation of the temperature sensor. In other words, if the semiconductor chip and the temperature sensor are overlapped, there is a third room for improvement: cooling performance may be reduced.

[0021] Thus, in semiconductor devices equipped with temperature sensors, there is room for improvement in terms of improving the accuracy of temperature detection by providing a temperature sensor, preventing an increase in the amount of heat generated by the semiconductor chip, and preventing an increase in the thermal resistance of the temperature sensor.

[0022] Therefore, in the embodiment of the present application, an effort is made to solve the above-mentioned room for improvement. The technical concept of the embodiment in which this effort is made will be described below.

[0023] First Embodiment A semiconductor device having a semiconductor chip and a temperature sensor will be described below with reference to the drawings.

[0024] <Structure of Semiconductor Device> The structure of a chip, which is a semiconductor device according to the first embodiment, will be described with reference to FIGS. 1 and 2. As shown in FIG. 1, the planar shape of chip 1 is rectangular. Chip 1 has a main surface (top surface) and a back surface (bottom surface) on the opposite side. In plan view, a main terminal (source pad) 5, a control terminal (gate pad, third main terminal) 6, and two sense terminals (sense pads) 7 and 8 are exposed on the main surface of chip 1. In plan view, resin 12 surrounding each of main terminal 5, control terminal 6, and sense terminals 7 and 8 is exposed. In plan view, sense terminals 7 and 8 are spaced apart from main terminal 5 and control terminal 6.

[0025] FIG. 2 shows a cross section taken along line A-A in FIG. 1 , i.e., a cross section including the main terminal 5 and the sense terminals 7 and 8. As shown in FIG. 2 , the chip 1 includes a semiconductor chip 2 having a main surface (top surface) and an opposite back surface (bottom surface). The main surface of the semiconductor chip 2 is covered with a first surface electrode 3 and a second surface electrode (not shown), and the back surface of the semiconductor chip 2 is covered with a back surface electrode 4. In FIG. 2 , the only electrode covering the main surface of the semiconductor chip 2 is the first surface electrode (source electrode, source wiring) 3. However, in reality, a second surface electrode (gate electrode, gate wiring) separate from the first surface electrode 3, which is not shown, also covers the main surface of the semiconductor chip 2. The second surface electrode is separated from the first surface electrode 3, and these electrodes are insulated from each other. The first surface electrode 3 and the second surface electrode are primarily made of, for example, Ni (nickel) or Al (aluminum), and the back surface electrode 4 is primarily made of, for example, Ti (titanium), Ni, or Au (gold). Each of the first surface electrode 3, the second surface electrode and the back surface electrode 4 may not be made of only one of the above-mentioned materials, but may be a laminated film composed of a layer of that material and another metal layer.

[0026] A main terminal 5 is formed directly above the first surface electrode 3 via a bonding material 10. The main terminal 5 is bonded to the first surface electrode 3 via the conductive bonding material 10. The main terminal 5 is electrically connected to the first surface electrode 3 via the bonding material 10. In a region not shown, a control terminal 6 is formed directly above the second surface electrode (gate electrode) and bonded via a bonding material. The control terminal 6 is electrically connected to the second surface electrode via the bonding material. The bonding material is made of, for example, solder or a conductive sintered material.

[0027] A temperature sensor (sense element) 9 is provided on the main surface of the semiconductor chip 2, spaced apart from the first surface electrode 3 and the second surface electrode. A portion of the upper surface of the temperature sensor 9 is connected to the surface (lower surface) of the sense terminal 7 facing the semiconductor chip 2 via a conductive bonding material 11. Another portion of the upper surface of the temperature sensor 9 is connected to the surface (lower surface) of the sense terminal 8 facing the semiconductor chip 2 via another bonding material 11. In other words, the temperature sensor 9 is electrically connected to each of the sense terminals 7 and 8 via the bonding material 11. The main terminal 5, the control terminal 6, and the sense terminals 7 and 8 are each made of, for example, Cu, W (tungsten), Al, or Mo (molybdenum). The bonding material 11 is made of, for example, solder, silver paste, or a conductive sintered material.

[0028] The main terminal 5, control terminal 6, and sense terminals 7 and 8 are spaced apart from one another. The height of the top surfaces of the main terminal 5, control terminal 6, and sense terminals 7 and 8 are the same. Here, height refers to the distance from the main surface of the semiconductor chip 2 in a direction perpendicular to the main surface of the semiconductor chip 2 (height direction, thickness direction, vertical direction). The main terminal 5, control terminal 6, and first surface electrode 3 are insulated from the sense terminals 7 and 8. The thickness of each of the temperature sensor 9 and sense terminals 7 and 8 is smaller than the thickness of each of the main terminal 5 and control terminal 6.

[0029] The main surface of the semiconductor chip, the top surface of the first surface electrode 3, and a portion of the top surface of the second surface electrode are covered with resin 12. Resin 12 covers the side surfaces of bonding materials 10 and 11, main terminal 5, control terminal 6, and sense terminals 7 and 8. Resin 12 covers a portion of the top surface, the entire side surfaces, and the entire bottom surface of temperature sensor 9. In other words, resin 12, which is an insulator, is interposed between first surface electrode 3 and temperature sensor 9 in the height direction. Of the top surface of first surface electrode 3, the surface exposed from bonding material 10 is covered with resin 12. Of the top surface of the second surface electrode, the surface exposed from the bonding material is covered with resin 12. The temperature sensor 9 and sense terminals 7 and 8 are located at the same height as the main terminal 5 and control terminal 6.

[0030] The semiconductor chip 2 has a semiconductor substrate. The semiconductor substrate is mainly made of, for example, Si (silicon), SiC (silicon carbide), GaN (gallium nitride), or Ga2O3 (gallium oxide). The semiconductor chip 2 has a semiconductor element. The semiconductor element has at least a portion of its components and a current path within the semiconductor substrate. Examples of the semiconductor element include a MOSFET and a diode. In this embodiment, a case where a MOSFET is formed on the semiconductor chip 2 will be described. A MOSFET is a vertical element having a source region and a gate electrode on the main surface side of the semiconductor substrate and a drain region on the back surface side of the semiconductor substrate. If the semiconductor element is only a diode, the control terminal 6 and the second surface electrode are not necessary.

[0031] Although not specifically shown, the semiconductor chip 2 has a semiconductor substrate, an interlayer insulating film on the semiconductor substrate, and a plurality of contact plugs penetrating the interlayer insulating film. The first surface electrode 3 is electrically connected to the source region of the MOSFET via the contact plug. That is, the main terminal 5 is electrically connected to the semiconductor element via the bonding material 10, the first surface electrode 3, and the contact plug. The second surface electrode is electrically connected to the gate electrode of the MOSFET via another contact plug. The back surface electrode 4 is a drain electrode electrically connected to the drain region of the MOSFET. If the semiconductor element is only a diode, for example, the first surface electrode 3 is an anode electrode and the back surface electrode 4 is a cathode electrode.

[0032] The temperature sensor 9 is made up of, for example, a thermistor, which is a two-terminal element. A thermistor is a temperature sensor that utilizes the change in resistance value when it senses heat. The temperature of the chip 1 can be detected by utilizing the thermistor's characteristic that the resistance value decreases as the temperature increases and increases as the temperature decreases. In this way, the temperature sensor 9 does not need to be an element that directly senses temperature, but can be an element that can indirectly sense temperature. Instead of a thermistor, the temperature sensor 9 may also be, for example, a strain sensor.

[0033] As shown in FIG. 1 , the main terminal 5 is a main current terminal having a larger area than the other control terminal 6 and sense terminals 7 and 8 in a plan view. In other words, when the chip 1 is operating, a larger current flows through the main terminal 5 than through the other control terminal 6 and sense terminals 7 and 8. As shown in FIGS. 1 and 2 , the temperature sensor 9 is located at the end of the chip 1 in a plan view, but it may be located anywhere on the chip 1 in a plan view. Furthermore, the number of temperature sensors 9 is not limited to one, and may be two or more. While the sense terminals 7 and 8 shown in FIG. 1 have different lengths, the lengths of the sense terminals 7 and 8 are not limited to this and can be freely changed. Although only one control terminal 6 is shown in FIG. 1 , the number of control terminals 6 may be two or more.

[0034] <Method for Manufacturing Semiconductor Device> Next, a method for manufacturing the semiconductor device according to this embodiment will be described with reference to FIGS.

[0035] First, as shown in Fig. 3 , a plate-shaped support 13 is prepared, having first convex portions, the main terminal 5 and the control terminal 6 (see Fig. 1 ), and second convex portions, the sense terminals 7 and 8, on the top thereof. The main terminal 5, the control terminal 6, and the sense terminals 7 and 8 are formed by processing a single conductor and are integrated with the support 13. The main terminal 5 and the control terminal 6 are convex portions that are higher from the top surface of the support than the sense terminals 7 and 8. In other words, the conductor including the main terminal 5, the control terminal 6, the sense terminals 7 and 8, and the support 13 has top surfaces at three different height levels: the top surfaces of the main terminal 5 and the control terminal 6, the top surfaces of the sense terminals 7 and 8, and the top surface of the support 13.

[0036] The conductor can be separated into multiple chips in a later process by cutting it. The conductor has multiple chip regions that will become chips in a later process, and a main terminal 5, a control terminal 6, and sense terminals 7 and 8 are formed in each chip region. The conductor is made of, for example, Cu, W, Al, or Mo.

[0037] Although not shown, a semiconductor wafer 2a is prepared which has a first surface electrode 3 (see FIG. 2) and a second surface electrode on its main surface and a back surface electrode 4 on its back surface. The semiconductor wafer 2a has a semiconductor substrate and a semiconductor element.

[0038] Next, as shown in Fig. 4, a temperature sensor 9 is connected to the upper surfaces of the sense terminals 7 and 8 so as to straddle these terminals. The temperature sensor 9 is connected to the sense terminals 7 and 8 by a bonding material 11. Next, the semiconductor wafer 2a is connected to the upper surfaces of the main terminal 5 and the control terminal 6 using a bonding material 10. Specifically, the main terminal 5 is connected via the bonding material 10 to a first surface electrode 3 formed in contact with the main surface of the semiconductor wafer 2a, and the control terminal 6 is connected via the bonding material to a second surface electrode (not shown) formed in contact with the main surface of the semiconductor wafer 2a. The support 13 and the temperature sensor 9 are spaced apart from the semiconductor wafer 2a.

[0039] 5, the space between the support 13 and the semiconductor wafer 2a is sealed by filling it with resin 12. At this time, the space between the temperature sensor 9 and the semiconductor wafer 2a is filled with resin 12, and the space between the temperature sensor 9 and the support 13 is also filled with resin 12.

[0040] Next, as shown in Figure 6, the support 13 and semiconductor wafer 2a bonded together are turned upside down. The support 13 is then ground to remove the entire support 13 and expose the resin 12. At this time, the sense terminals 7 and 8 and the resin 12 between them are left, so that the temperature sensor 9 is not exposed. In other words, the surface of the temperature sensor 9 opposite to the semiconductor wafer 2a side (semiconductor substrate side) is covered with the bonding material 11 and the resin 12.

[0041] Next, as shown in Figure 7, a dicing process is performed to cut the gaps between each chip region, thereby dividing the semiconductor wafer 2a into individual pieces. This results in multiple semiconductor chips 2. Note that the second surface electrodes and control terminals 6 are not shown in Figure 7. In this dicing process, the resin 12 is also cut. This allows the formation of chips 1 each having a semiconductor chip 2, a main terminal 5, a control terminal 6, sense terminals 7 and 8, and at least one temperature sensor 9.

[0042] 2 is disposed between the semiconductor chip 2 and the sense terminals 7 and 8 and covered with resin 12, enabling accurate temperature sensing while maintaining insulation between the semiconductor chip 2 and the temperature sensor 9. The temperature sensor 9 overlaps the semiconductor chip 2 in a plan view. In other words, the temperature sensor 9 is present within the chip area. This allows for highly accurate temperature detection. In other words, the first room for improvement, namely, low temperature detection accuracy, can be resolved.

[0043] Furthermore, by providing the temperature sensor 9 at a location separate from the semiconductor chip 2 rather than incorporating the temperature sensor in the semiconductor chip 2, a reduction in the active area of ​​the semiconductor chip 2 is prevented, and an increase in loss is prevented. This prevents an increase in the amount of heat generated by the semiconductor chip. This eliminates the second room for improvement, which is an increase in the amount of heat generated by the semiconductor chip due to a reduction in the active area of ​​the semiconductor chip.

[0044] Furthermore, since the sense terminals 7 and 8 exposed from the chip 1 are provided at positions overlapping the semiconductor chip 2 in a plan view, a decrease in the heat dissipation performance of the semiconductor chip 2 is prevented. Furthermore, only the bonding material 11 is interposed between the temperature sensor 9 and the sense terminals 7 and 8, and the heat dissipation path from the temperature sensor 9 is short. This prevents a decrease in the heat dissipation performance of the chip 1 due to the provision of the temperature sensor 9. This eliminates the third room for improvement, namely, a decrease in cooling performance when the semiconductor chip and the temperature sensor are overlapped. Furthermore, since the resin 12 is filled between the temperature sensor 9 and the semiconductor chip 2, discharge between the temperature sensor 9 and the semiconductor chip 2 is prevented.

[0045] Furthermore, as explained using Figures 3 to 7, since the temperature sensor 9 is installed in the WLP (Wafer Level Packaging) process, the temperature sensor 9 can be positioned with higher accuracy than in a method of providing a separate temperature sensor for the chip, and the increase in thermal resistance of the chip 1 can be minimized.

[0046] As described above, according to the present embodiment, it is possible to provide a semiconductor device having a highly accurate temperature detection function while suppressing an increase in thermal resistance, thereby improving the performance and reliability of the semiconductor device.

[0047] <Modification 1> The temperature sensor and the sense terminal may be disposed on the back surface side of the semiconductor chip 2. Fig. 8 shows a cross-sectional view of a chip 14 which is Modification 1 of the first embodiment.

[0048] As shown in FIG. 8 , in this modification, the main terminal 5a, bonding materials 10 and 11, resin 12, temperature sensor 9, and sense terminals 7 and 8 are formed on the back surface of the semiconductor chip 2, rather than on the main surface. The first surface electrode 3 is exposed to the outside of the chip 14 and forms a source pad, while the second surface electrode (not shown) is exposed to the outside of the chip 14 and forms a gate pad. Like the main terminal 5 shown in FIG. 2 , the main terminal 5a has a thickness greater than that of the temperature sensor 9 and sense terminals 7 and 8. The bottom surface of the main terminal 5a is exposed from the resin 12 and is located at the same height as the bottom surfaces of the sense terminals 7 and 8. The main terminal 5a is electrically connected to the back surface electrode 4 via bonding material 10 and serves as a drain pad. Here, the control terminal 6 (see FIG. 1 ) is not formed.

[0049] The underside of the temperature sensor 9 is covered with the bonding material 11 and the resin 12, and the temperature sensor 9 is not exposed from the outside of the chip 14. In other words, the main terminal 5a, the bonding materials 10 and 11, the resin 12, the temperature sensor 9, and the sense terminals 7 and 8 have a configuration that is similar to the main terminal 5, the bonding materials 10 and 11, the resin 12, the temperature sensor 9, and the sense terminals 7 and 8 shown in Figure 2, but turned upside down.

[0050] Even with the structure of this modified example, the same effects as those of the semiconductor device described with reference to FIGS. 1 and 2 can be obtained.

[0051] <Modification 2> In the manufacturing process of the semiconductor device of this embodiment, semiconductor chips that have been individually separated in advance by a dicing process or the like may be connected to main terminals or the like on the upper part of the support body. A manufacturing method of the semiconductor device of this modification will be described below with reference to FIGS.

[0052] First, a semiconductor wafer 2a including a conductor including a support 13 and a semiconductor element is prepared by performing the same process as in Fig. 3. Next, the semiconductor wafer 2a is diced to separate the semiconductor wafer 2a, thereby obtaining a plurality of semiconductor chips 2. Also, a temperature sensor 9 (see Fig. 9), such as a thermistor, is prepared.

[0053] Next, as shown in Fig. 9 , a temperature sensor 9 is connected to the upper surfaces of the sense terminals 7 and 8 so as to straddle these terminals. The temperature sensor 9 is connected to the sense terminals 7 and 8 by a bonding material 11. Next, the semiconductor chip 2 is connected to the upper surfaces of the main terminals 5 and the control terminals 6 (not shown) using a bonding material 10. Specifically, the main terminals 5 are connected via the bonding material 10 to a first surface electrode 3 formed in contact with the main surface of the semiconductor chip 2, and the control terminals 6 are connected via a bonding material to a second surface electrode (not shown) formed in contact with the main surface of the semiconductor chip 2. Note that the second surface electrode and the control terminals 6 are not shown in Fig. 9 .

[0054] 10, the space between the support 13 and the semiconductor chip 2 is filled with resin 12 to seal the space. At this time, the space between the temperature sensor 9 and the semiconductor chip 2 is filled with resin 12, and the space between the temperature sensor 9 and the support 13 is also filled with resin 12.

[0055] 11, the support 13 and the semiconductor chip 2 that are joined together are turned upside down. Then, the support 13 is ground to remove the entire support 13 and expose the resin 12.

[0056] 12 , a dicing process is performed to cut the resin 12 between the semiconductor chips 2, thereby obtaining a plurality of individual chips 15. This results in a plurality of semiconductor chips 2. As a result, a chip 15 having at least one semiconductor chip 2, one main terminal 5, one control terminal 6, one sense terminal 7, one 8, and one temperature sensor 9 is formed.

[0057] This modification provides the same effects as the semiconductor device described with reference to Figures 1 and 2. Furthermore, the manufacturing method of the semiconductor device of this modification can improve the yield of semiconductor devices. That is, it is conceivable that some of the chip regions arranged on a semiconductor wafer may be defective. In this case, if the semiconductor wafer is connected to the conductors to form chips without dicing, the chips including the main terminals and temperature sensors connected to the defective chip regions will naturally be defective, resulting in a decrease in chip yield.

[0058] In contrast, in this modification, the semiconductor wafer is diced to obtain the semiconductor chips 2 before connecting them to the conductors, so that defective semiconductor chips 2 can be eliminated before connecting the semiconductor chips 2 to the conductors. Therefore, chips 15 can be formed using normal semiconductor chips 2 without wasting the main terminals and temperature sensors, and the yield of chips 15 can be improved.

[0059] Second Embodiment <Structure of Semiconductor Device> The semiconductor device of this embodiment will be described below with reference to FIGS. 13 to 16. Differences from the first embodiment will be particularly described. As shown in FIG. 13, the planar shape of a chip 21 is rectangular. The chip 21 has a main surface (top surface) and a back surface (bottom surface) on the opposite side. In plan view, two main terminals (source pads) 5, a control terminal (gate pad, third main terminal) 6, a temperature sensor 9, and two sense terminals (sense pads) 7 and 8 are exposed on the main surface of the chip 21. In plan view, resin 12 surrounding each of the two main terminals 5 and the control terminal 6 is exposed. In plan view, both ends of the temperature sensor 9 are connected to the sense terminal 7 and the sense terminal 8, respectively. In plan view, the periphery of the pattern consisting of the temperature sensor 9 and the sense terminals 7 and 8 is covered with resin 12. The temperature sensor 9 and the sense terminals 7 and 8 are spaced apart from the main terminal 5 and the control terminal 6 in plan view.

[0060] Unlike the first embodiment, here, the top surface of the temperature sensor 9 is exposed from the exterior of the chip 21. That is, the top surface, which is a part of the temperature sensor, is exposed from the resins 12 and 17. Here, the temperature sensor 9 is located in the center of the chip 21 in a plan view.

[0061] Fig. 14 shows a cross section taken along line B-B in Fig. 13, i.e., a cross section including the main terminal 5, control terminal 6, and temperature sensor 9. Fig. 15 shows a cross section taken along line C-C in Fig. 13, i.e., a cross section including the main terminal 5 and sense terminals 7 and 8. As shown in Figs. 14 and 15, chip 21 has a semiconductor chip 2. The main surface of semiconductor chip 2 is covered with first surface electrode 3 and second surface electrode 3a (shown only in Fig. 14), and the back surface of semiconductor chip 2 is covered with back surface electrode 4.

[0062] A main terminal 5 is formed directly above the first surface electrode 3 with a bonding material 10 interposed therebetween. A control terminal 6 is also formed directly above the second surface electrode 3a with a bonding material interposed therebetween. Unlike the first embodiment, a groove-shaped recess 16 having a depth smaller than the thickness of the main terminal 5 is formed on the top surface of the main terminal 5, i.e., the surface opposite the semiconductor chip 2. The temperature sensor 9 and sense terminals 7 and 8 are formed within the recess 16 with a resin 17 interposed therebetween. In other words, within the recess 16, the resin 17 is interposed between the main terminal 5 and the temperature sensor 9, and between the sense terminals 7 and 8. That is, the temperature sensor 9, sense terminals 7 and 8, and the main terminal 5 are separated from each other and insulated from each other by the resin 17. The resin 17 is different from the resin 12, for example, and is formed in a separate process. The resin 17 covers the side and bottom surfaces of the temperature sensor 9 and sense terminals 7 and 8.

[0063] Here, the main terminal 5 is connected to the first surface electrode 3 via the bonding material 10 even directly below the temperature sensor 9 and the sense terminals 7 and 8. In other words, the main terminal 5 is bonded to the first surface electrode 3 via the bonding material 10 between the semiconductor chip 2 and the temperature sensor 9, the sense terminals 7 and 8, and the semiconductor chip 2 in a direction perpendicular to the main surface of the semiconductor chip 2. Therefore, the loss between the main terminal 5 and the first surface electrode 3 caused by providing the temperature sensor 9 and the sense terminals 7 and 8 can be reduced, and the heat dissipation performance of the chip 21 can be improved.

[0064] The sense terminals 7 and 8 sandwich the temperature sensor 9 in the direction along the main surface of the semiconductor chip 2. The side surfaces of the sense terminals 7 and 8 are connected to the side surfaces of the temperature sensor 9 via, for example, a bonding material (not shown). The sense terminals 7 and 8 may be connected to the temperature sensor 9 using a structure such as that shown in FIG. 16. That is, as shown in FIG. 16, the sense terminals 7 and 8 and the temperature sensor 9 may be connected in the vertical direction via a bonding material 11. In this case, the sense terminals 7 and 8 are thicker than the temperature sensor 9 and have protruding portions on their side surfaces, with the temperature sensor 9 being connected to the upper surface of these protruding portions.

[0065] The height of the upper surfaces of the main terminal 5, the control terminal 6, the temperature sensor 9, and the sense terminals 7 and 8 are the same. The thickness of each of the temperature sensor 9, the sense terminals 7 and 8 is smaller than the thickness of each of the main terminal 5 and the control terminal 6.

[0066] The plan view of Figure 17 shows the temperature distribution of a chip 31, which is a semiconductor device. This temperature distribution is based on the results of temperature calculations performed by the inventors when operating the chip 31 through thermal simulation. The chip 31 does not have the temperature sensor and sense terminal described in this embodiment and the first embodiment. In Figure 17, the outline of the control terminal 6 is shown with a dashed line. Furthermore, locations at predetermined temperatures are connected with solid lines, thereby separating multiple temperature ranges. In Figure 17, the central region 1A is a region above 170°C. Region 1B is a region between 160°C and 170°C. Region 1C is a region between 150°C and 160°C. Region 1D is a region below 150°C.

[0067] As shown in FIG. 17 , during operation of the chip 31, the temperature is highest near the center of the chip 31 in a planar view, while the periphery of the chip 31 is cooler than the center. Region 1A is particularly hot, making it the optimal location for detecting temperature changes in the chip 31. Therefore, it is desirable to provide the temperature sensor 9 within region 1A in a planar view. Specifically, in a planar view, the length X1 of one side of the square chip 31 is 5 mm, and the shortest length X2 of region 1A, which is the length passing through the center of the chip 31, is 1.9 mm. In other words, the shortest length X2 of region 1A is 38% of the length X1 of the side of the chip 31. In other words, a range from the center of the chip 31 to 19% of the length of one side of the chip 31 in a planar view overlaps with region 1A. By providing the temperature sensor within this range, more accurate temperature detection is possible. This applies not only to this embodiment but also to the first embodiment.

[0068] <Effects of this embodiment> In this embodiment, by arranging the temperature sensor on the outermost surface, the area where the semiconductor chip 2 (first surface electrode 3) and the main terminal 5 are bonded by the bonding material 10 is increased compared to the first embodiment. This makes it possible to reduce the thermal resistance of the chip 21 compared to the first embodiment.

[0069] <Modification> The temperature sensor and the sense terminal may be arranged on the back surface side of the semiconductor chip 2. Figures 18 and 19 show cross-sectional views of a chip 22 that is a modification of the second embodiment. Figures 18 and 19 are cross-sectional views at locations corresponding to Figures 14 and 15, respectively.

[0070] As shown in FIGS. 18 and 19 , in this modification, the main terminal 5a, bonding material 10, resin 12, temperature sensor 9, and sense terminals 7 and 8 are formed under the back surface of the semiconductor chip 2, rather than on the main surface. The first surface electrode 3 is exposed to the outside of the chip 14 and forms a source pad, while the second surface electrode 3a is exposed to the outside of the chip 14 and forms a gate pad. Like the main terminal 5 shown in FIG. 14 , the main terminal 5a has a thickness greater than that of the temperature sensor 9 and sense terminals 7 and 8. The bottom surface of the main terminal 5a is exposed from the resins 12 and 17 and is located at the same height as the bottom surfaces of the sense terminals 7 and 8. The main terminal 5a is electrically connected to the back surface electrode 4 via bonding material 10 and serves as a drain pad. Here, the control terminal 6 (see FIG. 14 ) is not formed.

[0071] The temperature sensor 9 is exposed from the outside of the chip 1. That is, the main terminal 5a, the bonding material 10, the resins 12 and 17, the temperature sensor 9, and the sense terminals 7 and 8 have a configuration that is similar to that of the main terminal 5, the bonding material 10, the resins 12 and 17, the temperature sensor 9, and the sense terminals 7 and 8 shown in FIG.

[0072] Even with the structure of this modified example, the same effects as those of the semiconductor device described with reference to FIGS. 13 to 16 can be obtained.

[0073] The invention made by the present inventors has been specifically described above based on the embodiments, but it goes without saying that the present invention is not limited to the above-described embodiments and can be modified in various ways without departing from the spirit of the invention.

[0074] For example, the materials and manufacturing conditions of each part are not limited to those described in the above embodiment, and it goes without saying that many variations are possible.

[0075] Furthermore, although we have described here a chip having a vertical semiconductor element in which current flows between the main surface side and the back surface side of the semiconductor chip, the semiconductor element may also be a horizontal semiconductor element in which current does not flow on the back surface side of the semiconductor chip.

[0076] The present invention can be widely used in semiconductor devices including power elements and in methods for manufacturing the same.

[0077] REFERENCE SIGNS LIST 1, 14, 15, 21, 22, 31 Chip 2 Semiconductor chip 2a Semiconductor wafer 3 First surface electrode 4 Back surface electrode 5 Main terminal 6 Control terminal 7, 8 Sense terminal 9 Temperature sensor 10, 11 Bonding material 12, 17 Resin 13 Support

Claims

1. A semiconductor device comprising: a semiconductor chip having a main surface covered with a first electrode and including a semiconductor element; a main terminal joined to a portion of the first electrode via a first bonding material having electrical conductivity and electrically connected to the semiconductor element; a plurality of sense terminals insulated from the main terminal and the first electrode, spaced apart from the main terminal in a planar view, and thinner than the main terminal; a temperature sensor having a first surface connected to a surface of each of the plurality of sense terminals facing the semiconductor chip via a second bonding material having electrical conductivity; and a resin covering a portion of each of the surfaces of the main terminal, the plurality of sense terminals, the first electrode, and the temperature sensor, covering a portion of the first surface of the temperature sensor, and interposed between the temperature sensor and the first electrode, wherein the temperature sensor and the plurality of sense terminals overlap the semiconductor chip in a planar view.

2. The semiconductor device according to claim 1, further comprising: a second electrode covering a back surface opposite to the main surface of the semiconductor chip; a third electrode covering the main surface of the semiconductor chip; and a control terminal bonded to the third electrode via a third bonding material having conductivity and electrically connected to the semiconductor element.

3. A semiconductor device according to claim 1, wherein the planar shape of the semiconductor device is rectangular, and the temperature sensor is provided within a distance of 19% of the length of one side of the semiconductor device from the center of the semiconductor device in a planar view.

4. The semiconductor device according to claim 1, wherein the temperature sensor is a thermistor or a strain sensor.

5. A semiconductor device comprising: a semiconductor chip having a main surface covered with a first electrode and including a semiconductor element; a main terminal bonded to a portion of the first electrode via a first bonding material having conductivity, having a recess on the surface opposite to the semiconductor chip side, and electrically connected to the semiconductor element; a plurality of sense terminals formed in the recess, insulated from the main terminal and the first electrode, spaced apart from the main terminal in a planar view, and thinner than the main terminal; a temperature sensor formed in the recess, positioned at the same height as the plurality of sense terminals, and electrically connected to the plurality of sense terminals; a first resin covering a portion of the surface of the main terminal and the first electrode; and a second resin interposed within the recess between the main terminal, the temperature sensor, and the plurality of sense terminals, wherein the temperature sensor and the plurality of sense terminals overlap the semiconductor chip in a planar view, and a portion of the temperature sensor is exposed externally.

6. A semiconductor device according to claim 5, further comprising: a second electrode covering a back surface opposite to the main surface of the semiconductor chip; a third electrode covering the main surface of the semiconductor chip; and a control terminal bonded to the third electrode via a second bonding material having conductivity and electrically connected to the semiconductor element.

7. A semiconductor device according to claim 5, wherein the main terminal is bonded to the first electrode via the first bonding material between the temperature sensor and the plurality of sense terminals and the semiconductor chip in a direction perpendicular to the main surface of the semiconductor chip.

8. A semiconductor device according to claim 5, wherein the semiconductor device is a first chip having a rectangular planar shape, and the temperature sensor is provided within a distance of 19% of the length of one side of the semiconductor device from the center of the first chip in a planar view.

9. A semiconductor device according to claim 5, wherein the temperature sensor is a thermistor or a strain sensor.

10. A method for manufacturing a semiconductor device, comprising: (a) preparing a support, a conductor including a first convex portion formed on the support and a plurality of second convex portions shorter in height than the first convex portions, a semiconductor substrate having a surface electrode covering a main surface and a semiconductor element electrically connected to the surface electrode, and a temperature sensor; (b) joining the upper surfaces of each of the plurality of second convex portions to the temperature sensor via a second conductive bonding material; (c) joining the upper surface of the first convex portion to the surface electrode via a first conductive bonding material; (d) after steps (b) and (c), embedding resin between the conductor and the semiconductor substrate and the surface electrode; and (e) after step (d), removing the support to expose a portion of the resin, wherein the surface of the temperature sensor opposite the semiconductor substrate is covered with the second bonding material and the resin.

11. A method for manufacturing a semiconductor device according to claim 10, wherein the first protrusion constitutes a main terminal, each of the plurality of second protrusions constitutes a sense terminal, the semiconductor substrate constitutes a semiconductor chip, and the temperature sensor and the plurality of sense terminals overlap the semiconductor chip in a planar view.

12. A method for manufacturing a semiconductor device according to claim 10, further comprising: (f1) after step (e), a step of cutting the semiconductor substrate and the resin to obtain a plurality of individual first chips, each of the plurality of first chips having the first convex portion, the plurality of second convex portions, the temperature sensor, the semiconductor substrate, the surface electrode, the first bonding material, and the second bonding material, and the semiconductor substrate prepared in step (a) constitutes a semiconductor wafer.

13. A method for manufacturing a semiconductor device according to claim 10, further comprising: (f2) after step (e), a step of cutting the resin to obtain a plurality of singulated first chips; wherein in step (a), the conductor, a semiconductor chip including the semiconductor substrate obtained by singulating a semiconductor wafer, and the temperature sensor are prepared; and each of the plurality of first chips has the first convex portion, the plurality of second convex portions, the temperature sensor, the semiconductor substrate, the surface electrode, the first bonding material, and the second bonding material.

Citation Information

Patent Citations

  • Semiconductor device

    JP2016115727A

  • Semiconductor module

    JP2016163535A

  • Chip package, electronic device and method (fatigue failure resistant electronic package)

    JP2022078954A