Coarse / fine counting architecture for VCO-ADC based on locked binary asynchronous counters
Patent Information
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- INFINEON TECHNOLOGIES AG
- Filing Date
- 2022-01-12
- Publication Date
- 2026-04-15
AI Technical Summary
Existing voltage-controlled-oscillator-based ADCs (VCO-ADCs) face challenges in achieving further improvements in performance and reducing power consumption, particularly in low-cost digital microphones, where the power consumption of the quantization circuitry is dominated by digital counting circuits.
A coarse-fine counting architecture for VCO-ADCs utilizing interlocked binary asynchronous counters, which includes a double asynchronous binary counter and samplers of ring oscillator output phases, reduces power consumption by eliminating the need for level shifters and minimizing hardware changes, while correcting metastability errors through a correction algorithm.
The proposed architecture significantly reduces power consumption and eliminates metastability issues, achieving improved performance characteristics by directly sampling RO phases with sense amplifiers and using a minimal number of level shifters, thus enhancing the efficiency of VCO-ADCs.