METHOD FOR PRODUCING A DOUBLE SEMICONDUCER-ON-INSULATOR STRUCTURE

Description

TECHNICAL FIELD

[0001] The invention relates to a method for manufacturing a double semiconductor-on-insulator type structure. STATE OF THE ART

[0002] Semiconductor-on-insulator (SeOI) structures are multilayer structures comprising a substrate, typically a semiconductor material such as silicon; an electrically insulating layer bonded to the substrate, usually an oxide layer such as silicon oxide; and a semiconductor layer bonded to the insulating layer, usually silicon. Such structures are called Semiconductor-on-Insulator (SeOI) structures, specifically Silicon-on-Insulator (SOI) when the semiconductor material is silicon. The oxide layer lies between the substrate and the semiconductor layer. This oxide layer is said to be "buried" and is referred to as the "BOX" layer. In the remainder of this text, the term "SOI" will be used generally to refer to semiconductor-on-insulator structures.

[0003] In addition to SOI structures comprising a BOX layer and a semiconductor layer arranged on the BOX layer, "double SOI" structures have been fabricated. "Double SOI" structures comprise a handle substrate, a first oxide layer or lower buried oxide layer arranged on the handle substrate, a first semiconductor layer or lower semiconductor layer arranged on the first oxide layer, a second oxide layer or upper buried oxide layer arranged on the first semiconductor layer, and a second semiconductor layer or upper semiconductor layer arranged on the second oxide layer.In this double SOI structure, the first oxide layer and the first semiconductor layer constitute the first SOI, arranged in a lower part of the structure, while the second oxide layer and the second semiconductor layer constitute the second SOI, arranged in an upper part of the structure.

[0004] A known process for fabricating a SOI structure is the Smart Cut™ process. The Smart Cut™ process involves implanting atomic species, such as hydrogen (H) and / or helium (He), to create a weakened zone within a donor substrate. The donor substrate is then bonded to the recipient substrate, and the donor substrate is detached at the weakened zone to transfer a thin layer of the donor substrate onto the recipient substrate. The donor and recipient substrates are preferably in the form of 300 mm diameter wafers. The donor substrate is a semiconductor substrate that has been surface-oxidized: the H and / or He atoms are implanted, through the oxide layer, to a specific depth within the core of the semiconductor material. The bonding occurs between the surface of the recipient substrate and the surface of the oxide layer of the donor substrate.

[0005] One proposed solution for obtaining a double SOI is to implement two successive Smart Cut™ processes. For the second Smart Cut™ process, the SOI obtained from the first Smart Cut™ process is used as the receiving substrate, and a second semiconductor substrate, previously surface-oxidized, is used as the donor substrate. In the final structure of the double SOI, the oxide and semiconductor layers of the first SOI obtained from the first Smart Cut™ process constitute the lower oxide and semiconductor layers, respectively. The oxide and semiconductor layers from the second donor substrate obtained from the second Smart Cut™ process constitute the upper oxide and semiconductor layers, respectively, of the resulting double SOI.

[0006] For a given depth of the embrittlement zone within a donor substrate, the thickness of the semiconductor layer to be transferred is limited by the thickness of the oxide layer present on the surface of the donor substrate. Indeed, the maximum thickness through which hydrogen and / or helium atoms can penetrate within the donor substrate covered by the oxide layer is determined by the maximum energy of the implantation device. This thickness depends on the thickness of the oxide layer traversed by the implanted atoms. It typically remains on the order of a few hundred nanometers of silicon. The "double Smart Cut™" process as described above therefore does not allow for large thicknesses for both the semiconductor and oxide layers.Double SeOI structures exhibiting significant thicknesses for both the oxide and semiconductor layers (for example, on the order of a few hundred nanometers each) are nevertheless structures of interest for certain applications, particularly in photonics.

[0007] Furthermore, the effectiveness of the bonding during the second Smart Cut™ process is dependent on the surface quality of the SOI serving as the receiving substrate. Surface treatments, such as heat treatments, can be applied prior to bonding the second donor substrate to, in particular, reduce the surface roughness of the receiving SOI. However, following such heat treatments, deformation of the wafer formed by the first SOI and / or the double SOI may be observed. The wafers are more susceptible to deformation as their diameter increases, particularly a diameter of 300 mm in preferred applications. Industrial equipment for the fabrication and processing of semiconductor wafers is designed to handle flat wafers.Furthermore, using a deformed plate as a receiving substrate for the second bonding with the second donor substrate can lead to the formation of defects during this second bonding, and therefore to poor bonding quality.

[0008] The relevant prior art is represented by documents US 2002 / 182827 A1, Maleville C ET AL: "Multiple SOI layers by multiple SMART-CUT transfers", 2000 IEEE International SOI conference proceedings. Wakefield, MA, Oct. 2 - 5, 2000; page 134 / 135, XP001003462, ISBN: 978-0-7803-6390-8 and US 7 160 753 B2, which describe methods for manufacturing multilayer semiconductor substrates on insulation, and documents US 2001 / 016401 A1 and US 2012 / 223419 A1, which describe methods for controlling the mechanical stresses of bonded structures. BRIEF DESCRIPTION OF THE INVENTION

[0009] One aim of the invention is to realize multilayer structures of the double semiconductor-on-insulator type such that the thicknesses of the semiconductor layers and the electrically insulating layers are sufficient for certain photonic applications.

[0010] Another objective of the invention is to limit the deformation of the plate following the possible implementation of heat treatments, in particular surface treatments, during the manufacturing process of said multilayer structure of the double semiconductor on insulator type.

[0011] To this end, the invention proposes a method for manufacturing a double semiconductor-on-insulator structure comprising successively, from a rear face to a front face of the structure: a support substrate, a first electrically insulating layer, a first monocrystalline semiconductor layer, a second electrically insulating layer and a second monocrystalline semiconductor layer, the method being characterized in that it comprises: a first step of forming an oxide layer on the front and back faces of the support substrate to form the first electrically insulating layer on the front face of the support substrate and an oxide layer on the back face of the support substrate, a first layer transfer step to transfer the first single-crystal semiconductor layer from a first donor substrate onto the first electrically insulating layer, so as to form a first semiconductor-on-insulator type substrate comprising successively from the back face to the front face of said first semiconductor-on-insulator substrate;the oxide layer, the supporting substrate, the first electrically insulating layer and the first single-crystal semiconductor layer, a second step of forming an oxide layer on the front face of the first semiconductor-on-insulator type substrate to form the second electrically insulating layer and thicken the oxide layer, a second layer transfer step to transfer the second single-crystal semiconductor layer from a second donor substrate onto the second electrically insulating layer, so as to form the double semiconductor-on-insulator type substrate; the oxide layer contributing to the preservation of the flatness of the support substrate during the first and second transfer stages.

[0012] Because the different layers of a double SOI structure have different coefficients of thermal expansion, such a structure can be subject to deformation. This deformation occurs particularly after the various heat treatments that may be applied to the structure, during its cooling. The formation of an oxide layer on the back face of the double SOI structure according to the invention advantageously achieves structural equilibrium, such that the effects of thermal expansion cancel each other out across the entire structure, thus significantly limiting its deformation.

[0013] According to other optional features of the invention, taken alone or in combination where technically feasible: The thickness of the first electrically insulating layer is between 100 nm and 3000 nm; in the final double semiconductor-on-insulator structure obtained, the thickness of the first monocrystalline semiconductor layer is between 50 nm and 500 nm; in the final double semiconductor-on-insulator structure obtained, the thickness of the second electrically insulating layer is between 100 nm and 1100 nm; in the final double semiconductor-on-insulator structure obtained, the thickness of the second monocrystalline semiconductor layer is between 50 nm and 500 nm.The step of transferring the first single-crystal semiconductor layer from a first donor substrate onto the first electrically insulating layer is implemented according to a process comprising successively the implantation of atomic species to create a zone of embrittlement within the first donor substrate delimiting the first single-crystal semiconductor layer, the bonding of the face of the first donor substrate of the first single-crystal semiconductor layer having undergone implantation onto the first electrically insulating layer, and the fracturing of the first donor substrate at the level of the zone of embrittlement; the remnant of the first donor substrate resulting from the fracture is used to form the second donor substrate.The process of transferring the first single-crystal semiconductor layer from a first donor substrate onto the first electrically insulating layer further comprises the oxidation of the surface of the first donor substrate prior to the implantation of atomic species within said first donor substrate, thereby forming a first protective oxide layer such that the atomic species are implanted through said first protective oxide layer; the first protective oxide layer formed on the surface of the first donor substrate is removed after the implantation of the atomic species and prior to the bonding of the first donor substrate onto the first electrically insulating layer.The transfer step of the second single-crystal semiconductor layer from a second donor substrate onto the second electrically insulating layer is implemented according to a process comprising successively the implantation of atomic species to create a weakening zone within the second donor substrate delimiting the second single-crystal semiconductor layer, the bonding of the face of said second donor substrate of the second single-crystal semiconductor layer having undergone implantation onto the second electrically insulating layer, and the fracturing of the second donor substrate at the level of the weakening zone. The process of transferring the second single-crystal semiconductor layer from a second donor substrate onto the second electrically insulating layer further comprises the oxidation of the surface of the second donor substrate prior to the implantation of atomic species within said second donor substrate.thus forming a second protective oxide layer so that the atomic species are implanted through said second protective oxide layer. The second protective oxide layer formed on the surface of the second donor substrate is removed after the implantation of the atomic species and prior to the bonding of the second donor substrate to the second electrically insulating layer. The process further comprises a step of implementing a surface treatment process for the first semiconductor-on-insulator substrate prior to the second step of forming an oxide layer on the surface of this first semiconductor-on-insulator substrate. The surface treatment process is characterized by: a first rapid thermal annealing step, a second thermal oxidation step followed by deoxidation, and a third long-duration heat treatment step or a third rapid thermal annealing step.Long-term heat treatment and rapid thermal annealing are carried out at a temperature exceeding 1000 °C in a non-oxidizing atmosphere, followed by a fourth stage of chemical-mechanical polishing. The support substrate and each donor substrate are in the form of a 300 mm diameter plate. BRIEF DESCRIPTION OF THE FIGURES

[0014] Other features and advantages of the invention will become apparent from the detailed description that follows, with reference to the attached drawings, in which: there figure 1 represents a cross-sectional view of a supporting substrate; the figure 2 represents a cross-sectional view of the substrate support after a first oxidation step of the front and back faces of the substrate support; the figure 3 represents a cross-sectional view of an initial layer transfer by a first donor substrate onto the front face of the support substrate; the figure 4represents a cross-sectional view of the intermediate structure obtained after bonding the first donor substrate; the figure 5 represents a cross-sectional view of the semiconductor-on-insulator intermediate structure obtained following the first layer transfer; the figure 6 represents a cross-sectional view of the intermediate structure obtained after a second oxidation step on the front and back faces of the semiconductor-on-insulator substrate. figure 5 ; there figure 7 represents a cross-sectional view of a second layer transfer by a second donor substrate onto the front face of the intermediate structure of the figure 6 ; there figure 8 represents a cross-sectional view of the structure obtained after bonding the second donor substrate; the figure 9 represents the final double semiconductor-on-insulator structure obtained following the second layer transfer.

[0015] For readability reasons, the drawings are not necessarily to scale. DETAILED DESCRIPTION OF IMPLEMENTATION METHODS

[0016] The invention proposes a method for manufacturing a double substrate semiconductor-on-insulator structure comprising, from the back face to the front face, a support substrate, a first buried oxide layer corresponding to a first electrically insulating layer, a first single-crystal semiconductor layer, a second buried oxide layer corresponding to a second electrically insulating layer and a second single-crystal semiconductor layer.

[0017] The first electrically insulating layer and the first single-crystal semiconductor layer together form a first semiconductor-on-insulator (SOI) structure called the lower SOI structure. The second electrically insulating layer and the second single-crystal semiconductor layer together form a second semiconductor-on-insulator (SOI) structure called the upper SOI structure. Furthermore, the substrate advantageously comprises, on its rear face, an oxide layer that limits deformation of the substrate during the implementation of the process that is the subject of the invention.

[0018] The sum of the thicknesses of the layers constituting the double-substrate semiconductor-on-insulator structure obtained by the process of the invention is high. In particular: The thickness of the first electrically insulating layer is preferably greater than 100 nm, the thickness of the first single-crystal semiconductor layer is preferably greater than 50 nm and less than 500 nm, the thickness of the second electrically insulating layer is preferably greater than 100 nm and less than 1100 nm, the thickness of the second single-crystal semiconductor layer is preferably greater than 50 nm and less than 500 nm,

[0019] In the context of a photonics application for example, such layer thicknesses make it possible to create passive photonic components (such as a waveguide) or active ones (such as a resonator).

[0020] Such thicknesses are unattainable using the conventional Smart Cut™ process, in which the single-crystal semiconductor layer is delimited by implanting atomic species into a donor substrate covered with an oxide layer designed to form the electrically insulating layer in the SOI structure. This is because industrial implantation devices have a maximum energy that prevents hydrogen and / or helium atoms from penetrating such a significant thickness of both the oxide layer and the single-crystal semiconductor layer. First oxidation stage

[0021] With reference to the figure 1 ,Initially, a support substrate 1 is provided. The support substrate 1 is in the form of a plate of a semiconductor material, preferably a plate 300 mm in diameter and 775 µm thick. The support substrate 1 is, for example, a silicon plate, preferably a silicon plate with high resistivity and a high interstitial oxygen content (Oi), commonly called an "HR substrate" or "high Oi substrate" according to Anglo-Saxon terminology.

[0022] In a first stage represented on the figure 2 , we oxidize the front and rear faces of substrate 1, as well as the edges of said substrate 1.

[0023] During oxidation on the front side, the support substrate 1 is partially consumed to form the first electrically insulating oxide layer 1b. For example, if the support substrate is a silicon substrate, the first electrically insulating oxide layer 1b is therefore a silicon oxide layer. The oxidation conditions are controlled to obtain the first electrically insulating oxide layer 1b with the desired thickness.

[0024] Such an oxidation operation can for example be carried out by heating the support substrate 1 to a temperature between 800°C and 1100°C under an oxidizing atmosphere for a few minutes to several hours to obtain a high thickness of the first electrically insulating oxide layer 1b between 100nm and 3000nm.

[0025] Simultaneous oxidation of the back face advantageously leads to the formation of an oxide layer 1a on the back face of the substrate, which has approximately the same thickness as the oxide layer 1b formed on the front face. The oxide layer 1a has a lower coefficient of thermal expansion than the unoxidized substrate 1. In subsequent stages of the process, particularly after heat treatments, the presence of the oxide layer 1a on the back face of the substrate 1 limits the deformation of said substrate 1 and thus improves the quality of the subsequent bonding of new layers to the front face of the structure.

[0026] The thickness of the oxide layer 1a obtained under the oxidation conditions described above is identical to the thickness of the first electrically insulating layer 1b. During any subsequent heat treatments and the cooling periods following said treatments, such a thickness of the oxide layer 1a makes it possible to balance the effects of thermal expansion undergone by the whole structure and thus to avoid deformation of said structure. First layer transfer step

[0027] With reference to the figure 3 , A first donor substrate is provided for a first single-crystal semiconductor layer 2. The first donor substrate is a single-crystal semiconductor substrate, for example, a single-crystal silicon substrate. The first donor substrate is in the form of a plate with the same diameter as the support substrate 1 and a thickness between 670 µm and 775 µm.

[0028] According to one embodiment, a first layer transfer is carried out using the Smart Cut™ process. A weakened zone is formed in the first donor substrate (dotted lines on the figure 3 ), in order to delimit the first semiconductor layer 2. The embrittlement zone is formed in the donor substrate at a predetermined depth that corresponds approximately to the thickness of the semiconductor layer 2 to be transferred. Preferably, the embrittlement zone is created by implanting hydrogen and / or helium ions into the semiconductor layer donor substrate.

[0029] Since the first electrically insulating layer 1b was formed from the receiving substrate, which is the support substrate 1, and not from the first donor substrate, the thickness of the first transferred semiconductor layer 2 is limited only by the maximum energy of the implantation device, which is on the order of 100 keV. Such a maximum implantation energy corresponds to a maximum thickness of the first transferred semiconductor layer 2 of approximately 600 nm, depending on the implanted species. The invention therefore makes it possible to transfer a first semiconductor layer 2 of considerable thickness while also having a first electrically insulating layer 1b of considerable thickness.

[0030] With reference to the figure 4 ,The first semiconductor layer 2 is then transferred by gluing the face of the first donor substrate that has undergone implantation onto the first electrically insulating oxide layer 1b and detaching the remaining part of the donor substrate along the embrittlement zone (see figure 5 ). Detachment along the embrittlement zone can be triggered by mechanical action and / or the application of thermal energy. During the first layer transfer stage, at least part of the oxide layer on the back side of the substrate is retained, thus limiting problems related to plate deformation.

[0031] Prior to the implantation of atomic species within the first donor substrate, the surface of the first donor substrate can optionally be oxidized to a very thin thickness, for example, between 20 and 30 nm. Indeed, the implantation of atomic species within the first donor substrate is more effective if it is carried out through this very thin oxide layer, which is an amorphous phase, rather than directly within the single-crystal material. Furthermore, the very thin oxide layer provides protection for the first semiconducting layer 2 during atomic implantation. In this case, the very thin oxide layer on the surface of the first donor substrate is removed after the implantation of the atomic species and before the first donor substrate is bonded to the first electrically insulating layer 1b.

[0032] Oxidation of the surface of the first donor substrate over a very thin layer can be carried out at a temperature between 800°C and 1000°C for a few minutes to a few tens of minutes under an oxidizing atmosphere.

[0033] As an alternative to the Smart Cut™ process described above, the first layer transfer can be achieved by thinning the donor substrate on its opposite side to the side bonded to the support substrate, until the desired thickness for the first semiconductor layer is obtained.

[0034] Following the first layer transfer, with reference to the figure 5 ,A first semiconductor-on-insulator substrate is obtained, comprising the first electrically insulating layer 1b and the first single-crystal semiconductor layer 2. This semiconductor-on-insulator substrate exhibits a surface roughness that depends on the layer transfer process used. To ensure good bonding quality and limit the formation of holes during the bonding of the second donor layer substrate described below, various treatments can be applied to the free surface of the first single-crystal semiconductor layer 2 to reduce its roughness and defects. These treatments include, for example, heat smoothing, sacrificial oxidation, and / or cleaning. This surface treatment improves the quality of the subsequent bonding with the second donor substrate during the second layer transfer step.

[0035] At the end of the heat treatments and when the structure returns to thermal equilibrium (for example, room temperature), the existence of the oxide layer 1a (having a predefined thickness) makes it possible to preserve a structural equilibrium, the flatness of the substrate and therefore the quality of the bonding of the second donor substrate. Second oxidation stage

[0036] The front and back faces of the first semiconductor-on-insulator substrate are then oxidized, as seen in the figure 6 .

[0037] Oxidation on the front face leads to partial consumption of the first single-crystal semiconductor layer 2, thus reducing the thickness of the previously transferred single-crystal semiconductor layer 2, and to the formation of the second electrically insulating layer 2b. For example, if the first donor substrate is a silicon substrate, the second electrically insulating oxide layer 2b is therefore a silicon oxide layer.

[0038] Oxidation on the back face leads to an increase in the thickness of the initial oxide layer 1a.

[0039] The second oxidation step can for example be carried out by annealing the semiconductor-on-insulator structure obtained following the first layer transfer at a temperature between 800°C and 1100°C under an oxidizing atmosphere for a few minutes to a few hours to obtain a thickness of the second electrically insulating oxide layer 2b between 100 nm and 1100 nm.

[0040] The thickness of the first semiconductor layer 2 in the final structure is essentially the thickness of the first transferred semiconductor layer 2 minus the thickness of the semiconductor layer 2 consumed to form the second electrically insulating layer 2b. The maximum thickness of the first semiconductor layer 2 at the time of transfer is limited only by the implantation method; it is generally less than 2 µm, and preferably around 600 nm. The thickness of the first semiconductor layer 2 in the final structure can therefore preferably be between 50 nm and 1 µm, and even more preferably between 50 and 500 nm.

[0041] For example, if the thickness of the first transferred semiconductor layer 2 is 600 nm, the surface treatments to improve the surface quality of said first semiconductor layer 2 consume approximately 100 nm of the semiconductor material. The second oxidation step can then consume 450 nm of semiconductor material, leaving a first semiconductor layer 2 with a thickness of 50 nm and forming a second electrically insulating layer 2b with a thickness of approximately 1000 nm.

[0042] Prior to the second layer transfer, it is advantageous to implement a mechano-chemical cleaning and / or polishing of the free surface of the second electrically insulating layer 2b. Second layer transfer stage

[0043] Furthermore, with reference to the figure 7 ,A second donor substrate is provided for a second single-crystal semiconductor layer 3. Like the first donor substrate, the second donor substrate is a single-crystal semiconductor substrate, for example, a single-crystal silicon substrate. The second donor substrate is in the form of a plate with the same diameter as the support substrate 1 and the first donor substrate. Optionally, the leftover material from the first donor substrate can be recycled to form the second donor substrate. For this purpose, the leftover material from the first donor substrate is treated to remove defects related to implantation and detachment, and to give it a surface finish compatible with re-bonding.

[0044] According to one embodiment, the second layer transfer is performed using the Smart Cut™ process. A weakening zone is formed in this second donor substrate, delimiting the second single-crystal semiconductor layer 3 (see dotted lines on the figure 7 ). The weakening zone can be formed in the same way as for delimiting the first single-crystal semiconductor layer 2 within the first donor substrate. With reference to the figure 8 , The second single-crystal semiconductor layer 3 is then transferred by bonding the face of the second donor substrate that has undergone implantation onto the second electrically insulating layer 2b. With reference to the figure 9 , The remaining portion of the second donor substrate is eliminated by fracturing it along the area of ​​weakening.

[0045] Prior to the formation of the embrittlement zone within the second donor substrate, the surface of the second donor substrate can optionally be oxidized to a very thin thickness, for example, between 20 and 30 nm. The very thin oxide layer on the surface of the second donor substrate is preferably removed after the embrittlement zone has formed and before the second donor substrate is bonded to the second electrically insulating layer 2b.

[0046] Just as with the first donor substrate, the oxidation of the surface of the second donor substrate over a very thin layer can be carried out at a temperature between 800 °C and 1000 °C for a few minutes to a few tens of minutes under an oxidizing atmosphere.

[0047] Alternatively, the second layer transfer can be achieved by thinning the second donor substrate on its opposite side to the side bonded to the second electrically insulating layer 2b until the desired thickness for the second semiconducting layer 3 is obtained.

[0048] During the second layer transfer stage, at least part of the oxide layer on the back face of the support substrate is retained, so as to limit problems related to plate deformation.

[0049] Following the second layer transfer, a second semiconductor-on-insulator type structure is obtained, comprising the second electrically insulating layer 2b and the second single-crystal semiconductor layer 3, which constitutes the upper semiconductor-on-insulator type structure of the final double semiconductor-on-insulator type structure (see figure 9 ).

[0050] Since the second electrically insulating layer 2b was formed from a second receiving substrate consisting of the first semiconductor-on-insulator substrate oxidized on its front face, and not from the second donor substrate, the thickness of the transferred second semiconductor layer 3 is limited only by the maximum energy of the implantation process. Such a maximum implantation energy corresponds to a thickness of the second semiconductor layer 3 on the order of 600 nm, depending on the implanted species. The invention therefore also makes it possible to obtain a second semiconductor layer 3 of considerable thickness while also having a second electrically insulating layer 2b of considerable thickness.

[0051] Optionally, various treatments can be applied to the free surface of the second semiconductor layer 3, for example, to adjust the thickness of said layer or to improve the quality of said free surface for possible subsequent functionalizations. In the case of thermal treatments, the oxide layer 1a on the back face of the support substrate 1 advantageously limits the deformation of the double semiconductor-on-insulator structure. Optional surface treatments

[0052] Optionally, the free surface of the first semiconductor layer 2 can be treated before the oxidation step leading to the formation of the second electrically insulating layer 2b to reduce its roughness and defects. Reducing the roughness and defects of the surface of the first semiconductor layer 2 allows for the generation of a second electrically insulating layer 2b whose surface also exhibits characteristics compatible with subsequent high-quality bonding, namely low roughness and low defects. Alternatively or additionally, the free surface of the second electrically insulating layer 2b can be treated before the second layer transfer, for example, by chemical polishing and / or cleaning.These surface treatments improve the bonding of the second single-crystal semiconductor layer 3 by limiting in particular the formation of holes and other defects.

[0053] The treatment of the free surface of the first semiconductor layer 2 before the second oxidation step, and / or of the second electrically insulating layer 2b before the second layer transfer step, may itself involve the implementation of a multi-step process. An example of a process preferentially used for treating the free surface of the first single-crystal semiconductor layer 2 (before the formation of the oxide layer 2b) comprises the following successive steps: (E1) a rapid thermal anneal, (E2) an oxidation / deoxidation sequence, (E3) a long-duration thermal anneal, known to those skilled in the art by its English name "batch anneau", (E4) a mechano-chemical polishing. Alternatively, the long-duration thermal annealing step (E3) is replaced by a rapid thermal annealing step (E3'). Alternatively again, steps (E1), (E2) and (E3 / E3') of said process are carried out on the free surface of the first single-crystal semiconductor layer 2 and step (E4) can be carried out before and after the second oxidation step (to form the oxide layer 2b), respectively on the surface of the first single-crystal semiconductor layer 2 and on the surface of the second electrically insulating layer 2b.

[0054] Rapid thermal annealing (RTA) refers to annealing for a duration of a few seconds to a few tens of seconds, under a controlled atmosphere. This type of annealing is commonly referred to as RTA. Rapid thermal annealing (E1) is performed at a temperature between 1100°C and 1250°C for a few seconds to approximately one hundred seconds. RTA is carried out in an atmosphere containing a mixture of hydrogen and / or argon.

[0055] The oxidation / deoxidation step (E2) should be understood as a sequence comprising the following successive operations: a thermal oxidation operation (E2a), a deoxidation operation (E2b). The oxidation operation (E2a) can, for example, be carried out by heating the structure to a temperature between 800°C and 1100°C for a few minutes to a few hours under an oxidizing atmosphere. The deoxidation operation (E2b) can, for example, be carried out by exposing the front face of the structure to a hydrofluoric acid (HF) solution for a few seconds to a few minutes to remove the oxide layer formed on the front face, without removing the oxide layer present on the back face of the structure. This oxidation / deoxidation step allows the thickness of the semiconductor layer to be adjusted by consuming a surface portion of the silicon through oxidation.

[0056] Long-duration thermal annealing, also known as "batch annealing," refers to thermal annealing lasting from a few minutes to a few hours, generally exceeding 15 minutes, and is advantageously carried out in a controlled atmosphere furnace. Furnace annealing (E3) is performed at a temperature between 1050°C and 1250°C. Furthermore, furnace annealing (E3) can be conducted, for example, under an inert atmosphere, such as argon.

[0057] During chemical-mechanical polishing (CMP), the surface to be polished is modified using a chemical agent, for example, a suspension of colloidal silica particles in a liquid base, and the modified surface is removed by mechanical abrasion. The rotational speed and pressure used during step (E4) of CMP are optimized to uniformly remove material from the surface of the first semiconducting layer 2 or the second electrically insulating layer 2b, without degrading the condition of the surface, in particular without increasing its roughness.

[0058] Alternatively, rapid thermal annealing (E3') is carried out at a temperature between 1100°C and 1250°C for a few seconds to a hundred seconds, for example under an atmosphere comprising a mixture of hydrogen and / or argon.

[0059] Optionally, the free surface of the second semiconductor layer 3 can also be treated or functionalized depending on the intended application.

[0060] During these different surface treatment stages, particularly during the heat treatment stages, the oxide layer 1a very advantageously limits the deformation of the plate.

Claims

1. Method for manufacturing a double semiconductor-on-insulator structure comprising, in succession from the rear face to the front face of the structure: a support substrate (1), a first electrically insulating layer (1b), a first monocrystalline semiconductor layer (2), a second electrically insulating layer (2b), and a second monocrystalline semiconductor layer (3), the method being characterized in that it comprises: - a first step of forming an oxide layer on the front and rear faces of the support substrate (1) to form the first electrically insulating layer (1b) on the front face of the support substrate and an oxide layer (1a) on the rear face of the support substrate, - a first layer transfer step for transferring the first single-crystal semiconductor layer (2) from a first donor substrate onto the first electrically insulating layer (1b), so as to form a first semiconductor-on-insulator substrate, which successively comprise, from the rear face to the front face of said first semiconductor-on-insulator substrate: the oxide layer (1a), the support substrate (1), the first electrically insulating layer (1b) and the first monocrystalline semiconductor layer (2), - a second step of forming an oxide layer on the front side of the first semiconductor-on-insulator substrate to form the second electrically insulating layer (2b) and thicken the oxide layer (1a) on the rear side of the support substrate, - a second layer transfer step for transferring the second single-crystal semiconductor layer (3) from a second donor substrate onto the second electrically insulating layer (2b), so as to form the double semiconductor-on-insulator substrate, the oxide layer (1a) on the rear face of the support substrate contributing to the preservation of the flatness of the support substrate during the first and second transfer steps.

2. Method according to claim 1, wherein the thickness of the first electrically insulating layer (1b) is between 100 nm and 3000 nm.

3. Method according to any of claims 1 or 2, wherein the final double semiconductor-on-insulator structure obtained, the thickness of the first monocrystalline semiconductor layer (2) is between 50 nm and 500 nm.

4. Method according to any of claims 1 to 3, wherein the final double semiconductor-on-insulator structure obtained, the thickness of the second electrically insulating layer (2b) is between 100 nm and 1100 nm.

5. Method according to any of claims 1 to 4, wherein, in the final double semiconductor-on-insulator structure obtained, the thickness of the second monocrystalline semiconductor layer (3) is between 50 nm and 500 nm.

6. Method according to any of claims 1 to 5, wherein the step of transferring the first monocrystalline semiconductor layer (2) from a first donor substrate onto the first electrically insulating layer (1b) is carried out according to a process comprising, in succession: the implantation of atomic species in order to create a weakening zone within the first donor substrate delimiting the first monocrystalline semiconductor layer (2), bonding the face of the first donor substrate of the first monocrystalline semiconductor layer (2) that has undergone implantation onto the first electrically insulating layer (1b), and fracturing the first donor substrate at the embrittlement zone.

7. Method according to claim 6, wherein the remainder of the first donor substrate resulting from the fracture is used to form the second donor substrate.

8. Method according to any of claims 6 or 7, wherein the method of transferring the first monocrystalline semiconductor layer (2) from a first donor substrate onto the first electrically insulating layer (1b) further comprises oxidizing the surface of the first donor substrate prior to implanting atomic species into said first donor substrate, thereby forming a first protective oxide layer so that the atomic species are implanted through said first protective oxide layer.

9. Method according to claim 8, wherein the first protective oxide layer formed on the surface of the first donor substrate is removed after implantation of the atomic species and prior to bonding the first donor substrate to the first electrically insulating layer (1b).

10. Method according to any of claims 1 to 9, wherein the step of transferring the second monocrystalline semiconductor layer (3) from a second donor substrate onto the second electrically insulating layer (2b) is carried out according to a process comprising, in succession: the implantation of atomic species in order to create an weakening zone within the second donor substrate delimiting the second monocrystalline semiconductor layer (3), bonding the face of said second donor substrate of the second monocrystalline semiconductor layer (3) that has undergone implantation onto the second electrically insulating layer (2b) and fracturing the second donor substrate at the embrittlement zone.

11. Method according to claim 10, wherein the process of transferring the second monocrystalline semiconductor layer (3) from a second donor substrate onto the second electrically insulating layer (2b) further comprises oxidizing the surface of the second donor substrate prior to implanting atomic species into said second donor substrate, thereby forming a second protective oxide layer so that the atomic species are implanted through said second protective oxide layer.

12. Method according to claim 11, wherein the second protective oxide layer formed on the surface of the second donor substrate is removed after implantation of the atomic species and prior to bonding the second donor substrate to the second electrically insulating layer (2b).

13. Method according to any of claims 1 to 12, further comprising a step of implementing a process for treating the surface of the first semiconductor-on-insulator substrate prior to the second step of forming an oxide layer on the surface of this first semiconductor-on-insulator substrate, the surface treatment process being characterized by: - a first step of rapid thermal annealing, - a second step of thermal oxidation followed by deoxidation, - a third step of long-duration thermal treatment or a third step of rapid thermal annealing, the long-duration thermal treatment and the rapid thermal annealing being carried out at a temperature above 1000°C in a non-oxidizing atmosphere, - a fourth step of mechanical-chemical polishing.

14. Method according to any of claims 1 to 13, wherein the support substrate and each donor substrate are in the form of a plate with a diameter of 300 mm.