Optoelectronic component and method for producing an optoelectronic component

Abstract

The invention relates to an optoelectronic component. In one embodiment, the optoelectronic component comprises a carrier (2), at least one semiconductor chip (3) on the carrier (2), a protective layer (4) on the semiconductor chip (3), and an encapsulation (5) on the protective layer (4). In particular, the at least one semiconductor chip (3) comprises at least one micro-LED. The invention also relates to a method for producing an optoelectronic component.

Description

[0001] Description

[0002] OPTOELECTRONIC COMPONENT AND METHOD FOR PRODUCING AN OPTOELECTRONIC COMPONENT

[0003] An optoelectronic component is specified. Furthermore, a method for producing an optoelectronic component is specified.

[0004] This patent application claims priority from German patent application 10 2022 133 373 . 6 , the disclosure of which is hereby incorporated by reference .

[0005] One problem to be solved is to provide an optoelectronic component with increased efficiency. Another problem to be solved is to provide a method for producing an optoelectronic component with increased efficiency.

[0006] An optoelectronic component is specified. The component is, for example, a radiation-emitting optoelectronic component. During operation, the optoelectronic component generates electromagnetic radiation, in particular electromagnetic radiation with a wavelength in the wavelength range between UV radiation and infrared radiation. The optoelectronic component has at least one component, in particular a plurality of components, or is composed thereof.

[0007] According to at least one embodiment, the optoelectronic component comprises a carrier. The carrier represents the mechanically supporting component of the optoelectronic component. The remaining components of the optoelectronic component, for example optical and / or electronic components, are arranged on the carrier. In particular, the carrier serves for the mechanical fastening and / or electrical connection for optical and / or electronic components of the optoelectronic component. In particular, the carrier is a connection carrier. In other words, the carrier is structured. A structured carrier has one or a plurality of chip connection points and / or one or a plurality of metal tracks for electrical contacting. The metal track or the plurality of metal tracks can comprise Cu and / or Cu blackened with CuO, CU3N or Pd and / or Cu with various surface coatings such as NiAu or NiPdAu.

[0008] According to at least one embodiment, the optoelectronic component comprises at least one semiconductor chip on the carrier. In particular, the at least one semiconductor chip is arranged on the carrier in direct or indirect contact. The direct or indirect contact between the semiconductor chip and the carrier can be an electrical and / or mechanical contact. In particular, the at least one semiconductor chip is arranged on a chip connection point of the carrier. For example, the semiconductor chip is fastened to the carrier, in particular to a chip connection point of the carrier, by means of a solder connection, in particular by means of a solder connection which comprises a low-temperature solder system. In particular, the low-temperature solder system has a melting point of below 220°C or below 150°C. For example, it is an SAC solder system with a melting point of 217°C.For example, it is an SnBi solder system with a melting point of 138 °C. The at least one semiconductor chip comprises or consists of a diode structure, passivation layers and contacts. The contacts are in direct contact with the solder system. In other words, the at least one semiconductor chip is not a package, but rather the pure semiconductor chip. Alternatively, the at least one semiconductor chip can be a chip-scale package without polymer- or ceramic-like intermediate carriers. A chip-scale package comprises, for example, an additional connecting layer or a conversion layer surrounding the semiconductor chip without an additional substrate.

[0009] In particular, the at least one semiconductor chip is configured to emit primary radiation having a first wavelength range during operation of the optoelectronic component. The semiconductor chip can comprise an active layer sequence which contains an active region which can generate the primary radiation during operation of the optoelectronic component. Here and below, primary radiation refers to electromagnetic radiation of a first wavelength or a first wavelength range which is emitted by the semiconductor chip. The semiconductor chip is, for example, a light-emitting diode chip or a laser diode chip. For example, the at least one semiconductor chip emits blue primary radiation, green primary radiation, yellow primary radiation or red primary radiation.

[0010] In the event that the at least one semiconductor chip comprises a conversion layer surrounding the semiconductor chip, a chip-scale assembly can emit secondary radiation having a second wavelength range during operation of the optoelectronic component. The conversion layer can convert the primary radiation partially or completely into secondary radiation. In the case of partial conversion, the unconverted part of the primary radiation is transmitted through the conversion layer. In this case, the chip-scale assembly emits mixed light which is composed of the primary radiation and the secondary radiation. For example, the chip-scale assembly emits white light which is composed of primary radiation in the blue spectral range and secondary radiation in the red spectral range. In the case of full conversion, no primary radiation is transmitted through the conversion layer."None" in this context means that so little primary radiation is transmitted that it no longer perceptibly influences the light emitted by the chip-scale assembly. For example, a maximum of 10%, in particular a maximum of 5% and preferably a maximum of 1% of the primary radiation is transmitted through the conversion layer. The chip-scale assembly then emits only the secondary radiation. For example, the chip-scale assembly emits yellow or red light without any blue component.

[0011] According to at least one embodiment, the optoelectronic component comprises a protective layer on the at least one semiconductor chip. The protective layer is designed to protect the components of the optoelectronic component arranged underneath, for example the at least one semiconductor chip and / or the carrier and / or a chip connection point, from mechanical and / or brief thermal effects. In particular, the protective layer is designed as a heat-insulating layer. In this context, heat-insulating means that heat that hits one side of the protective layer does not reach an opposite side of the protective layer, or only reaches it to a small extent. For example, the protective layer transmits at most 50%, at most 40%, at most 30%, at most 20%, at most 10%, at most 5%, or at most 1% of the incident heat. In other words, the protective layer can have a low thermal conductivity.Furthermore, the protective layer can be designed to protect the components of the optoelectronic component arranged underneath, in particular the semiconductor chip, from corrosion. In this case, the protective layer can prevent or limit the penetration of corrosive compounds, for example, corrosive gases or moisture.

[0012] According to at least one embodiment, the optoelectronic component comprises an encapsulation on the protective layer. An encapsulation serves to protect the components, in particular the components arranged beneath the encapsulation, of the optoelectronic component from external influences. The encapsulation can be arranged in direct mechanical contact with the protective layer. Alternatively, further elements, such as layers, can be arranged between the protective layer and the encapsulation. In particular, the encapsulation has a thickness of 500 pm inclusive to 1 cm inclusive, for example 700 pm.

[0013] According to at least one embodiment, the optoelectronic component comprises a carrier, at least one semiconductor chip on the carrier, a protective layer on the at least one semiconductor chip, and an encapsulation on the protective layer. The optoelectronic component is based, among other things, on the following considerations. When one or more semiconductor chips are integrated on a carrier into an encapsulation, high forces and temperatures act on the semiconductor chip, the carrier, and the connection between the semiconductor chip and the carrier. In particular, when solder materials are used for the connection between the semiconductor chip and the carrier, the shear forces of the semiconductor chip are minimal at the encapsulation temperatures used, since the solder material used can melt.The protective layer over the at least one semiconductor chip can significantly reduce the force and temperature effects, so that one or more semiconductor chips can be integrated into a potting compound on a carrier without damaging the carrier, the semiconductor chip, or its connection to the carrier. This advantageously allows miniaturized optoelectronic components to be provided, for example for automotive trim parts or trim parts. Furthermore, the protective layer in the optoelectronic components provides additional corrosion protection and thus advantageously extends the service life of the optoelectronic component.

[0014] According to at least one embodiment, the carrier is flexible. In other words, the carrier is not a rigid carrier. A flexible carrier is particularly flexible and / or elastic and / or deformable in at least one spatial direction. A flexible carrier can advantageously bend or deform under the action of external forces, for example bending stress, without losing its structural integrity, in particular without being damaged. According to at least one embodiment, the carrier is a film. Here and in the following, a film is understood to mean a homogeneous sheet-like structure, for example made of plastic. In particular, a carrier designed as a film is flexible. For example, the carrier is a 2D or 2.5D formed film. A 2D formed film is a flat film that extends in two spatial directions.A 2.5D-shaped film is a two-dimensional film that is bent along an axis. In other words, a 2.5D-shaped film is bent but not plastically deformed. A support formed as a film can advantageously bend or deform under the action of external forces, such as bending stress, without losing its structural integrity, and in particular, without being damaged.

[0015] According to at least one embodiment, the carrier comprises a structured material selected from polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyimide (PI), colorless polyimide (cPI), polymethyl methacrylate (PMMA), polycarbonate (PC) and silicone. Structured in the context of a carrier material means that the material has one or a plurality of chip connection points and / or one or a plurality of metal tracks, for example Cu tracks, for electrical contact. In particular, the carrier consists of a structured material selected from polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyimide (PI), colorless polyimide (cPI), polymethyl methacrylate (PMMA), polycarbonate (PC) and silicone. For example, the carrier comprises or consists of a structured film made of one of these materials.Polyethylene terephthalate, polyimide, polymethyl methacrylate, polycarbonate and silicone are particularly suitable for the formation of flexible films with structuring.

[0016] According to at least one embodiment, the carrier comprises or consists of structured polyethylene terephthalate (PET). Polyethylene terephthalate is advantageously suitable for maintaining adhesion to the protective layer even under bending stress.

[0017] According to at least one embodiment, the thickness of the carrier is in the range from 15 pm to 200 pm, in particular in the range from 50 pm to 100 pm, for example 100 pm. Such a carrier, in particular a flexible carrier with a thickness in the range from 50 pm to 200 pm, can be advantageously used in roll-to-roll processes.

[0018] According to at least one embodiment, the thickness of the at least one semiconductor chip is 80 pm. According to at least one further embodiment, the thickness of the at least one semiconductor chip is less than 10 pm, for example 6 pm or 7 pm. The thickness of a semiconductor chip is understood here to mean the extent of the semiconductor chip perpendicular to the plane of extension of the carrier. In other words, the thickness of the semiconductor chip is the height of the semiconductor chip above the carrier. By integrating thin semiconductor chips with thicknesses of 80 pm, 6 pm, or 7 pm on a carrier, for example a film, into optoelectronic components, optoelectronic components with a low thickness can advantageously be provided. According to at least one embodiment, the at least one semiconductor chip comprises at least one micro light-emitting diode (LED).Micro-LEDs can have a width, a length, a thickness and / or a diameter of less than or equal to 100 pm, in particular less than or equal to 70 pm, for example less than or equal to 50 pm. In particular, micro-LEDs, for example rectangular micro-LEDs, have an edge length, in particular in plan view of the layers of the layer stack, of a luminous area of ​​less than or equal to 70 pm, for example less than or equal to 50 pm. A micro-LED is, for example, a light-emitting diode in which a growth substrate has been removed, so that a thickness of the micro-LED is, for example, in the range from 1.5 pm inclusive to 10 pm inclusive.

[0019] According to at least one embodiment, the protective layer comprises a polysiloxane, a polyurethane, an acrylate, an epoxy, or a combination thereof. In particular, the protective layer consists of a polysiloxane, a polyurethane, an acrylate, an epoxy, or a combination thereof. Polysiloxanes, polyurethanes, acrylates, and epoxies can provide good corrosion protection while simultaneously providing thermal insulation.

[0020] According to at least one embodiment, the protective layer comprises or consists of a polysiloxane. A polysiloxane is a polymer in which silicon atoms are linked via oxygen atoms. Polysiloxanes have individual siloxane units. Polysiloxanes can have M units, D units, T units and Q units. The letters M (mono), D (di), T (tri) and Q (quatro) stand for the number of oxygen atoms bonded to a silicon atom. M units therefore have one, D units two, T units three and Q units four oxygen atoms. The greater the number of oxygen atoms bonded to a silicon atom, the stronger the crosslinking of the polysiloxane network can be. In particular, the protective layer comprises a polysiloxane that has only M units and D units. Such a polysiloxane is advantageously flexible.

[0021] According to at least one embodiment, the protective layer comprises or consists of a silicone. Here and below, a silicone is understood to mean a polysiloxane that has only M units and D units in its network. A protective layer comprising a silicone is advantageously flexible and provides both mechanical protection and corrosion protection. In addition, the protective layer is highly stable against blue radiation, which can extend the service life of the optoelectronic component while maintaining consistent optical properties.

[0022] According to at least one embodiment, the silicone of the protective layer is an addition-crosslinked silicone. For example, the silicone of the protective layer is not a condensation-crosslinked silicone. In contrast to condensation reactions, no water is formed during addition reactions. A protective layer made of an addition-crosslinked silicone therefore contains less water than layers made of condensation-crosslinked silicone. This can increase the corrosion protection provided by the protective layer. According to at least one embodiment, the protective layer is flexible. In other words, the protective layer is not a rigid protective layer. A flexible protective layer is, in particular, flexible and / or elastic and / or deformable in at least one spatial direction.A flexible protective layer can advantageously maintain its adhesion to the carrier under the action of external forces, for example bending stress, without delamination of the protective layer from the carrier.

[0023] According to at least one embodiment, the protective layer has a surface resistance of at least 1 - 10 14 Q to , for example from 2 - IO 14 Q . The surface resistance of a layer is a measure of its insulating effect. The higher the surface resistance of a layer, the greater its insulating effect. In this case, the protective layer advantageously has a high surface resistance and thus a good insulating effect.

[0024] According to at least one embodiment, the protective layer is designed to protect components of the optoelectronic component arranged underneath, in particular the at least one semiconductor chip, from corrosive compounds. In particular, the protective layer has a high moisture resistance or insulation resistance. The moisture resistance or insulation resistance is a measure of the amount of water absorbed by a component. The more water a component has absorbed, the higher the electrical conductivity and the lower the electrical resistance. A high moisture resistance or insulation resistance therefore means that the protective layer absorbs no or only a small amount of water and thus advantageously protects the components of the optoelectronic component arranged underneath from water.

[0025] According to at least one embodiment, the protective layer is transparent to electromagnetic radiation. A transparent protective layer is permeable to electromagnetic radiation. In other words, the protective layer transmits incident electromagnetic radiation. In particular, the protective layer transmits incident electromagnetic radiation to at least 80%, 90%, 95% or 99%. In particular, the protective layer is transparent to electromagnetic radiation emitted by the optoelectronic component during operation. For example, the protective layer is transparent to the primary radiation emitted by the at least one semiconductor chip. Thus, the protective layer advantageously does not influence the optical properties of the optoelectronic component.

[0026] According to at least one embodiment, the protective layer does not change the properties of electromagnetic radiation, in particular not the properties of the primary radiation. In other words, the properties of electromagnetic radiation transmitted through the protective layer, such as wavelength, intensity and direction, do not change as a result of the transmission. In particular, the radiation has the same properties after transmission through the protective layer as before entering the protective layer. For example, the electromagnetic radiation has the same wavelength before and after transmission through the protective layer. In other words, the electromagnetic radiation is not converted by the protective layer. Alternatively or additionally, the electromagnetic radiation can have the same intensity before and after transmission through the protective layer.In other words, the electromagnetic radiation is not absorbed by the protective layer. Alternatively or additionally, the electromagnetic radiation can have the same direction before and after transmission through the protective layer. In other words, the electromagnetic radiation is not scattered by the protective layer. Thus, the protective layer advantageously does not influence the optical properties of the optoelectronic component.

[0027] According to at least one embodiment, the protective layer does not absorb any electromagnetic radiation in the visible range of the electromagnetic spectrum. "None" in this context means that so little of the incident electromagnetic radiation is absorbed by the protective layer that the intensity of the electromagnetic radiation is not perceptibly influenced. For example, at most 10%, in particular at most 5%, and preferably at most 1% of the incident electromagnetic radiation is absorbed by the protective layer. Thus, the protective layer advantageously does not influence the optical properties of the optoelectronic component.

[0028] According to at least one embodiment, the protective layer is free of scattering particles, conversion material, fillers, nanoparticles, and / or particles for adjusting a refractive index. Thus, the protective layer advantageously does not influence the optical properties of the optoelectronic component.

[0029] According to at least one embodiment, the protective layer is not a conversion layer. In particular, the protective layer is not a layer comprising a conversion material in a matrix material. A protective layer that is not a conversion layer advantageously offers protection against the penetration of corrosive gases.

[0030] According to at least one embodiment, the protective layer completely covers the at least one semiconductor chip. In particular, the protective layer covers the surfaces of the at least one semiconductor chip that are free of the carrier. In other words, the protective layer is formed such that there is no direct mechanical contact between the at least one semiconductor chip and the encapsulation. As a result, the protective layer can advantageously prevent diffusion paths for corrosive compounds along the edges of the semiconductor chip.

[0031] According to at least one embodiment, the thickness of the protective layer on the at least one semiconductor chip is at least 40 pm. It should be noted in particular that there are upper limits to the thickness of the protective layer on the at least one semiconductor chip only for commercial and integration reasons. In particular, as the thickness of the protective layer increases, the thickness of the optoelectronic component also increases. This can make integration of the components in application systems, in particular in application systems with little installation space, more difficult. For example, the thickness of the protective layer on the at least one semiconductor chip is at least 40 pm and at most 500 pm, in particular at least 40 pm and at most 300 pm. A thickness of the protective layer of at least 40 pm on the at least one semiconductor chip prevents diffusion paths along the edges of the semiconductor chip.In this way, the protective layer advantageously forms a barrier against water vapor and corrosive gases in the optoelectronic component. Furthermore, it advantageously protects the at least one semiconductor chip, the carrier, and the connection between the at least one semiconductor chip and the carrier from heat.

[0032] According to at least one embodiment, the at least one semiconductor chip is completely enclosed by the carrier and the protective layer. In other words, all sides of the at least one semiconductor chip are covered by the carrier and / or the protective layer. For this purpose, there can be direct mechanical contact between the protective layer and the carrier laterally of the semiconductor chip. In particular, the direct mechanical contact between carrier and protective layer extends completely around the semiconductor chip. In other words, the carrier and the protective layer form a cavity in which the at least one semiconductor chip is arranged. In particular, the at least one semiconductor chip is arranged on the carrier and embedded in the protective layer. In this case, the carrier can cover one side of the semiconductor chip and the protective layer can cover the remaining sides of the semiconductor chip.It should be noted that the thickness of the protective layer between the carrier and the encapsulation corresponds to the thickness of the protective layer on the semiconductor chip and the thickness of the semiconductor chip. For example, the thickness of the at least one semiconductor chip is 80 μm and the thickness of the protective layer on the semiconductor chip is at least 40 μm, so that the thickness of the protective layer between the carrier and the encapsulation is at least 120 μm.

[0033] According to at least one embodiment, the at least one semiconductor chip comprises a plurality of semiconductor chips. In the present case, a plurality of semiconductor chips comprises at least two semiconductor chips, in particular at least 50 semiconductor chips, preferably at least 100 semiconductor chips, for example at least 150 semiconductor chips. According to at least one embodiment, the plurality of semiconductor chips comprises at most 50,000 semiconductor chips, in particular at most 10,000 semiconductor chips, for example at most 2,000 semiconductor chips. In particular, each of the semiconductor chips in the plurality of semiconductor chips is individually enclosed, in particular completely, by the carrier and the protective layer. In other words, the protective layer is designed such that each semiconductor chip is individually embedded in the protective layer. In particular, the protective layer between the semiconductor chips is in direct contact with the carrier.By having a large number of semiconductor chips on the carrier, the light yield of the optoelectronic component can be advantageously increased.

[0034] According to at least one embodiment, the distance between any two semiconductor chips of the plurality of semiconductor chips is between 0.1 mm and 5 mm inclusive. Alternatively, the distance between semiconductor chips with a thickness of 80 gm can be between 40 gm and 50 gm inclusive. The distance between the semiconductor chips results, in particular, in the protective layer between the semiconductor chips being in direct contact with the carrier, which can advantageously enhance the mechanical protective effect and the corrosion protection of the protective layer.

[0035] According to at least one embodiment, the encapsulant comprises a silicone, a polymethyl methacrylate (PMMA), a polycarbonate (PC), or a polyamide. In particular, the encapsulant consists of a silicone, a polymethyl methacrylate (PMMA), a polycarbonate (PC), or a polyamide.

[0036] According to at least one embodiment, the protective layer is embedded in the encapsulation. In particular, the encapsulation covers a side of the protective layer facing away from the carrier as well as the lateral sides of the protective layer. For example, the protective layer is enclosed or enclosed by the encapsulation and the carrier, in particular completely. In this case, the at least one semiconductor chip is also embedded in the encapsulation. In other words, the protective layer and the at least one semiconductor chip can be integrated into the encapsulation. Embedding the protective layer in the encapsulation leads to integration of the at least one semiconductor chip into the encapsulation and can advantageously increase the stability of the optoelectronic component.

[0037] According to at least one embodiment, the encapsulation is produced on the protective layer. The production of the encapsulation on the protective layer leads in particular to the protective layer being embedded or integrated into the encapsulation. By “producing the encapsulation on the protective layer” is meant in particular not that the carrier, semiconductor chip and protective layer are attached to an already formed and shaped encapsulation, for example via adhesive layers. In particular, when produced on the protective layer, the encapsulation only obtains its strength and shape when the encapsulation material is in contact with the component that contains the protective layer. The production of the encapsulation on the protective layer enables a direct integration of the carrier, semiconductor chip and protective layer into the encapsulation without fastening means such as adhesive layers. The encapsulation can be produced on the protective layer using a encapsulation process.

[0038] According to at least one embodiment, the optoelectronic component further comprises a decorative layer on a side of the encapsulation facing away from the protective layer. In particular, the decorative layer comprises one or more layers. The side of the encapsulation facing away from the protective layer is in particular a side of the optoelectronic component visible to an external observer. A decorative layer arranged on this side can functionalize the optoelectronic component for the desired application, for example optically. For example, the decorative layer has a carbon optic print or a root wood foil print. Alternatively or additionally, the decorative layer can be semi-transparent and / or structured. For example, the decorative layer can define a symbol or logo via a structuring that becomes visible during operation of the optoelectronic component.

[0039] According to at least one embodiment, the optoelectronic component further comprises at least one component. The at least one component is arranged on the carrier, for example adjacent to the at least one semiconductor chip. The at least one component comprises, for example, a sensor and / or a component with detection functions or touch functions. In particular, the at least one component has a similar topography to the at least one semiconductor chip. For example, the at least one component has a smaller, a similar, or the same thickness as the semiconductor chip. Alternatively, the component may have a greater thickness than the semiconductor chip. In this case, it should be noted that the thickness of the protective layer on the thickest component is at least 40 pm.By integrating components into the optoelectronic component, additional functions such as sensor functions can be incorporated into the optoelectronic component in addition to the lighting function.

[0040] According to at least one embodiment, the optoelectronic component further comprises a cover layer on a side of the protective layer facing away from the carrier. The cover layer, in particular, completely covers a surface of the protective layer facing away from the carrier. For example, the protective layer is, in particular, completely enclosed by the cover layer and the carrier. In other words, the carrier, the protective layer, and the cover layer form a sandwich structure. In particular, the cover layer is flexible. For example, the cover layer is a film.

[0041] The cover layer can be arranged between the protective layer and the casting.

[0042] According to at least one embodiment, the cover layer comprises polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyimide (PI), colorless polyimide (cPI), polymethyl methacrylate (PMMA), polycarbonate (PC) or silicone. In particular, the cover layer consists of polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyimide (PI), colorless polyimide (cPI), polymethyl methacrylate (PMMA), polycarbonate (PC) or silicone. Such a cover layer can advantageously have particularly good adhesion to the potting material. For example, the cover layer comprises or consists of polyethylene terephthalate (PET).

[0043] An optoelectronic component with a cover layer made of polyethylene terephthalate (PET) can be manufactured particularly cost-effectively.

[0044] According to at least one embodiment, the cover layer and the carrier comprise different materials. For example, the carrier comprises polyethylene terephthalate (PET) and the cover layer comprises polycarbonate (PC).

[0045] Alternatively, the cover layer and the carrier comprise the same material. For example, the cover layer and the carrier comprise polyethylene terephthalate (PET).

[0046] According to at least one embodiment, an adhesive layer is arranged between the cover layer and the protective layer. The adhesive layer provides a connection between the protective layer and the cover layer. In particular, the adhesive layer is in direct mechanical contact with the protective layer and the cover layer. For example, the adhesive layer comprises a material that is suitable as an adhesive material for low-energy surfaces, such as silicone surfaces. For example, the adhesive layer comprises a polysiloxane adhesive.

[0047] According to at least one embodiment, the cover layer has at least one interface with the carrier. In other words, the cover layer and the carrier are in direct mechanical contact, at least in places. In particular, the interface forms a frame that encloses a surface of the carrier. In particular, the at least one semiconductor chip and optionally present components of the optoelectronic component are arranged on the enclosed surface of the carrier.

[0048] According to at least one embodiment, the cover layer and the carrier are connected at least in places at the at least one interface by a welded joint, for example by a weld seam. A welded joint is understood here and below to be a mechanical connection that cannot be released without destruction and is created between the carrier and the cover layer under external influences, for example by ultrasound, laser radiation, heat and / or pressure. A weld seam is understood here and below to be a welded joint along a connecting line or connecting curve that connects the cover layer and the carrier to one another, in particular along the interface.In particular, the cover layer and the carrier are connected along their entire interface with a welded joint, wherein regions of the electrical contacts, for example the Cu conductor tracks, which lead through the interface are excluded from the welded joint. In particular, the cover layer and the carrier are connected along the entire frame formed by the interface with a welded joint, wherein regions of the electrical contacts, for example the Cu conductor tracks, which lead through the interface are excluded from the welded joint. A welded joint between cover layer and carrier advantageously increases the stability of the connection between cover layer and carrier. Furthermore, a method for producing an optoelectronic component is specified. The optoelectronic component according to the above-mentioned embodiments is preferably produced using the method described here.In particular, all statements made for the optoelectronic component also apply to the process and vice versa.

[0049] According to at least one embodiment, the method for producing an optoelectronic component comprises providing a carrier. In particular, the carrier is a flexible carrier, for example, a film.

[0050] According to at least one embodiment, the method comprises arranging at least one semiconductor chip on the carrier, in particular on a chip connection point of the carrier. For example, the semiconductor chip is attached to the carrier, in particular on a chip connection point of the carrier, using a solder material.

[0051] According to at least one embodiment, the method comprises applying a protective layer to the at least one semiconductor chip. In particular, the protective layer is applied using a printing process, a spraying process, or a lamination process. For example, the protective layer is applied using a stencil printing process, a screen printing process, a spray coating process, or a dispensing process.

[0052] According to at least one embodiment, the method comprises applying a potting compound to the protective layer. In particular, the potting compound is applied using a potting method. For example, the potting compound is applied using in-mold

[0053] Decoration (IMD), injection molding or compression molding.

[0054] According to at least one embodiment, the method for producing an optoelectronic component comprises providing a carrier, arranging at least one semiconductor chip on the carrier, applying a protective layer on the at least one semiconductor chip and applying an encapsulation on the protective layer.

[0055] Using such a process, semiconductor chips with minimal topography, in particular a small thickness, can be integrated directly into the encapsulation of an optoelectronic component. The protective layer acts as thermal insulation in the process and can thermally decouple regions above and below the protective layer from one another, so that different temperatures prevail above and below the protective layer. This makes it possible to reduce the forces and temperatures acting on the carrier, on the at least one semiconductor chip, and on the connection between the semiconductor chip and the carrier during the formation of the encapsulation.For example, an injection molding process with materials that require high temperatures, such as polymethyl methacrylate (PMMA) or polycarbonate (PC), with potting temperatures of more than 220 °C, for example 300 °C, can be used to form the potting, without damaging at least the semiconductor chip, the carrier and the connection between the semiconductor chip and the carrier.

[0056] According to at least one embodiment, the encapsulant is applied directly to the protective layer. In particular, the encapsulant is applied directly to the protective layer if the encapsulant adheres well to the protective layer. Direct application of the encapsulant to the protective layer is advantageously simple and cost-effective.

[0057] According to at least one embodiment, a side of the carrier facing away from the at least one semiconductor chip is cooled during application of the encapsulation. In particular, the cooling takes place via a cooling circuit with water. The cooling can take place constantly or in a pulsed mode and can be controlled via a valve. For example, the side of the carrier facing away from the at least one semiconductor chip is cooled to 80 °C to 90 °C. The cooling of the carrier serves to keep the connection between the at least one semiconductor chip and the carrier during application of the encapsulation at a temperature at which the connection between the semiconductor chip and the carrier remains stable. In the case that the semiconductor chip is connected to the carrier with a solder material, the temperature of the connection between the semiconductor chip and the carrier can advantageously be kept at a temperature that is lower than the melting temperature of the solder material.The thermal insulation provided by the protective layer also advantageously ensures that the application of the encapsulation at the required temperatures on the protective layer is not impaired by the cooling of the side of the carrier facing away from the semiconductor chip.

[0058] According to at least one embodiment, the method further comprises, prior to applying the encapsulation, applying an adhesive layer to the protective layer and applying a cover layer to the adhesive layer. In other words, a sandwich structure is formed from the carrier, the protective layer, and the cover layer. In particular, the cover layer comprises a material that is compatible with the material of the encapsulation. By applying a cover layer to the protective layer, the integration of the sandwich structure into the encapsulation can be improved.

[0059] According to at least one embodiment, the method comprises, prior to applying the encapsulation, applying an adhesive layer to a cover layer and applying the adhesive layer with the cover layer to the protective layer. In other words, the adhesive layer and cover layer are applied as a composite. In particular, the composite is applied with the adhesive layer side onto the protective layer such that the adhesive layer is in direct contact with the protective layer. For example, a polysiloxane adhesive can be applied to a polyethylene terephthalate film and then the composite comprising the film with the already applied adhesive can be applied with the adhesive side onto the protective layer.

[0060] During the application of the encapsulation, particularly during injection of encapsulation material, the cover layer and / or the carrier may deform or warp. The deformation or warping may be more pronounced in the cover layer than in the carrier. The adhesive layer ensures, in particular, that the cover layer does not lose its bond to the protective layer during the application of the encapsulation.

[0061] According to at least one embodiment, the cover layer is applied to the protective layer such that the cover layer has at least one interface with the carrier. In particular, the cover layer is applied such that the interface forms a frame that encloses a surface of the carrier, for example the surface of the carrier on which the at least one semiconductor chip and optionally present components of the optoelectronic component are arranged.

[0062] According to at least one embodiment, the method further comprises creating a welded joint at at least one interface between the cover layer and the carrier. In particular, a welded joint is created over the entire interface between the cover layer and the carrier, with regions of the electrical contacts, for example the Cu conductor tracks, that pass through the interface being excluded from the welded joint. In particular, the welded joint is created using plastic welding, for example ultrasonic welding or laser welding. A welded joint at the interface between the cover layer and the carrier reinforces the interface and advantageously improves the connection between the carrier and the cover layer.

[0063] Further advantageous embodiments, refinements and developments of the component and of the method for producing a component emerge from the following exemplary embodiments shown in conjunction with the figures.

[0064] Figures 1 to 5 each show a schematic representation of an optoelectronic component according to various embodiments and Figures 6A to 6C and Figures 7A to 7C each show a schematic representation of a method for producing an optoelectronic component according to various embodiments.

[0065] Identical, similar, or functionally identical elements are provided with the same reference symbols in the figures. The figures and the relative sizes of the elements depicted in the figures are not to be considered to scale. Rather, individual elements, particularly layer thicknesses, may be exaggerated for clarity and / or clarity.

[0066] Figures 1 to 5 each show a schematic sectional view of an optoelectronic component 1. The optoelectronic components 1 each comprise a carrier 2, at least one semiconductor chip 3, a protective layer 4, and a potting compound 5.

[0067] The carrier 2 is structured and has at least one chip connection point and / or at least one metal track. The carrier 2 is in particular flexible and can comprise or consist of a structured film. The carrier 2 can comprise a structured material selected from polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyimide (PI), colorless polyimide (cPI), polymethyl methacrylate (PMMA), polycarbonate (PC) and silicone. For example, the carrier 2 is a structured polyethylene terephthalate film with a thickness of 100 μm.

[0068] A semiconductor chip 3 or a plurality of semiconductor chips 3, for example at least 50 semiconductor chips and at most 50,000 semiconductor chips, is arranged on the carrier 2, in particular on the chip connection points of the carrier 2. For example, the semiconductor chips 3 are attached to the carrier 2, in particular on chip connection points of the carrier 2, by means of a solder connection, in particular by means of a solder connection comprising a low-temperature solder system. For example, the solder system comprises an SnBi solder system with a melting point of 138°C. Alternatively, the solder system comprises an SAC solder system with a melting point of 217°C. An SAC solder system can advantageously be used in combination with a polyimide carrier or a polyethylene terephthalate carrier in photonic soldering.

[0069] The semiconductor chips 3 are, in particular, pure semiconductor chips or chip-scale assemblies without polymer- or ceramic-like intermediate carriers. For example, the semiconductor chips 3 have dimensions of 90x150x80 pm. 3 The thickness of the semiconductor chips, i.e. the height above the carrier, can be 80 pm.

[0070] The protective layer 4 is arranged on the carrier 2 such that it covers, in particular encloses, the semiconductor chips 3. The thickness of the protective layer 4 on the semiconductor chip is at least 40 μm. The thickness of the protective layer 4 above the carrier 2 depends on the thickness of the semiconductor chips 3 and is, for example, at least 120 μm for semiconductor chips 3 that are 80 μm thick. The protective layer 4 can comprise a polysiloxane, a polyurethane, an acrylate, an epoxy or a combination thereof. For example, the protective layer 4 is a silicone, for example the silicone DSL 1705 or VT3602 from Peters with a thickness of at least 120 μm.

[0071] The protective layer 4 is designed to

[0072] To protect the semiconductor chips 3 and / or the carrier 2 and / or a connection between the semiconductor chips 3 and the carrier 2 from mechanical and / or brief thermal effects. Furthermore, the protective layer 4 is designed to protect the semiconductor chips 3 from corrosion by preventing or limiting the penetration of corrosive compounds, for example corrosive gases or moisture.

[0073] The encapsulation 5 is arranged on the protective layer 4. In particular, the encapsulation 5 covers the sides of the protective layer 4 that are not covered by the carrier 2. The protective layer 4 is thus embedded or integrated into the encapsulation 5. The encapsulation 5 can comprise a silicone, a polymethyl methacrylate (PMMA), a polycarbonate (PC) or a polyamide. For example, the encapsulation 5 is a silicone, in particular the silicone LPS-3570M from Shin-Etsu, with a thickness of 700 μm. For example, the encapsulation is a polymethyl methacrylate with a thickness of 700 μm. For example, the encapsulation is a polycarbonate with a thickness of 700 μm.

[0074] The optoelectronic component 1 of Figure 2 differs from the optoelectronic component 1 of Figure 1 in that it has a decorative layer 6 on the encapsulation side facing away from the protective layer. The decorative layer can, for example, be semitransparent or structured and consist of one or more layers. The arrow in Figure 2 indicates the radiation direction of the radiation emitted by the semiconductor chips 3.

[0075] The optoelectronic component 1 of Figure 3 differs from the optoelectronic component 1 of Figure 1 in that it has a component 7 that is arranged on the carrier 2, preferably adjacent to the semiconductor chips 3. The component 7 is, for example, a sensor and / or a component with detection functions or touch functions. In addition to the component 7, the optoelectronic component 1 can have further components 7 with the same or different functions (not shown here).

[0076] In the optoelectronic component of Figure 3, the thickness of component 7 is similar to the thickness of semiconductor chips 3. Alternatively, component 7 may have a greater thickness than semiconductor chips 3. In this case, the thickness of the protective layer over the thickest component 7 is at least 40 pm.

[0077] The optoelectronic component 1 of Figure 4 differs from the optoelectronic component 1 of Figure 1 in that a cover layer 10 is arranged between the protective layer 4 and the encapsulation 5. The cover layer 10 is attached to the protective layer 4 with an adhesive layer 11.

[0078] The cover layer 10 has an interface 12 with the carrier 2. The interface 12 can extend in a frame-like manner around a region of the carrier 2, in particular around the region of the carrier 2 on which the semiconductor chips 3 and optional components 7 are arranged. The cover layer 10 and the carrier 2 can be joined to one another at the interface 12 by a weld.

[0079] The encapsulation 5 can cover the area facing away from the protective layer 4

[0080] The cover layer 10 can be completely embedded or enclosed by the outer layer 10. The cover layer 10 can comprise a material that is compatible with the material of the encapsulation 5, such that there is high adhesion and bonding between the cover layer 10 and the encapsulation 5. For example, the cover layer 10 is a polyethylene terephthalate film.

[0081] The optoelectronic component 1 of Figure 5 differs from the optoelectronic component 1 of Figure 4 in that it has a decorative layer 6 on the encapsulation side facing away from the protective layer. The decorative layer can, for example, be semitransparent or structured.

[0082] Figures 6A to 6C show a method for producing the optoelectronic component 1 of Figure 1.

[0083] In a first method step, a carrier 2 is provided, for example, a structured polyethylene terephthalate film. Semiconductor chips 3 are arranged on the carrier 2. For example, the semiconductor chips 3 are soldered to a chip connection point of the carrier. A protective layer 4, for example, made of a silicone, is applied to the semiconductor chips 3 by means of a stencil printing process (Figure 6A).

[0084] Figure 6B shows the application of the encapsulation 5, for example a silicone. The encapsulation 5 can be applied using a encapsulation process such as in-mold decoration (IMD), injection molding or compression molding. The application of the encapsulation requires temperatures of at least 220 ° C, for example 300 ° C. At these temperatures, in particular the solder material used to connect the semiconductor chip 3 to the carrier 2, for example an SnBi solder, can melt, as a result of which the shear forces of the semiconductor chip 3 are minimal. The protective layer 4, for example due to its thickness, acts in this case as thermal insulation and minimizes the thermal stress on the semiconductor chip 3, the carrier 2, in particular the metal tracks of the carrier 2, and the connection between the semiconductor chip 3 and the carrier 2.As a result, the forces and temperatures acting during the application of the encapsulation 5, in particular on the solder material, are significantly reduced, so that the semiconductor chips 3 can be integrated into the optoelectronic component 1 without becoming detached from the carrier 2 during the application of the encapsulation 5.

[0085] As shown in Figure 6B, a potting tool 8 can be used to apply the potting compound 5, which predetermines the shape of the potting compound to be formed. The potting tool can have a cooling system 9, with which the side of the carrier 2 facing away from the semiconductor chips 3 is cooled during the application of the potting compound 5. The cooling can be constant or in a pulsed mode and can be controlled via a valve. For example, cooling is carried out via a cooling circuit with water to a temperature of 80 ° C to 90 ° C. The protective layer 4 here also acts as thermal insulation, so that the application of the potting compound 5 and the high temperatures required for this are not impaired by the cooling of the underside of the carrier 2.

[0086] Figure 6C shows the optoelectronic component 1 produced by the method, which corresponds to the optoelectronic component 1 of Figure 1.

[0087] Figures 7A to 7C show a method for producing the optoelectronic component 1 of Figure 4. Figure 7A shows a layer stack comprising carrier 2, semiconductor chips 3 and protective layer 4, which can be produced as described in connection with Figure 6A.

[0088] The method of Figures 7A to 7C differs from the method of Figures 6A to 6C in that before the encapsulation 5 is applied to the protective layer 4, an adhesive layer 11 is applied to the protective layer 4 and a cover layer 10, for example a polyethylene terephthalate film, is applied to the adhesive layer 11. Alternatively, the adhesive layer 11 can first be applied to the cover layer 10 before the adhesive layer 11 is applied to the cover layer 10 as a composite to the protective layer 4. The composite is applied to the protective layer 4 with the adhesive layer 11 side such that the adhesive layer 11 is in direct contact with the protective layer 4. For example, a polysiloxane adhesive can be applied to a polyethylene terephthalate film and then the composite consisting of the film with the already applied adhesive can be applied with the adhesive side to the protective layer 4 (Figure 7B).

[0089] The cover layer 10 is applied in such a way that an interface 12 is formed between the carrier 2 and the cover layer 10. Optionally, the carrier 2 and the cover layer 10 can be joined at the interface 12 by plastic welding, for example, ultrasonic welding or laser welding.

[0090] The encapsulation 5 is then applied to the side of the cover layer 10 facing away from the protective layer 4. The encapsulation can be applied as described in connection with Figure 6B. The protective layer 4 arranged beneath the cover layer 10 protects the semiconductor chips 3 and the carrier 2 from thermal stress during the application of the encapsulation 5, while the material of the cover layer 10, due to its compatibility with the encapsulation material, leads to improved adhesion of the encapsulation 5 to the layer stack comprising carrier 2, semiconductor chips 3 and protective layer 4. During the application of the encapsulation 5, the carrier 2 and the cover layer 10, in particular the cover layer 10, can deform or warp. The adhesive layer 11 between the protective layer 4 and the cover layer 10 ensures that the cover layer 10 does not delaminate during the application of the encapsulation 5.

[0091] Figure 7C shows the optoelectronic component 1 produced by the method, which corresponds to the optoelectronic component 1 of Figure 4.

[0092] The features and exemplary embodiments described in conjunction with the figures can be combined with one another according to further exemplary embodiments, even if not all combinations are explicitly described. Furthermore, the exemplary embodiments described in conjunction with the figures can alternatively or additionally comprise further features according to the description in the general part.

[0093] The invention is not limited to the embodiments described herein. Rather, the invention encompasses any novel feature and any combination of features, including, in particular, any combination of features in the claims, even if this feature or combination itself is not explicitly stated in the claims or embodiments.

[0094] Reference symbol list

[0095] 1 optoelectronic component

[0096] 2 Carrier 3 Semiconductor chip

[0097] 4 protective layer

[0098] 5 Casting

[0099] 6 decorative layer

[0100] 7 Component 8 Potting tool

[0101] 9 Cooling

[0102] 10 Top layer

[0103] 11 Adhesive layer

[0104] 12 Interface

Claims

Patent claims 1. Optoelectronic component (1) comprising - a carrier (2) , - at least one semiconductor chip (3), in particular at least one micro-LED, on the carrier (2), - a protective layer (4) on the semiconductor chip (3), and - a potting compound (5) on the protective layer (4).

2. Optoelectronic component (1) according to the preceding claim, wherein the carrier (2) is flexible, and / or wherein the carrier (2) is a film.

3. Optoelectronic component (1) according to one of the preceding claims, wherein the protective layer (4) comprises a polysiloxane, a polyurethane, an acrylate, an epoxy or a combination thereof.

4. Optoelectronic component (1) according to one of the preceding claims, wherein the protective layer (4) completely covers the at least one semiconductor chip (3), and / or wherein the at least one semiconductor chip (3) is completely enclosed by the carrier (2) and the protective layer (4).

5. Optoelectronic component (1) according to one of the preceding claims, wherein a thickness of the protective layer (4) on the at least one semiconductor chip (3) is at least 40 pm.

6. Optoelectronic component (1) according to one of the preceding claims, wherein the at least one semiconductor chip (3) comprises a plurality of semiconductor chips (3), and / or wherein the optoelectronic component (1) comprises a decorative layer (6) on a side of the encapsulation (5) facing away from the protective layer (4), and / or wherein the optoelectronic component (1) comprises at least one component (7), wherein the at least one component (7) is arranged on the carrier (2).

7. Optoelectronic component (1) according to one of the preceding claims, wherein the protective layer (4) is embedded in the encapsulation (5).

8. Optoelectronic component (1) according to one of the preceding claims, further comprising a cover layer (10) on a side of the protective layer (4) facing away from the carrier (2).

9. Optoelectronic component (1) according to the preceding claim, wherein the cover layer (10) is arranged between the protective layer (4) and the encapsulation (5).

10. Optoelectronic component (1) according to one of claims 8 or 9, wherein an adhesive layer (11) is arranged between the cover layer (10) and the protective layer (4).

11. Optoelectronic component (1) according to the preceding claim, wherein the adhesive layer (11) is in direct mechanical contact with the protective layer (4) and the cover layer (10).

12. Optoelectronic component (1) according to one of claims 8 to 11, wherein the cover layer (10) has at least one interface (12) with the carrier (2).

13. Optoelectronic component (1) according to the preceding claim, wherein the cover layer (10) and the carrier (2) are connected at least in places with a welded joint at the at least one interface (12).

14. Optoelectronic component (1) according to one of the preceding claims, wherein the encapsulation (5) is produced on the protective layer (4) by a encapsulation process, in particular in-mold decoration, injection molding or compression molding.

15. Method for producing an optoelectronic component (1) comprising - Providing a carrier (2) , - arranging at least one semiconductor chip (3), in particular at least one micro-LED, on the carrier (2), - applying a protective layer (4) on the at least one semiconductor chip (3), and - Applying a potting compound (5) to the protective layer (4) using a potting process.

16. Method according to the preceding claim, wherein a side of the carrier (2) facing away from the at least one semiconductor chip (3) is cooled during the application of the encapsulation (5).

17. The method according to any one of claims 15 or 16, further comprising, prior to applying the encapsulation (5) - Applying an adhesive layer (11) to the protective layer ( 4 ) and - Applying a cover layer (10) on the adhesive layer (11) , or further comprising before applying the casting (5) - applying an adhesive layer (11) to a cover layer (10) and - Applying the adhesive layer (11) with the cover layer (10) on the protective layer (4).

18. Method according to the preceding claim, wherein the cover layer (10) is applied to the protective layer (4) in such a way that the cover layer (10) has at least one interface (12) with the carrier (2).

19. Method according to the preceding claim, further comprising - producing a welded joint at at least one interface (12) between the cover layer (10) and the carrier (2).

20. A method according to any one of claims 15 to 19, wherein the casting process is one of the following: In-mold decoration, injection molding or compression molding.

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