Voltage / current or current / voltage conversion system.
Patent Information
- Application Number
- FR2022007637
- Authority / Receiving Office
- FR · FR
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-07-25
- Publication Date
- 2025-02-21
- Estimated Expiration
- 2042-07-25
Smart Images
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Abstract
Description
Title of the invention: Voltage / current or current / voltage conversion system. Technical field
[0001] The present invention relates to a system for converting voltage into current or current into voltage. It also relates to a method for converting voltage into current or current into voltage.
[0002] The field of the invention is more particularly, but in a non-limiting manner, that of the conversion of voltage into current or current into voltage of electromagnet power supplies in particle accelerators. State of the prior art
[0003] In principle, switching electronics induce a current ripple which can be detrimental to the load that the converter supplies. This is the case, for example, for electromagnet power supplies in particle accelerators, which must provide a perfectly smooth current and therefore with very low ripple.
[0004] The objective of the present invention is to reduce this ripple as much as possible. current without reducing the (dynamic) bandwidth of the system. Indeed, if we keep the example of power supplies for particle accelerators, achieving high dynamics is another essential condition for the proper operation of beam position correction systems.
[0005] The most widespread filtering solution is the filter based on passive elements (capacitors and inductors); solutions based on active filters are also used, making the transistors operate in linear mode.
[0006] With passive filtering, obtaining high dynamics (and at the same time a very good level of filtering) requires increasing the switching frequency of the power switches. This makes it possible to reduce the size (and volume) of the converter output filter. The counterpart is a degradation of the converter's efficiency, with in particular an increase in the losses dissipated (by switching) by the power semiconductors. To limit the temperature of the latter and thus maximize their reliability, it may then prove necessary to oversize the heat sinks on which they are mounted. On the other hand, the parasitic elements inherent in the components performing the filtering limit the frequency range for which the filter is effective.Beyond a few hundred kHz switching frequency (in which case semiconductors that switch very quickly are used), obtaining good electromagnetic compatibility (EMC) becomes considerably more complicated. To limit this increase in switching frequency, we can use . to high-order filters (typically order 5), obtained by associating several passive filter cells. These filters, calculated to provide attenuation equivalent to the switching frequency compared to a lower-order filter, have a higher cutoff frequency which makes it possible to satisfy the high dynamic constraint. Another solution for limiting the switching frequency consists of implementing techniques called "interleaving" of the semiconductor controls. The general idea is to associate N switching cells in parallel, and to drive them with control signals phase-shifted by 2m / N. In this way, the apparent frequency "seen" in the load is equal to N times the switching frequency of each of the cells, which therefore makes it possible to reduce the size of the output filter, and to achieve high bandwidths, while obtaining good efficiencies.One of the disadvantages of this method is the management of the balancing between the currents generated by the N switching cells operating in parallel; additional control loops are required to guarantee this balancing.
[0007] Generally speaking, the passive components and / or the cooler represent a significant part of the total volume of the converter.
[0008] The active filter in linear mode, for its part, significantly degrades the efficiency of the assembly. In addition, its impact on the volume and overall weight of the converters is significant, even if it does not use passive components. Indeed, the cooling system associated with the active components will also be bulky.
[0009] The aim of the present invention is therefore to reduce as much as possible the current ripple in a system or method for converting voltage into current or current into voltage:
[0010] - by minimizing the reduction in (dynamic) bandwidth, and / or
[0011] - maintaining high dynamics and / or
[0012] - by limiting the degradation of the converter efficiency and / or
[0013] - by limiting dissipated losses and / or
[0014] - by limiting the weight or volume of the converter and / or
[0015] - by reducing the weight and volume of the passive components and / or the cooler and / Or
[0016] - by not requiring additional control loops to guarantee a balancing and / or
[0017] - by obtaining lower residual levels. Statement of the invention
[0018] This objective is achieved with a voltage to current or current to voltage conversion system, comprising (typically exactly 2 or 3) input terminals and (typically exactly 2 or 3) output terminals, and between the input terminals and the output terminals:
[0019] - a first set and a second set, each from the first set and the second set comprising at least one switching cell,
[0020] and characterized in that: - the system further comprises a common control device for the first set and for the second set, - each switching cell comprising: • a first switch which can be in an on state or in a blocking state, and comprising a transistor, and • a second switch which can be in an on state or a blocking state, and comprising a transistor and / or a diode,
[0021] so that, for each switching cell, this switching cell oscillates between two states including a first state for which its first switch is on when its second switch is off and a second state for which its first switch is off when its second switch is on, - the number of switching cells in the system being even, - each of the first set and the second set includes the same number of switching cell(s) (preferably at least one, preferably exactly one or two or 3). - the at least one switching cell of the first set and the at least one switching cell of the second set being associated in pairs so that each switching cell of the first set is associated with a single switching cell of the second set, and each switching cell of the second set is associated with a single switching cell of the first set,
[0022] the control device being arranged and / or programmed to send to the switches of the switching cells a signal arranged to switch the switches between their on state and their off state at the same switching frequency for all the switches so that, for each pair of switching cells, the first switch of the switching cell of the first set of the pair is off when the first switch of the switching cell of the second set of the pair is on and the first switch of the switching cell of the first set of the pair is on when the first switch of the switching cell of the second set of the pair is off.
[0023] The switching cells of the first set and the second set can together form a four-quadrant chopper structure.
[0024] The two sets can be mounted in parallel between the input terminals and the output terminals: - the first set comprising a main converter, each switching cell of the first set being a switching cell of the main converter - the second set comprising an active switching compensator, each switching cell of the second set being a switching cell of the active switching compensator.
[0025] The switching cell(s) of the main converter may have a structure identical to the structure of the switching cell(s) of the compensator.
[0026] The switching cell(s) of the main converter may have a series chopper structure and the switching cell(s) of the compensator may have a series chopper structure.
[0027] The switching cell(s) of the main converter may have a two-quadrant chopper structure and the switching cell(s) of the compensator may have a two-quadrant chopper structure.
[0028] The main converter switching cell(s) may have a four-quadrant chopper structure and the compensator switching cell(s) may have a four-quadrant chopper structure.
[0029] The switching cell(s) of the main converter may have a “boost” chopper structure and the switching cell(s) of the compensator may have a “boost” chopper structure.
[0030] The switching cell(s) of the main converter may have an “inductive accumulation chopper” (or “Buck-Boost” in English) structure and the switching cell(s) of the compensator may have an “inductive accumulation chopper” structure.
[0031] The second assembly can be arranged to generate a current ripple, with zero average value, of the same amplitude but in phase opposition to that generated by the first assembly.
[0032] The first two switches of the same pair of switching cells can be connected to the same input terminal(s) and output terminal(s) without passing through a transistor or a switch.
[0033] The two second switches of the same pair of switching cells can be connected to the same input terminal(s) and output terminal(s) without passing through a transistor or a switch.
[0034] Preferably, no switching cell is connected to an input terminal via a transistor.
[0035] Preferably, no switching cell is connected to an output terminal via a transistor.
[0036] Each switching cell can be connected to both input terminals without any intermediate element.
[0037] Each switching cell can be connected to one of the output terminals without any intermediate element.
[0038] Each switching cell can be connected to one of the output terminals via an inductor.
[0039] Each switching cell of the first set can be connected to one of the output terminals via an inductor only.
[0040] Each switching cell of the second set can be connected to one of the output terminals via an inductor and a capacitor.
[0041] Each switching cell can be connected to both output terminals without any intermediate element.
[0042] Each switching cell can be connected to one of the input terminals without any intermediate element.
[0043] Each switching cell can be connected to one of the input terminals via an inductor.
[0044] Each switching cell of the first set can be connected to one of the input terminals via an inductor only.
[0045] Each switching cell of the second set can be connected to one of the input terminals via an inductor and a capacitor.
[0046] Each inductor of the first set can be coupled with an inductor of the second set.
[0047] The transistors of the switching cells may comprise MOSFET and / or IGBT and / or GaN FET transistors.
[0048] According to yet another aspect of the invention, there is proposed a method for controlling a system according to the invention, characterized in that it comprises a common control, by the control device, of the first set and of the second set, by sending to the switches of the switching cells a signal causing the switches to switch between their on state and their off state at the same switching frequency for all the switches so that:
[0049] - for each switching cell, this switching cell oscillates between two states including a first state for which its first switch is on when its second switch is off and a second state for which its first switch is off when its second switch is on,
[0050] - for each pair of switching cells, the first switch of the cell switching of the first set of the pair is blocking when the first in switch of the switching cell of the second set of the pair is conducting and the first switch of the switching cell of the first set of the pair is conducting when the first switch of the switching cell of the second set of the pair is blocking.
[0051] Preferably, the second assembly generates a current ripple of the same amplitude but in phase opposition to that generated by the first assembly. Description of figures and embodiments
[0052] Other advantages and particularities of the invention will appear on reading the detailed description of implementations and embodiments which are in no way limiting, and the following appended drawings:
[0053] [Fig-1] [Fig.l] illustrates a first embodiment of system 101 "step-down" according to the invention, which is the preferred embodiment of the invention,
[0054] [Fig.2] [Fig.2] illustrates other embodiments of system (102, 103 in Figure 2a; 202, 203 in Figure 2a) according to the invention,
[0055] [Fig.3] [Fig.3] illustrates on its part a) embodiment 102 embodiment 103 and on its part c) another embodiment 104 of system according to the invention,
[0056] [Fig.4] [Fig.4] illustrates different system embodiments (202 in Figure 4a; 203 in Figure 4b; 204 in Figure 4c; 201 in Figure 4d) according to the invention,
[0057] [Fig.5] [Fig.5] illustrates different system embodiments 302, 303 “rectifiers” according to the invention,
[0058] [Fig.6] [Fig.6] illustrates an embodiment of a three-phase “step-down” system 504 according to the invention,
[0059] [Fig.7] [Fig.7] illustrates a system 102 with a static converter 61 of the serial chopper type as illustrated in Figures 2a and 3a,
[0060] [Fig.8] [Fig.8] illustrates different signals (commands, voltages or current) as a function of time in the system of figures 3a and 7,
[0061] [Fig.9] [Fig.9] illustrates in part a) an electrical diagram, with the PSIM electronic simulation software, of the system 103 of figures 2a and 3b; in part b) different signals (commands, voltages or current) as a function of time for this system,
[0062] [Fig. 10] [Fig. 10] in part a) an electrical diagram, with the PSIM electronic simulation software, of the system 303 of figures 5a and 5b; in part b) different signals (commands, voltages or current) as a function of time for this system,
[0063] [Fig. 11] [Fig. 11] in part a) an electrical diagram, with the PSIM electronic simulation software, of the system 504 of figures 6a and 6b; in part b) different signals (commands, voltages or current) as a function of time for this system,
[0064] [Fig. 12] [Fig. 12] illustrates a comparison, at a given load current filtering level, of the dynamics obtained for a reference 71 and with 73 and without 72 active compensator 62, for a system 104 of figure 3c with a 4-quadrant full-bridge chopper type converter,
[0065] [Fig. 13] [Fig. 13] illustrates a comparison, at a given bandwidth, of the filtering level obtained for a reference 81 and with 83 and without 82 active compensator, for a system 104 of figure 3c with a 4-quadrant chopper type converter in full bridge, and
[0066] [Fig. 14] [Fig. 14] illustrates a fundamental static converter structure, called a "switching cell", for any system embodiment according to the invention described with reference to the preceding figures.
[0067] These embodiments being in no way limiting, it will be possible in particular to consider variants of the invention comprising only a selection of characteristics described or illustrated subsequently isolated from the other characteristics described or illustrated (even if this selection is isolated within a sentence comprising these other characteristics), if this selection of characteristics is sufficient to confer a technical advantage or to differentiate the invention compared to the state of the prior art. This selection comprises at least one preferably functional characteristic without structural details, and / or with only a part of the structural details if this part only is sufficient to confer a technical advantage or to differentiate the invention compared to the state of the prior art.
[0068] Very generally, a static converter is an interface between an electrical energy source 300 and a load 400. Its primary purpose is therefore to enable the transfer of energy between source and load to be controlled. Among the different conversion families, we can notably mention choppers, which carry out a direct-direct (DC - DC) conversion, inverters which carry out a direct-alternating (DC - AC) conversion, and rectifiers which carry out an alternating-direct (AC - DC) conversion. All these forms (DC - DC) (DC - AC) and (AC - DC) are applicable to the present invention.
[0069] The notion of efficiency is predominant: the conversion device must have minimal losses, which assumes the implementation of theoretically non-dissipative elements:
[0070] - Switches which are made using semiconductor components, presenting two states in static mode, the passing state and the blocking state,
[0071] - Purely reactive passive components, such as capacitors, trans trainers and inductors, used, among other things, for transient energy storage, or even filtering.
[0072] As will be seen below, each of the embodiments described below comprises a voltage to current or current to voltage conversion system, comprising input terminals 31, 32 and output terminals 41, 42, and between the input terminals 31, 32 and the output terminals 41, 42:
[0073] - a first set 1 and a second set 2, each among the first set and the second set comprising at least one switching cell.
[0074] Each of the embodiments described below further comprises a control device 3 common to the first assembly 1 and to the second assembly 2.
[0075] The fundamental structures of static converters, called "switching cells" referenced 11, 12, 21, 22 hereinafter, can be associated with each other in the manner of elementary bricks. The simplest conversion structure of "switching cell" necessarily implements 2 switches (K1 and K2 in [Fig. 14]) whose operations are linked: their states are necessarily complementary. One is blocking when the other is conducting. This basic structure is called "switching cell".
[0076] The switching cell 11, 12, 21, 22 typically comprises three terminals: - the first switch K1 (referenced 111, 121, 211, or 221 hereinafter) connects the first terminal 91 to the second terminal 92 - the second switch K2 (referenced 112, 122, 212, or 222 thereafter) connects the third terminal 93 to the second terminal 92 - the first switch K1 and the second switch K2 in series connect the first terminal 91 to the third terminal 93.
[0077] These two switches, if connected to a voltage source, cannot be closed (i.e. in their on state) at the same time (but it is possible to open them at the same time) under penalty of creating a short circuit and damaging the equipment. Similarly, if the cell is connected to a current source, it is not possible to open (i.e. put them in their off state) the two switches at the same time (but it is possible to close them at the same time).
[0078] The second assembly 2 is arranged to generate a current ripple, with a zero average value, of the same amplitude but in phase opposition with respect to that generated by the first assembly 1 (in the case of a variant in current to voltage conversion, the active compensator will make it possible to filter the current this time at the input of the system (and not at the output as in the case of a voltage to current conversion), again generating a current ripple in phase opposition with respect to the main converter).
[0079] As will be seen below, each of the system embodiments according to the invention described below comprises: - Downstream (case of “step-down” systems) or upstream (case of “rectifier” systems) of the switching cells of the first set 1 and / or of the second set 2, at least one inductance L, LH L2, L3, each of these inductances being a so-called main inductance arranged to limit current variations, each of these main inductances being alone, i.e. not connected in series to a conductance and electrically arranged between the switching cells of the first or second set (only of the first set 1 for all figures except 1 and 4d) and one of the outputs 41, 42, 43 (case of “step-down” systems) and / or one of the inputs 31, 32, 33 (case of “rectifier” systems). - Downstream (case of “step-down” systems) or upstream (case of “rectifier” systems) of the switching cells of the first set 1 and / or of the second set 1, at least one so-called filtering inductance LFA, LFAi, LFA2, LFA3 belonging to a high-pass filter, each of these filtering inductances being connected in series to a so-called filtering capacitor respectively CFA, C FAi, CFA2 and CFA3 arranged to eliminate the DC component of the generated current, each of these high-pass filters being electrically arranged between the switching cells of the first 1 and / or second 2 set (only of the second set 2 for all figures except 1 and 4d) and one of the outputs 41, 42, 43 (case of “step-down” systems) or one of the inputs 31, 32, 33 (case of “rectifier” systems).
[0080] In the figures, we note C the opening command (C = 0 on state) and closing command (C = 1 blocking or closed state) of each transistor, and C the complementary command (C = 1 blocking state if C = 0 on state and C = 0 on state if C = 1 blocking state).
[0081] We will first describe, with reference to [Fig.l], a first embodiment of system 101 according to the invention, which is a system 101 for converting voltage into current, comprising input terminals 31, 32 (two in the case of [Fig.l]) connected respectively to the terminals of the source 300 and output terminals 41, 42 (two in the case of [Fig.l]) connected respectively to the terminals of the load 400.
[0082] The system 101 comprises, and between the input terminals 31, 32 and the output terminals 41, 42:
[0083] - a first set 1 and a second set 2, each among the first set 1 and the second set 2 comprising at least one switching cell 11, 21, and even exactly one switching cell in the case of [Fig.l].
[0084] The system 101 further comprises a control device 3 common to the first assembly 1 and to the second assembly 2.
[0085] The control device 3 comprises at least one computer, a central or computing unit, an analog electronic circuit (preferably dedicated), an electronic circuit
[0086]
[0087]
[0088]
[0089] digital electronics (preferably dedicated), and / or a microprocessor (preferably dedicated), and / or software means. Each switching cell respectively 11, 21 comprises: • a first switch respectively 111 or 211 which can be in an on state or in a blocking state, and comprising a transistor, and • a second switch respectively 112 or 212 which can be in an on state or a off state, and comprising a transistor and / or a diode, such that, for each switching cell 11 or 21, this switching cell oscillates between two states including a first state for which its first switch respectively 111 or 211 is on when its second switch respectively 112 or 212 is off and a second state for which its first switch respectively 111 or 211 is off when its second switch respectively 112 or 212 is on, with possible transient phases of this cell during which these two switches 111 and 112, or 211 and 212 can both be off (but in no case both on). In the case of [Fig.l]: - switch 111 or 211, includes a transistor, and this transistor is called “High side” or high potential and has its drain connected to the positive terminal of the voltage source 300 - switch 112 or 212, if it includes a transistor, then this transistor is called “Low side” or low potential and has its source connected to the negative terminal or to the ground of the voltage source 300 With reference to Figures 1 and 14, each switching cell 11, 21: - has its first terminal 91 electrically connected (preferably corresponding) to terminal 31 - has its third terminal 93 electrically connected (preferably corresponding) to terminal 32 - has its second terminal 92 electrically connected to the two output terminals 41 and 42.
[0090] In a case of an assembly comprising a single switching cell, each switching cell of the assembly means the switching cell of the assembly.
[0091] Each transistor of the switching cells typically comprises a "metal oxide semiconductor field effect transistor" (MOSFET) and / or an insulated gate bipolar transistor (IGBT) and / or a gallium nitride (GaN) field-effect transistor (FET).
[0092] An on state of a switch is a state that allows an electric current to pass through through the switch.
[0093] A blocking state of a switch is a state that does not allow an electric current to pass through the switch.
[0094] The number of switching cells 11,21 of the system is even, and equal to two.
[0095] Each of the first set 1 and the second set 2 comprises the same number (only one in the case of [Fig.l]) of switching cell(s) 11, 21.
[0096] The at least one switching cell 11 of the first set 1 and the at least one switching cell 21 of the second set 2 are associated in pairs such that each switching cell 11 of the first set 1 is associated with a single switching cell 21 of the second set 2, and each switching cell 21 of the second set 2 is associated with a single switching cell 11 of the first set 1.
[0097] The control device 3 is arranged and / or programmed to send to the switches 111, 112, 211, 212 of the switching cells 11, 21 a signal (or command) C or C arranged to switch the switches 111, 112, 211, 212 between their on state and their off state (and / or vice versa) at the same switching frequency also called switching frequency (typically between 5 kHz and 500 kHz) for all the switches 111, 112, 211, 212 so that, for each pair of switching cells 11, 21, the first switch 111 of the switching cell 11 of the first set 1 of the pair is off when the first switch 211 of the switching cell 21 of the second set 2 of the pair is on and the first switch 111 of the cell switching cell 11 of the first set 1 of the pair is on when the first switch 211 of the switching cell 21 of the second set 2 of the pair is off,with possible transient phases of this pair during which these first two switches 111,211 of this pair can both be blocking (but in no case both passing).
[0098] In other words, the control device 3 is arranged and / or programmed to send, for each pair of switching cells 11, 21: - a signal (or command) respectively C or C to the first switch 111 of the switching cell 11 of the first set 1 of the pair - a complementary signal (or command) respectively C or C to the first switch 211 of the switching cell 21 of the second set 2 of the pair.
[0099] Power electronics is therefore switching electronics (ideally an open or closed switch does not dissipate energy). This switching frequency of the switches is called the “switching frequency”. At each switching cycle, a quantum of energy is transferred between the source 300 and the load 400. The control of the energy transfer between source 300 and load 400 is ensured by modulating the conduction time of the switches: At each switching cell, at least one of the two switches must therefore be controllable or controllable (on closing and / or opening). The transistors (MOSFET for example) are switches controllable or controllable on opening and closing.
[0100] In the case of [Fig.l], the switching cells 11, 21 of the first set 1 and of the second set together form, between them, a four-quadrant chopper structure.
[0101] The second assembly 2 is arranged to generate a current ripple of the same amplitude but in phase opposition to that generated by the first assembly 1.
[0102] The first two switches 111, 211 of the same pair of switching cells 11, 21 are electrically connected:
[0103] - through terminal 91 of each cell, to the same input terminal 31 without passing through through a transistor or switch 111,211, 112, 212 (neither a capacitor nor an inductor)
[0104] - by terminal 92 of each cell, to the same output terminals 41, 42 without passing via a transistor or switch 111,211, 112, 212, but passing: • by a main inductance L1 for cell 21 to output 41 • by a filtering inductance LFAi (and by a filtering capacitor CFAi) for cell 11 towards exit 41 • by a filtering inductance LFA2 (and by a filtering capacitor CFA2) for cell 21 to output 42 • by a main inductance L2 for cell 11 towards output 42
[0105] The two second switches 112, 212 of the same pair of switching cells 11, 21 are electrically connected:
[0106] - through terminal 93 of each cell, to the same input terminal 32 without passing through through a transistor or a switch (neither a capacitor nor an inductor) and
[0107] - by terminal 92 of each cell, to the same output terminals 41, 42 without passing through a transistor or a switch, but passing: • by a main inductance L1 for cell 21 to output 41 • by a filtering inductance LFA[ (and by a filtering capacitor CFai) for cell 11 towards exit 41 • by a filtering inductance LFA2 (and by a filtering capacitor CFA2) for cell 21 to output 42 • by a main inductance L2 for cell 11 to output 42
[0108] No switching cell 11,21 is electrically connected to an input terminal 31,32 via a transistor.
[0109] No switching cell 11,21 is electrically connected to an output terminal 41,42 via a transistor.
[0110] Each switching cell 11, 21 is electrically connected to the two input terminals 31, 32 without any intermediate element.
[0111] Each switching cell 11,21 is electrically connected:
[0112] - to one of the output terminals 41 or 42 via a main inductance
[0113] - to the other of the output terminals respectively 42 or 41 via an in series filter ductance of a filter capacitor.
[0114] Each switching cell 11, 21 is electrically connected to one of the output terminals 41, 42 via an inductance.
[0115] Each switching cell 11 of the first set 1 is electrically connected to one of the output terminals 42 via a main inductance L2 only.
[0116] Each switching cell 21 of the second set 2 is electrically connected to one of the output terminals 42 via a filtering inductance LFA2 and a filtering capacitor CFA2 only.
[0117] Whatever the variant considered in the present description, the source 300 at the input terminals 31, 32 is a direct voltage source (battery, output of an AC-DC converter filtered by a capacitor, etc.).
[0118] The load 400 at the output terminals 41, 42 can for example be any type of device that needs to be powered by direct current (battery, MCC type rotating machine, electromagnet, etc.), or at low frequency (injection into the network, alternating current rotating machines, electromagnet, etc.) typically less than one kilohertz.
[0119] In the case of system 101, a main converter groups the first set 1 and the second set 2 and is a four-quadrant chopper, and the structure of system 101 is simplified (it is possible to dispense with the use of an auxiliary converter) compared to systems 102, 103, 104 described below.
[0120] Lb LFA2, CFA2 are part of the second set 2.
[0121] L2, LFAb CFAi are part of the first set 1.
[0122] We will now describe, with reference to figures 2a, 3a, 3b, 3c, other embodiments of system 102, 103, 104 according to the invention, which will only be described for their differences with respect to system 101, and which are also voltage-to-current conversion systems, comprising input terminals 31, 32 (two in the case of figures 2a, 3a, 3b, 3c) and output terminals 41, 42 (two in the case of figures 2a, 3a, 3b, 3c).
[0123] In all these systems 102, 103, or 104, the two assemblies 1, 2 are mounted in parallel between input terminals 31, 32 and output terminals 41, 42: - the first set 1 comprises a main converter 61 which comprises all the switching cells of the first set 1, each switching cell 11, 12 of the first set being a switching cell of the main converter - the second assembly (2) comprising an active switching compensator 62 which comprises all the switching cells of the second assembly 2, each switching cell 21, 22 of the second assembly being a switching cell of the active switching compensator.
[0124] The main inductances L, Lh L2, etc. are part of the first set 1.
[0125] The filtering inductances LFA, LFAi, LFA2, etc. and the filtering capacitors CFA, CFAi, CFA2, etc. are part of the second set 2.
[0126] The active switching compensator 62 therefore has the mission of benefiting from the advantages of both passive components and active components. The principle of the compensator 62 according to the invention is therefore to generate a current ripple opposite to that generated by the main converter 61. The superposition of the current of the main converter 61 and the current of the compensator 62 makes it possible to cancel almost all of the ripple of the converter 61. In this way, the size of the output filter of the main converter 61 can be reduced and it is thus possible to meet the high dynamic constraint.
[0127] The system 102, 103, or 104 therefore has the following advantages:
[0128] • This filtering solution based on an active switching compensator 62 makes it possible to significantly reduce the share of passives in the filter (more associations of passive low-pass filter cells in cascade).
[0129] • The active switching filter guarantees good bandwidth while operating at a lower switching frequency than with a passive filter.
[0130] • The active compensator 62 therefore does not deteriorate the overall efficiency of the system 102, 103, or 104; It consumes very low power.
[0131] • Its implementation is easy.
[0132] Unlike active filters which are concerned with common mode EMC disturbances at the input of the converters, the active compensator 62 proposed here addresses disturbances (at the switching frequency) of the output current wave in differential mode.
[0133] The main converter 61 is a static converter, preferably bidirectional in current (however the implementation of unidirectional static converters in current is possible), and the compensator 62 is a static converter of the same nature.
[0134] The system 102, 103, or 104 comprises, and between the input terminals 31, 32 and the output terminals 41, 42:
[0135] - a first set 1 and a second set 2, each among the first set 1 and the second set 2 comprising at least one switching cell 11, 12, 21, 22 and even exactly one switching cell in the case of figure 3a or 3b and two switching cells in the case of figure 3c.
[0136] The system 102, 103, or 104 further comprises a control device 3 common to the first set 1 and to the second set 2.
[0137] Each switching cell 11, 21, 12, or 22 comprises: • a first switch respectively 111, 211, 121, or 221 which can be in an on state or in a blocking state, and comprising a transistor, and • a second switch respectively 112, 212, 122, or 222 which can be in an on state or a off state, and comprising a transistor and / or a diode,
[0138] so that, for each switching cell 11, 21, 12, or 22, this switching cell oscillates between two states including a first state for which its first switch respectively 111, 211, 121, or 221 is on when its second switch respectively 112, 212, 122, or 222 is off and a second state for which its first switch respectively 111, 211, 121, or 221 is off when its second switch respectively 112, 212, 122, or 222 is on, with possible transient phases of this cell during which these two switches 111 and 112, or 211 and 212 or 121 and 122 or 221 and 222 can both be off (but in no case both be on).
[0139] The number of switching cells 11, 21, 12, or 22 of the system 102, 103, or 104 is even, and equal to two for figure 3a or 3b or to four for figure 3c.
[0140] Each of the first set 1 and the second set 2 comprises the same number (one for figure 3a or 3b or two for figure 3c) of switching cell(s) 11, 21, 12, or 22.
[0141] The at least one switching cell 11, 12 of the first set 1 and the at least one switching cell 21, 22 of the second set 2 are associated in pairs so that each switching cell 11 or 12 of the first set 1 is associated with a single switching cell respectively 21 or 22 of the second set 2, and each switching cell 21 or 22 of the second set 2 is associated with a single switching cell respectively 11 or 12 of the first set 1.
[0142] The control device 3 is arranged and / or programmed to send to the switches 111, 211, 121, 221, 112, 212, 122, 222 of the switching cells 11, 21, 12, or 22 a signal (or command) C or C arranged to switch the switches 111, 211, 121, 221, 112, 212, 122, 222 between their on state and their off state (and / or vice versa) at the same switching frequency (typically between 5 kHz and 500 kHz) for all switches 111, 211, 121, 221, 112, 212, 122, 222 so that, for each pair of switching cells (pair 11, 21 and pair 12, 22), the first switch respectively 111 or 121 of the switching cell respectively 11 or 12 of the first set 1 of the pair is blocking when the first switch respectively 211 or 221 of the switching cell respectively 21 or 22 of the second set 2 of the pair is conducting and the first switch respectively 111 or 121 of the switching cell respectively 11 or 12 of the first set 1 of the pair is conducting when the first switch respectively 211 or 221 of the switching cell respectively 21 or 22 of the second set 2 of the pair is blocking, with possible phases transients of this pair during which these first two switches of this pair can both be blocking (but in no case both passing).
[0143] The second assembly 2 is arranged to generate a current ripple of the same amplitude but in phase opposition to that generated by the first assembly 1.
[0144] Thus, the electrical diagram in which the system 102, 103, or 104 is included comprises:
[0145] - a power source and its input terminals 31, 32,
[0146] - a load and its output terminals 41, 42,
[0147] - a main static converter 61 responsible for transferring electrical energy from the source to load (and vice versa if there is reversibility).
[0148] The active compensator 62 is connected in parallel with the main converter 61. The converter 61 and the compensator 62 are supplied by the same source and controlled by the same remote control circuit 3. They both operate at the same switching frequency.
[0149] Downstream of the main static converter 61, the current variations are limited by a main inductance L, Li or L2.
[0150] Downstream of the compensator 62, these variations are limited by a high-pass filter composed of a filtering inductance respectively LFA, LFAi, LFA2 (of the same value as that L, Li or L2 of the main converter 61) in series with a filtering capacitor CFA, CFAi, CFA2 to eliminate the DC component of the generated current.
[0151] The inductances L, Li or L2 located downstream of the converter 61 and the inductances LFA, LFAi, LFA2 located downstream of the compensator 62 are independent.
[0152] The first two switches 111, 211 or 121, 221 of the same pair of switching cells 11, 21 or 12, 22 are electrically connected to the same input terminal(s) and output terminal(s) without passing through a transistor or a switch 111, 211, 112, 212.
[0153] More precisely: The first two switches 111,211 of the pair of switching cells 11,21 are electrically connected: • via terminal 91 of each cell, to the same input terminal 31 without passing through a transistor or switch 111, 211, 121, 221, 112, 212, 122, 222 (nor via a capacitor or inductance) • In the case of figures 3a and 3b: via terminal 92 of each cell, to the same output terminal 41 without passing through a transistor or a switch 111,211, 121,221, 112,212, 122, 222 (but passing through a single inductance L or through an inductance LFA in series with a capacitor C fa) • In the case of figures 3c: via terminal 92 of each cell, to the same output terminal 42 without passing through a transistor or a switch 111,211, 121,221, 112,212, 122, 222 (but passing through a single inductance L2 or through an inductance LFA2 in series with a capacitor CFA2) In the case of figures 3c: The first two switches 121, 221 of the pair of switching cells 12, 22 are electrically connected: • by terminal 91 of each cell, to the same input terminal 31 without passing through a transistor or a switch 111, 211, 121, 221, 112, 212, 122, 222 (nor through a capacitor or inductance) • via terminal 92 of each cell, to the same output terminal 41 without passing through a transistor or a switch 111, 211, 121, 221, 112, 212, 122, 222 (but passing through a single inductance Li or through an inductance LFA[ in series with a capacitor CFAi) The two second switches 112, 212 of the pair of switching cells 11, 21 are electrically connected: • via terminal 93 of each cell, to the same input terminal 32 without passing through a transistor or switch 111, 211, 121, 221, 112, 212, 122, 222 (nor through a capacitor or inductance) • In the case of figures 3a and 3b: via terminal 92 of each cell, to the same output terminal 41 without passing through a transistor or a switch 111,211, 121,221, 112,212, 122, 222 (but passing through a single inductance L or through an inductance LFA in series with a capacitor C fa) • In the case of figures 3a and 3b: via terminal 93 of each cell, to the same output terminal 42 without passing through a transistor or switch 111,211, 121,221, 112,212, 122, 222 (nor via a capacitor or inductance) • In the case of figures 3c: via terminal 92 of each cell, to the same output terminal 42 without passing through a transistor or a switch 111,211, 121,221, 112,212, 122, 222 (but passing through a single inductance L2 or through an inductance LFA2 in series with a capacitor CFA2) - In the case of figures 3c: The two second switches 122, 222 of the pair of switching cells 12, 22 are electrically connected: • via terminal 93 of each cell, to the same input terminal 32 without passing through a transistor or switch 111, 211, 121, 221, 112, 212, 122, 222 (nor through a capacitor or inductance) • via terminal 92 of each cell, to the same output terminal 41 without passing through a transistor or a switch 111, 211, 121, 221, 112, 212, 122, 222 (but passing through a single inductance Li or through an inductance LFA[ in series with a capacitor CFAi)
[0154] The two second switches 112, 212 of the same pair of switching cells 11, 21 are electrically connected to the same input terminal(s) 31, 32 and output terminal(s) 41, 42 without passing through a transistor or a switch, but possibly through an inductance or an inductance and a capacitor in series.
[0155] No switching cell 11, 21, 12, or 22 is electrically connected to an input terminal 31, 32 via a transistor.
[0156] No switching cell 11, 21, 12, or 22 is electrically connected to an output terminal 41, 42 via a transistor.
[0157] Each switching cell 11, 21, 12, or 22 is electrically connected to the two input terminals 31, 32 without any intermediate element.
[0158] Each switching cell 11, 21, 12, or 22 is electrically connected to at least one of the output terminals 41, 42 via an inductor.
[0159] Each switching cell 11, 12 of the first set 1 is electrically connected trically to one of the output terminals (41 for figures 3a and 3b, 41 or 42 for figure 3c) via a main inductance only.
[0160] Each switching cell 21, 22 of the second set 2 is electrically connected to one of the output terminals (41 for figures 3a and 3b, 41 or 42 for figure 3c) (only) via a filtering inductance in series with a filtering capacitor, only.
[0161] In the case of Figures 3a and 3b, each switching cell 11, 21, 12, or 22 is electrically connected to one of the output terminals 42 without any intermediate element.
[0162] The use of the active filter makes it possible to reduce the size of the passive filtering components implemented at the output of the main converter 61.
[0163] In the particular case of the system 102 of FIG. 3a, the switching cell(s) 11 of the main converter have a series chopper structure and the switching cell(s) 21 of the compensator 62 have a series chopper structure.
[0164] It is considered that the main converter 61, like the compensator 62, are based on a structure called a series chopper. In this embodiment, the converter 61 is not current reversible and the active compensation principle only works if the average value of the current delivered by the main static converter is greater than half the ripple of the current flowing in the inductance downstream of the main converter; it is indeed necessary to avoid what is called the discontinuous regime of the current, which is reached when the current in the diode is zero before the end of the chopping period.
[0165] In the particular case of the system 103 of FIG. 3b, the switching cell(s) 11 of the main converter 61 have a two-quadrant chopper structure and the switching cell(s) 21 of the compensator 62 have a two-quadrant chopper structure.
[0166] It is considered that the converter 61, like the compensator 62, are based on a structure called a current-reversible two-quadrant chopper.
[0167] In the particular case of the system 104 of FIG. 3c, the switching cell(s) 11, 12 of the main converter 61 have a four-quadrant chopper structure and the switching cell(s) 21, 22 of the compensator 62 have a four-quadrant chopper structure.
[0168] It is considered that the converter 61, like the compensator 62, are based on a structure called a full-bridge four-quadrant chopper, reversible in current and voltage.
[0169] In the case of figure 3c: - switch 111 or 211 or 121 or 221, includes a transistor, and this transistor is called “High side” or “high potential” and has its drain connected to the positive terminal of the voltage source 300 switch 112 or 212 or 122 or 222, if it includes a transistor, then this transistor is called “Low side” or “low potential” and has its source connected to the negative terminal or to the ground of the voltage source 300
[0170] With reference to figures 3a, 3b, 3c and 14, each switching cell 11, 12, 21, 22: has its first terminal 91 electrically connected (preferably corresponding) to the input terminal 31 has its third terminal 93 electrically connected (preferably corresponding) to the input terminal 32 (and possibly to the output terminal 42), has its second terminal 92 electrically connected to the output terminal 41 or 42.
[0171] We will now describe, with reference to figures 4d, 2b, 4a, 4b, 4c, other embodiments of system 201, 202, 203, 204 according to the invention, which will only be described for their differences compared to the systems of the figures previously described.
[0172] In these figures: system 201 of figure 4d corresponds to system 101 of [Fig.l], system 202 of figure 2b and 4a corresponds to system 102 of figure 2a, and 3a system 203 of figure 2b and 4b corresponds to system 103 of figure 2a and 3b system 204 of figure 4c corresponds to system 104 of figure 3c
[0173] but in which, in addition, each main inductance respectively L or Li or L 2 of the first set 1 is coupled with a filtering inductance respectively LFA or LFAi or LFA2 of the second set 2.
[0174] The inductances L, Li or L2 located downstream of the converter 61 and the inductances LFA, Lpai, LFA2 located downstream of the compensator 62 are coupled. More precisely, each main inductance L, Li or L2 located downstream of the converter 61 is coupled to one of the filtering inductances LFA, LFAi, LFA2 located downstream of the compensator 62.
[0175] The use of the active filter makes it possible to reduce the size of the passive filtering components implemented at the output of the main converter 61. This benefit can be accentuated by coupling the main inductance L, Li or L2 with the inductance LFA, LFAi, L FA2 downstream of the active compensator 62.
[0176] Thus, the use of coupled inductances makes it possible to reduce the volume of passive components and gives rise to new variants:
[0177] - the main converter 61 is considered to be a serial chopper, as is the active compensator 62 ([Fig.4]-a), or
[0178] - the main converter 61 is considered to be a two-quadrant chopper re- current-versible, as well as the active compensator 62 ([Fig.4]-b), or
[0179] - the main converter 61 is considered to be a four-quadrant chopper in full bridge, as well as the active compensator 62 ([Fig.4]-c), or
[0180] - the structure of [Fig.4]-d is simplified, as for that of [Fig. 1].
[0181] All systems 101, 102, 103, 104, 201, 201, 203, 204 are “step-down” systems, i.e. the output voltage is adjustable and at most equal to the input voltage.
[0182] However, the active compensator is entirely usable on “step-up” structures. In this case, instead of compensating for the current ripples at the output of the converter 61, the compensation is carried out on the input currents, which may be of interest for certain applications. The sizing of the corresponding active compensator variants is identical to those implemented for step-down structures. These variants have the same advantages as the previous ones thanks to the simplicity of their implementation. They will be of interest in applications with delocalized sources such as photovoltaic panels, fuel cells, where the filtering of the disturbances generated by the cutting of the power converters on the current supplied by these sources is of particular importance.
[0183] Thus, each of these systems 101, 102, 103, 104, 201, 202, 203, 204 can be modified into a “step-up” system respectively 301, 302, 303, 304, 401, 402, 403, 404 (referenced in the present description but not necessarily illustrated) while remaining within the scope of the present invention, by moving to the inputs 31, 32 the main inductances L, Lb L2, and filtering inductances LFA, LFAi, LFA2 and the filtering capacitors CFA, CFAi, CFA2 initially placed on the side of the outputs 41, 42 in the “step-down” embodiments.
[0184] For example:
[0185] - figure 5a illustrates a “lifting” system 302, 303 according to the invention which will not be described only for its differences from the system 102, 103 of Figure 2a.
[0186] - figure 5b illustrates a “lifting” system 303 according to the invention which will not be described only for its differences from system 103 in Figure 3b.
[0187] The “step-up” system 302, 303 according to the invention of figure 5b corresponds to the system 103 of figure 3b, in which the inductances L, Lfa, and capacitors CFA initially placed on the side of the outputs 41, 42 have been moved to the inputs 31, 32. It is a structure based on a step-up DC-DC converter (also called a parallel chopper).
[0188] In this case, each switching cell is electrically connected to the two output terminals without any intermediate element.
[0189] Each switching cell is electrically connected to one of the input terminals without any intermediate element.
[0190] Each switching cell is electrically connected to one of the input terminals via a main or filter inductor.
[0191] Each switching cell of the first set is electrically connected to one of the input terminals via a main inductor only.
[0192] Each switching cell of the second set is electrically connected to one of the input terminals via a filtering inductor in series with a filtering capacitor, only.
[0193] In the case of Figure 5b, the switching cell(s) of the main converter have a “boost” chopper structure and the switching cell(s) of the compensator have a “boost” chopper structure.
[0194] Each of these systems 101, 102, 103, 104, 201, 202, 203, 204, 301, 302, 303, 304, 401, 402, 403, 404 can be modified into a three-phase system, i.e. comprising three input terminals and / or three output terminals.
[0195] For example, figures 6a and 6b illustrate a “step-down” system 504 according to the invention which will only be described for its differences compared to the system 104 of figure 3c, and which is only a three-phase adaptation of the system 104 of figure 3c with three output terminals, and for which the main inductances L3, and filtering inductances LFa3 and filtering capacitor CFA3 have therefore been added in front of the third output 43.
[0196] Thus, in addition to the variants for DC-DC converters, the system according to the invention can be associated with three-phase inverters (step-down structure) or rectifiers (step-up structure). [Fig.6] represents the implementation for a three-phase inverter. Each inverter arm is associated with a compensation stage. The current ripple limiting and compensation inductances must be identical. The variants with coupled inductances remain valid.
[0197] Each arm and its compensation stage provide a path for the current ripples, which are therefore not transmitted to the load. The capacitors in the compensation stage support the low-frequency (LF) voltage. The load coupling (star or delta) is not important. Each arm is sized for a line current. The compensation stages are only sized for the maximum value of the ripple.
[0198] In terms of sizing, for all the variants represented previously, one can for example choose, depending on the elements present: - L = LFA or substantially equal, plus or minus 20%, ideally plus or minus 5% - Li = Lfai or substantially equal, plus or minus 20%, ideally plus or minus 5% - L2 = LFA2 or substantially equal, plus or minus 20%, ideally plus or
[0199]
[0200]
[0201]
[0202]
[0203] minus 5% - L3 = LFA3 or substantially equal, plus or minus 20%, ideally plus or minus 5% - Preferably L = Li = L2 = L3 or substantially equal, plus or minus 20%, ideally plus or minus 5%. The higher the tolerance between the values of L, Li, L2 and L3, the more the filtering level will be degraded. - The capacitor respectively CFA, CFAi, CFA2, CFA3 is sized so that the cut-off frequency Fcfa of the high-pass filter that it forms with the inductance respectively LFA, LFAi, LFA2, LFA3 is much lower than the switching frequency Fdec of the main converter and the compensator, i.e.: Fcfa « Fdec, typically 100xFcfa <Fdec, afin d’être sûr de filtrer toutes les harmoniques. - The switching frequency Fdec of the active compensator 62 is the same as that of the main converter 61. - The active compensator 62 and the main converter 61 share the same control and command circuit 3 and, as far as possible, the same types of drivers. Thus, a method for controlling any of the system embodiments according to the invention previously described, comprises a common control, by the control device 3, of the first set 1 and of the second set 2, by sending to the switches of the switching cells a signal causing the switches to switch between their on state and their off state at the same switching frequency for all the switches so that: - for each switching cell, this switching cell oscillates between two states, including a first state for which its first switch is on when its second switch is off and a second state for which its first switch is off when its second switch is on, - for each pair of switching cells, the first switch 111, 121 of the switching cell of the first set of the pair is blocking when the first switch 211, 221 of the switching cell of the second set of the pair is conducting and the first switch 111, 121 of the switching cell of the first set of the pair is conducting when the first switch 211, 221 of the switching cell of the second set of the pair is blocking. The second set generates a current ripple of the same amplitude but in phase opposition to that generated by the first set. To continue to illustrate the technical advantages of the invention over the state of the art, we will now describe in a little more detail certain signal simulations within embodiments of systems according to the invention.
[0204] [Fig.7] illustrates a system 102 with a static converter 61 of the serial chopper type as illustrated in Figures 2a and 3a.
[0205] With reference to these three figures, let us say:
[0206] - Ve the input voltage of the converter 61
[0207] - C the opening (C = 0) and closing (C = 1) command of transistor 111 of the main converter 61, and C the complementary control of C driving the transistor 211 of the compensator 62
[0208] - VT1 the voltage across the terminals of transistor 111 of the main converter 61
[0209] - VD1 the voltage across the diode 112 of the main converter 61
[0210] - IL1 the current in the inductance L between the main converter 61 and the output 41, and Is its average value
[0211] - VD2 the voltage across the diode 212 of the active compensator 62
[0212] - ILfa the current in the inductance LFA between the active compensator 62 and the output 42
[0213] - Icomp the sum of the currents IL1 and ILfa (= current in the load).
[0214] The corresponding waveforms are shown in [Fig.8] over two cutting periods.
[0215] Figure 9a is an electrical diagram, with the PSIM electronic simulation software, of the system 103 of Figures 2a and 3b with active compensator 62 associated with a current-reversible two-quadrant chopper.
[0216] Figure 9b is a validation of some of the signals (IL1, ILfa and Icomp identified in Figure 9a) with the PSIM electronic simulation software for this system 103.
[0217] Figure 10a is an electrical diagram, with the PSIM electronic simulation software, of the system 303 of Figures 5a and 5b with active compensator 62 associated with a parallel chopper.
[0218] Figure 10b is a validation of some of the signals (IL1, ILfa and le identified in Figure 10a) with the PSIM electronic simulation software for this system 103.
[0219] Figure 11a is an electrical diagram, with the PSIM electronic simulation software, of the system 504 of Figures 6a and 6b with active compensator 62 associated with a three-phase inverter.
[0220] Figure 11b is a validation of some of the signals (IL1, IL2, IL3, ICompl, IComp2, IComp3, IFA1, IFA2, IFA3 identified in Figure 11a) with the PSIM electronic simulation software for this system 103.
[0221] [Fig. 12] is a comparison, at a given load current filtering level, of the dynamics obtained for a reference 71 and with 73 and without 72 active compensator 62, for a system 104 of figure 3c with a 4-quadrant full-bridge chopper type converter.
[0222] [Fig. 13] is a comparison, at a given bandwidth, of the filtering level obtained for a reference 81 and with 83 and without 82 active compensator, for a system 104 of Figure 3c with a 4-quadrant full-bridge chopper converter.
[0223] Of course, the invention is not limited to the examples which have just been described and numerous adjustments can be made to these examples without departing from the scope of the invention.
[0224] All the embodiments previously described can:
[0225] - be declined for a conversion of current into voltage, for example simply by swapping source and load, in particular in the diagrams of [Fig.2]. In this case, the active compensator will filter the current this time at the input of the system (and not at the output as in the case of a voltage to current conversion), again generating a current ripple in phase opposition with respect to the main converter. Thus, for example, in figures 1, 3b, 3c, 4b, 4c, 4d, 5b, 6b and their corresponding description, the source Vdc or the reference 300 can be generalized to the case of a DC source or load respectively, and the load or reference 400 can be generalized to the case of a load or a source respectively (DC or AC for [Fig.l], DC for figure 3b, DC or AC for figure 3c, DC for figure 4b, AC or DC for figure 4c or 4d, AC for [Fig.6]). The invention can thus cover the case of the series chopper, step-up chopper, single-phase inverter, single-phase rectifier, etc.; and / or
[0226] - be generalized to n pairs of switching cells or n switching cells by set 1 or 2 (n a positive natural integer). For example, the case in Figure 3c is a case where n=2, but we can consider embodiments with n=3n n=4, etc.; and / or
[0227] - consider that the switching cells of the same set 1 or 2 have preference for control signals phase-shifted by en between the two cells of the same set 1 or 2 or by 2m / n between the n cells of the same set 1 or 2, because this allows interlacing and an apparent frequency of the load n times higher than the frequency of the switches and a greater attenuation of the filter is obtained: for example, in the case n=2 of figure 3c with a phase shift of en between cells 11 and 12 (and also between cells 21 and 22) switches 111 and 112 of cell 11 receive signals C and C respectively while switches 121 and 122 of cell 11 receive signals C and C respectively; and conversely, the switches 111 and 112 of the cell 11 receive the signals C and C respectively, while the switches 121 and 122 of the cell 11 receive the signals C and C' respectively, but this can be generalized to any phase shift, even if these cases are less efficient; and / or
[0228] - be generalized to q phases, with q a positive natural integer; for example, the case of [Fig.3] is a case at q=l and the case of [Fig.6] is a case at q=3, but we can have q=4, 5, etc.
[0229] Furthermore, the switching cell(s) of the main converter may have an “inductive accumulation chopper” (or “Buck-Boost” in English) structure and the switching cell(s) of the compensator may have an “inductive accumulation chopper” (or “Buck-Boost” in English) structure.
[0230] Of course, the various characteristics, forms, variants and embodiments of the invention can be combined with each other in various combinations to the extent that they are not incompatible or mutually exclusive. In particular, all the variants and embodiments described above can be combined with each other.
Claims
1. Claims A voltage-to-current or current-to-voltage conversion system, comprising input terminals (31, 32) and output terminals (41, 42), and between the input terminals and the output terminals: - a first set (1) and a second set (2), each of the first set and the second set comprising at least one switching cell (11, 12, 21, 22), and characterized in that: - the system further comprises a control device (3) common to the first set and to the second set, - each switching cell comprising: • a first switch (111, 121, 211, 221) which can be in an on state or in a off state, and comprising a transistor, and • a second switch (112, 122, 212, 222) which can be in an on state or a off state, and comprising a transistor and / or a diode, so that, for each switching cell, this switching cell oscillates between two states, including a first state for which its first switch is on when its second switch is off and a second state for which its first switch is off when its second switch is on, - the number of switching cells in the system being even, - each of the first set and the second set includes the same number of switching cell(s) - the at least one switching cell of the first set and the at least one switching cell of the second set being associated in pairs so that each switching cell of the first set is associated with a single switching cell of the second set, and each switching cell of the second set is associated with a single switching cell of the first set, the control device being arranged and / or programmed to send to the switches of the switching cells a signal arranged to switch the switches between their on state and their off state at the same switching frequency Fdec for all the switches so that, for each pair of switching cells, the first switch (111, 121) of the switching cell of the first set of the pair is off when the first switch (211, 221) of the switching cell of the second set of the pair is on and the first switch (111, 121) of the switching cell of the first set of the pair is on when the first switch (211, 221) of the switching cell of the second set of the pair is off, each switching cell of the second set being connected to one of the output terminals or to one of the input terminals via an inductor and a capacitor: this capacitor being arranged to eliminate a continuous current component, and / or this inductance and this capacitor forming a high-pass filter with a cut-off frequency Fcfa much lower than the switching frequency Fdec so that 100xFcfa <Fdec.
2.
3.
4. System according to claim 1, characterized in that the cells of switching the first set and the second set together form a four-quadrant chopper structure. System according to claim 1, characterized in that the two sets are connected in parallel between the input terminals and the output terminals: the first assembly (1) comprising a main converter, each switching cell of the first assembly being a switching cell of the main converter the second assembly (2) comprising an active switching compensator, each switching cell of the second assembly being a switching cell of the active switching compensator. System according to claim 3, characterized in that the switching cell(s) of the main converter have a structure series chopper and the compensator switching cell(s) have a series chopper structure.
5. System according to claim 3, characterized in that the switching cell(s) of the main converter have a two-quadrant chopper structure and the switching cell(s) of the compensator have a two-quadrant chopper structure.
6. System according to claim 3, characterized in that the switching cell(s) of the main converter have a four-quadrant chopper structure and the switching cell(s) of the compensator have a four-quadrant chopper structure.
7. System according to any one of the preceding claims, characterized in that the second assembly is arranged to generate a current ripple of the same amplitude but in phase opposition to that generated by the first assembly.
8. System according to any one of the preceding claims, characterized in that the first two switches of the same pair of switching cells are connected to the same input terminal(s) and output terminal(s) without passing through a transistor or a switch.
9. System according to any one of the preceding claims, characterized in that the two second switches of the same pair of switching cells are connected to the same input terminal(s) and output terminal(s) without passing through a transistor or a switch.
10. System according to any one of the preceding claims, characterized in that no switching cell is connected to an input terminal via a transistor.
11. System according to any one of the preceding claims, characterized in that no switching cell is connected to an output terminal via a transistor.
12. System according to any one of the preceding claims, characterized in that each switching cell is connected to the two input terminals without any intermediate element.
13. System according to claim 12, characterized in that each switching cell is connected to one of the output terminals without any intermediate element.
14. System according to claim 12 or 13, characterized in that each switching cell is connected to one of the output terminals by through an inductance.
15. System according to any one of claims 12 to 14, characterized in that each switching cell of the first set is connected to one of the output terminals via an inductance only.
16. System according to any one of claims 12 to 15, characterized in that each switching cell of the second set is connected to one of the output terminals via an inductor and a capacitor.
17. System according to any one of the preceding claims, characterized in that each switching cell is connected to the two output terminals without any intermediate element.
18. System according to claim 17, characterized in that each switching cell is connected to one of the input terminals without any intermediate element.
19. System according to claim 17 or 18, characterized in that each switching cell is connected to one of the input terminals via an inductance.
20. System according to any one of claims 17 to 19, characterized in that each switching cell of the first set is connected to one of the input terminals via an inductance only.
21. System according to any one of claims 17 to 20, characterized in that each switching cell of the second set is connected to one of the input terminals via an inductor and a capacitor.
22. System according to any one of claims 14 to 16 or 19 to 21, characterized in that each inductance (Lb L2) of the first set is coupled with an inductance (LFAb LFA2) of the second set.
23. System according to any one of the preceding claims, characterized in that the transistors of the switching cells comprise MOSFET and / or IGBT and / or GaN FET transistors.
24. Method for controlling a system according to any one of the preceding claims, characterized in that it comprises a common control, by the control device (3), of the first set and of the second set, by sending to the switches of the switching cells a signal causing the switches to switch between their on state and their off state at the same switching frequency for all switches so that: - for each switching cell, this switching cell oscillates between two states, including a first state for which its first switch is on when its second switch is off and a second state for which its first switch is off when its second switch is on, - for each pair of switching cells, the first switch (111, 121) of the switching cell of the first set of the pair is blocking when the first switch (211, 221) of the switching cell of the second set of the pair is conducting and the first switch (111, 121) of the switching cell of the first set of the pair is conducting when the first switch (211, 221) of the switching cell of the second set of the pair is blocking each switching cell of the second set being connected to one of the output terminals or to one of the input terminals via an inductor and a capacitor: - this capacitor removing a continuous current component, and / or - this inductance and this capacitor forming a high-pass filter with a cut-off frequency Fcfa much lower than the switching frequency Fdec so that 100xFcfa <Fdec.
25. Method according to the preceding claim, characterized in that the second assembly generates a current ripple of the same amplitude but in phase opposition to that generated by the first assembly.