METHOD AND SYSTEM FOR MANAGING ELECTRONIC PAPER DISPLAY

Abstract

The invention relates to a method for managing an electronic paper display comprising a set of pixels, a graphics controller controlling the pixels, a boost converter, and at least one capacitor disposed between an output of the boost converter and the ground of a power supply. The boost converter provides at least one signal for positioning the pixels. The method controls (S60) the graphics controller for putting the electronic paper display into deep sleep mode and controls (S62) the discharge of at least one capacitor via a discharge circuit. Figure to be published with the abstract: Fig. 6

Description

Title of the invention: METHOD AND SYSTEM FOR MANAGING DISPLAY ON ELECTRONIC PAPER Technical field

[0001] The present invention relates to the field of electronic paper display. More particularly, the present invention relates to a method and system for managing electronic paper display to make electronic paper insensitive to ultraviolet. STATE OF PRIOR ART

[0002] The use of electronic paper displays is becoming increasingly common because it allows content to be displayed without requiring a continuous power supply while still providing the ability to easily modify the content of the display.

[0003] Electronic paper (in English: e-paperp) is a display technique on flexible media (paper, plastic), electronically modifiable, seeking to imitate the appearance of a printed sheet and which, like paper, does not require energy to leave a text or an image displayed.

[0004] Unlike conventional display techniques that require backlighting or the emission of photons, electronic paper is purely reflective and uses ambient light in the same way as conventional paper. Electronic paper must be able to display text and images indefinitely, without consuming energy, either for the display or for a possible data processing system, and must allow what it displays to change. Most electronic papers consume energy only when the displayed content is changed.

[0005] An electronic paper display thus comprises a plurality of pixels, to which a plurality of values ​​can be assigned, each value being representative of a visual aspect of the pixel.

[0006] When a request to modify the graphic content of the electronic paper display is received by the display, an update command is executed by following three consecutive steps. The first step consists of transferring to a graphics controller, for each pixel whose value is modified, a target value of said pixel representative of the desired appearance of the pixel. The second step consists of configuring a look-up table of the graphics controller. The third step consists of modifying the state of each pixel whose value is modified by applying a parameter from the look-up table.

[0007] Following the third step, a deep sleep command is sent to the graphics controller which then generates a message confirming the transition to deep sleep mode.

[0008] Some types of electronic paper are sensitive to ultraviolet light, which can cause a loss of display contrast.

[0009] A conventional solution is to use an ultraviolet filter to solve this problem. Adding an ultraviolet filter increases the cost of the electronic paper display. Disclosure of the invention

[0010] To this end, according to a first aspect, a method is proposed for managing the display on electronic paper in a display system comprising a set of pixels, a graphics controller controlling the pixels, a voltage boost converter and at least one capacitor arranged between an output of the voltage boost converter and the ground of a power supply, the voltage boost converter providing at least one signal for positioning the pixels, characterized in that the method comprises the steps of:

[0011] - graphics controller command to put the display into deep sleep on electronic paper,

[0012] - control of the discharge of the at least one capacitor by means of a discharge circuit.

[0013] The invention also relates to a system for managing the display on electronic paper comprising a set of pixels, a graphics controller controlling the pixels, a voltage boost converter and at least one capacitor arranged between an output of the voltage boost converter and the ground of a power supply, the voltage boost converter providing at least one signal for positioning the pixels, characterized in that the system comprises a capacitor discharge circuit and in that the system comprises means for controlling the graphics controller for putting the electronic paper display into deep sleep and means for controlling the discharge of the at least one capacitor in the discharge circuit.

[0014] Thus, the present invention makes it possible to limit manufacturing costs by eliminating specific treatment of the display.

[0015] According to a particular embodiment of the invention, the management system further comprises a controller and the controller comprises the means for controlling the graphics controller for putting the electronic paper display into deep sleep and the means for controlling the discharge of the at least one capacitor in the discharge circuit.

[0016] According to a particular embodiment of the invention, the controller comprises means for detecting the deep sleep of the electronic paper display.

[0017] According to a particular embodiment of the invention, the voltage boost converter provides two signals for positioning the pixels and the system comprises a capacitor for each signal and the control means control the discharge of the two capacitors in the discharge circuit.

[0018] According to another aspect, there is provided a computer program product comprising program code instructions for executing the management method, when said instructions are executed by a processor.

[0019] According to another aspect, there is provided a non-transitory storage medium having stored thereon a computer program comprising program code instructions for executing the management method, when said instructions are read from said non-transitory storage medium and executed by a processor. Brief Description of the Drawings

[0020] The characteristics of the invention mentioned above, as well as others, will appear more clearly on reading the following description of at least one exemplary embodiment, said description being made in relation to the attached drawings, among which:

[0021] [Fig-1] schematically illustrates an example of hardware architecture of a system electronic paper display control;

[0022] [Fig.2] schematically illustrates an example of controlling the pixels of an electronic paper;

[0023] [Fig.3] schematically illustrates an exemplary embodiment of a discharge circuit according to the present invention;

[0024] [Fig.4] schematically illustrates an example of hardware architecture of a controller;

[0025] [Fig.5] shows different signals used for controlling the electronic paper display according to the present invention;

[0026] [Fig.6] represents an example of an algorithm for controlling the electronic paper display according to the present invention.

[0027] DETAILED DESCRIPTION OF EMBODIMENTS

[0028] [Fig.l] schematically illustrates an example of hardware architecture of an electronic paper display control system.

[0029] Electronic paper displays Ecr consist of pixels pix 1 to pixN and require, due to their technology, voltages of the order of + / -15V, for example + / -16V. These displays integrate a graphic controller Cg which, in addition to managing the display Cg, will regulate these voltages by an electronic assembly of the Conv boost converter type (in English Boost converter). The Conv boost converter generates two voltages denoted PREVGH and PREVGL, which serve as a reference for the CG graphics controller. PREVGH is the power supply used to generate the positive gate (Gate in English) (VGH) and source (VSH) voltages of the Mosfet transistors driving the pixels as described with reference to [Fig.2].

[0030] The boost converter Conv converts the direct voltage Vcc supplied by a battery Bat. A capacitor Cl is placed between the output of the boost converter Conv supplying the voltage PREVVGH and ground. A capacitor C2 is placed between the output of the boost converter Conv supplying the voltage PREVVGL and ground.

[0031] A controller Cont provides data to the graphics controller Cg so that the latter can control the pixels pixl to pixN to modify their state and obtain a display that corresponds to the data.

[0032] To optimize the consumption of the electronic paper display Ecr, after having modified the screen display, the electronic paper display Ecr goes into deep-sleep mode (very low consumption). In this very low consumption mode, the boost converter Conv is no longer regulated by the graphics controller Cg and the capacitors Cl and C2 at the output of the boost converter Conv discharge very slowly due to the very low consumption.

[0033] The inventors have noticed that if the electronic paper display Ecr is exposed to UV, the voltages across the capacitors C1 and C2, as long as they are not zero, associated with the leakage currents generated by the UV on the electronic paper display Ecr, will modify the state of the pixels

[0034] The present invention aims to remedy this problem by inserting into the display system a discharge circuit Dec of the capacitors C1 and C2 which is controlled by the controller Cont using a signal denoted CDec.

[0035] [Fig.2] schematically illustrates an example of pixel control of an electronic paper.

[0036] The PREVGH voltage is the power supply used to generate the positive Gate (VGH) and Source (VSH) voltages of the pixel control mosfet transistors. PREVGL is used to generate the power supply for the negative voltages (VGL, VSL).

[0037] The electronic paper display Ecr is made up of microcapsules. In each of the microcapsules, there are positively charged particles (black pigments) and negatively charged particles (white pigments). These particles are moved from the top to the bottom of the microcapsule by applying a positive or negative voltage to the pixel electrode using a B / W signal.

[0038] [Fig. 3] schematically illustrates an exemplary embodiment of a discharge circuit according to the present invention.

[0039] The control signal CDec is connected to a first termination of a resistor RIO. A second termination of the resistor RIO is connected to the base of the transistor Ql, to the base of transistor Q2, to a first termination of a resistor R6 and to a first termination of a resistor R9. A second termination of resistor R6 is connected to the VCC supply and a second termination of resistor R9 is connected to the VCC supply.

[0040] The emitters of the PNP transistors Q1 and Q2 are connected to the power supply VCC.

[0041] The collector of transistor Ql is connected to the gate of a MOSFET transistor X3 of type N and to a first termination of a resistor R5.

[0042] A second termination of resistor R5 is connected to signal PREVGL and to a first termination of resistor R4.

[0043] The drain of transistor X3 is connected to ground and the source of transistor X3 is connected to a second termination of resistor R4.

[0044] The collector of transistor Q2 is connected to the gate of an N-type MOSFET transistor X4 and to a first termination of a resistor RI 1.

[0045] A second termination of the resistor RI 1 is connected to ground.

[0046] The source of transistor X4 is connected to ground and the drain of transistor X4 is connected to a first termination of a resistor R7. A second termination of the resistor R7 is connected to the PREVGH signal.

[0047] [Fig.4] schematically illustrates an example of hardware architecture of a controller;

[0048] [Fig. 4] schematically illustrates an example of hardware architecture of the Cont controller. According to this example, the Cont controller comprises, connected by a communication bus 410: a processor or CPU (“Central Processing Unit” in English) 401; a RAM (“Random Access Memory” in English) 402; a ROM (“Read Only Memory” in English) 403; a storage unit or a storage media reader, such as an SD (“Secure Digital” in English) card reader 404; a set of interfaces 405 allowing the Cont controller to communicate with the other elements of the hardware architecture presented above in relation to [Fig. 1].

[0049] The processor 401 is capable of executing instructions loaded into the RAM 402 from the ROM 403, from an external memory, from a storage medium, or possibly from a communication network. When the Cont controller is powered up, the processor 401 is capable of reading instructions from the RAM 402 and executing them. These instructions form a computer program causing the processor 401 to implement all or part of the control method described below.

[0050] Thus, all or part of the control method described below can be implemented in software form by executing a set of instructions by a programmable machine, such as a DSP (“Digital Signal Processor” in English) or a microcontroller. All or part of the algorithm and steps described here can also be implemented in hardware by a machine or a dedicated component, such as an FPGA (Field-Programmable Gate Array) or an ASIC (Application-Specific Integrated Circuit).

[0051] [Fig.5] shows different signals used for controlling the electronic paper display according to the present invention.

[0052] In [Fig.5], the signals PREVGH, PREVGL, B / O and CDec are represented.

[0053] At time tl, the graphics controller Cg completes a step of refreshing the pixels and sets the signal marked B / O to high level so as to indicate to the Cont controller that the operation of refreshing the electronic paper display has been carried out.

[0054] The B / O signal goes from low level to high level.

[0055] At time t2, the controller Cont notifies the graphics controller Cg requesting it to go into the so-called deep sleep mode and upon receiving this command, the graphics controller Cg proceeds to put the electronic paper display Ecr into deep sleep and sets the signal denoted B / O to the low level until sleep has been performed.

[0056] At time t3, the sleep mode is performed and the graphics controller sets the B / O signal to high level so as to indicate to the Cont controller that the operation has been performed.

[0057] At time t3, the controller Cont sets the signal CDec to the low level which causes the saturation of the transistors X3 and X4, the discharge of the capacitor Cl into the resistor R7 and the discharge of the capacitor C2 into the resistor R4.

[0058] The values ​​of resistors R4 and R7 are chosen so that capacitors C1 and C2 discharge in a time period of no more than 10 milliseconds.

[0059] At time t4, capacitors C1 and C2 are discharged.

[0060] [Fig.6] represents an example of an algorithm for controlling the display on electronic paper.

[0061] In step S60, the controller Cont notifies the graphics controller Cg requesting it to go into the so-called deep sleep mode and upon receipt of this command, the graphics controller Cg proceeds to put the electronic paper display Ecr into deep sleep and sets the signal denoted B / O to the low level until sleep has been performed.

[0062] In step S61, the controller Cont checks whether the sleep mode is performed by checking whether the signal B / O is at the high level.

[0063] If so, the controller Cont proceeds to step S62.

[0064] In step S62, the controller Cont sets the signal CDec to the low level which causes the saturation of the transistors X3 and X4, the discharge of the capacitor C1 into the resistor R7 and the discharge of the capacitor C2 into the resistor R4.

Claims

Claims

1. Method for managing the display on electronic paper in a display system comprising a set of pixels, a graphics controller controlling the pixels, a voltage boost converter and at least one capacitor arranged between an output of the voltage boost converter and the ground of a power supply, the voltage boost converter providing at least one signal for positioning the pixels, characterized in that the method comprises the steps, executed by a controller, of: - command (S60) of the graphics controller for putting the electronic paper display into deep sleep, - verification (S61) of the deep sleep of the electronic paper display, - and if so, control (S62) of the discharge of the at least one capacitor via a discharge circuit to avoid a modification of the pixels linked to the leakage currents generated by UV on the electronic paper display.

2. Electronic paper display management system comprising a set of pixels, a graphics controller controlling the pixels, a voltage boost converter and at least one capacitor arranged between an output of the voltage boost converter and the ground of a power supply, the voltage boost converter providing at least one signal for positioning the pixels, characterized in that the system comprises a discharge circuit for the at least one capacitor and in that the system comprises means for controlling the graphics controller for putting the electronic paper display into deep sleep,means for verifying that the electronic paper display has been put into deep sleep and means for controlling the discharge of the at least one capacitor in the discharge circuit if the verification means have verified that the electronic paper display has been put into deep sleep and to avoid a modification of the pixels linked to leakage currents generated by UV on the electronic paper display, the management system further comprising a controller and in that the controller comprises the means for controlling the graphics controller for, putting the electronic paper display into deep sleep, means for controlling the discharge of the at least one capacitor in the discharge circuit and means for verifying the putting into deep sleep of the electronic paper display.

3. System according to claim 2, characterized in that the voltage boost converter provides two signals for positioning the pixels and in that the system comprises a capacitor for each signal and the control means control the discharge of the two capacitors in the discharge circuit.

4. A computer program product comprising program code instructions for executing the method of claim 1, when said instructions are executed by a processor.

5. A non-transitory storage medium having stored thereon a computer program comprising program code instructions for executing the method of claim 1, when said instructions are read from said non-transitory storage medium and executed by a processor.

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