Sub-module of an arm of an MMC type HVDC converter, and MMC converter comprising such a module

Abstract

Sub-module (101) of an MMC converter comprising a first and a second switching unit (1, 2) each comprising a diode (D1, D2), an IGCT (S1, S2), a first connector (10) connected to a first pole (11) of the diode and a first pole (12) of the IGCT, and a second connector (13) connected to a second pole (14) of the diode and a second pole (32) of the IGCT, the IGCTs being arranged in a pressed housing, at least one of the diodes being arranged in a plastic module type housing, a first and second capacitor (C1, C2) placed between the first and second terminal and arranged on either side of the diodes and the IGCTs, symmetrically with respect to each other. Figure for the abstract: Fig. 5.

Description

Title of the invention: Sub-module of an arm of an MMC type HVDC converter, and MMC converter comprising such a module

[0001] The application relates to the technical field of modular multi-level converters (MMC), and more particularly to a sub-module of an arm of a modular multi-level converter.

[0002] The invention relates more particularly to high voltage direct current transmission networks (hereinafter referred to as HVDC networks).

[0003] HVDC networks are particularly envisaged as a solution for the interconnection of disparate or non-synchronous electricity production sites. HVDC networks are particularly envisaged for the transmission and distribution of energy produced by offshore wind farms rather than alternating current technologies, due to lower line losses and the absence of the impact of parasitic network capacitances over long distances. Such networks typically have nominal operating voltage levels above 75 kV, particularly in the order of 100 kV and above.

[0004] In order to meet market needs, power electronics interfaces must demonstrate extreme reliability, high efficiency and remain economically affordable.

[0005] In this respect, it is known to use MMC technology as a means of converting AC / DC type voltages.

[0006] As can be seen in [Fig.l], an MMC converter 1 typically comprises a plurality of arms 2, connected to one of the phases PI, P2, P3, and delivering a direct voltage, and allows - an AC / DC or DC / AC conversion.

[0007] As can be seen in [Fig.l], the half-arms 2 each have sub-modules SM, which are arranged in series. The sub-modules most often have a topology called a half-bridge, or less often a full bridge, also called a full bridge. However, other topologies can be used depending on the intended application.

[0008] Such MMC converters are particularly suitable for HVDC applications, and have significant advantages over previously used conversion technologies.

[0009] Thus, it is known that such MMC converters offer great modularity because they can operate over a wide voltage range, a low switching frequency, making it possible to limit losses, and a low harmonic distortion rate. (see for example FALAHI, Design, Modeling and control of Modular Multilevel Converter based HVDC Systems, 2015).

[0010] In [Fig.2] a typical SM submodule with use of IGCT is shown. As can be seen, such a submodule comprises a CSM capacitor connected in series with a power circuit, both protected for example by a permanent or semi-permanent switch.

[0011] The CSMse capacitor acts in the MMC module as a voltage source, and is connected to the rest of the circuit via a connection bar, or current bar, also known as a busbar.

[0012] The power circuit comprises semiconductors, in this case two circuits each comprising a diode DSM1, DSM2 and a switch SSM1, SSM2, mounted in parallel.

[0013] There are mainly two component technologies that can be chosen to constitute the SSM1, SSM2 switches of an MMC module: components belonging to the transistor family, components belonging to the thyristor family.

[0014] Components belonging to the transistor family, called IGBT, have the advantage of being simple to control and efficient. Such components are the most frequently used.

[0015] The components belonging to the family of thyristors hereinafter called IGCT, and offer compared to IGBT the advantages of having a lower level of conduction losses, and of being able to have higher current levels at equal voltage (Boutry et al., Figures-of-merit end current metric for the comparison of igets and igbts in modular multilevel converters).

[0016] However, IGCT components have drawbacks when switching, which currently limit their use within an MMC module.

[0017] Indeed, during switching on (also called "tum-on"), it is not possible to control the speed of variation of the di / dt current flowing in the power circuit of the half-bridge, which creates a significant stress on the diodes DSM1, DSM2. However, such diodes DSM1, DSM2 are very dependent on the switching conditions (see for example Tianyu Wei et al., Experimental evaluation of IGCT converters with reduced di / dt limiting inductance).

[0018] Such a current variation can for example take a value greater than 1.2 kA / ps, which can have the consequence of damaging or even destroying the diode, by dynamic avalanche phenomenon or avalanche effect.

[0019] To avoid facing such a problem when using IGCT for switches SSM1, SSM2 which, it is known to use a suppressor circuit, better known as a snubber circuit. Such a circuit is shown in [Fig.2] and is consisting for example of a resistor Rsnu, diode Dsnu, capacitor Csnu and inductance Lsnu.

[0020] However, such a circuit adds volume, weight, losses to the MMC converter and generates additional costs.

[0021] The invention aims to address the aforementioned drawbacks.

[0022] A first object is to propose a sub-module of an arm of an MMC converter using IGCTs as a switch.

[0023] A second object is to propose such a sub-module having limited weight and size.

[0024] A third object is to propose such a sub-module limiting losses by Joule effect.

[0025] A fourth object is to propose such a sub-module having a limited manufacturing cost.

[0026] A fifth object is to propose an MMC converter integrating a sub-module as presented above.

[0027] There is proposed according to a first aspect, a sub-module of a half-arm of an AC-DC converter of the MMC type for HVDC use, the sub-module comprising a first electrical circuit integrating a first switching unit and a second switching unit each comprising a first diode, a first IGCT, a first connector electrically connected to a first pole of the first diode and a first pole of the first IGCT, and a second connector electrically connected to a second pole of the first diode and a second pole of the first IGCT, a first terminal electrically connected to the first connector of the first switching unit, a second terminal electrically connected to the second connector of the second switching unit, and a third terminal electrically connected to both the second connector of the first switching unit and the first connector of the second switching unit,a capacitance arranged between the first terminal and the second terminal, the first IGCTs being arranged in a pressed-type housing, the capacitance being formed by a first capacitor and a second capacitor, both placed between the first terminal and the second terminal, the first and second capacitors being arranged on either side of the first diodes and the first IGCTs, symmetrically with respect to each other with respect to a first median plane intersecting the first diodes and the first IGCTs, the first median plane being a plane of symmetry of the sub-module.

[0028] Various additional features may be provided alone or in combination:

[0029] - the first diodes are all arranged in a plastic module type housing, or one of the first diodes of the first and / or second switching unit is arranged in a plastic module type package and the other diode is arranged in a pressed type package;

[0030] - the sub-module comprises a cooling unit comprising a plate equipped with a first location intended to receive a first diode, and a second location intended to receive a first IGCT, the plate comprising a conduit capable of receiving a refrigerant fluid;

[0031] - a first diode is a diode made of a material comprising silicon carbide;

[0032] - the first capacitor comprises a first connection member, the second capacitor comprises a second connection member, the first terminal comprises a first connection means, the first connection means and the first connection member are connected by means of a first interconnection bar and the first connection means and the second connection member are connected by means of a second interconnection bar, the interconnection bars being symmetrical to each other with respect to the first median plane;

[0033] - the first capacitor comprises another first connection member, the first connection members are arranged aligned with each other, defining a dummy line parallel to the first median plane, the second capacitor comprises another second connection member, the second connection members are arranged aligned with each other, defining a dummy line parallel to the first median plane, the first interconnection bar electrically connecting the first connection members to a first connection means, the second interconnection bar electrically connecting the second connection members to the first connection means;

[0034] - a first interconnection bar comprises a first connecting portion, and a first connecting portion, the first connecting portion extending between a first connecting means and the first connecting portion, and the first connecting portion connecting the first connecting members to each other, and a second interconnecting bar comprises a second connecting portion, and a second connecting portion, the second connecting portion extending between the first connecting means and the second connecting portion, the second connecting portion connecting the second connecting members to each other, the interconnecting bars having a T shape;

[0035] - at least one interconnecting bar is a laminated interconnecting bar;

[0036] - the sub-module further comprises a second electrical circuit integrating a third switching unit and a fourth switching unit each comprising a second diode, a second IGCT, a third connector electrically connected to a first pole of the second diode and to a first pole of the second IGCT, and a fourth connector electrically connected to a second pole of the second diode and to a second pole of the second IGCT, a fourth terminal electrically connected to the third connector of the third switching unit, and to the first terminal, a fifth terminal electrically connected to the fourth connector of the fourth switching unit as well as to the second terminal, a sixth terminal electrically connected to both the fourth connector of the third switching unit and the third connector of the fourth switching unit, a third capacitor disposed between the fourth terminal and the fifth terminal, the third capacitor being positioned symmetrically to the first capacitor with respect to a second median plane passing through the middle of the second capacitor, and parallel to the first median plane, the second IGCTs and the second diodes being positioned between the first capacitor and the third capacitor.

[0037] -the second IGCTs are arranged in a pressed housing, the second diodes are both arranged in a plastic module type housing, or one of the diodes of the third and / or fourth switching unit is arranged in a plastic module type housing, the other second diode being arranged in a pressed housing;

[0038] - a second diode is a diode comprising silicon carbide;

[0039] - the capacitors have the same value equal to one third of the capacity;

[0040] - the capacitance has a value varying in a range between 1 and 10 mF;

[0041] - the sub-module comprises a thyristor in parallel with the second communication unit mutation, the thyristor being intended to protect the sub-module against short circuits.

[0042] According to a second aspect, there is provided an MMC type AC-DC converter for HVDC use comprising the sub-module as presented above.

[0043] Other characteristics and advantages of the invention will appear more clearly and concretely on reading the following description of embodiments, given by way of non-limiting example, and made with reference to the appended drawings in which:

[0044] [Fig-1] [Fig.l] illustrates a schematic representation of a typical example of MMC converter;

[0045] [Fig.2] [Fig.2] illustrates a sub-module of an MMC converter according to the art previous using IGCTs;

[0046] [Fig.3] [Fig.3] illustrates a schematic representation of an example of an MMC converter according to the invention;

[0047] [Fig.4] [Fig.4] illustrates an ideal electrical diagram modeling a first mode of realization of the sub-module of an MMC converter;

[0048] [Fig.5] [Fig.5] illustrates an electrical diagram giving a real modeling of the sub-module according to the first embodiment;

[0049] [Fig.6] [Fig.6] illustrates a schematic perspective view of the architecture of the sub-module according to a first variant of the first embodiment of the sub-module;

[0050] [Fig.7] [Fig.7] illustrates a schematic perspective view in section along plane VILVII of [Fig.6] of the first mode of the sub-module;

[0051] [Fig.8] [Fig.8] illustrates a schematic perspective view of a second variant of the first embodiment of the sub-module;

[0052] [Fig.9] [Fig.9] illustrates an electrical diagram giving a real modeling of the sub-module according to the second embodiment;

[0053] [Fig. 10] [Fig. 10] illustrates a schematic perspective view of the architecture of the sub-module of the second embodiment of the sub-module;

[0054] [Fig. 11] [Fig. 11] illustrates a graph representing the absolute value of the voltage, and the current as a function of time at the terminals of a diode according to the state of the art;

[0055] [Fig. 12] [Fig. 12] illustrates a side schematic view of a cooling unit provided with a first diode and a first IGCT;

[0056] {[Fig.13]] [Fig.13] illustrates a schematic top view of a cooling unit;

[0057] [Fig. 14] [Fig. 14] illustrates a schematic sectional view of the cooling unit according to section plane XIV-XIV of [Fig.12].

[0058] Reference is made to [Fig. 3], which represents an MMC converter 100 intended to enable the conversion of an alternating current having a first phase PI, a second phase P2, and a third phase P3.

[0059] Thanks to such an MMC 100 converter, a direct voltage is obtained between the points DC1 and DC2, usable for the transport of HVDC electricity, the MMC 100 converter operating in so-called AC / DC mode.

[0060] Such an MMC 100 converter is reversible, that is to say that it is also possible to present a direct voltage at the input, making it possible to have an alternating voltage at the output. We are talking about a converter operating in DC / AC mode.

[0061] Without this being limiting, the remainder of the description describes an MMC converter operating in AC / DC mode.

[0062] As can be seen in [Fig.3], each of the phases P1, P2, P3 is connected to an arm 104, for example made up of two half-arms 102, composed in particular of several sub-modules 101 connected together in series.

[0063] In the embodiments shown, the sub-modules 101 comprise electrical circuits provided with power electronic components, namely diodes, IGCTs and capacitors.

[0064] Throughout the remainder of the description, it is considered that a component is formed by a semiconductor material ensuring the active or main functionality of the component. Such components are arranged in a housing intended to receive the semiconductor, i.e. the component.

[0065] The term “case”, also known as “package”, designates the packaging allowing the electrical connections of the semiconductor material and its heat dissipation.

[0066] In [Fig.3], only two sub-modules 101 per half-arm 102 are shown, but in general each of the half-arms 102 comprises between ten and a hundred sub-modules 101. Also, an MMC converter 100 typically comprises between a hundred and a thousand sub-modules 101.

[0067] A sub-module 101 according to a first embodiment is now described with reference to FIGS. 4 to 8. Such a sub-module has a half-bridge topology or structure, also called a “Half-Bridge” structure.

[0068] Such a half-bridge structure is currently the most frequently used, and has the advantage of limiting the number of components compared to other topologies.

[0069] As can be seen in the electrical diagrams of Figures 3 and 4, such a sub-module 101 has a first electrical circuit 103 comprising a first switching unit 1, and a second switching unit 2. The switching units 1, 2 are connected in series with each other.

[0070] As can be seen in Figures 5 and 6, such switching units 1, 2 each comprise a first diode D1, D2, and a first IGCT SI, S2. As can be seen, each diode D1, D2 and each first IGCT SI, S2 is provided with a first pole 12 and a second pole 32.

[0071] As can be seen in Figures 5 and 6, within each switching unit 1, 2, a first diode D1, D2 is connected in parallel with a first IGCT S1, S2. More specifically, each of the switching units 1, 2 comprises a first connector 10 and a second connector 13.

[0072] As shown in Figures 5 and 6, a first pole 11 of the first diode D1, D2 and a first pole 12 of the first IGCT SI, S2 are connected to the first connector 10, and a second connector 13 electrically connected to a second pole 14 of the first diode D1, D2 and a second pole 32 of the first IGCT SI, S2.

[0073] As can be seen in Figures 5 and 6, the sub-module 101 comprises for example a first terminal 15 and a second terminal 16, between which the two switching units 1, 2 are arranged. Also, the first terminal 15 is electrically connected to the first connector of the first switching unit 1, and the second terminal is connected to the second connector 13 of the second switching unit 2.

[0074] Furthermore, the sub-module 101 further comprises a third terminal 17 arranged between the two switching units 1, 2. Such a third terminal 17 is electrically connected to the second connector 13 of the first switching unit 1 and to the first connector 10 of the second switching unit 2. Such an arrangement makes it possible to connect the two switching units 1, 2 in series.

[0075] In order to enable DC / AC conversion, the sub-module 101 comprises an equivalent capacitor unit CSM, arranged between the first terminal 15 and the second terminal 16.

[0076] The architecture of an MMC sub-module 101 according to a first embodiment is now described with reference to FIGS. 6, 7 and 8.

[0077] In such a first embodiment, an equivalent capacitor unit CSM is provided, and a second capacitor C2, two first IGCTs SI, S2 and two first diodes D1, D2.

[0078] In order to limit the occurrence of destructive phenomena for one or the first diodes D1, D2, the equivalent capacitor unit CSM is in the form of a first capacitor C1, and a second capacitor C2, each of them being arranged between the first terminal 15 and the second terminal 16. Such a characteristic makes it possible to give the sub-module 101 an architecture, a symmetrical configuration.

[0079] More specifically, the first capacitor C1 and the second capacitor C2 are arranged on either side of the first diodes D1, D2 and the second IGCTs S1, S2, symmetrically with respect to each other.

[0080] In other words, the sub-module 101 comprises a first fictitious median plane P intersecting the first diodes D1, D2 and the first IGCTs SI, S2, this median plane P being a plane of symmetry.

[0081] In such a configuration, the first capacitor C1 and the second capacitor C2 are arranged in parallel with each other respectively on branches 105, 106, the sum of the values ​​of the capacitors C1, C2 defining the value CSM of the equivalent capacitor unit.

[0082] As mentioned above, in the absence of such a symmetrical arrangement and in the absence of a suppressor circuit, destructive phenomena have been observed for the first diodes D1, D2, when at least one first diode D1, D2 is arranged in a housing different from the housing receiving the IGCTs S1, S2.

[0083] Such phenomena are described in more detail with reference to [Fig. 11].

[0084] A first phenomenon occurs during the switching of the first diode Dl, D2, that is to say when the first diode D1, D2 passes from a passing state, corresponding to a state allowing the passage of current, to a non-passing state, corresponding to a blocked state where the current is zero.

[0085] During such a change of state, the appearance of a phenomenon of re is noted. reverse recovery during which a negative current peak occurs. During the recovery time, visible on a first zone ZI in [Fig.l 1], an overvoltage appears at the poles of a first diode Dl, D2, such an overvoltage being able to exceed the predetermined breakdown voltage of the first diode Dl, D2, and lead to the destruction of the component.

[0086] A second phenomenon identified during the recovery period may appear in the absence of a symmetrical configuration of the sub-module 101 and in the absence of a suppressor circuit, is a dynamic avalanche effect, that is to say an uncontrolled multiplication of the charges within the polarized PN junction constituting the first diodes D1, D2, in the event of very high dV / dt, causing destruction at a voltage lower than the breakdown voltage of the first diodes D1, D2.

[0087] A third phenomenon identified at the end of the recovery period, potentially likely to appear in the absence of a suppressor circuit, is a so-called "snap-off" effect, i.e. an acceleration of the speed of establishment of the current di / dt which produces an additional overvoltage at the terminals of the first diodes D1, D2. Such a third phenomenon can lead to the breakdown of the first diodes D1, D2. Such a phenomenon takes place during a third zone Z3, visible in [Fig. 11].

[0088] Such destructive phenomena are notably linked to the presence of loop inductances L1, L2, also called switching inductances within the conductors in the first circuit 103, i.e. in the conductors forming the sub-module 101. Such loop inductances L1, L2 have values ​​that are all the greater as the conductors are long. Such loop inductances L1, L2 can be modeled by an equivalent loop inductance LSM. The inverse of the equivalent loop inductance LSM is equal to the sum of the inverse of each of the loop inductances L1, L2.

[0089] As shown in [Fig.5], the first capacitor C1 is arranged on a first branch 105, which comprises a first loop inductance L1, and the second capacitor C2 is arranged on a second branch 106 comprising a second loop inductance L2.

[0090] Also, as can be observed in Figures 6 to 8, positioning the first capacitor C1 and the second capacitor C2 symmetrically with respect to each other, positioning the branches 105, 106 in parallel with each other, makes it possible to reduce the value of the equivalent loop inductance LSM, while adding the respective values ​​of the first capacitor C1 and the second capacitor C2.

[0091] In such a first embodiment, the first IGCTs S1, S2 are each arranged in a pressed-type housing, also known as a “press-pack package”.

[0092] Advantageously, such a pressed-type housing is obtained by pressing under a force, for example having a value of 40kN, the semiconductor forming the IGCT between two radiators by means of a jaw, making it possible to make electrical connections and thermal connections.

[0093] In a first sub-embodiment, the first diodes D1, D2 are both arranged in a plastic module type housing. Such a housing is previously obtained by molding, and has for example thermoplastic walls. In such a plastic module type housing, the semiconductor material forming a first diode D1, D2 is connected to the electrical circuit and then generally kept screwed onto a radiator (not visible in the figures).

[0094] The choice of arranging the first diodes D1, D2 within the same type of plastic housing makes it possible to increase the choice available for the diodes, and in particular to allow the use of diodes D1, D2 allowing a significant speed of variation of the current over time (di / dt) during switching.

[0095] In a second sub-embodiment, not shown, one of the first diodes D1, D2 is arranged in a pressed-type package, and the other first diode D1, D2 is arranged in a plastic module-type package. Also, the first diodes D1, D2 have a different package technology, having strictly the same effects as those described above. Such a second sub-embodiment is not shown.

[0096] Thus, in the first sub-embodiment, and the second sub-embodiment, the sub-module 101 comprises first IGCTs SI, S2 arranged in a pressed-type housing, and at least one component, for example a first diode D1, D2 arranged in a plastic module-type housing. The sub-module 101 therefore comprises two types of housings for the components SI, S2, D1, D2.

[0097] Having a mixture of housings within the same sub-module 101 has the disadvantage of complicating the general architecture of the sub-module 101, since having components having two different housing technologies results in a larger footprint than if all of the components were each arranged in the same housing technology.

[0098] However, it has been observed that the mixture of package technology allows the use of diodes that are more resistant to high rates of variation of the current over time (di / dt) flowing within the circuit.

[0099] In this way, the combination of a mixture of package technologies between the first diodes D1, D2, and the first IGCTs SI, S2 contributes to benefiting from the advantages linked to the use of IGCTs without it being necessary to use a suppressor circuit. The destructive phenomena described above are also avoided.

[0100] In the mode of representation shown in Figures 6 to 8, the cooling of at least one of the first diodes D1, D2 is ensured by means of a first cooling device RI, on the front in front of the first diodes D1, D2. In order to facilitate the reading of the figures, the first cooling device RI is only shown in [Fig.6].

[0101] In the mode of representation shown in Figures 6 to 8, the cooling of at least one of the first IGCTs SI, S2 is ensured by means of a second cooling device R2, in extension of the first IGCTs SI, S2.

[0102] Alternatively to the first cooling device RI and the second cooling device R2, and as shown in [Fig. 12], the sub-module 101 advantageously comprises a cooling unit R3 common to a first diode D1, D2 and to a first IGCT SI, S2.

[0103] As visible in Figures 12 to 14, the cooling unit R3 comprises a plate 50 provided with a first location 51 intended to receive a first diode D1, D2 and a second location 52 intended to receive a first IGCT S1, S2.

[0104] As can be seen in Figures 14 and 15, the plate 51 comprises a conduit 53 allowing the circulation of a refrigerant fluid within the plate 50.

[0105] The use of a cooling unit R3 offers a smaller footprint in use, since there is common use of the same cooling means compared to a first cooling device RI and a second cooling device R2.

[0106] In a third sub-embodiment mode not shown in the figures, all of the first diodes D1, D2 and the first IGCTs SI, S2 are arranged in the same pressed-type housing. In such a third sub-embodiment mode, the advantages of positioning the first capacitor C1 and the second capacitor C2 symmetrically relative to each other are obtained. In addition, since the housing of the first diodes D1, D2 and the first IGCTs SI, S2 are of the same type, they can be positioned in the same stack, which makes it possible to limit the size.

[0107] The architecture of the sub-module 101 according to the first sub-embodiment is presented, with reference to figures 6 and 7.

[0108] As shown in Figures 6 to 8 and 10, the first diodes D1, D2, the first IGCTs SI, S2 and the capacitors C1, C2 are advantageously connected to each other by means of interconnection bars 601, 602, 603.

[0109] Such interconnection bars 601, 602, 603 are in the form of bars extending substantially along their length, and are made of a conductive material such as a metallic material, for example copper, brass or aluminum.

[0110] As can be seen in Figures 6 to 8, the first capacitor C1 advantageously comprises two first connection members 26, each respectively forming a positive pole and a negative pole of the first capacitor C1. In the present description, we speak of a first positive connection member 26, and of a first negative connection member 26.

[0111] In the same way, the second capacitor C2 comprises two second connection members 27, each respectively forming a positive pole and a negative pole of the second capacitor C2. In the present description, we speak of a second positive connection member 27, and of a second negative connection member 27.

[0112] In the first embodiment shown in Figures 6 and 7, capacitors C1, C2 are provided, each provided with only two connection members 26, 27.

[0113] In the second embodiment shown in [Fig.8], capacitors C1, C2 are provided, each provided respectively with four connection members 26, 27.

[0114] More specifically, the first capacitor C1 comprises four first connection members 26, namely two first positive connection members 26 and two first negative connection members 26. The second capacitor C2 comprises four second connection members 27, namely two second positive connection members 27 and two second negative connection members 27.

[0115] In other embodiments not shown, capacitors C1, C2 are provided respectively with more than four connection members or poles, i.e. more than two connection members per positive and negative pole.

[0116] Advantageously, the IGCTs SI, S2 are stacked on top of each other forming a first stack 35, also called a stack, which makes it possible to limit the size of such components, while controlling costs.

[0117] The manner in which the capacitors C1, C2 are connected to the units 1, 2 in the first embodiment variant is now described.

[0118] In order to allow the connection between the units 1, 2 and the capacitors C1, C2, a first connection means 28 is advantageously provided, modeled in Figures 4 and 5 by the connection between the first terminal 15 and the first connector 10. Such a first connection means 28 is visible in [Fig.7].

[0119] Advantageously, the connection between a first connection member 26 and the first connection means 28 is made using a first interconnection bar 601.

[0120] Advantageously, the connection between a second connection member 27 and the first connection means 28 is made using a second bar 602 interconnection.

[0121] The manner in which the capacitors C1, C2 are connected to the switching units 1, 2 in the second embodiment, shown [Fig.8], is now described.

[0122] In such a second variant embodiment, the first capacitor C1 comprises four first connection members 26, that is to say two first connection members 26 forming a positive pole, and two first connection members 26 forming a negative pole.

[0123] In such a second variant embodiment, the second capacitor C2 comprises four second connection members 27, i.e. two second connection members 27 forming a positive pole, and two second connection members 27 forming a negative pole.

[0124] In such a variant, for example, a first interconnection bar 601 is provided, providing the electrical connection between the first connection means 28 and two first connection members 26.

[0125] Advantageously, the first interconnection bar 601 advantageously has a first connecting part 6010 and a first connection part 6011, connected together, so as to form a T. The first connection part 6011 is for example connected to the first connection members 26, in the example of [Fig.8] to the first two connection members 26 and to the first connecting part 6010.

[0126] In such a variant, a second interconnection bar 602 is for example provided, providing the electrical connection between the first connection means 28 and two second connection members 28, the interconnection bar having a substantially T shape.

[0127] Advantageously, the second interconnection bar 602 has a second connecting part 6020 and a second connection part 6021, connected together, so as to form a T. The second connection part 6021 is for example connected to the second connection members 27, in the example of [Fig.8] to the two second connection members 27 and to the second connecting part 6020.

[0128] The first interconnection bars 601 and the second interconnection bars 602 are advantageously arranged in parallel two by two, and consequently all have the same length. In this way, the sub-module 101 has a symmetrical configuration. Furthermore, such an arrangement is favorable with regard to the mounting of the sub-assembly 101.

[0129] It should be noted that the use of capacitors C1, C2 having a plurality of connection members 26, 27 has no negative impact on the overall operation of the sub-module. Also, the sub-module 101 can be used regardless of the number of connection members 26, 27. Such a characteristic is advantageous, because offers a wide variety of possible capacitors to implement submodule 101.

[0130] With regard to the interconnections, the principle set out above is applicable for a capacitor C1, C2 each having more than two positive connection members 26, 27 and more than two negative connection members 26, 27. Thus, in general, a capacitor having a number n of connection members 26, 27 can be connected to the switching units 1, 2 using a number n of interconnection bars.

[0131] A sub-module 101 according to a second embodiment is now described with reference to FIGS. 9 and 10. Such a sub-module 101 has a full-bridge structure, also referred to by the expression “Full-Bridge”.

[0132] Despite its complexity and its higher cost than that of the first embodiment (half-bridge), the topology in the form of a full bridge is interesting because it makes it possible to avoid the risks of short-circuit on the direct current side due to the presence of capacitors which are located on the path of a fault current. In addition, such a full bridge topology is advantageous due to its reversibility.

[0133] As can be seen in [Fig.9], such a topology takes up the structure of the first circuit 3, to which is added a second circuit 104, connected between the first terminal 15 and the second terminal 16. Also, a sub-module 101 according to the second embodiment takes up the characteristics and advantages described above for the first embodiment.

[0134] In addition to the characteristics relating to the first circuit 103, the sub-module 101 comprises the second circuit 104, which integrates a third switching unit 3 and a fourth switching unit 4 arranged in series with each other, and connected in parallel to a third capacitor C3.

[0135] More particularly, each of the third and fourth switching units 3, 4 comprises a second diode D3, D4, and a second IGCT S3, S4, arranged in parallel with each other.

[0136] In such a second embodiment, the sub-module 101 comprises a third connector 18 electrically connected to a first pole 19 of the second diode D3, D4 and a first pole 20 of the second IGCT S3, S4.

[0137] In such a second embodiment, the sub-module 101 includes a fourth connector 23 electrically connected to a second pole 21 of the second diode D3, D4 and a second pole 22 of the second IGCT S3, S4.

[0138] As can be seen in [Fig.9], the sub-module 101 comprises a fourth terminal 24 electrically connected to the fourth connector 18 of the third switching unit 3, and to the first terminal 15.

[0139] The second circuit 104 advantageously comprises a fifth terminal 25 electrically connected to the fourth connector 23 of the fourth switching unit 4 as well as to the second terminal 16.

[0140] Advantageously, the second circuit 104 comprises a sixth terminal 33 electrically connected both to the fourth connector 23 of the third switching unit 3, and to the third connector 18 of the fourth switching unit 4. The sixth terminal 33 allows, with the third terminal 17, the connection of the sub-module 101 to a half-arm 102 of the device 1.

[0141] According to the second embodiment, a third capacitor C3 is arranged between the fourth terminal 24 and the fifth terminal 25, in other words in parallel with the first capacitor C1 and the second capacitor C2.

[0142] Such a third capacitor C3 allows the production of an equivalent capacitance CSM, which has a value equal to the sum of the values ​​of the first capacitor C1, the second capacitor C2 and the third capacitor C3.

[0143] We refer to [Fig. 10] representing the architecture of the sub-module 101 according to the second embodiment.

[0144] As can be seen in [Fig.10], the third capacitor C3 is positioned symmetrically to the first capacitor C1 with respect to the second capacitor C2, for example with respect to a second median plane P' passing through the middle of the second capacitor C2, and parallel to the first median plane P. In this way, the second IGCTs D3, D4 and the second diodes D3, D4 are positioned between the first capacitor C1 and the third capacitor C3.

[0145] In this way, the sub-module 101 has a symmetrical architecture, which makes it possible to avoid the appearance of the “snap-off” phenomena and the dynamic avalanche phenomenon explained previously, similarly to what can be observed with the first embodiment.

[0146] In the second embodiment, the value of the first capacitor C1, the second capacitor C2, and the third capacitor C3 are identical, the sum of the values ​​of the capacitors giving the value of the equivalent capacitance CSM.

[0147] As can be seen in [Fig. 10], the third capacitor C3 is arranged symmetrically to the second capacitor with respect to a third median plane P'”, the second IGCTs S3, S4 (not visible [Fig. 10]) and second diodes D3, D4 being positioned between the third capacitor C3 and the second capacitor C2.

[0148] Advantageously, the second IGCTs S3, S4 are stacked on top of each other, forming a second stack 36 (or stack), which makes it possible to limit the size of such components, while controlling costs.

[0149] Advantageously, the second IGCTs S3, S4 are arranged in a pressed-type housing, similarly to the first IGCTs S1, S2.

[0150] Advantageously, and as shown in [Fig. 10], the second diodes D3, D4 are both arranged in a plastic module type housing, similarly to the first diodes D1, D2 of the first sub-embodiment.

[0151] The advantages linked to the fact of using within the same sub-module 101 both pressed type housings and plastic module type housings are identical to those of the first embodiment, namely the possibility of doing without a suppressor circuit.

[0152] Having IGCTs S3, S4 and diodes D3, D4 having two different package technologies results in a larger footprint than if all the components were each arranged in the same package technology. However, such disadvantages are overcome by the fact of being able to do without a suppressor circuit, and of having a symmetrical configuration.

[0153] In other implementations not shown, a second diode D3, D4 is arranged in a plastic module type housing, a second diode D3, D4 is arranged in a pressed type housing, similarly to the first diodes D1, D2 of the second sub-embodiment. The advantages are similar to those described above when all of the second diodes D3, D4 are all arranged in a plastic type housing.

[0154] In other implementations not shown, all of the second diodes D3, D4 are in a pressed-type housing. In such an implementation, one benefits from the advantages of positioning the first capacitor C1 and the second capacitor C2 symmetrically with respect to each other. In addition, the housing of the first diodes D1, D2, and of the first IGCTs S1, S2 being of the same type, they can be positioned in the same stack, which makes it possible to limit the size.

[0155] Advantageously, the third capacitor C3 advantageously comprises two third connection members 30, each respectively forming a positive pole and a negative pole of the third capacitor C3. In the present description, we speak of a third positive connection member 30, and a third negative connection member 30.

[0156] Advantageously, the sub-module 101 comprises a second connection means 29 corresponding to the location of the third connector 18 of the third switching unit 3.

[0157] In order to enable the electrical connection of the third capacitor 3 to be made, a third interconnection bar 603 is provided connecting the third positive connection member 30 and the third connection means, as well as a fourth interconnection bar 604 connecting a second positive connection member 27 and the second connection means 31.

[0158] Advantageously, another third interconnection bar 603 and another fourth interconnection bar 604 are provided to enable the connection to be made. electrical between the second connection means 31 and respectively the third connection member 30 and the second negative connection member 27.

[0159] As described above for the first embodiment, in implementations not shown in the figures, the third capacitor C3 comprises at least four connection members 30.

[0160] Advantageously and independently of the first or second embodiment, one of the diodes D1, D2, D3, D4 is a silicon carbide diode, also known as a SiC diode. The use of such a material improves the switching behavior for the diodes D1, D2, D3, D4, that is to say to limit the losses and to reduce the reverse recovery time.

[0161] Common to the embodiments described, the equivalent capacitance CSM has a value between 1 and 10 mF. Such a value is set as a function of the voltage to be supplied from the sub-module 101. The equivalent capacitance delivers the energy required by the module, and such energy is a function of the value of the equivalent capacitance. Such a range of values ​​is that conventionally used in the sub-modules of the prior art. Also, the use of the sub-module as described above does not require modifying the total value of the capacitance of the sub-module 101.

[0162] The capacitance of each of the capacitors C1, C2 in the first embodiment is equal to the equivalent capacitance CSM divided by two. In the second embodiment, the capacitance of each of the capacitors C1, C2, C3 is equal to the equivalent capacitance CSM divided by three. Also, the capacitors C1, C2, C3 all have an equal capacitance value, which corresponds to the equivalent capacitance CSM divided by the number of capacitors used.

[0163] Advantageously, at least one interconnection bar 601, 602, 603 has several thin layers of a conductive metal insulated from each other. Thus, a laminated interconnection bar comprises several layers of copper separated from each other by an insulator made of polymer.

[0164] The use of such an insulating material makes it possible to limit as much as possible the value of the parasitic inductances L1, L2, L3.

[0165] Advantageously, the sub-module 101 has a protection circuit 107, comprising for example in particular the installation of a protection thyristor T.

[0166] In the first embodiment and as shown [Fig.5], such a protection thyristor T is connected between the third terminal 17 and the second connector 13. Also, the presence of a fault current flowing within the diode D2 of the second unit 2. The first unit 1 is protected by the presence of the first and second capacitor C1, C2, which makes it possible to absorb overvoltages.

[0167] The sub-module 101 and the MMC module 100 as described above have several advantages over the known devices of the prior art, in particular: reduced footprint compared to devices using a suppressor circuit; reduced cost, being able to do without a suppressor circuit limits the number of components to be used; limited line losses compared to devices using IGBTs, since sub-module 101 allows the use of IGCTs.

Claims

Claims

1. Sub-module (101) of a half-arm (102) of an MMC type AC-DC converter for HVDC use (100), the sub-module (101) comprising a first electrical circuit (103) integrating - a first switching unit (1) and a second switching unit (2) each comprising a first diode (Dl, D2), a first IGCT (SI, S2), a first connector (10) electrically connected to a first pole (11) of the first diode (Dl, D2) and a first pole (12) of the first IGCT (SI, S2), and a second connector (13) electrically connected to a second pole (14) of the first diode (Dl, D2) and a second pole (32) of the first IGCT (SI, S2), - a first terminal (15) electrically connected to the first connector (10) of the first switching unit (1), - a second terminal (16) electrically connected to the second connector (13) of the second switching unit (2), and - a third terminal (17) electrically connected both to the second connector (13) of the first switching unit (1) and to the first connector (10) of the second switching unit (2), - a capacitance (CSM) arranged between the first terminal (15) and the second terminal (16), the first IGCTs (SI, S2) being arranged in a pressed-type housing, the capacitance (CSM) being formed by a first capacitor (Cl) and a second capacitor (C2), both placed between the first terminal (15) and the second terminal (16), the first and second capacitors (Cl, C2) being arranged on either side of the first diodes (Dl, D2) and the first IGCTs (SI, S2), symmetrically with respect to each other with respect to a first median plane (P) intersecting the first diodes (Dl, D2) and the first IGCTs (SI, S2), the first median plane (P) being a plane of symmetry of the sub-module (101).

2. Sub-module (101) according to the preceding claim, characterized in that the first diodes (D1, D2) are all arranged in a housing of plastic module type, or one of the first diodes (Dl, D2) of the first and / or second switching unit (1, 2) is arranged in a plastic module type housing and the other diode (Dl, D2) is arranged in a pressed type housing.

3. Sub-module (101) according to the preceding claim, characterized in that it comprises a cooling unit (R3) comprising a plate (50) equipped with a first location (51) intended to receive a first diode (D1, D2), and a second location (52) intended to receive a first IGCT (S1, S2), the plate (50) comprising a conduit (53) capable of receiving a refrigerant fluid.

4. Sub-module (101) according to any one of the preceding claims, characterized in that a first diode (D1, D2) is a diode made of a material comprising silicon carbide.

5. Sub-module (101) according to any one of the preceding claims, characterized in that the first capacitor (C1) comprises a first connection member (26), the second capacitor (C2) comprises a second connection member (27), the first terminal (15) comprises a first connection means (28), the first connection means (28) and the first connection member (26) are connected via a first interconnection bar (601) and the first connection means (28) and the second connection member (27) are connected via a second interconnection bar (602), the interconnection bars (601, 602) being symmetrical to each other with respect to the first median plane (P).

6. Sub-module (101) according to any one of the preceding claims, characterized in that the first capacitor (C1) comprises another first connection member (26), the first connection members (26) are arranged aligned with each other, defining a dummy line parallel to the first median plane (P), the second capacitor (C2) comprises another second connection member (27), the second connection members (27) are arranged aligned with each other, defining a dummy line parallel to the first median plane (P), the first interconnection bar (601) electrically connecting the first connection members (26) to a first connection means (28), the second interconnection bar (602) electrically connecting the second connection members (27) to the first connection means (28).

7. Sub-module according to the preceding claim, characterized in that a first interconnection bar (601) comprises a first connecting part (6010), and a first connection part (6011), the first connecting part (6010) extending between a first connection means (28) and the first connection part (6011), and the first connection part (6011) connecting the first connection members (26) together, and a second interconnection bar (602) comprises a second connecting part (6020), and a second connection part (6021), the second connecting part (6020) extending between the first connection means (28) and the second connecting part (6020), the second connection part connecting the second connection members (27) together, the interconnection bars (601, 602) having a T shape.

8. Sub-module (101) according to claim 6 or 7, characterized in that at least one interconnection bar (601, 602) is a laminated interconnection bar.

9. Sub-module (101) according to any one of the preceding claims, characterized in that the capacitors (Cl, C2) have the same value equal to half the value of the capacitance (CSM).

10. Sub-module (101) according to any one of the preceding claims, characterized in that it further comprises a second electrical circuit (104) integrating: - a third switching unit (3) and a fourth switching unit (4) each comprising a second diode (D3, D4), a second IGCT (S3, S4), a third connector (18) electrically connected to a first pole (19) of the second diode (D3, D4) and to a first pole (20) of the second IGCT (S3, S4), and a fourth connector (23) electrically connected to a second pole (21) of the second diode (D3, D4) and to a second pole (22) of the second IGCT (S3, S4), - a fourth terminal (24) electrically connected to the third connector (18) of the third switching unit mutation (3), and to the first terminal (15), - a fifth terminal (25) electrically connected to the fourth connector (23) of the fourth switching unit (4) as well as to the second terminal (16), - a sixth terminal (33) electrically connected both to the fourth connector (23) of the third switching unit (3) and to the third connector (18) of the fourth switching unit (4), - a third capacitor (C3) arranged between the fourth terminal (24) and the fifth terminal (25), the third capacitor (C3) being positioned symmetrically to the first capacitor (Cl) with respect to a second median plane (P') passing through the middle of the second capacitor (C2), and parallel to the first median plane (P), the second IGCTs (D3, D4) and the second diodes (D3, D4) being positioned between the first capacitor (Cl) and the third capacitor (C3).

11. Sub-module according to the preceding claim, characterized in that the second IGCTs (S3, S4) are arranged in a pressed housing, the second diodes (D3, D4) are both arranged in a plastic module-type housing, or one of the diodes (D3, D4) of the third and / or fourth switching unit (1, 2) is arranged in a plastic module-type housing, the other second diode (D1, D2) being arranged in a pressed housing.

12. Sub-module (101) according to the preceding claim, characterized in that a second diode (D3, D4) is a diode comprising silicon carbide.

13. Sub-module (101) according to any one of the preceding claims, characterized in that the capacitors (Cl, C2, C3) have the same value equal to one third of the capacitance (CSM).

14. Sub-module (101) according to any one of the preceding claims, characterized in that the capacitance (CSM) has a value varying in a range between 1 and 10 mF.

15. Sub-module (101) according to any one of the preceding claims, characterized in that it comprises a thyristor (T) in parallel with the second switching unit (2), the thyristor (T) being intended to protect the sub-module against short circuits.

16. MMC type AC-DC converter for HVDC use (100) comprising the sub-module (101) according to any one of the preceding claims.

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