Cobalt silicide CoSi2 manufacturing process

The single-step pulsed laser annealing process for CoSi2 formation addresses nucleation issues and interface unevenness, achieving comparable electrical properties and reducing integration complexity by maintaining CoSi2 in a solid state, thus improving the manufacturing efficiency and quality of cobalt silicide layers.

FR3160980A1Pending Publication Date: 2025-10-10COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
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Patent Information

Application Number
FR2024003618
Authority / Receiving Office
FR · FR
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-04-08
Publication Date
2025-10-10

AI Technical Summary

Technical Problem

Existing methods for manufacturing cobalt silicide (CoSi2) face challenges such as nucleation difficulties during the CoSi/CoSi2 transition, particularly at small dimensions, leading to an uneven interface and potential integration issues, and require multiple high-temperature annealing steps that are costly and complex.

Method used

A single-step pulsed laser annealing process is used to form CoSi2 in the solid state, avoiding the CoSi/CoSi2 transition and ensuring a flat interface, using laser pulses with controlled energy density and frequency to maintain the material in a solid phase, compatible with three-dimensional integration.

Benefits of technology

The method achieves a flat CoSi2/Si interface, reduces integration problems, and produces CoSi2 with comparable sheet resistance and superconductivity properties to traditional methods, while eliminating the need for multiple annealing steps and liquid-phase transitions.

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Abstract

The invention relates to a method for manufacturing a layer of cobalt silicide CoSi2 comprising the steps of: Providing a substrate comprising a layer of silicon; Depositing, on the substrate, a layer of cobalt Co; Annealing the stack by a nanosecond laser comprising at least one laser pulse of duration between 50 nanoseconds and 20 microseconds and an energy density chosen so as to form the layer of cobalt silicide CoSi2 in the solid state. Figure to be published with the abstract: None
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Description

Title of the invention: Process for manufacturing cobalt silicide CoSi2 Technical field

[0001] The present invention relates generally to the field of materials used in microelectronics. It relates more particularly to cobalt silicide CoSi2.

[0002] In particular, the present invention relates to a method for manufacturing a CoSi2 layer. The invention also relates to an electronic device of which at least one zone, for example a contact, is made of CoSi2 obtained by the method according to the invention. The invention relates, for example, but in a non-limiting manner, to a transistor of which the drain and source and / or gate contacts are made of CoSi2. The invention may also relate to a Josephson effect transistor JoFET (“Josephson Field Effect Transistor”) in which CoSi2 is used as superconducting material for the drain and / or the source. STATE OF THE ART

[0003] The physical properties of cobalt silicide CoSi2 (good thermal stability, chemically inert, low resistivity) make it particularly suitable for the formation of contacts for manufacturing in CMOS technology. This is particularly true for the production of CoSi2 contacts for the gate and / or source and drain of a CMOS transistor.

[0004] CoSi2 is also a superconducting material and can therefore be used as a superconducting contact in a JoFET transistor. (“Josephson Field Effect Transistor”).

[0005] The formation of CoSi2 begins with the deposition of a thin layer of cobalt (Co) on a silicon substrate followed by two rapid thermal annealing (RTA) treatments lasting around ten seconds. Two RTAs are necessary because CoSi2 is not the first silicide formed following the reaction of Co with Si. The deposition of Co is for example carried out by physical vapor deposition (PVD). Each of the RTAs is for example carried out by conduction using heating blocks close to the silicon wafer.

[0006] After the deposition of cobalt, the stack is therefore subjected to a first step of rapid heat treatment RTA at a temperature close to 500°C. During this first RTA treatment, the cobalt reacts with the silicon to form an intermediate layer of CoSi which forms a resistive phase. The aim of this first step is to incorporate in a controlled manner the quantity of Co necessary in order to avoid the complete consumption of the semiconductor, for example for the source and drain areas. Then, the unreacted Co is selectively removed, for example by means of a selective etching step. This step prevents the formation of unwanted areas of metallic cobalt on the substrate.

[0007] After the removal of excess cobalt, the stack is subjected to a second RTA step at a higher temperature, typically between 600 and 900°C. This step allows the transformation of CoSi into CoSi2.

[0008] In addition to the complexity and cost of the process, the formation of CoSi2 described above, however, poses certain difficulties. Indeed, the relatively high temperature of the second RTA attests to the difficulty for CoSi2 to nucleate from CoSi, the two silicides having very similar formation energies. This has the consequence of forming a CoSi2 / Si interface which is not sufficiently flat and which is therefore likely to pose certain problems in obtaining an effective Josephson effect. In addition, when the dimensions of the contact to be made become too small (for example with a critical dimension CD strictly less than 100 nm), the surface energy becomes too low compared to the volume energy and certain areas remain in CoSi.

[0009] Another solution for the formation of CoSi2 consists of carrying out, after the deposition of Co on the Si, a first RTA treatment to form the CoSi then a second treatment by nanosecond laser annealing (pulse of the order of 30 ns) to form the CoSi2 in the liquid state. Again, such a solution has certain drawbacks. Thus, we again observe a CoSi / CoSi2 transition with the same difficulties for the CoSi2 to nucleate from the CoSi. In addition, the transition to the liquid route of the CoSi2 leads to significant constraints for the plates comprising a plurality of patterns (patterned plate), with elements which can melt before the Co (sensitivity of the gate of a transistor for example). Finally, an additional annealing in the furnace can also prove necessary to eliminate the interface defects, making the process long and expensive. Summary of the invention

[0010] The present invention therefore aims to improve the known methods for manufacturing cobalt silicide CoSi2, in particular by avoiding the nucleation problems linked to the CoSi / CoSi2 transition, by advantageously using a single step for producing the material unlike two-step methods, in particular RTA, by ensuring better flatness of the Si / CoSi2 interface and by avoiding the need for the CoSi2 to pass into the liquid state, said method being moreover compatible with three-dimensional integrations where several levels of transistors are constructed on the same wafer.

[0011] To this end, the invention relates to a method for manufacturing a layer of cobalt silicide CoSi2 comprising the steps of: - Supply of a substrate comprising a silicon layer - Deposition of a layer of cobalt Co on the substrate; - Annealing of the stack by a nanosecond laser comprising at least one laser pulse with a duration of between 50 nanoseconds and 20 microseconds and an energy density chosen so as to form the cobalt silicide layer CoSi2 in the solid state.

[0012] Particularly surprisingly, it has been found that the formation of CoSi2 can be advantageously carried out in the solid state by pulsed laser annealing using at least one pulse with a duration of between 50 ns and 20 microseconds. By solid state is meant the fact that the melting temperature of Co, Si or any Co silicide, of the order of at least 1350°C, is never reached during laser annealing. As we will see later, it is possible to produce one or more pulses of the same energy density or of different energy densities. The protective layer makes it possible to protect the cobalt and / or silicon layers against oxidation. It is understood that the material of the protective layer, for example TiN, must be chosen to allow the laser radiation to pass through or absorb it sufficiently so that the latter reaches the surface of the cobalt layer.The method according to the invention allows the manufacture of CoSi2 without going through a CoSi / CoSi2 transition. Thanks to the invention, it is possible to avoid two RTA steps. The invention also makes it possible to obtain better flatness at the CoSi2 / Si interface. Remaining in the solid state for the CoSi2 also makes it possible to limit integration problems linked to the melting of other areas of a component, for example the gate of a transistor. The method according to the invention also makes it possible to obtain a CoSi2 material with a sheet resistance Rs (for Rsheet) comparable to the sheet resistance of CoSi2 obtained by state-of-the-art techniques and a critical temperature Te of superconductivity which is also comparable, or even higher in certain situations. The sheet resistance can be seen as the ratio between the resistivity of the material and its thickness.

[0013] It will be noted that the deposited Co can be slightly alloyed with a metal M, for example platinum Pt, weakly present; in this case, cobalt silicide will be obtained comprising a low percentage by mass of metal M, without departing from the scope of the invention.

[0014] It will also be noted that the Co layer can be deposited directly on the Si layer but there could also be an oxide or nitride layer between the Si layer and the Co layer (in the latter case, the oxide or nitride layer nitride preferably has a maximum thickness of 2mm so that the CoSi2 can form).

[0015] In addition to the characteristics which have just been mentioned in the preceding paragraphs, the manufacturing method according to the invention may have one or more additional characteristics among the following, considered individually or according to all technically possible combinations: • The process comprises a step of depositing a protective layer against the oxidation of Co and / or Si such as a TiN layer on the Co layer before the annealing step. • The duration of the laser pulse is between 0.1 microsecond and 1 microsecond. • Laser annealing is performed in the form of a single laser pulse. • Laser annealing is performed in the form of a plurality of laser pulses. • The trigger frequency of the laser pulses is between 0.1 Hz and 1000 Hz, advantageously between 1 Hz and 10 Hz and even more advantageously between 3 Hz and 6 Hz. • Each laser pulse of said plurality of laser pulses is emitted with the same energy density. • The first laser pulse of said plurality of laser pulses has a higher energy density than the following pulses, the energy density of the first pulse being chosen to be close to but strictly lower than the energy density causing the melting of the cobalt silicide CoSi2. • The thickness of the Co layer is between 0.5 and 50 nm and preferably between 1 and 10 nm. • The Si layer is a layer of Si chosen from: monocrystalline Si, polycrystalline Si or amorphous Si. • The laser wavelength is between 150 nm and 900 nm and preferably between 250 nm and 550 nm. • The silicon Si layer is cleaned, prior to the deposition of the cobalt Co layer. • The laser annealing step is carried out while the plate is placed on a heating plate allowing the plate to be maintained at a temperature ranging from 25 to 500°C. • The process includes, after the laser annealing step, rapid thermal annealing RT A. • The thickness of the Co layer is equal to 3 nm, said Co layer being deposited on an SOI substrate whose Si layer has a thickness of 33 nm and the buried insulating layer BOX has a thickness of 20 nm, the laser pulse duration is 160 ns and the laser pulse energy density is between 0.6 J / cm2 and 0.775 J / cm2.

[0016] The invention also relates to: - An electronic device such as a transistor of which at least one zone such that a drain and / or source and / or gate contact is made of CoSi2 obtained by the method according to the invention or a Josephson type junction, part of which is made of CoSi2 obtained by the method according to the invention. - a transistor whose drain and / or source and / or gate contacts are made of CoSi2 by the method according to the invention. - a JoFET type transistor in which the drain and / or the source are made of CoSi2 obtained by the method according to the invention. BRIEF DESCRIPTION OF THE FIGURES

[0017] Other characteristics and advantages of the invention will emerge clearly from the description given below, for information purposes only and in no way limiting, with reference to the appended figures, among which:

[0018] [Fig.l] represents, in the form of a flowchart, the different stages of the method according to the invention,

[0019] [Fig.2], [Fig.3], [Fig.4] and [Fig.5] represent the different stages of the process of [Fig.l],

[0020] [Fig.6] shows an image of a Si / CoSi2 / TiN stack obtained by the state-of-the-art process and two images of two other Si / CoSi2 / TiN stacks obtained by the process according to the invention,

[0021] [Fig.7] represents the evolution of the sheet resistance as a function of the laser energy density in the case of three different numbers of laser pulses,

[0022] [Fig.8] shows the evolution of the simulated temperature within a stack used in the method according to the invention for several energy densities,

[0023] [Fig.9] shows the evolution of the critical superconductivity temperature as a function of the number of laser pulses, with and without additional RTA annealing.

[0024] For clarity, identical or similar elements are identified by identical reference signs throughout the figures. DETAILED DESCRIPTION OF THE INVENTION

[0025] [Fig.l] represents the flowchart illustrating the different stages of the manufacturing method 100 according to the invention.

[0026] As shown in [Fig.2], the method 100 begins with an optional step 101 cleaning 4 of a silicon layer 3. The silicon layer 3 may for example be a monocrystalline silicon layer belonging to a silicon type substrate on SOI insulator ("Silicon On Insulator") comprising a lower region 1 of silicon surmounted by a buried insulating layer 2 commonly referred to by those skilled in the art as "BOX", for example formed of silicon dioxide. Above this buried insulating layer is the silicon layer 3. This cleaning aims to remove the chemical or native oxide initially present on the surface of the silicon layer 3. The cleaning can be done in one or two steps using one of the following techniques: wet process with a dilute HF hydrofluoric acid solution - abrasion by Ar argon plasma - SiCoNi® process. It will be noted that the method according to the invention is not limited to a silicon layer present in an SOI substrate and can be applied to any type of Si layer, for example a fully monocrystalline Si substrate. The Si on which the Co is deposited can be monocrystalline, polycrystalline or amorphous.Any stacking is possible under this Si layer. It would also be possible to make a CoSi 2 contact on another material, for example Ge, GeSn, or SiGe, present under the silicon.

[0027] The method 100 according to the invention continues with a step 102 ([Fig. 3]) of depositing a layer of cobalt 5 on the silicon layer 3, immediately after cleaning the latter. This deposition is for example carried out by physical vapor deposition (or PVD for "Physical Vapor Deposition"). The thickness of the Co layer is between 0.5 and 50 nm and preferably between 1 and 10 nm. According to this embodiment, the Co layer is deposited directly on the Si layer. According to another embodiment, there could also be a layer of oxide or nitride between the Si layer and the Co layer (in this case, the oxide or nitride layer preferably has a maximum thickness of 2 mm so that the CoSi2 can form).

[0028] In order to avoid oxidation of the layer 5 of Co and the underlying layer 3 of Si, the method 100 according to the invention comprises a step 103 ([Fig.4]) of depositing a protective layer 6 against oxidation. This protective layer 6 may for example be made of TiN deposited by PVD deposition. The material of the protective layer is chosen to ensure not only the protection of the layers 5 and 3 of Co and Si against oxidation but also to absorb the laser radiation which will be used subsequently to heat the layer of Co.

[0029] The method 100 according to the invention continues with a laser annealing step. 104 ([Fig.5]). This step 104 is carried out by means of a pulsed laser emitting at a frequency between 0.1 and 1000Hz, preferably between 1 and 10Hz and advantageously between 3 and 6Hz, for example here 4Hz (i.e. one pulse shot every 250 ms), one or more laser pulses Pi (i varying from 1 to n, with n being a strictly positive integer) through the stack formed by the Si / Co / TiN. Each Pi pulse has a duration between 50 nanoseconds and 20 microseconds and preferably between 0.1 microsecond and 1 microsecond, for example 160 ns. The wavelength of the laser is between 150 nm and 900 nm and preferably between 250 nm and 550 nm; in other words, the laser, by nature monochromatic, has a beam with a wavelength preferably in the ultraviolet (for example, at 293, 308 or 355 nm) but can also be chosen in blue or green (for example 532 nm), or even red (for example 633 nm). This laser annealing step 104 will allow the Co to react with the Si so as to obtain a layer of CoSi2 in the solid state during this step 104. It is essential to note that the energy density of the applied laser pulse(s) is chosen so that the Co, Si, or any Co silicide (for example CoSi2) materials never pass into the liquid state and remain in the solid state.

[0030] As we will see later, it is possible to obtain the expected result with a single laser pulse but also with a plurality of laser pulses, the pulse duration and the energy density having to be chosen to obtain CoSi2 only in the solid state.

[0031] According to a first embodiment, one or more laser pulses at constant energy density below the melting threshold of Co and all CoSix silicides, in particular CoSi2, are applied during step 104. This first embodiment is illustrated in the case of a sample obtained from a Co layer having a thickness of 3nm deposited on an SOI substrate (with a BOX layer of 20nm and a Si layer above 13nm). A 10nm layer of TiN is deposited on the Co layer. Each laser pulse used has a wavelength of 308nm and a pulse duration of 160ns. [Fig. 6] illustrates the result obtained by the method according to the invention compared to the state-of-the-art method with two RTA steps: in this respect, [Fig.6] shows an image II of a first Si / CoSi2 / TiN stack obtained by the state-of-the-art method, an image 12 of a second Si / CoSi2 / TiN stack obtained by the method according to the invention using a single laser pulse at an energy density of 0.7 J / cm2 and an image 13 of a third Si / CoSi2 / TiN stack obtained by the method according to the invention using 100 identical pulses at an energy density of 0.7 J / cm2. The Si / CoSi2 interface of image II is less flat than the interfaces obtained by the method according to the invention (images 12 and 13). The more flat Si / CoSi2 interface according to the invention constitutes in particular an advantage for obtaining the Josephson effect in JoFET transistors.

[0032] [Fig.7] shows the evolution of the sheet resistance Rsheet as a function of the applied energy density and the number of pulses applied to the stack previously described (Co layer with a thickness of 3nm deposited on a 33nm SOI substrate and a 10nm layer of TiN deposited on the Co layer). Curve C1 illustrates the evolution of Rsheet as a function of the energy density by applying 1 pulse across the stack, curve C2 by applying 10 pulses across the stack and curve C3 by applying 100 pulses across the stack.

[0033] Each of these curves C1, C2 and C3 passes through a minimum corresponding to a CoSi2 phase of very good crystalline quality (with a good interface with the Si). As illustrated, when the number of pulses is increased, the energy density to reach the minimum Rs decreases: in fact, it is necessary to use an energy density of the order of 775 mJ / cm2 to reach a minimum resistance Rs with a single pulse while a density of the order of 725 mJ / cm2 is used to reach a minimum resistance with 10 pulses and the minimum resistance Rs is reached for a density of 700 mJ / cm2 for 100 pulses. This minimum resistance Rs also decreases with the number of pulses: thus, we observe that the minimum sheet resistance for 100 pulses is lower than the minimum sheet resistance for 10 pulses which is itself lower than the minimum sheet resistance for 1 pulse.A lower sheet resistance makes it possible to obtain less resistive CoSi2 contacts. Increasing the number of pulses at constant energy density also makes it possible to increase the critical superconductivity temperature Te: this phenomenon is illustrated in [Fig.9] which shows on curve C4 the evolution of the critical temperature Te as a function of the number of pulses: we thus go from a critical temperature of the order of 0.6K for 100 pulses to a critical temperature of the order of 0.9K for 300 pulses.

[0034] An alternative to increasing the number of pulses to decrease sheet resistance may be to increase the pulse duration. Since the pulse firing frequency is approximately 4 Hz, it can be assumed that there will be no heat buildup between each firing and that the stack returns to room temperature between each firing. Thus, as a first approximation, a pulse of one microsecond duration is equivalent to ten pulses of 0.1 microsecond duration fired at 4 Hz.

[0035] Of course, it is advisable not to exceed a certain energy density coupled with the number of pulses and the pulse duration so as not to pass into the liquid phase of the CoSi2. Different experiments have shown that the solid phase of CoSi2 is effectively formed for low values ​​of Rs (i.e. in the phase of decrease of the values ​​of Rs observed on the curves C1, C2 and C3) before reaching the liquid phase (i.e. melting of the CoSi2) during the phase of the rise of the Rs values ​​as the energy density increases. Thus, profile results obtained by EDS-TEM spectroscopy (Energy Dispersive Spectroscopy - Transmission Electron Microscopy) have shown that the stoichiometry highlighted in the samples obtained from laser annealing with 1 pulse, 10 pulses and 100 pulses is indeed that of CoSi2. In addition, the laser annealing machine is equipped with another laser, called a secondary laser, tilted at 45° relative to the heating laser, for in-situ characterization allowing the evolution of the surface reflectivity to be monitored during the laser pulse. It was noted that a clear increase in the reflectivity of the material occurs for a pulse from 775-800 rnJ / cm2, indicating the transition to the liquid state.This tool also allows to quickly define the laser strategy to be applied without resorting to more cumbersome characterization techniques (such as TEM microscopy or DRX diffractometry): it allows in particular to determine the energy densities not to be exceeded. In practice, the secondary laser sends a pulse before, during and after the annealing pulse sent by the main laser: if a liquid phase is reached, a sudden change in reflectivity is observed. Finally, 1D simulations of the proposed stack were carried out. [Fig.8] shows the evolution of the temperature within the stack for several energies. The maximum temperature recorded (of the order of 1220°C) is below the melting temperature of all CoSix silicides (of the order of 1350°C). These simulations constitute a non-destructive approach to anticipate the energy densities to be applied to obtain CoSi2 in the solid state.

[0036] According to a second embodiment, several laser pulses are applied during step 104, at least the first of which has a different energy density and is higher than the following ones while remaining below the melting threshold of Co and all CoSi silicides, in particular CoSi 2. This second strategy therefore consists of adapting the energy density as the siliciding progresses. Indeed, as mentioned above, it has been found that applying more pulses makes it possible to reduce the energy density necessary for the formation of CoSi 2 while reducing the sheet resistance Rs. A solution may therefore consist of applying a first pulse close to the melting of the CoSi 2, then one or more pulses at a slightly lower density to reduce the sheet resistance Rs. The first pulse close to the melting makes it possible to partially transform the cobalt into CoSi 2 in solid phase over a given thickness.The energy density of the laser pulses, and in particular of the first, can be determined upstream by tests carried out on samples using the secondary laser in order to achieve an energy density close to fusion without reaching the liquid phase. From this new stack, one or more other laser pulses are produced until the sheet resistance Rs is reached. desired, and this by reducing the total number of pulses compared to the first embodiment (constant energy density) to achieve the same sheet resistance value Rs.

[0037] It will be noted that optionally, it is possible, prior to the laser annealing step 104, to place the stack obtained at the end of step 103, on a heating plate, at a predetermined temperature, for example 400°C, to wait for the stack to reach the predetermined temperature, then to apply the laser pulse(s) while the stack is on the heating plate at the predetermined temperature. The use of such a plate makes it possible in particular to extend the duration of the annealing at the desired temperature.

[0038] The method 100 according to the invention may also comprise an optional step, not shown, consisting of applying a rapid annealing of the RTA type in the extension of the pulsed laser annealing. This rapid annealing RTA is for example carried out by conduction using heating blocks close to the stack, it being understood that other types of RTA could be implemented (microwave or UV source for example). The addition of this RTA step makes it possible to significantly improve the critical superconductivity temperature Te. As illustrated in [Fig.9] showing the evolution C5 of the critical temperature Te as a function of the number of pulses in the presence of an RTA annealing at 850°C for 1 sec, it is possible to reach a critical superconductivity temperature of 1.3°K, i.e. a gain ranging from 44% to 100% compared to the critical temperatures of 0.6 to 0.9°K of the curve C4 without RTA.

[0039] Of course, once the CoSi2 layer has been produced, the process according to the invention can continue by removing the TiN oxidation protection layer.

Claims

Claims

1. Method (100) for manufacturing a layer of cobalt silicide CoSi 2 comprising the steps of: - Providing a substrate comprising a layer of silicon; - Depositing (102) on the substrate a layer of cobalt Co; - Annealing (104) the stack by a nanosecond laser comprising at least one laser pulse of duration between 50 nanoseconds and 20 microseconds and an energy density chosen so as to form the layer of cobalt silicide CoSi2 in the solid state.

2. Method according to claim 1 characterized in that it comprises a step of depositing (103) a protective layer against oxidation of Co and / or Si, such as a TiN layer, on the Co layer before the annealing step.

3. Method according to one of the preceding claims, characterized in that the duration of the laser pulse is between 0.1 microsecond and 1 microsecond.

4. Method according to one of the preceding claims, characterized in that the laser annealing is carried out in the form of a single laser pulse.

5. Method according to one of claims 1 to 3 characterized in that the laser annealing is carried out in the form of a plurality of laser pulses.

6. Method according to claim 5 characterized in that each laser pulse of said plurality of laser pulses is emitted with the same energy density.

7. Method according to claim 5 characterized in that the first laser pulse of said plurality of laser pulses has a higher energy density than the following pulses, the energy density of the first pulse being chosen close to but strictly lower than the energy density causing the fusion of the cobalt silicide CoSi2.

8. Method according to one of the preceding claims, characterized in that the thickness of the Co layer is between 0.5 and 50 nm and preferably between 1 and 10 nm.

9. Method according to one of the preceding claims, characterized in that the Si layer is a Si layer chosen from: monocrystalline Si, polycrystalline Si or amorphous Si.

10. Method according to one of the preceding claims, characterized in that the wavelength of the laser is between 150 nm and 900 nm and preferably between 250 nm and 550 nm.

11. Method according to one of the preceding claims, characterized in that the silicon layer Si is cleaned, prior to the deposition of the cobalt layer Co.

12. Method according to one of the preceding claims, characterized in that the laser annealing step is carried out on a heating plate making it possible to maintain the plate at a temperature ranging from 25 to 500°C.

13. Method according to one of the preceding claims, characterized in that it comprises, after the laser annealing step, rapid thermal annealing.

14. Method according to one of the preceding claims, characterized in that the thickness of the Co layer is equal to 3 nm, said Co layer being deposited on a silicon-on-insulator substrate whose Si layer has a thickness of 33 nm and the buried insulating layer has a thickness of 20 nm, the laser pulse duration being 160 ns and the energy density of the laser pulse being between 0.6 J / cm2 and 0.775 J / cm2.

15. Electronic device such as a transistor of which at least one zone such as a drain and / or source and / or gate contact is made of CoSi2 obtained by the method according to one of the preceding claims or a Josephson type junction of which a part is made of CoSi2 obtained by the method according to one of the preceding claims.

Citation Information

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