Power Semiconductor Test Equipment

Abstract

To solve the problem that, with a conventional semiconductor testing device, it is impossible to measure the temperature of a transistor in the actual use state with good accuracy.SOLUTION: An ON voltage is applied from a gate driver circuit 113 to the gate terminal of a transistor 117 and then a test current Id is supplied. After the test current Id is stopped, a steady current Ic is supplied from the steady current circuit 118 to measure a terminal-to-terminal voltage Vce. Measurement points t1 and t2, where t2=2×t1, are set from a time t0 when the test current Id is stopped. The voltage Vce of the transistor measured at a time t1 and the voltage Vce of the transistor measured at a time t2 are obtained from v1, v2, respectively, assuming that a voltage V0 at t0 is v0=(2+√2)×v1-(1+√2)×v2, and values C, n, A are determined from measured data from a time t when the test current Id is stopped, assuming Y=A×C^(-1×t^n) as a characteristic curve.SELECTED DRAWING: Figure 19

Description

Technical Field

[0001] The present invention relates to a semiconductor test apparatus for performing a power cycle test on semiconductor elements such as SiC, IGBT, GaO, MOS-FET, Gan-FET, bipolar transistors, etc., a test method for semiconductor elements, etc. It also relates to a test method for semiconductor elements such as diodes and thyristors. It also relates to test methods for transistors, thermistors, optocouplers, etc.

[0002] Provided are a semiconductor test apparatus and a test method for semiconductor elements that can efficiently reproduce stress close to the failure mode in the usage environment of semiconductor elements and can evaluate power semiconductor elements, etc. with high reliability.

Background Art

[0003] The lifetime of a semiconductor element includes the lifetime due to the thermal fatigue phenomenon caused by the heat generation of the semiconductor element itself and the lifetime due to the thermal fatigue phenomenon caused by the temperature change of the external environment of the semiconductor element. There is also a lifetime due to voltage fatigue caused by the applied voltage to the gate insulating film of the semiconductor element.

[0004] Generally, in the lifetime test of a semiconductor element, the semiconductor element is repeatedly turned on and off. An applied voltage and current are set to the emitter terminal (source terminal), collector terminal (drain terminal), etc. of the semiconductor element, and a periodic on / off signal (operation / non-operation signal) is applied to the gate terminal to conduct the test.

[0005] FIG. 45 and FIG. 46 are explanatory diagrams of a conventional semiconductor test apparatus and a test method for semiconductor elements. An electric current power supply device 121 that outputs a constant current is connected to the collector terminal c of a transistor 117 as a semiconductor element. The emitter terminal e of the transistor 117 is grounded. A gate driver circuit 113 is connected to the gate terminal g of the transistor 117.

[0006] When the switch circuit 122a (SWa) 122a is turned on, a constant current Ia output by the current power supply 121 is applied to the collector terminal c of the transistor 117.

[0007] The gate driver circuit 113 outputs an on-voltage Vg that turns on the gate of transistor 117 at a set frequency and for a set on-voltage duration. Based on the on-voltage Vg, transistor 117 is controlled to turn on or off. The gate driver circuit 113 is controlled by the gate signal control circuit 112.

[0008] The Vgs signal voltage output from the gate driver circuit 113 causes transistor 117 to switch on and off, and a current Id flows between the channels of transistor 117 during the period when transistor 117 is on.

[0009] When transistor 117 is turned on, the channel voltage Vce of transistor 117 drops to the forward voltage Vn. When transistor 117 is turned off, the Vce voltage rises to the voltage Vc.

[0010] As an example, the channel voltage Vce of transistor 117 (Figure 46(c)) is Vn when current Id is flowing, and Vc when it is off.

[0011] The test circuit system has a capacitive component, capacitive reactance (inductance) 151. It also has an inductive component, inductive reactance 152. Furthermore, the current power supply 121 attempts to continue supplying current Ia even when transistor 117 is turned off, causing the terminal voltage of the current power supply 121 to rise.

[0012] Transistor 117 generates heat due to the current Id. Furthermore, the temperature of transistor 117 rises due to the repeatedly applied test current Id. The temperature change is captured by a temperature sensor 126 located on transistor 117 and measured by a thermometer 128.

[0013] The collector voltage (Vc voltage) of transistor 117 rises due to the capacitive reactance 151, the inductive reactance 152, and the constant current operation of the current power supply 121, generating a surge voltage Vs (Figure 46(d)Vce'). The capacitive reactance 151 supplies a large current to transistor 117 when it is turned on, generating an inrush current Is (Figure 46(e)Id'). [Prior art documents] [Patent Documents]

[0014] [Patent Document 1] Japanese Patent Publication No. 2017-17822 [Overview of the Initiative] [Problems that the invention aims to solve]

[0015] Conventional semiconductor testing equipment performs transistor testing by switching transistor 117 on and off and simultaneously applying a constant current Ia to the transistor's channel.

[0016] The test involved stressing the transistor under test by setting the transistor's on-period, on-time, on-switch cycle, and current flowing through the transistor, thereby predicting the transistor's lifespan or measuring the time until the test transistor failed.

[0017] When a test current Id is supplied to the transistor 117 being tested, the transistor 117 generates heat. The temperature rise due to this heat generation changes in accordance with the changes in the characteristics of the transistor 117. Therefore, monitoring the measurement of the transistor 117 being tested is important for testing the transistor 117.

[0018] After the test current Id is stopped, a predetermined constant current is supplied to the transistor 117 and the terminal voltage of the transistor 117 is measured, thereby obtaining the temperature information Tj (terminal voltage Vi) of the transistor 117.

[0019] When the test current Id to transistor 117 is stopped, transistor 117 dissipates heat, and its temperature decreases. Therefore, it is preferable to measure the terminal voltage of transistor 117 immediately after stopping the test current Id. However, immediately after stopping the test current Id, surge voltages and surge currents occur, making it impossible to measure the terminal voltage.

[0020] When the surge voltage and surge current subsided, transistor 117 cooled down, causing its temperature to drop. As a result, it was not possible to accurately measure the transistor's temperature under actual operating conditions. [Means for solving the problem]

[0021] The semiconductor device testing apparatus of the invention is characterized by comprising: a power supply device that supplies a test current Id; a gate driver circuit 113 that turns the semiconductor device 117 on and off; a constant current circuit 118 that supplies a constant current Ic to the semiconductor device 117; a voltage measurement circuit 301 that acquires the terminal voltage Vi of the semiconductor device 117; a switch circuit 124b that discharges the charge between the terminals of the power supply device or the semiconductor device; a data memory 302 that stores the terminal voltage of the semiconductor device 117; and a calculation processing circuit 303 that determines the characteristic expression of the transistor 117 with respect to temperature change from the terminal voltage stored in the data memory 302.

[0022] The present invention provides a semiconductor device testing method characterized by a switch circuit 124a that supplies a test current Id to a semiconductor device 117, setting measurement points (t1, t2) at time t0 when the switch circuit 124a is turned off, and determining the voltage V0 at t0 from the voltage v1 across the terminals of the semiconductor device 117 at t1 and the voltage v2 across the terminals of the semiconductor device 117 at t2 using the following formula. v0= (2 + √2)·v1 - (1 + √2)·v2

[0023] When supplying a constant current Ic to the transistor 117 or the diode D for temperature measurement, an on-voltage V2 higher than the on-voltage V1 when supplying a test current Id to the gate terminal of the transistor 117 is applied.

[0024] The test method of the semiconductor device of the present invention includes: a first step of supplying a test current Id; a second step of supplying a constant current Ic to the semiconductor device after stopping the test current Id; a third step of measuring the inter-terminal voltage Vi of the semiconductor device at a predetermined time t while supplying the constant current Ic; and a fourth step of determining the values of C, n, and A as a characteristic curve Y = A·C^(-1·t^n) from the inter-terminal voltage Vi.

[0025] The inter-terminal voltage Vi of the device to be tested (such as a semiconductor device) is measured while changing the time t from the time when the test current Id of the transistor 117 is stopped and the time when the switch circuit 124b discharges the charge and turns off the switch circuit 124b. It is obtained in a characteristic formula including the initial inter-terminal voltage Vi as a fixed value. After the start of the test, the inter-terminal voltage Vi measured at a predetermined time t is substituted into the characteristic formula, and the A value (initial inter-terminal voltage Vi) or the change amount and change ratio of the characteristic formula are used for evaluating the deterioration state of the semiconductor device.

Effect of the Invention

[0026] Before or prior to the start of the test supplied to the semiconductor device, the present invention measures the inter-terminal voltage of the semiconductor device by supplying a test current Id. A characteristic formula is obtained from the measured inter-terminal voltage. During the test of the semiconductor device, the inter-terminal voltage measured at a predetermined time is substituted into the characteristic formula to obtain the temperature of the semiconductor device immediately after the stop of the test current Id. Therefore, it is possible to obtain a stable temperature of the semiconductor device without being affected by the surge voltage immediately after the stop of the test current Id.

Brief Description of the Drawings

[0027] [Figure 1] It is a configuration diagram and an explanatory diagram of the semiconductor test apparatus of the present invention. [Figure 2] It is a configuration diagram of the semiconductor test apparatus of the present invention. [Figure 3] This is a configuration diagram and explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 4] This is a timing chart and explanatory diagram of the semiconductor device testing method of the present invention. [Figure 5] This is a timing chart and explanatory diagram of the semiconductor device testing method of the present invention. [Figure 6] This is a timing chart and explanatory diagram of the semiconductor device testing method of the present invention. [Figure 7] This is a configuration diagram and explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 8] This is a configuration diagram and explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 9] This is a configuration diagram and explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 10] This is a configuration diagram and explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 11] This is a configuration diagram and explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 12] This is a timing chart and explanatory diagram of the semiconductor device testing method of the present invention. [Figure 13] This is a configuration diagram and explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 14] This is a timing chart and explanatory diagram of the semiconductor device testing method of the present invention. [Figure 15] This is an explanatory diagram of the test method for semiconductor devices according to the present invention. [Figure 16] This is an explanatory diagram of the test method for semiconductor devices according to the present invention. [Figure 17] This is an explanatory diagram of the test method for semiconductor devices according to the present invention. [Figure 18] This is a timing chart and explanatory diagram of the semiconductor device testing method of the present invention. [Figure 19] This is a configuration diagram and explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 20] This is a timing chart and explanatory diagram of the semiconductor device testing method of the present invention. [Figure 21]This is an explanatory diagram of the semiconductor testing apparatus and testing method of the present invention. [Figure 22] This is an explanatory diagram of the semiconductor testing apparatus and testing method of the present invention. [Figure 23] This is an explanatory diagram of the semiconductor testing apparatus and testing method of the present invention. [Figure 24] This is an explanatory diagram of the semiconductor testing apparatus and testing method of the present invention. [Figure 25] This is an explanatory diagram of the semiconductor testing apparatus and testing method of the present invention. [Figure 26] This is a configuration diagram and explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 27] This is a configuration diagram and explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 28] This is a configuration diagram and explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 29] This is a configuration diagram and explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 30] This is a configuration diagram and explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 31] This is a configuration diagram and explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 32] This is a configuration diagram and explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 33] This is a configuration diagram and explanatory diagram of the semiconductor testing apparatus of the present invention. [Figure 34] This is a timing chart and explanatory diagram of the semiconductor device testing method of the present invention. [Figure 35] This is a timing chart and explanatory diagram of the semiconductor device testing method of the present invention. [Figure 36] This is a timing chart and explanatory diagram of the semiconductor device testing method of the present invention. [Figure 37] This is a timing chart and explanatory diagram of the semiconductor device testing method of the present invention. [Figure 38] This is a timing chart and explanatory diagram of the semiconductor device testing method of the present invention. [Figure 39]This is a timing chart and explanatory diagram of the semiconductor device testing method of the present invention. [Figure 40] This is a timing chart and explanatory diagram of the semiconductor device testing method of the present invention. [Figure 41] This is a timing chart and explanatory diagram of the semiconductor device testing method of the present invention. [Figure 42] This is a timing chart and explanatory diagram of the semiconductor device testing method of the present invention. [Figure 43] This is a timing chart and explanatory diagram of the semiconductor device testing method of the present invention. [Figure 44] This is a timing chart and explanatory diagram of the semiconductor device testing method of the present invention. [Figure 45] This is a diagram illustrating a conventional semiconductor testing apparatus. [Figure 46] This is a timing chart and explanatory diagram of a conventional semiconductor device testing method. [Figure 47] This is an explanatory diagram of a semiconductor device. [Modes for carrying out the invention]

[0028] The following describes a semiconductor testing apparatus, such as a power cycle test, and a semiconductor device testing method according to an embodiment of the present invention, with reference to the attached drawings.

[0029] In the embodiments described in this specification, IGBTs are used as an example among semiconductor devices. The present invention is not limited to IGBTs and can be applied to various semiconductor devices such as SiC, MOSFETs, JFETs, GaN, and transistors. Furthermore, the present invention is not limited to transistors but can also be applied to two-terminal devices such as thermistors, positors, and diodes. It can also be applied to electronic components other than semiconductors, such as power resistors. Furthermore, it goes without saying that the present invention is not limited to power semiconductor devices, but can also be applied to low-power semiconductor devices.

[0030] In the drawings illustrating embodiments for carrying out the invention, elements having the same function may be denoted by the same reference numeral and their description may be omitted. Furthermore, the embodiments of the present invention can be combined.

[0031] Figure 2 is a diagram showing the configuration of the power cycle test apparatus (semiconductor test apparatus) of the present invention. The power cycle test apparatus has a chiller (cooling / heating device) 136, a heating / cooling plate 134, and a circulating water pipe 135 that circulates water between the heating / cooling plate 134 and the chiller 136. A transistor 117, which is a test sample, is mounted on the heating / cooling plate 134.

[0032] The test conditions are set by changing the test current Id, gate voltage Vg, and voltage Vce so that the temperature information Tj of the transistor 117 being tested reaches a predetermined value. If the temperature information Tj (terminal voltage Vi) changes, it is determined that the transistor 117 has deteriorated or its characteristics have changed, and the test of transistor 117 is stopped or the control method is changed.

[0033] For example, the reliability characteristics of transistor 117 are determined or assessed based on changes in temperature information Tj. Furthermore, the reliability and lifespan of transistor 117 are evaluated and measured based on factors such as the time it takes for the voltage Vce to reach a predetermined voltage and the time until transistor 117 fails.

[0034] In the semiconductor testing method of the present invention, external conditions are changed in accordance with the degradation or characteristic change of transistor 117. For example, if transistor 117 generates heat, the water temperature is lowered. Lowering the water temperature, or reducing the current flowing through transistor 117, prevents the degradation and characteristic change of transistor 117 from progressing. As a result, the lifespan of transistor 117 is extended. Therefore, the lifespan and reliability characteristics of transistor 117 under predetermined set conditions can be quantitatively measured and judged.

[0035] The temperature of the transistor 117 is maintained at a specified or predetermined value by heating or cooling the circulating water in the chiller 136. Furthermore, the temperature of the transistor and other components is periodically changed, cooled, and heated in accordance with the test conditions. The temperature information Tj of the test transistor is also measured, and the chiller 136 is controlled to maintain the measured temperature information Tj at a constant value.

[0036] A chiller is designed to maintain a constant temperature for equipment and other devices by circulating water or a heat transfer medium while controlling its temperature. While primarily used for cooling, chillers can also heat, allowing for a wide range of temperature control.

[0037] The control rack 131 includes a power supply unit 132 that supplies test current and test voltage to the transistor 117, and a control circuit 133 that controls the transistor 117 or sets test conditions.

[0038] The control circuit 133 receives temperature information Tj from the transistor 117 and controls the chiller 136 based on the temperature information Tj. Alternatively, it controls the chiller 136 to bring the temperature information Tj to a predetermined value.

[0039] In this specification, the circulating water is used, but it is not limited to water. Ethylene glycol, glycerin, etc., may also be used. Forced air cooling may also be used. The chiller 136 controls the liquid in the circulating water pipe 135 to a range of, for example, -10°C to +100°C and supplies it to the heating and cooling plate 134 of the test unit 3. The heating and cooling plate 134 has a sufficiently large heat capacity.

[0040] In the above embodiment, a heating and cooling plate 134 was used, but the heating plate and the cooling plate may be separate components, and heating and cooling may be performed using heat sources and cold sources other than the heating and cooling plate. Figure 1 is a diagram showing the configuration of a semiconductor testing apparatus (for example, a power cycle testing apparatus for testing power transistors) according to an embodiment of the present invention.

[0041] The current power supply 121 outputs a high-current constant current for testing the transistor 117. The current power supply 121 supplies power (current, voltage) in synchronization with the control signal from the controller (personal computer, etc.) 111, and uses the supplied power to drive the load with a set constant current or constant voltage. The current power supply 121 can also set the maximum output voltage value.

[0042] The switch circuit 122a (SWa) turns the constant current supply output by the current power supply unit 121 on (supplies) or off (cuts off). Based on the signal from the controller 111, the switch circuit 122a is set or controlled to be on (outputs constant current) or off (cuts off constant current). Normally, the switch circuit 122a is turned on before the start of the test and is kept on at all times during the semiconductor device test. Figure 1 illustrates one current power supply unit 121. However, the current power supply unit 121 is not limited to just one unit.

[0043] For example, as shown in Figure 11, the semiconductor testing apparatus of the present invention may have two or more current power supply units 121. The more current power supply units 121 there are, the more diverse current waveforms Id can be generated. In the embodiments of the present invention, the current power supply device 121 is described, but the current power supply device 121 is not limited to one that outputs a constant current.

[0044] For example, the current power supply 121 may be one that allows setting a maximum voltage. An example is to configure it to output a predetermined constant current at the set maximum voltage under certain conditions. Another example is to configure it so that the output terminal voltage can be set to a predetermined maximum voltage when outputting a constant current. Therefore, the current power supply 121 may not only output a constant current, but may also be a power supply capable of outputting voltage and current.

[0045] In the embodiments shown in Figure 1 and other examples, the test current Id is described as being generated by the current power supply 121. However, the test current Id can also be achieved by adjusting the applied voltage according to the on-resistance state of the transistor 117. Therefore, it goes without saying that the semiconductor test apparatus of the present invention is not limited to the current power supply 121 that outputs current, but may also be configured with a voltage output power supply.

[0046] The test current Id can also be achieved by controlling the voltage value of the gate voltage of transistor 117. In this specification, it is described that a predetermined current is applied to transistor 117 by controlling the current power supply 121. However, it is not limited to this, and it goes without saying that the voltage at the gate terminal g of transistor 117 and the voltage at the collector terminal c of transistor 117 may also be adjusted or controlled.

[0047] In Figure 1, the constant current Ic is shown flowing through the diode Di, but the present invention is not limited to this. For example, if transistor 117 is an IGBT and diode Di is not added, the constant current Ic is flowed in the direction of the channel current flow of transistor 117 (collector c → emitter e), and the voltage between channels (collector-emitter) is measured. Therefore, the direction in which the test current Id and the constant current Ic flow are the same.

[0048] In the embodiment of the semiconductor device testing method of the present invention, for the sake of simplicity of explanation, it is assumed that the constant current Ia=Id is generated by the current power supply 121a. The current Id that flows through the transistor 117 is supplied by operating the current power supply 121. The current power supply 121 is turned on / off by a signal from the controller 111. The current control circuit 114 is timing-controlled by the controller 111.

[0049] The emitter terminal e of transistor 117 is grounded (connected to the ground line). The gate terminal g of transistor 117 is connected to the gate driver circuit 113.

[0050] The gate driver circuit 113 outputs an on-voltage Vg that turns on the gate of transistor 117 at a set frequency and a set on-voltage time. In the embodiment shown in Figure 3, as shown in Figure 4(a), the on-off period of transistor 117 is tcycle, the on-time is ton, and the off-time is tooff.

[0051] The transistor 117 is switched on and off based on the ON signal voltage Vgs in Figure 4(a). The gate driver circuit 113 is controlled by the gate signal control circuit 112. The current power supply 121a outputs a constant current Ia, which is supplied as Id to the transistor 117.

[0052] The Vgs signal voltage output from the gate driver circuit 113 causes transistor 117 to switch on and off, and a current Id flows between the channels of transistor 117 during the period when transistor 117 is on.

[0053] The gate driver circuit 113 has a variable resistor circuit 125 inside. The value of the variable resistor circuit 125 is configured to be set to a predetermined value between 0 (Ω) and 500 (Ω), either in steps or continuously. The value of the variable resistor circuit 125 may also be set by a control signal from the controller 111 while observing the waveform at the gate terminal g.

[0054] As shown in Figure 18, the gate driver circuit 113 can change or set the on-voltage in real time. For example, the on-voltage is set to V1 when the test current Id is applied, and to V2 when a constant current Ic is flowing. The change from voltage V1 to voltage V2 may be smooth rather than abrupt.

[0055] As an example, the semiconductor device tested in this invention is an IGBT transistor 117. It goes without saying that it is not limited to IGBTs, but may also be transistors made of SiC or GaN, or other semiconductor devices or electrical devices.

[0056] If diodes Di (as shown in Figure 1) and Ds (as shown in Figure 7) are not present, a constant forward current Ic is supplied to transistor 117 while an ON voltage is applied. With the constant current Ic supplied, the inter-channel voltage Vce of transistor 117 is measured.

[0057] Figure 26 is a block diagram of the constant current circuit 118. The current Ic output by the constant current circuit 118 is small and has a high output impedance, so noise is easily superimposed on the constant current Ic.

[0058] This invention eliminates or reduces the effects of noise by adopting the configuration shown in Figure 26. A constant current Ic is passed through transistor 117, and temperature information of transistor 117 (channel voltage Vi, thermal resistance, transient thermal resistance) is obtained by measuring the channel voltage (collector-emitter voltage, drain-source voltage) of transistor 117.

[0059] Constant current Ic is often a small current, and constant current circuits have high impedance, making them susceptible to noise. Therefore, the constant current circuit 118 needs to be configured to have good noise immunity.

[0060] The configuration shown in Figure 26 isolates the AC-DC converter circuit 601 from the signal power supply, thereby suppressing power supply-related noise leaking from the AC-DC converter circuit 601. This blocks noise from the AC-DC converter circuit 601 and the reference voltage generation circuit. The AC-DC converter circuit 601, the reference voltage circuit 603, and the variable resistor circuit 125 are set and controlled by the controller 111.

[0061] The AC-DC converter circuit 601 generates a DC voltage Vb from an AC voltage. The DC voltage Vb is stabilized by capacitor 602a and supplied to the reference voltage circuit 603. The reference voltage circuit 603 generates a reference voltage Vs. A stable reference voltage Vs is applied to the gate terminal of transistor 604a.

[0062] The voltage at terminal c of transistor 604a is applied to the gate terminal of transistor 604b, and the voltage a at the emitter terminal of transistor 604b is supplied to the variable resistor circuit 125.

[0063] The dotted lines in Figure 26, specifically the transistor 604a and capacitor 602b, block noise from the AC-DC converter circuit 601, allowing the variable resistor circuit 125 to operate stably without noise.

[0064] The resistance value of the variable resistor circuit 125 is set by the controller 111. The voltage Vn at the + terminal of the operational amplifier circuit 116, which sets the constant current Ic, is set by the variable resistor circuit 125. The - terminal voltage of the operational amplifier circuit 116 becomes the same voltage as the + terminal voltage, and a stable constant current Ic is generated by the transistor 604c, resistor 315, and operational amplifier circuit 116.

[0065] In this specification and in the drawings, it is described as an operational amplifier circuit 116, but a voltage measurement circuit 301 is configured in the operational amplifier circuit 116 or the like to measure the terminal voltage Vi. The voltage measurement circuit 301 is a means for measuring the voltage value of the two terminals Vi, and the measured two terminals voltage Vi is output as digital data or analog data.

[0066] The constant current Ic is supplied to the channels of transistor 117 or to diode Di when the switch circuit 507 is turned on (closed).

[0067] The constant current circuit employs a four-layer circuit board, which separates the digital amplifier's ground (third layer) from the output section (fourth layer) of the AC-DC converter circuit 601 (second layer) and the reference voltage circuit 603, thereby reducing noise.

[0068] When a constant current Ic is flowing, it is necessary to reduce the influence of heat generation caused by the constant current Ic. Therefore, when supplying the constant current Ic to the transistor 117, in order to make the transistor 117 in a strong-on state, a voltage V2 higher than the V1 voltage is applied to the gate terminal of the transistor 117.

[0069] That is, it is set so that the relationship V1 < V2 holds. For example, if V1 is 10 V, then V2 is 15 V or more, which is 1.5 times or more. In this way, when the constant current Ic is flowing, by setting a high on-voltage V2, the channel-to-channel resistance of the transistor 117 becomes lower, and the voltage measurement accuracy of the terminal voltage Vi such as Vce is improved. During the test, due to the V1 voltage, a test current Id flows through the transistor 117, heat generation and the like occur in the channel of the transistor 117, and the test is carried out.

[0070] As shown in FIG. 18, during the period of ton1, the gate driver circuit 113 applies the gate-on voltage V1 to the transistor 117. After the application of the V1 voltage, after the time of the period of ts, the switch circuit Ssa124a turns on and supplies the test current Id to the transistor 117.

[0071] During the period when the constant current Ic is supplied from the constant current circuit 118 between the channels of the transistor 117, during the period of ton2, the gate driver circuit 113 applies the gate-on voltage V2 to the transistor 117 to strongly turn on the transistor 117. Note that the strong-on of the transistor 117 means reducing the channel-to-channel resistance of the transistor 117, and is not limited to turning on the transistor 117 with a gate voltage more than usual. During the period of applying the V2 voltage, the constant current Ic is supplied to the forward direction (from the collector terminal to the emitter terminal direction) of the transistor 117. During the period of tc1 of St1 among the periods when the constant current Ic is supplied, the Vce voltage of the transistor 117 is measured to obtain the transistor Tj.

[0072] The supply of constant current Ic to transistor 117 begins after the switch circuit 124a is turned off and after the ts period. The same applies to the period during which the voltage is changed from V1 to V2.

[0073] When the supply of the test current Id and the supply of the constant current Ic are repeated alternately, they are repeated alternately in synchronization with the on-voltages V1 and V2. The same repeating behavior applies to the variable resistor circuit 125 described below.

[0074] As described above, if there is no diode D for temperature measurement, an ON voltage is applied to the gate terminal of transistor 117, and a constant current Ic is supplied in the forward direction of transistor 117 to measure the inter-channel voltage Vce. The inter-channel voltage Vce is taken as the terminal voltage Vi, and the temperature information Tj is obtained from the terminal voltage Vi.

[0075] For example, if the temperature information is Tj and the terminal voltage is V, then V can be expressed as V = A·Tj + B. Therefore, Tj = (VB) / A. Tj and V have a linear relationship. The terminal voltage V and Tj are proportional. V is measured by applying a constant current Ic to a transistor or diode, changing the temperature of the transistor or diode using a heating and cooling device, and then measuring V.

[0076] If the change in the characteristics of transistor 117 is large, the relationship between terminal voltage V and Tj will not be proportional. However, if the change in terminal voltage V is small, and the test is conducted by monitoring the change relative to the initial voltage V, it is acceptable to consider the relationship between terminal voltage V and Tj as proportional. It goes without saying that Figure 18 can be applied to other embodiments of this specification, and can also be combined with other embodiments.

[0077] As shown in Figure 1, the embodiment in Figure 18 demonstrates that even with a diode Di formed or arranged, a constant current Ic can be supplied to the forward direction of the transistor 117, the inter-channel voltage Vce can be measured, and temperature information Tj can be obtained.

[0078] A resistor R (not shown) may be placed between the gate terminal g and the emitter terminal e or collector terminal c of transistor 117. By adjusting the value of resistor R, the slope angle of the rising and falling voltage waveforms of the gate signal can be adjusted.

[0079] When the value of the variable resistor circuit 125 is large, the slope of the rising / falling waveform of the gate signal of transistor 117 applied to the gate terminal of transistor 117 becomes gentler.

[0080] On the other hand, if the resistance value of the variable resistor circuit 125 is small, the slope of the rising / falling waveform of the gate signal becomes steeper. By changing the value of the variable resistor circuit 125 or setting it to a predetermined value, the on-time of the transistor 117 can be adjusted.

[0081] Adjusting the value of the variable resistor circuit 125 changes the slope of the rising / falling waveform of the gate signal applied to the gate terminal of transistor 117, thereby adjusting the surge voltage and surge current generated immediately after transistor 117 is turned off. Therefore, the resistance value of the variable resistor circuit 125 is closely related to the settings of w1, t1, and t2 times explained in Figure 20. It is preferable to set the resistance value of the variable resistor circuit 125, observe the voltage value of the terminal voltage Vi with an oscilloscope or the like, and adjust w1, t1, and t2 times as explained in Figure 20.

[0082] The gate driver circuit 113 can set the slope of the rising waveform (rising time Tr) and the slope of the falling waveform (falling time Td) for the gate voltage applied to the gate terminal g of transistor 117. By adjusting the rising time Tr and the falling time Td separately, the on-time of transistor 117 can be arbitrarily adjusted.

[0083] The resistance value of the variable resistor circuit 125 is set by the controller 111. The setting is not limited to a constant value. The slope of the rising waveform (rising time Tr) and the falling waveform (falling time Td) of the gate driver circuit 113 may be changed. The resistance value at the rising and falling of the gate signal may also be changed. Furthermore, the resistance value may be controlled in real time. By controlling the variable resistor circuit 125, the on-time and on-voltage of the transistor 117 are stabilized.

[0084] Although it was stated that the resistance value of the variable resistor circuit 125 would be adjusted, the adjustment of the resistance value is not limited to the variable resistor. Needless to say, the resistance value can also be adjusted by replacing the fixed resistor.

[0085] If the resistance value at the rising edge of the gate signal is reduced, the waveform of the on-voltage applied to the gate terminal of transistor 117 becomes steeper, causing transistor 117 to turn on quickly. If the resistance value at the rising edge of the gate signal is increased, the waveform of the on-voltage applied to the gate terminal of transistor 117 becomes gentler, causing transistor 117 to turn on more gradually.

[0086] If the resistance value at the falling edge of the gate signal is reduced, the waveform of the on-voltage applied to the gate terminal of transistor 117 becomes steeper, causing transistor 117 to turn off quickly. If the resistance value at the falling edge of the gate signal is increased, the waveform of the on-voltage applied to the gate terminal of transistor 117 becomes gentler, causing transistor 117 to turn off more gradually.

[0087] As described above, the value of the variable resistor Vr connected to the gate terminal of transistor 117, or the rise time / fall time of the gate driver circuit 113, can be controlled, adjusted, or set. In addition, the on voltage and off voltage are stabilized. Therefore, the gate driver circuit 113 can change or modify the inrush current Is and surge voltage Vs generated in the transistor 117.

[0088] It goes without saying that the operation of transistor 117 can not only control the on-voltage of the gate terminal of transistor 117, but also change or set the value of the test current Id or voltage Vm supplied to transistor 117 by the current power supply 121.

[0089] The variable resistor circuit 125 of the gate driver circuit 113 is controlled by the controller 111. The period time tcycle, on time ton, or off time toff of the gate signal output by the gate driver circuit 113 shown in Figure 4 is controlled by the gate signal control circuit 112, and the gate signal is applied to the gate terminal of transistor 117. The gate signal control circuit 112 is also controlled by the controller 111.

[0090] In Figure 1 and other diagrams, the resistance value of the variable resistor circuit 125 in the gate driver circuit 113 is shown as variable, but this is not the only option. For example, the variable resistor circuit 125 could be an external resistor, and the resistor could be connected to the gate terminal of the transistor 117 via a connector (not shown).

[0091] The value of the connected resistor is set by observing the waveform at the gate terminal of transistor 117 and the waveform of the channel current Id. It is also preferable to adjust the w1 time, t1 time, and t2 time as explained in Figure 20.

[0092] In Figure 1 and other diagrams, a constant current circuit Pc118 is connected between the collector terminal c and the emitter terminal e of transistor 117. The constant current circuit 118 supplies a predetermined constant current Ic. This constant current Ic is used to monitor the temperature of transistor 117.

[0093] For the purposes of this specification, an IGBT is used as an example, so the terminals of transistor 117 are the gate terminal g, the collector terminal c, and the emitter terminal e. In the case of a MOS transistor 117, the terminals of transistor 117 are the gate terminal g, the drain terminal d, and the source terminal s.

[0094] A body diode or channel diode Di is formed on transistor 117. Note that diode Di may be a diode from another semiconductor chip mounted on the semiconductor chip on which transistor 117 is formed.

[0095] Diode Di may utilize a diode (parasitic diode) that is formed incidentally during the formation of transistor 117. The parasitic diode is formed incidentally due to the layer structure of transistor 117. Structurally, diode Di is formed near the channel portion of transistor 117.

[0096] Diode Di can be any element as long as it does not operate when transistor 117 is running. For example, it is not limited to diodes; transistors can also be used in diode connection, as shown in Figure 10.

[0097] The diode Di may be integrated into the transistor 117 chip or be external. If diode Di is not present, a constant current Ic in the same direction as the test current Id of transistor 117 is applied, and the inter-channel voltage Vce of transistor 117 and the terminal voltage of diode D are measured, and the temperature change is monitored, measured, or calculated.

[0098] Furthermore, the method is not limited to semiconductors such as diodes; other devices such as resistors may also be used. By applying a constant current Ic to a device such as a resistor, the voltage across the resistor's terminals is measured. This voltage is measured as the terminal voltage Vi.

[0099] As described above, the element used to acquire temperature can be not only semiconductor devices but also resistors and other devices. In other words, any device that can acquire a voltage value by passing an electric current through it, or a device that can acquire a current value by applying a voltage, can be used.

[0100] The resistance of diode Di changes due to the heat generated by transistor 117. When a constant current Ic is passed through diode Di, the voltage across the terminals of diode Di changes in proportion to the change in its resistance. By monitoring or measuring the voltage across the terminals, the temperature of transistor 117, or the change in temperature, can be determined. In other words, temperature information Tj can be obtained. To monitor the temperature of transistor 117 from the voltage of diode Di, it is necessary to obtain the temperature coefficient beforehand.

[0101] The temperature coefficient is determined by setting transistor 117 to a predetermined temperature in a constant temperature bath, applying a constant current Ic to diode Di, and measuring the terminal voltage Vi of diode Di. By changing the predetermined temperature and measuring the terminal voltage of diode Di, the terminal voltage of the diode as a function of temperature can be obtained. Therefore, the temperature information Tj of transistor 117 can be determined from the terminal voltage of diode Di as a function of temperature.

[0102] The temperature information Tj may differ for each production lot of transistor 117, but generally it shows a constant value for each production lot. Therefore, if you take out a transistor 117 to be tested from each production lot and obtain its temperature information Tj, you can use that information for the temperature information Tj of other transistors 117. If there is a linear relationship between temperature information Tj and terminal voltage Vi, then the temperature information Tj can be determined by measuring the terminal voltage Vi.

[0103] To obtain accurate temperature information Tj, the temperature information Tj of each transistor 117 should be measured and tested individually, even within the same lot. The measurement of temperature information Tj (terminal voltage Vi) is not limited to the use of a constant temperature bath. For example, temperature information Tj (terminal voltage Vi) can be obtained by changing the temperature of the water flowing through the heat sink on which the transistor 117 is mounted.

[0104] During testing, a test current Id is intermittently applied to transistor 117. Immediately after the test current Id is turned off, or after a predetermined short period of time has elapsed, a constant current Ic for temperature measurement is supplied from constant current circuit 118.

[0105] To prevent transistor 117 from overheating due to the constant current Ic, or to ensure that the constant current Ic has no effect, the constant current Ic is set to a value sufficiently smaller than the test current Id flowing through the channel of transistor 117. The constant current Ic is set to a current that does not generate enough heat to affect temperature measurement.

[0106] Specifically, the constant current Ic used to determine the temperature coefficient is set to 1 / 1000 or less of the current Id that flows through transistor 117 during testing. Preferably, the current Ic that flows through transistor 117 is 1 × 10⁻⁶ of the current Id. 6 1 or more 1 x 10 4 Set it to 1 or less. The constant current Ic should be between 0.1mA and 100mA.

[0107] The channel current Ic is varied, and the diode Di voltage (collector-emitter terminal voltage of transistor 117) is measured to obtain temperature information Tj. The obtained temperature information Tj (terminal voltage Vi) is stored in the data memory 302 of the temperature measurement circuit 115.

[0108] When measuring temperature, if the diode Di is formed on the same chip as the transistor 117, the saturation voltage Vn may change depending on the gate voltage Vgs. It is preferable that the gate voltage Vgs be zero (0) or a negative voltage.

[0109] As shown in Figure 2, the controller 111 controls the chiller 136 based on the temperature information Tj. The chiller 136 adjusts the temperature of the circulating water (circulating solution) and adjusts the temperature of the heating and cooling plate 134.

[0110] When the temperature information is denoted as Tj, and the terminal voltage is denoted as V, it can be expressed as V = A·Tj + B. Therefore, Tj = (VB) / A. Tj and V are in a linear relationship.

[0111] In the embodiments described above, the temperature information Tj is determined in advance, but the semiconductor testing method of the present invention is not limited to this. The temperature information Tj of transistor 117 is determined from the temperature coefficient and the voltage across the diode terminals. The transistor 117 is positioned in close contact with the heating / cooling plate 134, and the temperature of the heating / cooling plate 134 is configured to be approximately the same as that of the transistor 117.

[0112] The controller 111 controls the chiller 136 to raise the temperature of the heating and cooling plate 134 to a predetermined temperature, applies a constant current Ic to the transistor 117, and measures the terminal voltage of the diode Di.

[0113] The temperature information Tj is determined from the measurement results. The temperature of the heating / cooling plate 134 is set to multiple temperatures, and the temperature information Tj is determined at each temperature to improve the accuracy of the temperature coefficient value.

[0114] The temperature information Tj is obtained by heating the transistor 117 to a predetermined temperature using the heating and cooling plate 134, and then applying a constant current Ic to the diode Di to measure the terminal voltage Vi. It is preferable to measure the terminal voltage Vi multiple times. The measured terminal voltage Vi is then averaged.

[0115] By changing the predetermined temperature and measuring the terminal voltage of the transistor or diode Di, the terminal voltage of the transistor or diode Di in relation to temperature can be obtained. Therefore, the temperature information Tj of the transistor 117 can be determined from the terminal voltage of the diode Di, etc., in relation to temperature.

[0116] During testing of transistor 117, the constant current Ic is applied to diode Di when the channel current Id is not flowing. In other words, when transistor 117 is not turned on, the constant current Ic is applied to measure the terminal voltage of diode Di, etc.

[0117] The operational amplifier circuit (buffer circuit) 116 of the voltage measurement circuit 301 outputs the terminal voltage Vi (terminal c - terminal e) of the diode Di. Note that the operational amplifier circuit 116 is not limited to being composed of operational amplifier elements; any circuit with high input impedance and low output impedance is acceptable. The voltage Vi output from the voltage measurement circuit 301 is not limited to analog data; it may also be data converted to digital data.

[0118] In this specification and in the drawings, the voltage measurement circuit 301 is illustrated and described as an operational amplifier circuit 116, but it is not limited to the operational amplifier circuit 116. The voltage measurement circuit 301 can be configured with the operational amplifier circuit 116 or the like. The voltage measurement circuit 301 is a means or circuit for measuring the voltage value between two terminals. The voltage measurement may also be performed using a differential amplifier output. The measured voltage between the two terminals is output as digital data (Tdata) or analog data Vi.

[0119] The temperature information Tj of the transistor 117 being tested is determined from the temperature information Tj and terminal voltage Vi held by the temperature measurement circuit 115. Although the temperature information Tj is referred to as temperature information, it can be obtained from the terminal voltage Vi, and there is a linear relationship between the temperature information Tj and the terminal voltage Vi.

[0120] The requested temperature information Tj is sent to the controller 111. If the temperature information Tj exceeds a predetermined set value, the controller 111 determines that the transistor 117 is in a predetermined stress state or a degraded state, and takes action such as changing the test control or stopping the test. Alternatively, if the terminal voltage Vi exceeds a predetermined set value, or if the terminal voltage Vi falls outside the range of the predetermined set value, the controller 111 determines that the transistor 117 is in a predetermined stress state or a degraded state, and takes action such as changing the test control or stopping the test.

[0121] The temperature information Tj is input to the controller 111, and the temperature change of transistor 117 is monitored. Based on the temperature information Tj, changes in the characteristics and degradation of transistor 117 are measured or observed. Based on the temperature information Tj, the test of transistor 117 is stopped, interrupted, or the test conditions are changed.

[0122] In testing, the main area where transistors degrade is often the junction within transistor 117. The semiconductor itself rarely degrades; instead, the junction (bonding, die bond, etc.) of transistor 117 deteriorates, increasing its resistance. This increased resistance leads to a higher voltage Vce (terminal voltage Vi), generating heat and raising the temperature of transistor 117. By measuring or acquiring the temperature of transistor 117, the degradation of its characteristics can be accurately determined.

[0123] When a semiconductor degrades, it is often due to the degradation of the gate oxide (insulating film) of transistor 117. When the gate oxide degrades, a short circuit occurs in the oxide (insulating film), and the voltage Vce decreases. Alternatively, transistor 117 turns off, no current flows through transistor 117, and the voltage Vce rises to the maximum value of the power supply voltage.

[0124] The temperature information Tj initially fluctuates between the lowest temperature T1 and the highest temperature T2 at the start of the test. When the test stresses transistor 117, the Vce voltage of transistor 117 changes, and the temperature information Tj usually changes in the direction of increasing. Therefore, as shown in Figure 5(c), the lowest temperature rises above temperature T1, and the highest temperature approaches the temperature information Tm(Tjmax). In the semiconductor testing method of the present invention, the test is terminated under one of the following conditions. • If the temperature information Tj falls outside the specified range. • If the channel voltage Vce falls outside the specified voltage range. • When the thermal resistance falls outside the specified range.

[0125] In the embodiments shown in Figure 1 and other examples, the switch circuit 124a and switch circuit 124b use the symbol for a switch. Switch circuits 124a and 124b can be used as switches with any element that has a small resistance when closed (on) (on resistance). Examples include FETs, transistors, mechanical relays, phototransistors, and photodiode switches.

[0126] In this embodiment, switch circuits 124a and 124b use power MOSFETs as shown in Figure 3. Power MOSFETs have a small voltage (Vsd) between channels. It goes without saying that the switch circuits Ssa and Ssb can be power transistors or other components, not just power MOSFETs.

[0127] The channel voltage (Vsdb) of power MOSFET 124b when it is ON is selected to be less than or equal to the channel voltage (Vsda) of power MOSFET 124a when it is ON. In other words, the channel voltage (Vsdb) of power MOSFET 124b when it is ON is made smaller than the channel voltage (Vsda) of power MOSFET 124a when it is ON. This is to ensure that when the switch circuit 124b is ON, the terminals of the current power supply unit 121a are completely short-circuited, allowing the current Im to flow stably. By turning on the switch circuit 124b, charge can be discharged between the terminals of the current power supply unit 121 and between the terminals of semiconductor elements such as transistor 117. By discharging charge, the generation of inrush current and surge voltage can be suppressed. The above points also apply when the switch circuit 124 is a power transistor or the like. In the case of a power transistor 124, the channel voltage is Vce.

[0128] Figure 4 is an explanatory diagram of the test method for the semiconductor device of the present invention in an embodiment. In Figure 4, Vgs is the gate signal applied to the gate terminal of the transistor 117 to be tested. Id is the current that flows through the transistor 117 during the test. For the sake of simplicity, it is assumed that a constant current Ia flows when the transistor 117 is ON.

[0129] Figure 4(c) shows that St1 is a timing signal that causes current Ic to flow through diode Di. When St1 is at a high level, current flows through diode Di of transistor 117. The operational amplifier circuit 116 acquires the terminal voltage Vi of diode Di, and the temperature measurement circuit 115 converts the terminal voltage Vi into temperature information Tj. The temperature information Tj is sent to the controller 111, which then performs a test of transistor 117 according to the temperature information Tj.

[0130] Furthermore, the procedure for measuring the terminal voltage Vi with respect to time t and substituting it into the characteristic formula to estimate the temperature of transistor 117 immediately after the test current Id is cut off is explained in Figures 15 and 20, etc.

[0131] The test current Id is the current flowing through the transistor 117 being tested, and is the current output by the current power supply 121. St1 and St2 are the time for applying the constant current Ic to the temperature measuring diode or transistor, or the time for measuring the temperature. In Figure 4(e), Ssa is the on / off signal for switch circuit 124a, and in Figure 4(f), Ssb is the on / off signal for switch circuit 124b.

[0132] As shown in relation to switch circuit Ssa124a, switch circuit (Ssb) 124b is turned ON during the ta2 period before switch circuit 124a is turned OFF (open). Switch circuit 124b is turned ON (closed) before the test current Id is interrupted by switch circuit 124a. By turning switch circuit 124b ON before switch circuit 124a is opened, surge voltage Vs and inrush current Is can be suppressed.

[0133] Switch circuit 124b remains on (closed) for the duration of ta1 even after switch circuit 124a is turned off. By keeping switch circuit 124b on for the duration of ta1 after switch circuit 124a is opened, surge voltage Vs and inrush current Is can be suppressed.

[0134] The ta2 period is a period of 0 to 10 milliseconds or less. Preferably, it is a period of 0 to 5 milliseconds or less. The ta1 period is a period of 0 to 10 milliseconds or less. Preferably, it is a period of 0 to 5 milliseconds or less.

[0135] In the above embodiment, the test current Id is interrupted by the switch circuit 124a, but the test current Id can also be interrupted by changing the on voltage applied to the gate terminal g of transistor 117 to the off voltage. By changing the on voltage (Vg) to the off voltage (0V voltage or Vt voltage) of the gate voltage Vgs in Figure 4, transistor 117 is turned off and the test current Id is interrupted. When the voltage changes to Vt (ton->toff), the switch circuit Ssb is in the on period ta1.

[0136] By maintaining the ON state of the switch circuit 124b before applying an OFF voltage to the gate terminal g of transistor 117, surge voltage Vs and inrush current Is can be suppressed. Furthermore, by maintaining the ON state of the switch circuit 124b for a predetermined period after applying an OFF voltage to the gate terminal g of transistor 117, surge voltage Vs and inrush current Is can also be suppressed. The above points also apply during the period before the test current Id is supplied by the switch circuit 124a.

[0137] As shown in relation to switch circuit Ssa 124a, switch circuit 124b is turned on during the tb2 period before switch circuit 124a is turned on (closed). Switch circuit 124b is turned on (closed) before the test current Id is supplied by switch circuit 124a. By turning on switch circuit 124b before switch circuit 124a is closed, surge voltage Vs and inrush current Is can be suppressed.

[0138] Switch circuit 124b remains on (closed) for the duration of tb1 even after switch circuit 124a is turned on. By maintaining the on state of switch circuit 124b for the duration of tb1 after switch circuit 124a is closed, surge voltage Vs and inrush current Is can be suppressed.

[0139] The tb2 period is a period of 0 to 10 milliseconds or less. Preferably, it is a period of 0 to 5 milliseconds or less. The tb1 period is a period of 0 to 10 milliseconds or less. Preferably, it is a period of 0 to 5 milliseconds or less.

[0140] In the above embodiment, the test current Id is supplied by the switch circuit 124a, but the test current Id can also be supplied by changing the off voltage applied to the gate terminal g of transistor 117 from an off voltage to an on voltage. By changing the off voltage (0V voltage or Vt voltage) to an on voltage (Vg voltage) at the gate voltage Vgs in Figure 4, transistor 117 turns on and the test current Id is supplied. Before the voltage changes to Vg (toff->ton), the switch circuit Ssb is in the on period tb2. By maintaining the on state of the switch circuit 124b before applying the on voltage to the gate terminal g of transistor 117, the surge voltage Vs and inrush current Is can be suppressed. Furthermore, by maintaining the on state of the switch circuit 124b for a predetermined period after applying the on voltage to the gate terminal g of transistor 117, the surge voltage Vs and inrush current Is can also be suppressed.

[0141] The tb2 period is a period of 0 to 10 milliseconds or less. Preferably, it is a period of 0 to 5 milliseconds or less. The tb1 period is a period of 0 to 10 milliseconds or less. Preferably, it is a period of 0 to 5 milliseconds or less. It goes without saying that the above points can also be applied to the embodiments shown in Figures 5, 6, 12, 14, 20, 21, 34, 35, 36, 42, and 43. Furthermore, it goes without saying that these points can be applied to other embodiments of the present invention. And it goes without saying that these points can be combined with other embodiments of the present invention.

[0142] In Figure 4(g), Vce is the voltage at terminal c of transistor 117 (channel voltage of transistor 117), and the temperature information Tj (terminal voltage Vi) shows the measured temperature change of transistor 117.

[0143] As shown in Figure 4(a), the gate signal Vgs is applied from the gate driver circuit 113 to the gate terminal g of the transistor 117. The gate signal Vgs has a period time tcycle and an on-time ton. The period time tcycle and on-time ton can be set to arbitrary values ​​by the gate signal control circuit 112. The on-voltage Vg can also be set to an arbitrary voltage.

[0144] The on-voltage is varied or variable depending on whether a test current Id is applied or supplied, or whether a constant current Ic is applied or supplied. Similarly, the off-voltage may also be varied or variable depending on whether a test current Id is applied or supplied, or whether a constant current Ic is applied or supplied.

[0145] Figure 4(d) shows St2, which is the timing signal for supplying current Ic to diodes Dsa and Dsb in the embodiment shown in Figure 7. When St2 is at a high level, current flows to diode Dsa or Dsb of transistor 117. This is the case where a constant current Ic is supplied to a device (diode) independent of transistor 117 to acquire temperature information Tj.

[0146] The operational amplifier circuit 116 acquires the terminal voltage of diode Dsa or Dsb, and the temperature measurement circuit 115 converts the terminal voltage into temperature information Tj. The temperature information Tj is sent to the controller 111, which performs a test of transistor 117 based on the temperature information Tj. Matters related to St2 will be explained in Figure 7, etc.

[0147] For ease of understanding, the measured temperature information Tj is explained as changing between T1 and T2, as shown in Figure 4(h). The temperature information Tj increases when current is passed through transistor 117 and decreases when the current is stopped. Furthermore, the temperature information Tj changes in accordance with the changes in the characteristics of transistor 117.

[0148] Figure 4(e)Ssa shows the timing of the on / off control signal for the switch circuit Ssa. When Ssa is Von, the switch circuit Ssa closes (turns on). When it is 0, the switch circuit Ssa opens (turns off), and the application of current or voltage is interrupted.

[0149] Figure 4(f)Ssb shows the timing of the on / off control signal for the switch circuit Ssb. When Ssb is Von, the switch circuit Ssb closes (turns on). When it is 0, the switch circuit Ssb opens (turns off).

[0150] In Figure 4(g), Vce is the channel voltage of transistor 117 (voltage between the emitter and collector terminals). Surge voltage and surge current are generated when transistor 117 is switched on and off, and the Vce waveform changes in a complex manner over time due to the change in the on-resistance of transistor 117. In addition, the Vce waveform of transistor 117 changes when a constant current Ic flows through diode Di.

[0151] In this specification and its drawings, for the sake of clarity and ease of explanation, it is assumed that when transistor 117 is ON, the voltage is Vn, and when the transistor is OFF, the voltage is Ve. The gate signal is applied to the gate terminal of transistor 117, which is being tested with period tcycle, on time ton, and off time toff.

[0152] The gate signal Vgs is the on-voltage when transistor 117 is an N-channel transistor, with ground voltage 0V being the off-voltage and Vg being the on-voltage. When transistor 117 is a P-channel transistor, the potentials of the on-voltage and off-voltage are changed.

[0153] During the tn2 period before transistor 117 is turned on, the Vt voltage is set to a negative value than the off voltage. Similarly, during the tn1 period after transistor 117 is turned off, the Vt voltage is set to a negative value than the off voltage. The Vt voltage is a voltage lower than 0V and higher than -4V. Therefore, Vt is a voltage that is greater than or equal to -4V and lower than 0V.

[0154] The Vt voltage can be changed from Vn to V0, or from V0 to Vn, in the same way as in Figure 41(b), just as the ON voltage is changed from V1a to V1b in Figures 40 and 41(b).

[0155] In this invention, the off-voltage of a transistor is described as two voltages: 0V and Vt. The semiconductor test apparatus of this invention allows the off-voltage to be arbitrarily set and varied. Based on the instruction value of the gate signal control circuit 112, the on-voltage and off-voltage of the gate signal output from the gate driver circuit 113 can be varied and set.

[0156] In Figures 37, 38, and 39, the on-voltage is changed from the V1 voltage. In Figures 40 and 41(b), the on-voltage is changed from V1a to V1b. The present invention also allows the off-voltage to be changed from Vn to V0, or from V0 to Vn, in the same way as in Figure 41(b) as in Figure 41(d).

[0157] Furthermore, if transistor 117 is SiC, the off-voltage is set to the Vt voltage, and if it is an IGBT, the off-voltage is set to 0V. As described above, the semiconductor testing apparatus of the present invention is configured so that the off-voltage supplied to transistor 117 can be changed according to the type of transistor 117 being tested.

[0158] When the Vt voltage is applied, the temperature of transistor 117 is measured by setting St1 (St2) to a high level. A constant current Ic is passed through diode Di during the period when the Vt voltage is applied. Also, a constant current Ic is passed through St1 (St2) during the period when it is at a high level.

[0159] By applying the Vt voltage to the gate terminal of transistor 117, the off state of transistor 117 is stabilized, enabling stable measurement of temperature information Tj. Furthermore, noise is less likely to be introduced during the measurement of temperature information Tj, improving the measurement accuracy of temperature information Tj (terminal voltage Vi).

[0160] By applying the Vt voltage to the gate terminal of transistor 117, the leakage current of transistor 117 is reduced, improving the measurement accuracy of the terminal voltage Vi and stabilizing the measurement.

[0161] The gate signal Vgs is set to the Vt voltage during the time intervals of tn1 and tn2. For example, the time intervals of tn1 and tn2 are between 0.2ms and 2ms. Transistor 117 is turned off at 0V.

[0162] Therefore, three voltages, Vg, 0V, and Vt, are applied to the gate terminal g of transistor 117. During the period when Vt is applied, current is passed through the transistor's diode Di to measure the temperature information Tj.

[0163] When a constant current Ic is applied to the diode Di, the switch circuit Ssa is turned off to control the current from the current power supply 121a so that it is not applied to the transistor 117.

[0164] By applying a constant current Ic to the diode Di, the terminal voltage Vi of the diode Di is obtained, and the operational amplifier circuit 116 outputs a terminal voltage Vi corresponding to the terminal voltage. The terminal voltage Vi is input to the temperature measurement circuit 115, and the temperature measurement circuit 115 obtains temperature information Tj corresponding to the temperature of the transistor 117.

[0165] The temperature information Tj is transmitted to the controller 111, and the controller 111 controls the test of transistor 117, such as continuing, stopping, or changing the conditions of the test of transistor 117, based on the temperature information Tj.

[0166] Figure 4(e) Ssa is the timing signal that controls the on / off state of switch circuit 124a. Figure 4(f) Ssb is the timing signal that controls the on / off state of switch circuit 124b.

[0167] The switch circuit 124a turns on after a delay of tm2 time, following the Vgs signal of transistor 117 becoming Vg. The tm2 time can be changed and set by the controller 111.

[0168] Switch circuit 124b turns on tb2 hours before switch circuit 124a turns on. Switch circuit 124b remains in the ON state for tb1 hours after switch circuit 124a turns on. tb2 hours and tb1 hours can be changed independently. In particular, the setting of tb1 is important. The time of tb1 should be set or changed appropriately by observing the waveform of the Vce voltage of transistor 117.

[0169] The switch circuit 124a turns off tm1 hours before the Vgs signal of transistor 117 becomes Vt. The tm1 time is configured to be changeable by the controller 111.

[0170] Switch circuit 124b turns on ta2 hours before switch circuit 124a turns off. Switch circuit 124b remains on until ta1 hours after switch circuit 124a turns off. ta2 hours and ta1 hours can be independently changed. In particular, the setting of ta1 is important. The time of ta1 should be set or changed appropriately by observing or measuring the waveform of the Vce voltage of transistor 117.

[0171] When the switch circuit Ssb is turned on, the output terminal of the current power supply 121a is short-circuited to ground (earth line), and the charge is discharged. As the charge is discharged, the terminal voltage of the current power supply 121a becomes 0V (ground voltage). In addition, the current Ia output by the current power supply 121a is discharged to ground as current Im. Therefore, current Ia is not applied to transistor 117, and the collector voltage of transistor 117 does not rise.

[0172] The tb2 time is set by observing or measuring the time when the output voltage of the current power supply 121a is 0V or close to 0V, or when the output voltage of the current power supply 121a is lower than the collector voltage of the transistor 117.

[0173] At the time when the above voltage relationship reaches a predetermined value (after tb2 has elapsed), the switch circuit 124a is turned on, and the current Ia (=Id) from the current power supply 121a is applied. However, at this time, since the switch circuit 124b is on, the current Ia (=Id) from the current power supply 121a flows to ground (earth line) as current Im via the switch circuit 124b. Therefore, no test current Id flows through transistor 117. After switch circuit 124a is turned on, and after tb1 time has elapsed, switch circuit 124b is turned off, and the test current Id is supplied to transistor 117. The test current Id is supplied to the transistor 117 in synchronization with the switch circuit 124a, as shown in Figure 4.

[0174] As described above, by operating the switch circuits 124a and 124b, no surge voltage Vs or inrush current Is is applied to transistor 117. Alternatively, the surge voltage Vs or inrush current Is is suppressed, allowing for proper testing of transistor 117.

[0175] When the test current Id to transistor 117 is stopped, switch circuit 124b is turned on before switch circuit 124a is turned off ta2. Through switch circuit Ssb, the constant current Ia output by current power supply 121a flows to ground as current Im and is not supplied to transistor 117.

[0176] The ta2 time is set by observing the time when the output voltage of the current power supply 121a is 0V or near 0V, or the time when the output voltage of the current power supply 121a is lower than the collector voltage of the transistor 117.

[0177] Switch circuit 124a is turned off when the above voltage relationship reaches a predetermined value (after ta2 has elapsed). After switch circuit 124a is turned off, switch circuit 124b is turned off after ta1 time has elapsed.

[0178] As described above, by operating or controlling the switch circuits 124a and 124b in this manner, no surge voltage Vs or inrush current Is is applied to the transistor 117. Alternatively, the surge voltage Vs or inrush current Is is suppressed, allowing for proper testing of the transistor 117.

[0179] For example, the temperature information Tj can be calculated using the formula (Vi-B) / A. A and B are determined beforehand by measuring the terminal voltage Vi against the temperature of the transistor being tested. Therefore, the temperature information Tj is proportional to Vi. A and B will be common values ​​across the entire batch of transistors being tested. As the terminal voltage Vi increases, the temperature information Tj changes proportionally to the terminal voltage Vi. The terminal voltage Vi indicates the temperature of transistor 117, etc. This temperature-related data becomes the temperature information Tj.

[0180] When a test current Id is supplied to transistor 117, the temperature information Tj increases. When the test current Id to transistor 117 stops, the temperature information Tj decreases. The temperature information Tj fluctuates between T1 and T2. As the characteristics of transistor 117 change due to the test, the temperature information Tj gradually increases. To apply a constant current Id to transistor 117, the current power supply 121a is operated to apply current Id (=Ia) to transistor 117.

[0181] When the constant current Ic for temperature measurement flows from the collector terminal c to the emitter terminal e of transistor 117, surge voltage is unlikely to occur because the direction of the test current Id and the constant current Ic are the same. Therefore, it is not necessary to turn on the switch circuit 124b and discharge. In other words, with switch circuit 124b open (switch circuit 124b is unnecessary), switch circuit 124a is turned off, and the constant current Ic is supplied to transistor 117 from the constant current circuit 118. With the constant current Ic supplied, the temperature measurement circuit 115 measures the Vce voltage of transistor 117.

[0182] As shown in Figures 1 and 5, the resistance value of the variable resistor circuit 125 of the gate driver circuit 113 can also be set. By increasing the resistance value, the rising / falling waveform of the gate signal Vgs can be changed as shown by the dotted or dashed lines in Figure 5(a).

[0183] By changing or setting the gate signal Vgs, the test current Id flowing through transistor 117 can be changed as shown by the dotted or dashed line in Figure 5(b). By changing the rising and falling waveforms of the current Id, the surge voltage Vs or inrush current Is can be adjusted or suppressed.

[0184] As shown in Figure 5(c), the terminal voltage Vi changes from a solid line to a dotted line, and then from a dotted line to a dashed line, as the characteristics of transistor 117 change during the test. The test is stopped when the terminal voltage Vi reaches the level of Vm. Alternatively, the test is stopped when the rate of change of the terminal voltage Vi reaches a predetermined value. The test conditions may also be changed.

[0185] As shown in Figure 6, when the switch circuit Ssa (switch circuit 124a) is in the off state, the St1 signal is set to H and the temperature information Tj (terminal voltage Vi) is measured. The St1 signal is set to H level when the gate signal is Vt. During the tn2 period, the St1 signal is set to H level during the tc2 period and the temperature information Tj is measured. During the tn1 period, the terminal voltage Vi is measured during the tc1 period and the temperature information Tj is obtained.

[0186] The temperature information Tj acquired during period tc2 is the temperature information Tj at the time when transistor 117 has cooled down. The temperature information Tj acquired during period tc1 is the temperature information Tj immediately after the current Id to transistor 117 is stopped. Decisions regarding stopping the test, changing conditions, or modifying controls are made based on the temperature information Tj measured during period tc2 and the temperature information Tj measured during period tc1.

[0187] If the temperature information Tj measured during period tc1 has a larger rate of change compared to the temperature information Tj measured during period tc2, or if there is a large difference in the absolute value between the temperature information Tj measured during period tc1 and the temperature information Tj measured during period tc2, the test will be controlled and modified in accordance with the measured temperature information Tj.

[0188] Furthermore, if the temperature information Tj measured during the tc2 period differs from the standard value and the specified value, the system determines whether there is a problem with the connection status of transistor 117 or the test equipment, and makes a decision such as "do not start the test." During the tc2 or tc1 period, Vi is measured multiple times, and the temperature information Tj for Vi is determined.

[0189] In the embodiment shown in Figure 7, the temperature information Tj is measured at the timing of the St2 signal shown in Figure 4(d). When the switch circuit Ssa (switch circuit 124a) is in the off state, the St2 signal is set to H and the temperature information Tj is measured. During the tn2 period, the temperature information Tj is measured by setting it to H level during the tc2 period. During the tc1 period, the temperature information Tj may be measured during either the ton period or the tn1 period. The temperature information Tj measured during the tc2 period and the temperature information Tj measured during the tc1 period are averaged to obtain the temperature information Tj.

[0190] During the tc2 or tc1 period, Vi is measured multiple times to obtain temperature information Tj for Vi. The operation of other signals or switches in Figure 4 is the same as or similar to that of the embodiment described in Figure 1. The above examples were embodiments in which temperature information Tj is measured by a diode added to or formed on the transistor 117.

[0191] Figure 7 is an explanatory diagram of a semiconductor testing apparatus in an embodiment of the present invention. In the embodiment shown in Figure 7, a diode Ds that is not connected to (independent of) the transistor 117 is formed.

[0192] Diode Dsa is formed to allow a constant current Ic to flow. Diode Dsb is formed to allow a constant current Ic' to flow. The constant current circuit 118(Pc) generates constant currents Ic and Ic'.

[0193] Diodes Dsa and Dsb are diodes used for temperature measurement. The structures of diodes Dsa and Dsb are similar to or identical to diode Di in Figure 1.

[0194] The diodes Di and Dsb operate or have the same configuration, except that diode Di is connected to terminals (c, e) of transistor 117, while diodes Dsa and Dsb are not connected to terminals of transistor 117 but to independent terminals, and that the temperature information Tj is measured for diode Di at timing St1 in Figure 4(c), while the temperature information Tj is measured for diodes Dsa and Dsb at timing St2 in Figure 4(d). The terminal voltage Vi of diodes Dsa and Dsb is the temperature information Tj.

[0195] In the embodiment shown in Figure 7, a constant current Ic can be supplied to the diode even when a current Id is flowing through the transistor 117. Therefore, the time for measuring the temperature information Tj can be freely set. As shown in Figure 4(d), the positions of tc1 and tc2 can be set.

[0196] However, in the case of tc2, as shown in Figure 4(d), the gate signal is placed or set during the period of Vt. The temperature information Tj measured during the period of tc2 is used as the value before the transistor 117 operates. The period of tc1 is preferably just before stopping the test current Id of the transistor 117. Alternatively, it may be immediately after stopping the test current Id. The time immediately before and immediately after is preferably within 1 millisecond. In Figure 4(d), St2 is a timing signal that controls the constant current Ic (or constant current Ic') flowing through the diode Ds (Dsa, Dsb).

[0197] When St2 is at a high level, current flows through the diode Ds (Dsa, Dsb) of transistor 117. The operational amplifier circuit 116 acquires the terminal voltage of diode Ds, and the temperature measurement circuit 115 converts the terminal voltage into temperature information Tj.

[0198] The temperature information Tj is sent to the controller 111, and the controller 111 performs, stops, or modifies the control of the transistor 117 according to the temperature information Tj.

[0199] When St2 is at a high level, the constant current circuit 118 flows a constant current Ic, which flows through diode Dsa. The constant current circuit 118 also flows a constant current Ic', which flows through diode Dsb. A terminal voltage Vi is generated across diode Ds due to either the constant current Ic or Ic'.

[0200] Constant currents Ic and Ic' are currents of the same magnitude. However, if the threshold voltages of diodes Dsa and Dsb are different, or if the characteristics of diodes Dsa and Dsb are different, it is preferable to make the magnitudes of constant currents Ic and Ic' different.

[0201] The operational amplifier circuit 116 acquires the terminal voltage Vi of diode Dsa or Dsb, and the temperature measurement circuit 115 converts the terminal voltage Vi into temperature information Tj. For example, Tj = (Vi - B) / A. The temperature information Tj is sent to the controller 111, which then performs a test on transistor 117 based on the temperature information Tj.

[0202] The temperature information Tj obtained by applying a constant current Ic and the temperature information Tj obtained by applying a constant current Ic' are averaged or weighted to obtain a single temperature information Tj value. Using this temperature information Tj, the controller 111 performs, stops, or changes the control of the transistor 117. Other matters are the same or similar to those described or depicted in this specification and the drawings, and therefore their explanations are omitted.

[0203] It goes without saying that the present invention can be modified in various ways without departing from its essence. It goes without saying that the matters and contents described herein and in the drawings can be combined with each other.

[0204] Figure 8 is an explanatory diagram of a semiconductor testing apparatus in an embodiment of the present invention. In Figure 8, diodes Dia and Dib are formed between the gate terminal and emitter terminal of transistor 117.

[0205] Diodes Dia and Dib are formed as parasitic diodes in conjunction with the formation of transistor 117. They may also be formed additionally for temperature measurement of transistor 117. Note that both diodes Dia and Dib may be formed, or only one may be formed.

[0206] A switch circuit 124c is formed or placed at the gate terminal of transistor 117. Examples of switch circuits 124c include analog switches, mechanical relays, and photoMOS switches.

[0207] The timing for measuring the terminal voltage Vi (determining temperature information Ti) is performed at St1 in Figure 4(c). When the switch circuit Ssa (switch circuit 124a) is in the off state, the St1 signal is set to H, the terminal voltage Vi is measured, and temperature information Tj is obtained. The St1 signal is set to H level when the gate signal is Vt. During the tn2 period, the St1 signal is set to H level during the tc2 period, the terminal voltage Vi is measured, and temperature information Tj is obtained. During the tn1 period, the terminal voltage Vi is measured during the tc1 period, and temperature information Tj is obtained. The temperature information Tj obtained during the tc2 period is the temperature information Tj at the time when transistor 117 has cooled down. The temperature information Tj obtained during the tc1 period is the temperature information Tj immediately after the current Id to transistor 117 is stopped.

[0208] Diode Dia is formed to allow a constant current Ic to flow. Diode Dib is formed to allow a constant current Ic' to flow. The constant current circuit 118 generates constant currents Ic and Ic'.

[0209] Diodes Dia and Dib are diodes used to acquire temperature information Tj. Diodes Dia and Dib are similar to diode Di in Figure 1. Diode Di is connected to the collector and emitter terminals of transistor 117. Diodes Dia and Dib are connected to the base and emitter terminals of transistor 117. In the embodiment shown in Figure 8, a constant current Ic is supplied to the diode even when no current Id is flowing through the transistor 117. In Figure 4(c), St1 is a timing signal that causes current Ic (or current Ic') to flow through the diode Di (Dia, Dib).

[0210] When St1 is at a high level, current flows through diode Di of transistor 117. When current Ic (or current Ic') flows through diode Di (Dia, Dib), switch circuit 124c is opened (high impedance). With switch circuit 124c open, a constant current Ic or constant current Ic' flows through diode Di.

[0211] The operational amplifier circuit 116 measures the terminal voltage Vi of diode Di (the voltage between the gate and emitter terminals of transistor 117), and the temperature measurement circuit 115 converts the terminal voltage Vi into temperature information Tj. The temperature information Tj is sent to the controller 111. The controller 111 performs, stops, or modifies the control of transistor 117 based on the temperature information Tj.

[0212] As shown in Figure 4(c), when St1 is at a high level, the constant current circuit 118 flows a constant current Ic, which flows through diode Dia. The constant current circuit 118 also flows a constant current Ic', which flows through diode Dib.

[0213] Note that constant current Ic and constant current Ic' are currents of the same magnitude. However, if, for example, the threshold voltages of diode Dsa and diode Dsb are different, or if the characteristics of diode Dsa and diode Dsb are different, it is preferable to make the magnitudes of constant current Ic and constant current Ic' different.

[0214] The operational amplifier circuit 116 acquires the terminal voltage Vi of diode Dia or Dib, and the temperature measurement circuit 115 converts the terminal voltage into temperature information Tj. The temperature information Tj is sent to the controller 111, which then performs or continues testing of transistor 117 based on the temperature information Tj.

[0215] The temperature information Tj obtained by applying a constant current Ic and the temperature information Tj obtained by applying a constant current Ic' are averaged or weighted to obtain a single temperature information Tj value. Using this temperature information Tj, the controller 111 performs, stops, or changes the control method of the transistor 117.

[0216] Figure 9 is an explanatory diagram of a semiconductor test apparatus in an embodiment of the present invention. The difference from Figure 1 is that the diode-connected transistor 117s is positioned in the path of the test current Id that flows through the transistor 117m being tested. Other parts are the same and will not be explained.

[0217] Transistor 117s is, for example, the same transistor as transistor 117 being tested. The gate and collector terminals of transistor 117s are connected, and transistor 117s can be considered equivalently as diode D.

[0218] When the switch circuit 124b is turned on, a current Im flows, discharging the charge from the current power supply 121a. Alternatively, the current Ia output by the current power supply 121a flows to ground via the switch circuit 124b.

[0219] When an inrush current Is flows through the transistor 117m being tested, the transistor 117m is destroyed by the generation of the inrush current Is or surge voltage Vs. To prevent the generation of inrush current Is or surge voltage Vs, the on / off control and on / off sequence of switch circuits 124a and 124b are controlled. In particular, by turning on 124b, the charge and voltage between the terminals of transistor 117 are discharged, suppressing the generation of surge voltage Vs and surge current Is.

[0220] When testing transistor 117m with a faster period tcycle, it is necessary to switch switch circuits 124a and 124b on and off at high speed. In this case, an inrush current Is or surge voltage Vs may occur depending on the on / off timing of switch circuit 124.

[0221] If the voltage Vm at the collector terminal of transistor 117 is higher than the voltage Vp at the output of the current power supply, the test current Id will flow towards ground as current Im, and either no current or only a small amount will flow through transistor 117m.

[0222] To establish the relationship Vm > Vp, in the embodiment shown in Figure 9, a diode-connected transistor 117s is placed in the path of the test current Id. When the test current Id flows through transistor 117s, the channel voltage of transistor 117s is added to the voltage Vm. Therefore, the voltage Vp becomes lower than the voltage Vm, and no inrush current Is is applied to transistor 117m. Transistor 117m will not be destroyed by the inrush current Is or surge voltage Vs.

[0223] Figure 10 is an explanatory diagram of a semiconductor test apparatus in an embodiment of the present invention. The difference from the embodiment in Figure 1 is that, while a diode Di is arranged around transistor 117 in Figure 1, in the embodiment in Figure 10, a diode-connected transistor 117d is formed or arranged. The gate terminal g and collector terminal c of transistor 117d are connected. Other matters are the same or similar as those in the embodiment in Figure 1, etc., so their explanation is omitted. The gate and emitter terminals of transistor 117d are connected, and transistor 117d can be considered equivalently as a diode.

[0224] During testing of transistor 117m, the constant current Ic is applied to transistor 117d when the channel current Id is not flowing. In other words, when transistor 117 is not turned on, the constant current Ic is applied and the terminal voltage of transistor 117d is measured. The operational amplifier circuit (buffer circuit) 116 outputs the terminal voltage Vi of transistor 117d.

[0225] The temperature measurement circuit 115 uses the stored temperature information Tj(A, B) and terminal voltage Vi to determine the temperature information Tj of the transistor 117 being tested. The obtained temperature information Tj is sent to the controller 111. If the temperature information Tj exceeds a predetermined set value, the controller 111 determines that the transistor 117 has entered a predetermined stress state and stops the test or changes the test control conditions.

[0226] Figure 11 is an explanatory diagram of a semiconductor test apparatus in an embodiment of the present invention. Current power supply 121a and current power supply 121b are power supply devices that generate an equivalent inrush current Is for testing the transistor 117.

[0227] The current power supply unit 121 supplies power (current, voltage) in synchronization with the control signal from the controller (personal computer, etc.) 111, and uses the supplied power to drive the load with a set constant current or constant voltage. The current power supply unit 121 can also set the maximum output voltage value.

[0228] The switch circuits 122 (SWa122a, SWb122b) turn the constant current supply output by the current power supply unit 121 on (supply) and off (cut off). Based on the signal from the current control circuit 114, the switch circuits 122 are set to either on (output constant current) or off (cut off constant current).

[0229] Switch circuit 122a (SWa) is located in the current path of the current power supply 121a. Switch circuit 122b (SWb) is located in the current path of the current power supply 121b. Switch circuit 122 is set to ON (outputs a constant current) or OFF (interrupts the constant current) based on a signal from the current control circuit 114.

[0230] Figure 11 illustrates two current power supply units 121. However, the number of current power supply units 121 is not limited to two. Three or more current power supply units 121 may be used. The more current power supply units 121 there are, the more diverse the current waveforms Id that can be generated.

[0231] In the embodiments of the present invention, the current power supply device 121 is described, but the current power supply device 121 is not limited to outputting a constant current. For example, the current power supply device 121 may be configured to set a maximum voltage and, under certain conditions, to output a predetermined constant current at the set maximum voltage. Therefore, the current power supply device 121 is not a device that outputs a constant current, but rather a power supply device that can output voltage and current.

[0232] One can simulate or investigate the actual usage conditions of transistor 117, configure the test equipment to generate an inrush voltage Is, and then control the current applied to transistor 117.

[0233] Figure 12 is an explanatory diagram of the method for generating the inrush current Is according to the present invention. The test current Id that flows through the channel of transistor 117 is shown in Figure 12(b). The base current I1 is supplied to transistor 117 as a constant current Ia by the current power supply (Pa) 121a.

[0234] The constant current Ia supplied to transistor 117 is controlled on / off by the switch circuit 122a (SWa). The on time ton is defined by the gate signal Vgs applied to the gate terminal g of transistor 117. During the period tc, a constant current Ib is output from the current power supply 121b. The application time of the constant current Ib is controlled by the switch circuit 122b (SWb). The constant currents (Ia, Ib) output by the current power supply 121a and current power supply 121b are added together and applied to the transistor 117. As shown in Figure 11, the semiconductor testing apparatus of the present invention comprises a first current power supply (Pa) 121a and a second current power supply (Pb) 121b.

[0235] While a current power supply is described as a device that supplies a test current Id to a semiconductor device for testing purposes, the power supplied to or applied to the semiconductor device is not limited to current. It can also be voltage. Therefore, a current power supply is a power supply device that applies or supplies either voltage or current.

[0236] Switch circuits 122 and 124 are controlled on (closed) and off (open) by the current control circuit 114. The current control circuit 114 is controlled by the controller 111. For example, the current control circuit 114 implements timing control as explained in Figure 20, etc.

[0237] The switch circuit 122a (SWa) 122a applies a constant current Ia to the transistor 117 at a time of ton during the period tcycle. The timing of ton and other values, as well as the voltage or current waveform, can be applied to the embodiments shown in Figures 4, 5, 6, 12, 18, 20, 21, 34, 35, 40, 41, 42, 43, etc. It goes without saying that these embodiments can also be combined with other embodiments. Furthermore, it goes without saying that this invention can be applied to other embodiments of the present invention. Furthermore, it goes without saying that this invention can also be combined with other embodiments of the present invention.

[0238] The constant current Ib output by the second current power supply 121b is applied to the transistor 117 in synchronization with the constant current Ia output by the first current power supply 121a. Initially, the constant currents Ia and Ib are added together (superimposed) and flow through the transistor 117, with the constant current Ib flowing for tc time.

[0239] Although the actual current flowing through transistor 117 is controlled by other switches as illustrated and explained in Figure 4, it is described as above for the sake of simplicity.

[0240] The transistor 117 is tested with an inrush current of Is = Ia + Ib. In Figure 12, I1 = Ia and I2 = Is = Ia + Ib. The rise times of current Ia and current Ib are to be simultaneous or nearly coincide. In reality, due to the capacitance component of the circuit, the current waveform will look like the dotted line. The same applies to the on-voltage signal applied to the gate terminal.

[0241] In the above embodiment, the first current power supply (Pa) 121a outputs a constant current Ia and the second current power supply 121b outputs a constant current Ib, but the embodiment is not limited to this.

[0242] Any current power supply device may be used as long as it can generate the current Id illustrated in FIG. 6(b). For example, a single current power supply device 121 may output a constant current I2, output a constant current I1 (A) after the elapse of time tc, and be able to set the current output to 0 (A) after the time ton.

[0243] The current Id waveform illustrated by the solid line in FIG. 12(b) is distorted due to the capacitance existing in the circuit or the change in the on-resistance of the transistor 117, resulting in a signal waveform like the dotted line.

[0244] The inrush current Is applies current stress to the transistor 117. By making the inrush current Is equivalent to or similar to the actual circuit in which the transistor 117 is used, an appropriate test can be conducted.

[0245] In the embodiment of FIG. 11, it has been described that the inrush current Is is generated mainly by superimposing the current generated by the current power supply device 121, but the present invention is not limited to this.

[0246] For example, a first current power supply device (Pa) 121a generates a constant voltage V1 as a voltage power supply device 1, and a second current power supply device (Pb) generates a constant voltage V2 as a voltage power supply device 2. By applying the constant voltage V1 or the constant voltage V2 to the terminal c of the transistor 117, the inrush current Is may be configured to flow through the transistor 117. The relationship is such that the constant voltage V1 is greater than the constant voltage V2. The generation state, generation time, and generation waveform of the inrush current Is and the surge voltage Vs can be adjusted or set by controlling the switch circuit 124b.

[0247] Due to the constant voltage V1, a current Ia flows through the transistor 117, and due to the application of the constant voltage V2, a current Ib flows through the transistor 117. Therefore, by applying the constant voltage V1 or the constant voltage V2, the inrush current Is can be made to flow through the transistor 117.

[0248] As described above, the present invention allows for easy setting of the inrush current Is for the semiconductor element under test and enables testing. Therefore, the reliability of the transistor 117 can be evaluated in a manner that simulates the actual operating environment and actual operating circuit for the semiconductor element.

[0249] Figure 1 and other diagrams illustrate two current power supply units 121. However, the number of current power supply units 121 is not limited to two. Three or more current power supply units 121 may be used. The more current power supply units 121 there are, the more diverse the current waveforms Id that can be generated.

[0250] It goes without saying that if one current power supply 121 can generate the current Id signal shown in Figure 6, then one current power supply 121 is sufficient. It also goes without saying that if one current power supply 121 can output a constant current I2, output a constant current I1 after time tc has elapsed, and reduce the current output to 0 after time ton, then one current power supply 121 is sufficient.

[0251] In the embodiments of the present invention, the current power supply device 121 is described, but the current power supply device 121 is not limited to outputting a constant current. For example, the current power supply device 121 may be configured to set a maximum voltage and, under certain conditions, to output a predetermined constant current at the set maximum voltage. Therefore, the current power supply device 121 is not a device that outputs a constant current, but rather a power supply device that can output voltage and current.

[0252] Figure 13 is a diagram illustrating the configuration of a semiconductor test apparatus and an explanatory diagram of the test method in an embodiment of the present invention. In Figure 13, multiple transistors 117 (transistors 117Q1 to 117Qn) to be tested are connected in parallel to the current power supply 121. Figure 14 is an explanatory diagram of a semiconductor device testing method in an embodiment of the present invention that illustrates the operation shown in Figure 13.

[0253] As shown in Figure 14(a), when switch circuits St1 (124s1) and Stn (124sn) are turned on, test currents Id1 and Idn flow through transistor 117. For example, the application time of test current Id is ton, and test currents Id1 and Id2 are applied to transistor 117 sequentially at intervals of time tcycle. When transistor 117 is turned on, the channel voltage of transistor 117 changes sequentially (Figure 14(c)).

[0254] Therefore, for example, test currents Id1 and Id2 do not overlap in time. As a result, the output capacity of the current power supply 121 only needs to be the output capacity required to test one transistor 117.

[0255] The test currents Id(Id1~Idn) are controlled so that they do not overlap. Preferably, there should be an interval of 1 microsecond or more between each test current Id(Id1~Idn). The driving method and control method described in Figure 4 are implemented for each transistor 117.

[0256] The constant current Ic supplied to each transistor 117Q is supplied to the diode Ds of each transistor 117Q by sequentially turning on the switch circuit Ssa (Ssa1 to Ssan).

[0257] The voltage Vi (Vi1~Vin) corresponding to the terminal voltage of diode Ds is selected by selector 127 in synchronization with the switch circuit Ssa (Ssa1~Ssan). For example, when current Ic is supplied to transistor 117Q1, selector 127 selects the terminal voltage of diode Ds of transistor 117Q1. When current Ic is supplied to transistor 117Q3, selector 127 selects the terminal voltage of diode Ds of transistor 117Q3. The selected voltage Vi is supplied to the temperature measurement circuit 115. Other configurations and operations are the same as those described in other embodiments, so their explanation will be omitted. It goes without saying that the driving method or testing method for applying on-voltages V1 and V2, as described in Figure 18, can also be applied to the embodiments shown in Figures 13 and 14.

[0258] Figures 15 and 17 are explanatory diagrams of the test method in an embodiment of the present invention. In Figures 15 and 17, the horizontal axis represents the square root of time (√t), and the vertical axis represents the determined junction temperature Tj. Figure 16 is an explanatory diagram of the calculation formula for determining the Tj value.

[0259] In power cycle testing, when measuring junction temperature Tj using the voltage after turn-off, such as with parasitic diodes or voltage Vce, ringing and surges occur immediately after transistor 117 is turned off. Since temperature information Tj is obtained from the terminal voltage Vi of transistor 117, the terminal voltage Vi fluctuates when a surge voltage occurs. For example, as shown in Figure 15, the terminal voltage Vi links, and a linking Tjs occurs in the temperature information Tj that is to be obtained. Tjs is determined from the Vce voltage of transistor 117. Therefore, if a surge occurs in the Vce voltage, linking will occur as shown in Tjs.

[0260] When Tj is linking, it means that accurate measurement is not possible. Therefore, the temperature measurement timing by the temperature measurement circuit 115 needs to be slightly delayed. In other words, it is necessary to avoid the period during which Tj linking occurs.

[0261] Tj linking occurs immediately after transistor 117 is turned off. To avoid linking, the present invention closes (turns on) the switch circuit 124b to discharge the charge. Alternatively, the current Id output by the current power supply 121a is set to Im and not applied to transistor 117. Then, or simultaneously, the switch circuit 124a is turned off (open).

[0262] Immediately after the opening of the switch circuit 124a or the like, ringing such as Tjs occurs. Therefore, temperature measurement (Vce voltage) is performed at a time delayed by a predetermined time from the off-time of the test current Id.

[0263] When the test current Id to the transistor 117 is stopped, heat escapes to the heating / cooling plate 134 in FIG. 2, and the transistor 117 dissipates heat. At a delayed time after the test current Id to the transistor 117 is stopped, the transistor 117 dissipates heat and drops below the temperature (Tjmax) during the operation of the transistor 117.

[0264] The embodiment in FIG. 15 is a method for estimating (obtaining) the temperature (actual temperature) of the transistor 117 immediately after the test current Id to the transistor 117 is stopped, or for inferring (obtaining) the actual temperature (Tjmax) value. The horizontal axis in FIG. 15 is the square root of time (√t).

[0265] As shown in FIG. 15, in at least one of the switch circuits 124a or 124b, the temperature transition immediately after turn-off is linear with respect to the square root of time (√t). Utilizing this linearity, an estimated value v0 is obtained by extending to the turn-off point (0) which is point A in FIG. 17. As shown in FIG. 17, two measurement points (t1, t2) after turn-off are set. The times of t1 and t2 are set such that t2 = 2 × t1. As explained in FIG. 16, t2 = 2 × t1 By doing so, and by setting the voltage value (estimated value) of t0 as v0 and the voltage values (measured values) of t1 and t2 as v1 and v2 respectively, v0 = (2 + √2)·v1 - (1 + √2)·v2 With a simple calculation, the estimated value v0 of the Vce voltage can be obtained. Since v0 needs to be obtained quickly by always performing operations etc. during the test, the fact that v0 can be obtained quickly and easily is highly effective. From the voltages at t1 and t2, the corresponding Vce voltages (v1, v2) are measured. From the measured v1 and v2 data, the estimated voltage Vce (v0) at Tjmax is calculated using the following formula. v0= (2 + √2)·v1 - (1 + √2)·v2 From the v0 and K-Factor calculated above, we will calculate the estimated Tjmax value. In the above examples, the times t1 and t2 are assumed to be t2 = 2 × t1.

[0266] If we let the 2 in t2 = 2 × t1 be the variable s, then t2 = s × t1. Therefore, v0 = v1 - (v2 - v1)(√s - 1) / (s - 1). The value of s can be set to any value. The value of s is the set value, and v0 can be determined by measuring v2 and v1.

[0267] The embodiments shown in Figures 15 to 17, when combined with the embodiment in Figure 18, further improve the measurement accuracy of Tjmax. In particular, it is suggested that the embodiment in Figure 15 be selected immediately after stopping the test current Id, and thereafter the embodiment described in Figure 21 be implemented. It goes without saying that the matters described in Figures 15 and 18 can be combined with other embodiments.

[0268] The above examples were measured using v1 、 The test was conducted using v2 to determine the terminal voltage Vi=v0 immediately after stopping the test current Id. Temperature information Tj can be obtained from v0. The present invention is not limited to this.

[0269] While the test current Id is flowing through transistor 117, transistor 117 generates heat. When the test current Id to transistor 117 is stopped, transistor 117 dissipates heat and its temperature decreases.

[0270] In testing transistor 117, it is preferable to obtain the temperature of transistor 117 immediately after stopping the test current Id supplied to transistor 117. In other words, it is preferable to be able to measure the terminal voltage Vi by supplying a constant current Ic to transistor 117 or diode D immediately after stopping the test current Id supplied to transistor 117.

[0271] However, as explained in Figure 15, immediately after stopping the test current Id, surge voltages and surge currents occur, causing ringing in the measured terminal voltage Vi. Therefore, the temperature information Tj also becomes temperature information Tjs affected by ringing, making it impossible to obtain the true temperature information Tj. In other words, it is difficult to obtain v0 immediately after stopping the test current Id. Figure 21 is an explanatory diagram of the method for acquiring temperature information Tj in an embodiment of the present invention. It is also an explanatory diagram of the method for determining the terminal voltage Vi after the test current Id is stopped.

[0272] In Figure 21, the vertical axis represents the terminal voltage V, with the estimated terminal voltage immediately after stopping the test current Id set to 1.0 and plotted as the standard value. The horizontal axis represents time, and for ease of understanding, time is shown as unitless. The period over which the terminal voltage is measured relative to time t for determining the characteristic curve (characteristic equation) is 1000 msec or less.

[0273] As shown in Figure 21, after the test current Id is stopped, and before supplying a constant current Ic to the diode D or transistor 117, the switch circuit Ssb124b is turned on to discharge the charge between the terminals of the power supply 121 or between the channels of the transistor 117 (emitter e-collector c). The test current Id is stopped by turning off the switch circuit Ssb124a or by applying an off voltage to the gate terminal of transistor 117.

[0274] A surge occurs when the test current Id is stopped. Immediately after or for a short time after the test current Id is stopped, the measured terminal voltage Vi becomes linked. As shown in Figure 15, the temperature information Tj obtained is also a linked value, and the terminal voltage V0 immediately after the test current Id is stopped is unstable, and the temperature information Tj0 obtained from the terminal voltage V0 is also unstable. Therefore, the temperature information Tj0 immediately after the test current Id is stopped cannot be obtained by actual measurement.

[0275] To suppress the inrush current and surge voltage that cause ringing, switch circuit 124b is turned on to discharge the charge in the current path; however, the terminal voltage Vi remains unstable immediately after the test current Id stops.

[0276] As shown in Figure 21, the time it takes to change the gate voltage applied to the gate terminal of transistor 117 from on to off, or to change the switch circuit 124b from on to off, is defined as 0.0 (the time when the test current Id of transistor 117 is stopped, or the time when the switch circuit 124b is turned off). The circles indicate the results of measuring the voltage V (shown as the standard value) at 0.2-hour intervals. The triangles indicate the results of measuring the voltage V (shown as the standard value) at 0.2-hour intervals, with 0.1 as the initial value (initial start time t).

[0277] The period during which the switch circuit 124b is turned on is short, and there is almost no difference between the terminal voltage of transistor 117 immediately after the test current Id of transistor 117 is stopped and the terminal voltage of transistor 117 immediately after the switch circuit 124b is turned off.

[0278] The dotted line schematically illustrates, for explanatory purposes, the change in terminal voltage Ji as transistor 117 dissipates heat over time, with the terminal voltage Vi immediately after the test current Id stops being set to 1.0.

[0279] Note that while Vi is described as the terminal voltage of transistor 117, it is not limited to this. For example, it could be the terminal voltage of diode D (diode Ds, diode Di). Furthermore, the terminal voltage Vi can be any voltage corresponding to the temperature information Tj of the semiconductor device being tested.

[0280] Up to time 0.4, the measured terminal voltage Vi fluctuates due to the effects of surge voltages and other factors, but after time 0.4, the data is measured along the dotted line, indicated by circles and triangles. The reason why the terminal voltage Vi of transistor 117 decreases as time progresses is that transistor 117 dissipates heat, causing the terminal voltage Vi to decrease.

[0281] The dotted line (characteristic equation) shows the voltage V (standard value) as a function of time t. For the sake of simplicity, A is set to A=1 in Figure 21, but in reality, A is the value of the terminal voltage Vi at time t=0.0, which is the terminal voltage immediately after the test current Id to transistor 117 is stopped. When t=0.0, Y=A=Vi. n is an exponent; that is, t to the power of n. The equation for Y is: Y = A·exp(-1·t^n) (1) Y = A·10^(-1·t^n) (2) Choose one of the following. More generally, let C be any integer or real number. Y = A·C^(-1·t^n) (3) Select this option.

[0282] In this embodiment, for the sake of ease of understanding, we will primarily explain by selecting either Y = A·exp(-1·t^n) or Y = A·10^(-1·t^n) as the characteristic equation. The choice between equation (1) and equation (2) can be determined by fitting the dotted line to the circles and triangles shown in Figure 21, for example, by varying n using the least squares method to minimize the residuals.

[0283] The circles and triangles indicate the terminal voltage Vi measured at each time t, with the time it takes for the switch circuit Ssb124a to change from ON to OFF being used as the reference point. Alternatively, the time when the test current Id to transistor 117 stops can be considered as the reference point. The test current Id can be stopped by opening the switch circuit 124a or by applying an off voltage to the gate terminal of transistor 117.

[0284] For ease of understanding, the circles represent the results of measuring the voltage V (shown as the standard value) at 0.2-hour intervals, and the triangles represent the results of measuring the voltage V (shown as the standard value) at 0.2-hour intervals with an initial value of 0.1, but this is not the only option. Other time intervals may also be used. Multiple Vi measurements improve the selectivity of the value of n, Y=A·exp, and Y=A·10^ for fitting the dotted line (characteristic equation or characteristic curve).

[0285] As shown in Figure 21, the measured terminal voltage Vi tends to vary during the 0.0 to 0.4 hour period. This variation is influenced by surge voltage and inrush current. A weighting coefficient is used to determine the dotted curve for the terminal voltage Vi values ​​within the specified time range of 0.0 to 0.4 hours. As an example, the weighting coefficient for the terminal voltage Vi values ​​during the 0.0 to 0.4 hour period is set smaller than that for other time periods. By reducing the weighting coefficient, the influence of voltage data affected by surge voltage, etc., on the dotted curve can be reduced.

[0286] The present invention is configured so that the weighting coefficient can be changed. The setting and changing of the weighting coefficient is performed by the calculation processing circuit 303. By changing the weighting coefficient, the dotted line curve can be optimally fitted according to the measured voltage data.

[0287] As shown in Figure 21, the dotted curve is determined by measuring the terminal voltage while varying the time t and measuring the terminal voltage at each time point. Depending on the measured voltage Vi, either Y=A·exp(-1·t^n) or Y=A·10^(-1·t^n) is selected, and the value of n is determined at the same time. From the dotted curve, the terminal voltage Vi at t=0.0 can be determined, and from Vi, temperature information Tj can be obtained or determined.

[0288] In Figure 21, for the sake of simplicity, the voltage V at t=0.0 is assumed to be 1.0 as a standard value. When measuring the data marked with circles and triangles in actual measurements, the voltage value V at t=0.0 indicates the value of the inter-channel voltage of diode D or transistor immediately after the test current Id is cut off, or an approximate voltage value. Alternatively, it indicates the value of the inter-channel voltage of diode D or transistor immediately after the switch circuit 124a is switched from on to off, or a similar voltage value. Over time, the channel-to-channel voltage Vi of diode D or transistor is measured, and the measured voltage data is stored in data memory 302.

[0289] Figure 22 shows graphs for Y=A·10^(-1·t^n) with A=1, specifically for n=3, n=4, and n=6. The value of n is determined by the measurement time t and the measured voltage data. As the value of n increases, the slope angle of the curve with respect to time t increases. Note that A=1 is used for the purpose of explaining the example, and A is a value determined by the measurement time t and the measured voltage data.

[0290] Figure 23 shows the graphs for Y=A·exp(-1·t^n) with A=1, n=3, n=4, and n=6. As the value of n increases, the slope angle of the curve with respect to time t increases. For Y=A·10^(-1·t^n), the slope angle of the curve decreases for the same value of n.

[0291] Therefore, by choosing either Y=A·exp(-1·t^n) or Y=A·10^(-1·t^n), the measured voltage Vi data (terminal voltage Vi) can be appropriately matched to the time-voltage curve to be fitted.

[0292] Before or prior to starting the test of semiconductor device 117, the terminal voltages (transistor channel voltage Vce, diode terminal D voltage, etc.) are measured over varying time intervals, as described in Figure 21.

[0293] From the measured terminal voltage, either Y=A·exp(-1·t^n) or Y=A·10^(-1·t^n) is selected, and the dotted curve is determined to fit the selected Y equation. The n value and A value are calculated or obtained from the dotted curve. The n value is a fixed value during the test. The A value is the terminal voltage Vi at time t=0.0 (the terminal voltage of semiconductor element 117 before the test (before characteristic change) (initial value)).

[0294] During testing of semiconductor device 117, if the terminal voltage V measured at a predetermined time t is used, the value of A can be calculated from A = V / (10^(-1·t^n)) or A = V / (exp(-1·t^n)). The value of A is the terminal voltage Vi (initial terminal voltage Vi0) at time 0.0. Temperature information Tj (initial temperature information Tj0) can be obtained from the terminal voltage Vi.

[0295] Normally, as semiconductor testing is performed, semiconductor elements degrade (change), generating heat and increasing the terminal voltage Vce of transistors such as transistor 117. By measuring the terminal voltage Vi and determining the A value of the characteristic curve (characteristic equation) from the measured data, the degradation of transistors such as transistor 117 can be accurately grasped. The A value indicates the amount of voltage change or the voltage change rate from the initial terminal voltage Vi0.

[0296] The A value can be calculated or obtained by measuring the terminal voltage Vi at multiple time points t during semiconductor device testing, allowing for a more accurate understanding of the characteristic changes of the semiconductor device being tested. The minimum time t for data acquisition should preferably be close to t=0.0. As explained in Figure 21, the measured voltage Vi varies due to the influence of surge voltages, etc. It goes without saying that for points close to t=0.0, the embodiments described in Figures 15, 16, 17, and 18 may be implemented. In other words, a combination with the embodiment in Figure 21 is possible.

[0297] In this invention, we select either Y=A·exp(-1·t^n) or Y=A·10^(-1·t^n) to determine the value of n, and also determine the value of A, which is the initial voltage and initial temperature information Tj. Therefore, even if time t is far from 0.0 hours, the terminal voltage at t=0.0 can be estimated or obtained with high accuracy.

[0298] By measuring multiple terminal voltages Vi at multiple measurement times t other than time t=0.0, and then obtaining, correcting, or averaging the A value and temperature information Tj value from the multiple measured terminal voltages Vi, it is possible to quantitatively obtain the temperature information Tj value or the amount of change from the initial temperature information Tj0.

[0299] Although it was explained that the terminal voltage is measured at numerous time points t other than t=0.0 and the terminal voltage at t=0.0 is calculated, the present invention is not limited to this. It goes without saying that, for example, the voltage value at t=0.1 may be used as the reference voltage, the terminal voltage may be measured at time points t=0.1 or longer, the voltage value relative to the reference voltage at t=0.1 or the change in voltage may be determined, and temperature information Tj may be obtained.

[0300] In this invention, using the formula Y = A·10^(-1·t^n), the value of n etc. is determined in advance, the terminal voltage is determined over a predetermined time t, and the voltage difference from the initial terminal voltage is obtained from the change or amount of change from the initial A value (Y value), and temperature information Tj is obtained from the amount of voltage change.

[0301] In this invention, we have used the formula Y = A·10^(-1·t^n), but the 10 in Y = A·10^(-1·t^n) is not limited to 10. For example, it may be any other integer value such as 12 or 16. Furthermore, it is not limited to an integer and may be a real number.

[0302] In other words, we can set the 10 points to an arbitrary value C and write Y = A·C^(-1·t^n). From the measured data, we can draw a characteristic curve, determine the values ​​of C, n, and A, and fit it to the dotted line curve. By using the general formula Y = A·C^(-1·t^n), Y = A·exp(-1·t^n) is also included in Y = A·C^(-1·t^n).

[0303] This invention involves fitting a voltage value measured at a predetermined time t to a mathematical formula such as Y = A·10^(-1·t^n), but is not limited to mathematical formulas. A Maclaurin series expansion of the formula may also be used. Alternatively, a matrix-like data file may be created for each time t, corresponding to n and A, and n and A for each time t may be determined. It goes without saying that the value of n can be calculated and fixed equivalently without using a mathematical formula, and the value of A can be determined from the voltage value measured at a predetermined time t.

[0304] Furthermore, the present invention is not limited to the characteristic formula Y = A·C^(-1·t^n). The terminal voltage Vi of the element under test is measured by varying the time t from the time when the test current Id of transistor 117 is stopped and the time when the charge is discharged in switch circuit 124b and switch circuit 124b is turned off. The initial terminal voltage Vi is obtained as a fixed value in the characteristic formula. After the start of the test, the terminal voltage Vi measured at a predetermined time t is substituted into the characteristic formula, and the A value (initial terminal voltage Vi) of the characteristic formula is used to evaluate the degradation state of the semiconductor element.

[0305] Figure 24 shows an example where the time axis t is set to √t in the case of Y = A·10^(-1·t^n). Comparing Figure 22 and Figure 24, setting the time axis t to √t in Figure 24 makes the fitted characteristic curve gentler. Because the characteristic curve is gentler, compared to Figure 22, n and A in Y = A·10^(-1·t^n) can be determined with greater accuracy from the time axis √t and the voltage Vi on the characteristic curve.

[0306] Figure 25 shows an example where the time axis t is set to √t in the case of Y = A·exp(-1·t^n). Comparing Figure 23 and Figure 25, setting the time axis t to √t in Figure 25 makes the fitted characteristic curve gentler. Because the characteristic curve is gentler, compared to Figure 23, n and A in Y = A·exp(-1·t^n) can be determined with greater accuracy from the time axis √t and the voltage Vi on the characteristic curve.

[0307] The embodiments described in Figures 15, 16, 17, and 18 use √t as the time axis. As shown in Figures 24 and 25, by setting the time axis to √t, it is possible to combine it with the embodiments described in Figures 15, 16, 17, and 18.

[0308] It goes without saying that the embodiments shown in Figures 21, 22, 23, 24, and 25 may be combined with the embodiments described in Figures 4, 6, 15, 16, 17, 18, etc. For example, in Figure 21, the embodiments described in Figures 4, 6, 15, 16, 17, and 18 may be applied in the range of 0.0 to 0.4 hours, and the embodiments described in Figure 21 may be applied and combined in the range of 0.4 hours or more.

[0309] An example is provided in which both the embodiments described in Figures 15, 16, 17, and 18, and the embodiment described in Figure 21, are performed or calculated to obtain Vi or Tj, and then the average is taken. Furthermore, an example is provided in which the embodiments described in Figures 15, 16, 17, and 18, and the embodiment described in Figure 21, are each weighted.

[0310] As shown in Figure 19, the temperature measurement circuit 115 stores terminal voltage Vi (transistor channel voltage Vce, diode (Ds, Di) terminal voltage) data (Tdata) measured at time t or time √t. Basically, the voltage data (Tdata) corresponds to the digitized terminal voltage Vi.

[0311] Note that voltage data (Tdata) is not limited to the terminal voltage of a semiconductor device. Any voltage value is acceptable. Also, if the measurement target is current, the current can be passed through a resistive element, etc., and the voltage can be measured as the terminal voltage of the resistive element.

[0312] This invention is characterized by determining a characteristic equation that shows the relationship between time t and terminal voltage Vi. While t and √t are given as examples for time t, it is not limited to these. It goes without saying that other time axes such as t squared and 1 / t may also be used.

[0313] Furthermore, it is often unnecessary to determine the characteristic formula for each semiconductor device being tested. Since semiconductor devices have consistent characteristics for each lot, once the characteristic formula (characteristic curve) is determined for each lot, this formula can be reused.

[0314] Voltage data (Tdata) is accumulated over multiple cycles before the start of the test or during the initial period of the test. Preferably, voltage data (Tdata) is accumulated over several tens of cycles.

[0315] Furthermore, it goes without saying that accumulating voltage data (Tdata), determining the characteristic equation, and sequentially correcting the characteristic equation can be done even during testing of the semiconductor device 117. Performing these steps during testing will result in a more optimal characteristic equation.

[0316] The terminal voltage Vi(Tdata) is measured at a predetermined time t (or time √t). The measured terminal voltage Vi(Tdata) and the predetermined time t (or time √t) at the time of measurement are stored in the data memory 302. Alternatively, the terminal voltage Vi(Tdata) is measured in advance at a predetermined time t (or time √t).

[0317] The arithmetic processing circuit 303 performs calculations using the terminal voltage Vi(Tdata) stored in the data memory 302, obtains the characteristic curve explained in Figure 21, etc., and calculates or obtains the n value, A value, and C value.

[0318] If necessary, the accumulated voltage data (Tdata) is averaged for each time t, or for each time √t. The averaged voltage data (Tdata) is fitted to one of the curves shown in Figures 22 to 25, and n and the initial value or A data at the start of measurement are calculated or obtained.

[0319] In the test mode of the semiconductor device 117, the terminal voltage Vi is measured as the Y value at a predetermined time t, and the change or difference from the initial value A is obtained or calculated. Figure 20 shows a timing chart and explanatory diagram for determining the initial values ​​of n, A, and C. Figures 20(a1), 20(b1), and 20(c1) are timing charts for acquiring voltage data to determine the characteristic curve using the first method. Figures 20(a2), 20(b2), and 20(c2) are timing charts for acquiring voltage data to determine the characteristic curve using the second method. Figures 20(a3), 20(b3), and 20(c3) are timing charts for acquiring voltage data to determine the characteristic curve using the third method.

[0320] As shown in Figure 20(a1), when the test current Id flows through the semiconductor element (transistor) 117 being tested, the transistor 117 generates heat. As the thermal resistance of the transistor 117 increases due to degradation, the amount of heat generated increases. By measuring the temperature change of the transistor 117 due to this heat generation, the characteristic changes and lifespan of the transistor 117 can be tested or evaluated.

[0321] As shown in Figure 20(b1), the switch circuit 124b is turned on for a time t1 at the timing when the test current Id is interrupted or immediately before it is interrupted. The test current Id is controlled by controlling the on-voltage applied to the transistor 117 and by the switch circuit 124a.

[0322] By turning on the switch circuit 124b, the charge between the terminals of the power supply unit 121 and between the terminals of the transistor 117 is discharged. Alternatively, the voltage between the terminals becomes 0 or small.

[0323] The switch circuit 124b is turned on for time t1, and at the moment it is turned off, the terminal voltage Vi of the transistor 117 or diode (Di, Ds) is measured as shown in Figure 20(c1). The terminal voltage Vi is measured in time m1 and stored as digital data Tdata in the data memory 302 of the temperature measurement circuit 115.

[0324] The measured digital data Tdata is measured once or multiple times during the m1 period. If Tdata is measured multiple times, the measurements are taken at equal time intervals during the m1 period. The measurements are taken as shown by circles or triangles, as explained in Figure 21, and the measured voltage data is recorded in the data memory 302.

[0325] The circular or triangular marks indicate different measurement timings, but are not limited to these. The circular or triangular marks may be measured simultaneously, sequentially, or continuously. The measurements of the circular and triangular marks interpolate the voltage data between measurements.

[0326] As shown in Figure 20(a1), Tdata is measured again after the ts period. Tdata is measured for multiple periods during the m1 period. It is preferable to have different timings for the measurement of the t-time interval in any m1 period and the measurement of the t-time interval in the next m1 period. For example, the terminal voltage measurement is performed at the timing indicated by the circle in Figure 21 for the t-time interval in any m1 period, and the terminal voltage measurement is performed at the timing indicated by the triangle for the measurement of the t-time interval in the next m1 period. It is preferable to match the ts period to the tcycle explained in Figure 12, etc., in order to obtain the characteristic curve (characteristic equation).

[0327] As explained in the implementation shown in Figure 4, it is preferable to turn on the switch circuit 124b before the test current Id stops. Ssb is the on / off signal for the switch circuit 124b.

[0328] As shown in relation to the switch circuit Ssa124a, it is preferable to turn on the switch circuit (Ssb) 124b before the switch circuit 124a turns off (open).

[0329] Switch circuit 124b is turned on (closed) before the test current Id is interrupted by switch circuit 124a. By turning on switch circuit 124b before switch circuit 124a opens, surge voltage Vs and inrush current Is can be suppressed.

[0330] Switch circuit 124b remains on (closed) for a period of t1 or t2 even after switch circuit 124a is turned off. By maintaining the on state of switch circuit 124b for a predetermined period after switch circuit 124a is opened, surge voltage Vs and inrush current Is can be suppressed.

[0331] The test current Id can also be interrupted by changing the on-voltage applied to the gate terminal g of transistor 117 to an off-voltage. By changing the on-voltage to an off-voltage (0V voltage or Vt voltage) relative to the gate voltage Vgs, transistor 117 is turned off, and the test current Id is interrupted.

[0332] By turning on the switch circuit 124b before applying an off voltage to the gate terminal g of transistor 117, surge voltage Vs and inrush current Is can be suppressed. Furthermore, by maintaining the on state of the switch circuit 124b for a predetermined period after applying an off voltage to the gate terminal g of transistor 117, surge voltage Vs and inrush current Is can also be suppressed. The above points also apply during the period before the test current Id is supplied by the switch circuit 124a.

[0333] As explained in Figure 4, the switch circuit (Ssb) 124b is turned on before the switch circuit 124a is turned on (closed), as shown in relation to the switch circuit Ssa 124a. The switch circuit 124b is turned on (closed) before the test current Id is supplied by the switch circuit 124a. By turning on the switch circuit 124b before the switch circuit 124a closes, the surge voltage Vs and inrush current Is can be suppressed.

[0334] Switch circuit 124b maintains the ON (closed) state for a predetermined period even after switch circuit 124a is turned ON. By maintaining the ON state of switch circuit 124b for a predetermined period after switch circuit 124a is closed, surge voltage Vs and inrush current Is can be suppressed. The predetermined period is a period of 0 to 10 milliseconds or less. Preferably, it is a period of 0 to 5 milliseconds or less.

[0335] In the above embodiment, the test current Id was supplied by the switch circuit 124a, but the test current Id can also be supplied by changing the off voltage applied to the gate terminal g of the transistor 117 to an on voltage.

[0336] By setting the gate voltage Vgs to an off voltage (0V voltage or Vt voltage) as the on voltage (Vg voltage), transistor 117 is turned on and a test current Id is supplied. By maintaining the ON state of the switch circuit 124b before applying the ON voltage to the gate terminal g of transistor 117, surge voltage Vs and inrush current Is can be suppressed. Furthermore, by maintaining the ON state of the switch circuit 124b for a predetermined period after applying the ON voltage to the gate terminal g of transistor 117, surge voltage Vs and inrush current Is can also be suppressed.

[0337] The predetermined period is a period of 0 to 10 milliseconds or less. Preferably, it is a period of 0 to 5 milliseconds or less. The tb1 period is a period of 0 to 10 milliseconds or less. Preferably, it is a period of 0 to 5 milliseconds or less. It goes without saying that the above points can also be applied to the embodiments shown in Figures 4, 6, 12, 14, 18, 20, 21, 34, 35, 42, and 43. Furthermore, it goes without saying that these points can be applied to other embodiments of the present invention. And it goes without saying that these points can be combined with other embodiments of the present invention.

[0338] The arithmetic processing circuit 303 reads Tdata from the data memory 302, and the Tdata measured multiple times are averaged at equal time intervals. Averaging reduces the variability of Tdata. The arithmetic processing may be performed in real time.

[0339] The arithmetic processing circuit 303 obtains a dotted characteristic curve (characteristic equation) from the averaged Tdata, as shown in Figure 21, and determines the n, A, and C values ​​of the characteristic curve. As an example, the characteristic curve (characteristic equation) is obtained from the measured data using the minimum approximation method. Alternatively, it can be obtained using the least squares method.

[0340] The characteristic curve formula Y = A·C^(-1·t^n), for which n, A, and C values ​​have been determined, represents the initial temperature information Tj of transistor 117. If C and n are constant values ​​as the initial characteristic curve (characteristic formula), then A represents the terminal voltage Vi at t=0.

[0341] After a lifetime test of transistor 117 has been conducted and the test time has elapsed, the terminal voltage V measured at time t represents the value that has changed during the lifetime test. The initial terminal voltage Vi0-V shows the voltage change. Temperature information Tj can be determined from the terminal voltage V.

[0342] The measurement (acquisition) of Tdata in Figure 20(c1) is performed immediately after the switch circuit 124b is turned off. This acquires temperature information immediately after the transistor 117 being tested is switched from an energized state to an interrupted state. However, as explained in Figure 21, the vicinity of t=0.0 is susceptible to surge voltage, resulting in variations in Tdata. In the vicinity of t=0.0, it is effective to combine this with the embodiments of the present invention described in Figures 15, 16, 17, and 18. Figures 20(a2), 20(b2), and 20(c2) are timing charts based on the method of the embodiment. The timing chart shown in Figure 20(c2) indicates that the measurement (acquisition) of Tdata is performed after time W1 has elapsed following t1 of the switch circuit 124b.

[0343] As shown in Figure 20(b2), the switch circuit 124b is turned on for t1 time at the timing when the test current Id is interrupted or immediately before it is interrupted. Turning on the switch circuit 124b discharges the charge between the terminals of the power supply unit 121 and between the terminals of the transistor 117. Alternatively, the channels of the transistor 117 are short-circuited, and the potential difference becomes 0.

[0344] Subsequently, as shown in Figures 20(b2) and 20(c2), the measurement of Tdata is started after a period of w1. During the w1 period, the surge voltage or surge current is reduced, allowing for stable measurement of Tdata.

[0345] The switch circuit 124b is turned on for time t1, and after the period w1 has elapsed, it is turned off. At this point, the terminal voltage Vi of the transistor 117 or diode (Di, Ds) is measured as shown in Figure 20(c2). The terminal voltage Vi is measured during period m1 and stored as digital data Tdata in the data memory 302 of the temperature measurement circuit 115. The data may be stored in real time, or it may be stored in a buffer circuit first before being stored in the data memory 302. The calculation processing by the arithmetic processing circuit 303 may also be performed in real time, or it may be performed after the series of data acquisitions are completed. A short duration of t1 (2 milliseconds or less) is preferable; however, if t1 is too short, the charge may not be discharged, resulting in insufficient suppression of the surge voltage Vs.

[0346] The measured digital data Tdata is measured at least once during the m1 period. During the m1 period, measurements are taken at equal time intervals. Furthermore, it is preferable to measure the voltage Vi between terminals multiple times at the same time t, and then average the multiple measured voltages V to obtain the Vi data.

[0347] Note that this is not limited to equal time intervals. Randomness may be performed at time intervals. The measured voltage data is recorded in the data memory 302. Multiple voltage data Tdata may be acquired at the same time t. The arithmetic processing circuit 303 performs averaging, median calculation, moving average calculation, etc. on the multiple voltage data Tdata, stores them in the data memory 302, and processes them.

[0348] As shown in Figure 20(a2), Tdata is also measured after the ts period. It is preferable that the t3 period be configured to be set to any arbitrary or predetermined time. It is preferable that the ts time matches the cycle time of the test current Id performed during the test of transistor 117. It is preferable that the ton period matches or approximates the ton period during the test described in Figure 12, etc.

[0349] Tdata measurements are performed over multiple periods during the m1 period. It is preferable to have different timings for measuring t-time intervals at any given m1 time and measuring t-time intervals at the next m1 time.

[0350] For example, in the measurement of a time interval t over an arbitrary time m1, the terminal voltage is measured at the timing indicated by the circle in Figure 21, and in the measurement of the next time interval t over an arbitrary time m1, the terminal voltage is measured at the timing indicated by the triangle. The start time of m1 can also be set by changing t1 time. For example, setting t1 time in the range of 0.1 milliseconds to 200 milliseconds is one example. The data measured at each ts time (terminal voltage, Tdata) are subjected to averaging and moving average processing at the same timing time.

[0351] Figures 20(a3), 20(b3), and 20(c3) are timing charts according to the method of the embodiment. The difference between Figure 20(c3) and Figure 20(c1) is that the on-time of the switch circuit 124b is longer. The longer the on-time of the switch circuit 124b, the more the charge between the terminals of the power supply unit 121 and between the terminals of the transistor 117 is discharged and stabilized. After switching circuit 124b off, the measurement of Tdata is started during period m1, as shown in Figures 20(b3) and 20(c3).

[0352] After the switch circuit 124b is turned on for time t2, the terminal voltage Vi of the transistor 117 or diode (Di, Ds) is measured as shown in Figure 20(c3). The terminal voltage Vi is measured during period m1 and stored as digital data Tdata in the data memory 302 of the temperature measurement circuit 115. The measured digital data Tdata is measured at least once during the m1 period. During the m1 period, measurements are taken at equal time intervals.

[0353] Note that this is not limited to equal time intervals. Randomness may be performed at time intervals. The measured voltage data is recorded in the data memory 302. Multiple voltage data Tdata may be acquired at the same time t. The multiple voltage data Tdata are stored and processed in the data memory 302 by the arithmetic processing circuit 303, which performs averaging, median calculation, moving average calculation, etc.

[0354] The measurement of Tdata is performed after applying the test current Id, as shown in Figure 20(a3), and synchronized with the off-timing of the test current Id. It is preferable that the t2 time be configured to be set to any arbitrary or predetermined time. It is preferable that the ts time be matched with the cycle time of the test current Id performed during the testing of transistor 117.

[0355] Before or prior to the start of the test, the semiconductor element 117, such as a transistor, has its characteristic curve measured as described in Figure 20, etc., to determine the n, A, C values, etc. of the characteristic curve. This is then combined with the embodiment described in Figure 15, etc.

[0356] After determining the characteristic curve, voltage values ​​such as the terminal voltage Vi are measured at a predetermined time t, or at any time t. Voltage values ​​are measured continuously over a period of m1, and the characteristic equation is determined from the measured voltage values.

[0357] The potential difference, potential ratio, voltage value, and rate of change between the initial value A of the characteristic formula and the terminal voltage Vi measured at time t during the test are determined or obtained to evaluate the transistor 117 being tested and to understand or evaluate the changes in its characteristics. The present invention, as shown in Figures 15 and 21, also applies to the following test apparatus, configuration of the test apparatus, and test method.

[0358] Figure 27 is an explanatory diagram of a test method for a semiconductor element 117 that does not have a built-in diode. Transistor 117 has three terminals. These terminals are referred to as terminal c, terminal e, and terminal g.

[0359] The ton time is set by the on period of switch circuit 124a, the on voltage period applied to the gate terminal of transistor 117, and also by the on time of switch circuit 124b. Examples of transistor 117 include SiC transistors, IGBTs, GaN transistors, MOS-FETs, and bipolar transistors.

[0360] A gate driver circuit 113 is connected to the g terminal (gate terminal, base terminal) of transistor 117. The output voltage of the gate driver circuit 113 is variable or set according to the output data of the gate signal control circuit 112.

[0361] The transistor 117 is controlled to turn on and off by the on-voltage and off-voltage output from the gate driver circuit 113. When the on-voltage is applied to the gate terminal of transistor 117, a test current Id flows. Also, when the test current Id flows through transistor 117, the switch circuit 124a is turned on (closed). By turning off (opening) the switch circuit 124a, the test current Id stops.

[0362] To simplify the explanation or to facilitate understanding, the output voltages of the gate driver circuit 113 are defined as the voltages V0 and Vn that turn off transistor 117, and the voltages V2 and V1 that turn on transistor 117.

[0363] Each voltage can be set to any desired voltage. Each voltage can be varied or set within one cycle. The gate signal control circuit 112 allows the voltage to be set to any desired voltage in a short time.

[0364] It is preferable that the timing, operation, and magnitude of the test current Id for acquiring the initial temperature information Tj (or terminal voltage Vi) of transistor 117 are consistent with the operation used to test transistor 117.

[0365] The transistor 117 generates heat depending on the magnitude and duration of the test current Id that flows through it. Conversely, when no test current Id flows through the transistor 117, it is cooled. Therefore, in order to evaluate the changes due to the test using the characteristic curves explained in Figures 15, 21, etc. as a reference, it is preferable to use the same magnitude and duration of the test current Id during the test.

[0366] In particular, as shown in Figures 36, 37, 38, 39, 40, and 41, the V1 voltage can be varied or set to be higher (direction b) or lower (direction a). Furthermore, it can be changed even within a single cycle (period t2 to t6). When determining or acquiring n, C, and A of the characteristic curve, the driving methods shown in Figures 36, 37, 38, 39, 40, and 41 can be employed.

[0367] By increasing the V1 voltage, the on-resistance of transistor 117 decreases. By decreasing the V1 voltage, the on-resistance of transistor 117 increases. By setting the V1 voltage to a predetermined voltage according to the test conditions, the test conditions of transistor 117 can be changed or set to predetermined conditions. By changing the g terminal voltage, the heat generation state of transistor 117 in relation to the test current Id can be arbitrarily changed or set.

[0368] During the period (time) in which the test current Id is applied to transistor 117, the switch circuit 124a is turned on (closed). Alternatively, an off voltage is applied to the g terminal of transistor 117.

[0369] The test current Id is supplied from the power supply 132. When applying the test current Id to transistor 117, the voltage V1 is applied to the g terminal of transistor 117 to turn on transistor 117.

[0370] When no test current Id is applied to transistor 117, either switch circuit 124a is turned off (open), or an off voltage (V0 voltage, Vn voltage) is applied to the g terminal of transistor 117.

[0371] When supplying a constant current Ic to transistor 117, the switch circuit 507 is turned on (closed). Also, the voltage V2 is applied to the g terminal of transistor 117 to turn on transistor 117.

[0372] During testing of transistor 117, when supplying the test current Id, a voltage V1 is applied to the g terminal. The V1 voltage is set or adjusted to a predetermined voltage depending on the test conditions. The V2 voltage must be the voltage applied to the g terminal of transistor 117 when determining the temperature information Tj. Therefore, even if the V1 voltage is changed, the V2 voltage must be fixed to a predetermined value. It is preferable that the V2 voltage be greater than the V1 voltage, so that transistor 117V2 is in the ON state or strongly ON state. When a test current Id is applied to transistor 117, a voltage V1 is applied to transistor 117. The voltage V1 is changed or variable according to the test conditions.

[0373] When a constant current Ic is applied to transistor 117, a voltage V2 is applied to the gate terminal of transistor 117 to turn it strongly ON. Alternatively, even if the voltage V1 applied when the test current Id is applied is changed, a constant voltage V2 is applied when a constant current Ic is applied to transistor 117. By setting a predetermined voltage V2 when a constant current Ic is applied to transistor 117, the temperature information Tj and the terminal voltage Vi can be measured stably.

[0374] The test apparatus and test method of the present invention are characterized by the ability to arbitrarily set the voltage applied to the g terminal when supplying a test current Id to the transistor 117 and the voltage applied to the g terminal when supplying a constant current Ic to the transistor 117.

[0375] When a constant current Ic is supplied to transistor 117, a voltage V2 is applied to the g terminal. The V2 voltage is a constant voltage value and does not depend on the V1 voltage. The V2 voltage is used to obtain the temperature information Tj of transistor 117. The temperature information Tj is obtained based on previously determined or set temperature information Tj. It can also be obtained based on the n, C, and A of the characteristic curve.

[0376] A V2 voltage that is greater than or equal to the V1 voltage is preferable because it reduces the on-resistance of transistor 117 when supplying a constant current Ic, thereby reducing the heat generated by transistor 117. However, the V2 voltage is not limited to being greater than or equal to the V1 voltage. A constant V2 voltage is used when acquiring or measuring temperature information Tj and characteristic curve A.

[0377] As the constant current Ic decreases, it becomes susceptible to noise, so it goes without saying that it is preferable to implement the circuit configuration and explanatory configuration shown in Figure 26. The same applies to other embodiments of the present invention.

[0378] It is preferable to attach a temperature sensor 521, such as a thermocouple, to the package of the transistor 117 and acquire the temperature data output by the temperature sensor 521. By measuring the temperature of the transistor 117 with the temperature sensor 521, it is possible to determine whether the temperature information Tj measured or acquired in the test is abnormal or exceeds the expected range.

[0379] When no test current Id is flowing through transistor 117, a constant current Ic is applied, and the terminal voltage Vi of transistor 117 and other components is measured. The rate of change from the initial constant value A of the characteristic curve and the change itself are obtained to acquire temperature information Tj.

[0380] The temperature information Tj may differ for each production lot of transistor 117, but generally it shows a constant value for each production lot. Therefore, if you take a sample of transistor 117 to be tested from each production lot and determine the temperature information Tj, you can use that information for other transistors 117. If you also determine the characteristic equation for each lot, it is not necessary to determine the characteristic equation for each transistor in the same lot.

[0381] If the changes from V0 to V2, from V2 to V1, and from V2 to V0 are made abrupt, transient phenomena may occur. Therefore, the voltage changes output by the gate driver circuit 113 are controlled to be gradual.

[0382] To obtain accurate temperature information Tj, the temperature information Tj of each transistor 117 should be measured and tested individually, even within the same lot. The measurement of temperature information Tj is not limited to the use of a constant temperature bath. For example, the temperature information Tj can be obtained by changing the temperature of the water flowing through the heat sink on which the transistor 117 is mounted.

[0383] As shown in Figure 36, a voltage V2 is applied to the g terminal during the period (t1~t2, t6~t7) when the constant current circuit 118 or constant current Ic is supplied to the transistor 117, setting the transistor 117 to a strongly ON state or a state with low on-resistance. Therefore, the relationship is V2 > V1. Note that the voltage V2 that causes a strongly ON state is a voltage higher than the V1 voltage.

[0384] The surge voltage Vs and inrush current Is are generated differently depending on the voltages of V2 and V1. Therefore, it is necessary to set and adjust the measurement timing (t1, t2, m1, w1) of the terminal voltage Vi, as explained in Figure 20. The present invention is characterized by its ability to set and adjust the measurement timing (t1, t2, m1, w1).

[0385] In Figure 36, t1-t2 and t6-t7 are the periods during which the inter-channel voltage Vi (voltage between terminal c and terminal e) of transistor 117 is measured (acquired) and temperature information Tj is obtained.

[0386] The terminal voltage Vi does not need to be measured (acquired) during both the t1-t2 and t6-t7 periods; it may be done only during the t6-t7 period. In that case, during the t1-t2 period, the V1 voltage may be applied to the g terminal instead of the V2 voltage.

[0387] As shown in Figure 39, a constant current Ic is supplied during the period t6-t7, and the terminal voltage at terminal g may also be set to the voltage V2 during the period t6-t7. During the period t1-t2, the voltage is set to either the voltage V0 or the voltage Vn.

[0388] During the period t2 to t6, a voltage V1 is applied to the g terminal of transistor 117, supplying a test current Id to transistor 117. The supply of the test current Id is performed at predetermined intervals. The V1 voltage may be changed or modified every cycle or every multiple cycles. In addition, the measurement timing of the terminal voltage Vi (t1, t2, m1, w1) is set and adjusted in accordance with the V1 voltage.

[0389] In the embodiment shown in Figure 27, a constant current Ic was supplied to transistor 117, and the inter-channel voltage (voltage between terminal c and terminal e) of transistor 117 was measured. Alternatively, the inter-channel voltage of transistor 117 may be measured while supplying a test current Id to transistor 117 without supplying a constant current Ic. Or, the test current Id can be varied to obtain a constant current Ic. In this case, the constant current circuit 118 is unnecessary. This embodiment is illustrated in Figure 38.

[0390] In Figure 38, the constant current Ic is not applied (supplied) (it is 0A). The voltage at the g terminal of transistor 117 is varied between the V2 voltage and the V1 voltage. The periods t1-t2 and t6-t7 are the periods during which the inter-channel voltage of transistor 117 is measured (acquired). The test current Id is supplied during the t1-t7 period.

[0391] As the test of applying the test current Id to transistor 117 continues, the inter-channel voltage of transistor 117 changes in accordance with the changes in transistor 117. Therefore, by monitoring the inter-channel voltage, the degradation or changes of transistor 117 can be measured.

[0392] During the periods t1-t2 and t6-t7, the terminal voltage at terminal g is set to the voltage V2, and the terminal voltage Vi obtained from the temperature information Tj is set for transistor 117. Therefore, the temperature information Tj is acquired with the voltage V2 applied. Since the terminal voltage also depends on the voltage V2, the characteristic equation is determined in relation to the voltage V2.

[0393] The period from t2 to t6 is the test period during which the test current Id is applied. The periods from t1 to t2 and t6 to t7, during which a constant current Ic is supplied, are much shorter than the period from t2 to t6.

[0394] By varying the terminal voltage of the g terminal between the V1 and V2 voltages, a good test can be performed, and good temperature information Tj (terminal voltage Vi) and characteristic equations can be obtained. When the test current Id is applied to the transistor 117, the V1 voltage is varied as a test condition. For example, the test current Id is supplied by setting it to 10V or 12V. Even in this case, when obtaining temperature information Tj (terminal voltage Vi), the terminal voltage Vi can be measured stably by applying the V2 voltage as the gate-on voltage of the transistor 117.

[0395] As described above, the test apparatus and test method of the present invention are characterized by the ability to set the g terminal voltage to multiple voltages (V1 voltage, V2 voltage). In addition, the values ​​of A(Vi0), C, and n in the characteristic formula are determined in accordance with the V1 voltage and V2 voltage. Using this characteristic formula, a semiconductor device is tested, and the amount of voltage change, potential difference, and rate of change relative to the initial terminal voltage Vi0 are obtained, thereby performing degradation evaluation and characteristic change evaluation of the semiconductor device being tested.

[0396] Figures 27 and 36 show a method for obtaining the temperature information Tj (terminal voltage Vi) and characteristic equation of transistor 117 by applying a constant current Ic between the channels of transistor 117. Figures 28 and 37 are explanatory diagrams of an embodiment in which the terminal voltage Vi and temperature information Tj of transistor 117 are obtained by supplying or applying a constant current Ic to a diode Di built into transistor 117 (transistor 117 and diode formed in the same process), a nearby diode Di, or a parasitic diode Di of transistor 117.

[0397] In the embodiment shown in Figure 28, the direction of supply of the constant current Ic is from the e terminal to the c terminal. The constant current Ic flows through the diode Di. The flow of the constant current Ic through the diode Di generates a terminal voltage across the diode Di.

[0398] The terminal voltage of diode Di is temperature-dependent. Since diode Di is built into or located near transistor 117, the temperature of diode Di changes due to the heat generated by transistor 117, and the terminal voltage Vi changes as a result. Therefore, by supplying a constant current Ic to diode Di and measuring the terminal voltage of diode Di, the heat generation state (temperature of transistor 117) can be understood, measured, or obtained.

[0399] During the period when the constant current Ic is flowing, transistor 117 must be kept in the off state. When transistor 117 is in the off state and switch circuit 507 is on, the constant current Ic is supplied to diode Di. If transistor 117 is made of SiC, it is preferable to set the voltage applied when it is off to a Vt voltage lower than 0V, as explained in Figure 6.

[0400] To interrupt the test current Id flowing through transistor 117, the switch circuit 124 is turned off to stop the supply of the test current Id. When transistor 117 is off, the direction of the constant current Ic can be either from terminal c to terminal e or from terminal e to terminal c. When transistor 117 is on, the direction of the constant current Ic is set to be from terminal e to terminal c.

[0401] When the voltage through which the constant current Ic flows is reversed, the polarity of the terminal voltage Vi is also reversed. In this case, it is best to swap the polarity of the voltage applied to the + and - terminals of the operational amplifier circuit 116.

[0402] For example, in transistors such as IGBTs, when an ON voltage is applied to the g terminal, current flows from the c terminal to the e terminal. Therefore, the direction of current flow is unidirectional.

[0403] Transistors using SiC, GaN, etc., are often of the MOS type. In MOS type transistors, the direction of current flow is bidirectional. Therefore, in order to flow a constant current Ic through the diode Di formed on the semiconductor element 117 of SiC, GaN, etc., it is necessary to apply an off voltage to the g terminal of the semiconductor element 117 so that the constant current Ic does not flow through the semiconductor element 117. Figure 29 is an explanatory diagram of a test apparatus and test method for testing MOS-type transistors (FETs) such as SiC and GaN.

[0404] Figure 29 is an explanatory diagram illustrating a method for obtaining the temperature information Tj (terminal voltage Vi) and characteristic equation of transistor 117 by supplying or applying a constant current Ic to a diode Di built into transistor 117 (transistor 117 and the diode are formed in the same process), a nearby diode Di, or a parasitic diode Di of transistor 117. In order to supply a constant current Ic to diode Di, it is necessary to turn off transistor 117 by applying an off voltage to the g terminal of transistor 117.

[0405] SiC switches off even at the same potential as IGBTs (V0 voltage), but off-leakage may occur at V0 voltage. Note that V0 voltage is the ground voltage (AGND).

[0406] In the embodiment shown in Figure 37, the voltage Vn is set to a voltage (potential) lower than the V0 voltage during the periods when a constant current Ic is supplied to the diode Di (periods t1-t2 and t6-t7). By setting the voltage to Vn, the off-leak current of transistor 117 is reduced, and transistor 117 enters a completely off state. Therefore, a constant current Ic is supplied to the diode Di effectively. It is preferable that the Vn voltage be 1-3V lower than the ground voltage (AGND). During the period (t2 to t6) when the test current Id is applied (supplied) to transistor 117, switch circuit 124 is turned on and switch circuit 507 is turned off.

[0407] The embodiment shown in Figure 30 is an embodiment of a method for acquiring temperature information Tj by applying (supplying) a constant current Ic to the MOS transistor 117, where the semiconductor element 117 is a MOS-type transistor and there is no diode Di.

[0408] During the period when a constant current Ic is supplied, switch circuit 124 is turned off and switch circuit 507 is turned on. The voltage applied to the g terminal of transistor 117 is the same as in Figure 36.

[0409] By turning off switch circuit 124, the supply of test current Id from power supply 132 is stopped. Switch circuit 507 is turned on during periods t1-t2 and t6-t7. Alternatively, switch circuit 507 is turned on during period t6-t7.

[0410] An ON voltage is applied to the g terminal of transistor 117, and a constant current Ic is supplied to transistor 117 from the constant current circuit 118. The direction of the constant current Ic can be either from the c terminal to the e terminal or from the e terminal to the c terminal.

[0411] During the period when a constant current Ic is flowing, the terminal voltage Vi between channels is measured or acquired. Temperature information Tj is obtained from the terminal voltage Vi. Furthermore, using the previously determined characteristic equation, the change in the terminal voltage Vi measured at each time t (time t) and the initial terminal voltage A (Vi0) is evaluated to assess the exceptional change state of the semiconductor device.

[0412] As described above, when the test current Id is applied to transistor 117 (for a specified time), the switch circuit 124 is turned on (closed). The test current Id is supplied from the power supply 132. When the test current Id is applied to transistor 117, the voltage V1 is applied to the g terminal of transistor 117 to turn on transistor 117.

[0413] When no test current is applied to transistor 117, either turn off (open) the switch circuit 124 or apply an off voltage (V0 voltage, Vn voltage) to the g terminal of transistor 117. In particular, for SiC transistors, the off voltage is the Vn voltage applied to the g terminal.

[0414] When supplying a constant current Ic to transistor 117, the switch circuit 507 is turned on (closed). Also, the voltage V2 is applied to the g terminal of transistor 117 to turn on transistor 117.

[0415] In testing transistor 117, when the test current Ic is supplied, a voltage V1 is applied to the g terminal. The V1 voltage is set or adjusted to a predetermined voltage depending on the test conditions. Preferably, the V2 voltage is the voltage applied to the g terminal of transistor 117 when the temperature information Tj (initial terminal voltage Vi) is determined, or when n, A, and C of the characteristic curve are determined. Therefore, even if the V1 voltage is changed, the V2 voltage must be fixed to a predetermined value.

[0416] A voltage V2 is applied as the gate voltage of transistor 117, and the terminal voltage Vi is measured. The measured terminal voltage Vi is converted into temperature information Tj, and the change or difference between the terminal voltage Vi and the A value of the characteristic curve at a predetermined or arbitrary time t is determined to evaluate the characteristic change state of transistor 117 under test. Based on the characteristic change state, a decision is made to continue or stop the test.

[0417] The present invention is characterized by the ability to separately set the voltage applied to the g terminal when supplying a test current Id to the transistor 117 and the voltage applied to the g terminal when supplying a constant current Ic to the transistor 117. In particular, the voltage at the g terminal when the constant current Ic is flowing is set to a predetermined voltage V2, independent of the voltage at the g terminal when the test current Id is flowing.

[0418] When a constant current Ic is flowing, the voltage applied to the g terminal should be higher than the voltage applied to the g terminal when a test current Id is flowing (if transistor 117 is N channel). If transistor 117 is P channel, the V2 voltage should be set to a lower voltage than the V1 voltage.

[0419] As shown in Figure 40, the voltage at the g terminal can be arbitrarily changed during the period t2 to t6. The voltage changes based on the output of the gate signal control circuit 112, which is the output of the gate driver circuit 113, resulting in a change in the g terminal voltage.

[0420] In the embodiment shown in Figure 40, the voltage at terminal g is changed such that the voltage is V1a at time t2 and V1b at time t6. Since the inter-channel resistance of transistor 117 changes with the voltage at terminal g, the heat generation state of transistor 117 also changes. This change in heat generation state allows for the implementation or realization of a variety of tests. Furthermore, since the inter-channel voltage Vce of transistor 117 can be changed, a variety of test conditions can be set.

[0421] As shown in Figure 41(a), the voltage at the g terminal of the gate that supplies or applies the test current Id to transistor 117 may be periodically changed. In Figure 41(a), the voltage V1a is applied during periods A and C, and the voltage V1b is applied during period B. Periods A (C) and B are repeated alternately. As described above, the present invention relates to the transistor 117 during the period in which the test current Id is applied. The gate terminal voltage can be varied to multiple voltages, or the voltage can be continuously changed.

[0422] As shown in Figure 41(b), the voltage changes shown in Figure 40 may also be implemented. During periods A and C, the voltage changes from V1a to V1b, and during period B, the voltage changes from V1b to V1a. Periods A (and C) and B are repeated alternately. As shown in Figure 41(c), the terminal voltage of terminal g can also be varied during the periods t1-t2 and t6-t7.

[0423] In Figure 41(c), during period A (period C), the V1b voltage is applied to the g terminal of transistor 117 during the period t1-t2. During the period t6-t7, the V2 voltage is applied to the g terminal of transistor 117. During period B, the V1b voltage is applied to the g terminal of transistor 117 during the period t1-t2. The V1b voltage is also maintained during the period t2-t6. During the period t6-t7, the V2 voltage is applied to the g terminal of transistor 117.

[0424] In Figure 41(d), during periods A, B, and C, the Vn voltage is applied to the g terminal of transistor 117 during the period t1-t2. Between t6 and t7, the V2 voltage is applied to the g terminal of transistor 117. During period A (and C), the V1a voltage is applied to the g terminal of transistor 117 during the period t2-t6. During period B, the V1b voltage is applied to the g terminal of transistor 117 during the period t2-t6.

[0425] In Figure 41, the period for measuring the terminal voltage Vi and determining the constants (A, C, n) of the characteristic curve (characteristic formula) is the period from t6 to t7. Preferably, measurements are also taken during the period from t1 to t2. By comparing the terminal voltage Vi during the period from t1 to t2 with the terminal voltage Vi during the period from t6 to t7, a wider variety of tests can be performed, and the evaluation status of the transistor 117 being tested can be understood in detail.

[0426] Figures 32, 33, and 44 are explanatory diagrams of the semiconductor testing apparatus and testing method of the present invention. In Figures 32 and 33, a plurality of transistors 117 (transistors 117Q1 to 117Qn) to be tested are connected in parallel to the power supply unit 132. Figure 44 is an explanatory diagram of the semiconductor device testing method in an embodiment of the present invention that illustrates the operation shown in Figures 32 and 33.

[0427] As shown in Figure 32, when supplying the test current Id1 to transistor 117Q1, switch circuit 124s1 is turned on. At this time, switch circuit Ssa1 is turned off so that the constant current Ic is not supplied to transistor 117Q1. On the other hand, switch circuit 124s2 connected to transistor 117Q2 is turned off so that the test current Id1 is not supplied. The constant current Ic is supplied to transistor 117Q2 by turning on switch circuit Ssa2.

[0428] A test current Id from one power supply 132 is supplied to one transistor 117Q by turning on one switch circuit 124a. A constant current Ic from one constant current circuit 118 is supplied to one transistor 117Q by turning on one switch circuit Ssa. As described above, by operating or manipulating the system, multiple transistors 117Q can be tested using a single power supply 132 and constant current circuit 118.

[0429] As shown in Figure 44(a), when switch circuits St1 (switch circuit 124s1) to Stn (switch circuit 124sn) are turned on (Vg voltage is applied to Vge), test currents Id1 to Idn flow through transistor 117. For example, the application time of test current Id is ton, and test currents Id1 and Id2 are applied to transistor 117 sequentially at intervals of time tcycle. When transistor 117 is turned on, the channel voltage of transistor 117 changes sequentially.

[0430] For example, test currents Id1 and Id2 do not overlap in time. Therefore, the output capacity of the current power supply 121 only needs to be the output capacity required to test one transistor 117.

[0431] As shown in Figure 44(a), the on-voltage (Vg) applied to the gate terminal of each transistor 117 is controlled so as not to overlap in time. Preferably, there should be an interval of 1 μs or more between each test current Id (Id1 to Idn). The driving method and control method described in other embodiments of the present invention are implemented for each transistor 117. The constant current Ic supplied to each transistor 117Q is generated by sequentially turning on the switch circuits Ssa (Ssa1 to Ssan) to supply the constant current Ic to each transistor 117Q.

[0432] The voltage Vi (Vi1~Vin) corresponding to the terminal voltage of transistor 117 is selected by selector 127 in synchronization with the switch circuit Ssa (Ssa1~Ssan). For example, when current Ic is supplied to transistor 117Q1, selector 127 selects the terminal voltage of transistor 117Q1. When current Ic is supplied to transistor 117Q3, selector 127 selects the terminal voltage of transistor 117Q3. The selected voltage Vi is supplied to the temperature measurement circuit 115. Other configurations and operations are the same as those described in other embodiments, so their explanation will be omitted.

[0433] In the timing chart of Figure 44(a), the on-voltage (Vg) is applied sequentially to transistors 117Q1 to 117Q5 (for example, five transistors 117 are used for testing), and the test is performed by applying a test current Id to transistor 117.

[0434] However, during the test, transistor 117 may break down, stopping the test current to that transistor 117. Alternatively, transistor 117 may degrade, stopping the test current to that transistor 117.

[0435] Figure 44(b) shows the state when the test current to transistor 117Q3 is stopped. When transistor 117Q3 is stopped (or is stopped), no Vg voltage is applied to transistor 117Q3 between t3 and t4, and the voltage applied to each gate of transistor 117Q3 is maintained at 0V.

[0436] If no ON voltage is applied to the gate voltage of transistor 117Q3, the power supply 132 will not supply test current Id during that period, and no current will flow through the power supply wiring 2. In addition, the corresponding switch circuit 124 will not be turned on, and other conditions such as the thermal state will change from the test state shown in Figure 44(a). Furthermore, the surge voltage and surge current during the test will change, and a constant test state cannot be maintained.

[0437] In Figure 44(b), for this task, the test current to transistor 117Q3 is stopped, but between t3 and t4, a Vg voltage is applied to transistor 117Q4, and the current output by the current power supply 121 is kept constant. In other words, during the period when the on-voltage of the stopped transistor is applied, the next transistor is turned on, maintaining a state where the transistors are turned on sequentially. That is, the transistors to be tested are operated in a pre-emptive fashion.

[0438] It goes without saying that the matters illustrated in Figures 4, 6, 15, 16, 17, 18, 19, 20, 21, 27, 28, 29, 30, 32, 33, 36, 37, 38, 39, 40, 41, 44, etc., and described in the specification can be combined in part or in whole with each other. Furthermore, it goes without saying that the embodiments described in this specification and drawings can be combined in part or in whole with each other.

[0439] It goes without saying that the matters illustrated in Figures 15, 16, 17, 18, 19, 20, 21, 27, 28, 29, 30, 32, 33, 36, 37, 38, 39, 40, 41, 44, etc., and described in the specification, can be applied to the embodiments in Figures 1, 2, 3, 4, 5, and 6, for example, or can be combined in part or in whole with each other.

[0440] Figure 34 is a timing chart of the signals applied to transistor 117, etc. Vdata is the data that controller 111 applies to DA converter circuit 508. Vdata determines, varies, or sets the voltages output by DA converter circuit 508a and DA converter circuit 508b.

[0441] The switching circuit 605 selects the voltage output by either the DA converter circuit 508a or the DA converter circuit 508b and applies it to the gate driver circuit 113 as a gate control signal Vsg. Therefore, since the switching circuit 605 only selects either the V1 voltage or the V2 voltage and outputs it as the gate control signal Vsg, the changes in the V1 and V2 voltages are rapid.

[0442] In Figure 34(a), transistor 117 is off during the period when voltage V0 is applied. At time t1, the voltage Vsg is set to voltage V1 by Vdata. Voltage V1 is applied to the gate terminal of transistor 117, and at t2 after the period tc, current Id is supplied to transistor 117 from the voltage generation circuit 509.

[0443] Next, switch circuit 124b is turned on during the period from t4 to t6, short-circuiting the channels of transistor 117 and discharging the charge. Also, switch circuit 122b, which is connected to voltage generation circuit 509, is opened.

[0444] At t5, the Vsg voltage becomes the V2 voltage due to Vdata, and the V2 voltage is applied to the gate terminal of transistor 117, turning transistor 117 strongly on (V2 is a higher voltage than V1). At t6, the switch circuit 507 turns on and applies a constant current Ic to transistor 117 (Figures 1 and 2) for the duration of te to obtain temperature information. From the terminal voltage Vi obtained during the period of constant current Ic application, the temperature measurement circuit 115 processes the temperature information Tj.

[0445] The tf period is set to a period of 2 milliseconds or less. Preferably, the tc period and td period are 1 millisecond or less. When the test current Id is applied, the transistor 117 generates heat and its temperature rises. The temperature rise due to heat generation corresponds to the change in the characteristics of the transistor 117. Therefore, by acquiring or measuring the temperature of the transistor 117, the degradation state and characteristic changes of the transistor 117 can be understood.

[0446] When the test current Id is stopped, transistor 117 cools down. Therefore, after stopping the test current Id, it is necessary to apply a constant current Ic for a short period of time on the millisecond level to obtain the temperature information Tj of transistor 117.

[0447] The semiconductor testing apparatus of the present invention can measure the terminal voltage Vi by applying a constant current Ic within a short time of 2 milliseconds after stopping the test current Id, thereby obtaining temperature information Tj and a characteristic curve equation. Therefore, since the temperature of the transistor 117 is maintained, changes in the characteristics of the transistor 117 can be measured or acquired accurately and precisely.

[0448] As shown in Figure 34, after a period ta in which a load current is applied to transistor 117, a period tb is provided in which the V2 voltage is applied to transistor 117 to obtain temperature information. After the test current Id is stopped, a constant current Ic is applied for the duration of the tb period within a period of 2 milliseconds or less to obtain temperature information.

[0449] In the embodiment shown in Figure 34, a voltage V1 was applied to supply a test current Id, and then a constant current Ic was supplied to the voltage V2 to measure the terminal voltage Vi, thereby obtaining temperature information Tj and a characteristic curve equation. The present invention is not limited to this embodiment.

[0450] Figure 35 is an explanatory diagram of an embodiment in which temperature information Tj is obtained before and after the application of current Id. The temperature information Tj is obtained by obtaining the temperature information Tj when the transistor 117 is in a heat-dissipated state before the application of current Id, and the characteristic (curve) equation and temperature information Tj when the temperature rises after the application of current Id. By obtaining two types of temperature information Tj, one in the heat-dissipated state and one in the temperature-risen state, the characteristic changes and degradation state of the transistor 117 can be obtained with greater accuracy.

[0451] Figure 35 is a timing chart of the signals applied to transistor 117, etc. The V2 voltage is applied before and after the test current Id is passed. While the V2 voltage is applied, a constant current Ic is applied to transistor 117 to acquire or measure temperature information Tj. Before applying the constant current Ic, the switch circuit 124b is turned on to discharge the charge between the channels (collector terminal to emitter terminal) of the transistor 117.

[0452] During the period when the V0 voltage is applied, transistor 117 is off. At t0, the V2 voltage due to Vdata is applied as Vsg to the gate terminal of transistor 117. During the period when the V2 voltage is applied, a constant current Ic is applied to transistor 117, and the inter-channel voltage Vi of the transistor is measured.

[0453] The terminal voltage Vi is the voltage across the terminals of transistor 117 when it is not energized, and after the test current Id has been applied and the device has cooled down. This terminal voltage Vi also contains information about the degradation state and characteristic changes of transistor 117. Therefore, useful information can be obtained by comparing and understanding the changes in the terminal voltage Vi during load cycle testing.

[0454] At time t1, the Vsg voltage is set to the V1 voltage by Vdata. The V1 voltage is applied to the gate terminal of transistor 117, and at t2 after the tc period, the voltage generation circuit 509 supplies current Id to transistor 117.

[0455] Next, switch circuit 124b is turned on during the period from t4 to t6, short-circuiting the channels of transistor 117 and discharging the charge. Also, switch circuit 122b, which is connected to voltage generation circuit 509, is opened.

[0456] At t5, the Vsg voltage becomes the V2 voltage due to Vdata, and the V2 voltage is applied to the gate terminal of transistor 117, turning transistor 117 strongly on. At t6, the switch circuit 507 turns on, and a constant current Ic is applied to transistor 117 in Figure 1 for the duration of te to obtain temperature information. From the terminal voltage Vi obtained during the application period of the constant current Ic, the temperature measurement circuit 115 processes the temperature information Tj. This terminal voltage Vi represents the temperature information of transistor 117 immediately after the test current Id is applied.

[0457] By applying a test current Id, the transistor 117 generates heat and its temperature rises. Depending on the characteristic change or degradation state of the transistor 117, the temperature rise state of the transistor 117 changes. The temperature rise due to heat generation occurs corresponding to the characteristic change state of the transistor 117. Therefore, by obtaining or measuring the temperature of the transistor 117, the degradation state and characteristic changes of the transistor 117 can be grasped. Also, the change state of the transistor 117 due to the application of the test current Id can be obtained from the Tj before the application of the test current Id and the temperature information Tj after the application of the test current Id. Therefore, the characteristic changes and the like of the transistor 117 can be measured or obtained accurately and precisely.

[0458] The timing charts of FIGS. 34 and 35 illustrate the application of the test current Id and the constant current Ic to the transistor 117. The load test and the avalanche test are performed by turning on and off the transistor 117 for tens of thousands of cycles or more.

[0459] FIG. 42 is a timing chart diagram when the test current Id and the constant current Ic are applied in a cycle ts. The V1 voltage is applied for a ta period, and the V2 voltage is applied for a tb period. After the energization period of the transistor 117, the V0 voltage is applied to turn off the transistor 117. The load test and the avalanche test are performed with the V1 voltage, the V2 voltage, and the V0 voltage as one cycle ts. Note that FIG. 42 is an example in which the test method of FIG. 34 is performed in a ts cycle, but it is needless to say that it can be similarly applied to FIG. 35.

[0460] Also, in FIG. 34 and the like, the V0 voltage is set as the off voltage, but the V0 voltage is not limited to a single level of potential. For example, there may be a plurality of voltages such as V0a voltage and V0b voltage, and a plurality of off voltages may be used. For example, the off voltage before changing to the V1 voltage may be the V0a voltage for a period of 10 milliseconds or less, and the application period of the other off voltage may be the V0b voltage. It is preferable that the potential levels of the V0a and V0b voltages are such that V0a < V0b. By lowering the V0a voltage, the change speed from the V0a voltage to the V1 voltage increases, and the intermediate state of the on-off operation becomes shorter.

[0461] Figure 31 is an explanatory diagram of a semiconductor device testing apparatus and a semiconductor device testing method in another embodiment of the present invention. An example of the semiconductor device 117 is shown in Figure 40, etc. The semiconductor device 117 is connected to parts A, B, and C in Figure 31. In Figure 31, three semiconductor devices are tested simultaneously or sequentially, but the present invention is not limited to this. There may be two, or four or more. Figure 43 is a timing chart diagram for the conductor element test apparatus and semiconductor element test method shown in Figure 31.

[0462] The sample connection circuit 203 is connected to the Vsg signals applied to the gate terminals of three semiconductor elements 117. Each Vsg signal controls the on / off state of the semiconductor elements 117. A constant current Ic is sequentially applied to each semiconductor element 117, and the inter-channel voltage Vi of the semiconductor elements 117 is measured.

[0463] The embodiment shown in Figure 31 is an embodiment in which multiple semiconductor elements 117 are tested simultaneously or sequentially. The semiconductor elements 117 are controlled by a single controller circuit 111.

[0464] Similar to Figure 34, before applying the constant current Ic, the switch circuit 124b is turned on to set the inter-channel voltage of the semiconductor element 117 to 0V. The charge between channels is also discharged. At this time, the switch circuit 124a of the semiconductor element 117 through which the constant current Ic flows is turned on. Furthermore, the transistor to which the test voltage or test current is applied during the test is selected by turning on the switch circuit 124a.

[0465] A constant current circuit 121, a voltage generation circuit 509, and a variable capacitance capacitor 505 are connected in parallel to the semiconductor element 117. The constant current circuit 121 is selected by switch circuit 122a, the voltage generation circuit 509 is selected by switch circuit 122b, and the variable capacitance capacitor 505 is selected by switch circuit 506b. The coil 502 is selected to be inserted into or not inserted into the circuit system by switch circuit 506a.

[0466] The terminal voltage Vi changes depending on the values ​​of the variable capacitance capacitor 505 and the coil 502. Therefore, the constants (A, C, n) in the characteristic equation should be determined taking into account the effects of the variable capacitance capacitor 505 and the coil 502.

[0467] In Figure 34, the gate control signals Vsg (gate control signals Vsga, Vsgb, and Vsgc) are the same as in Figure 34 or Figure 35, and the V0 voltage, the V1 voltage during the ta period, and the V2 voltage during the tb period are repeatedly applied to each semiconductor element 117.

[0468] During the ta period, a current Id flows from the constant current circuit 121 or the voltage generation circuit 509. The switch circuit 124a (switch circuit 124aa, switch circuit 124ab, switch circuit 124ac, ...) selects which semiconductor element 117 (semiconductor element 117a, semiconductor element 117b, semiconductor element 117c, ...) to which the current Id flows. The switch circuit 124a is controlled by the controller 111. Each semiconductor element 117 is selected in ts2 cycles and tested by applying a current Id.

[0469] During the tb period, a constant current Ic is supplied to each semiconductor element 117, and the channel voltage Vi of each semiconductor element 117 is measured. Temperature information Tj is obtained from the measured terminal voltage Vi. Before the application of the constant current Ic, the switch circuit 124b is turned on to discharge the charge between the channels of the semiconductor element 117.

[0470] In the embodiments shown in Figures 31, 32, and 33, multiple semiconductor elements 117 are tested. For each semiconductor element 117, the terminal voltage Vi is measured, and the temperature information Tj and characteristic (curve) equation are determined, as described in other embodiments of this specification and drawings.

[0471] The operation and timing control of the switch circuit 124b in Figures 4, 12, 18, 34, 35, 42, 43, etc., can be applied to the embodiment described in Figure 20, etc., and it goes without saying that the embodiment described in Figures 15, 19, 21, etc., can be applied to the above embodiments. The same applies to the embodiment of the semiconductor testing apparatus in Figures 27, 28, 29, 30, 31, 32, and 33.

[0472] The present invention has been described as an example of measuring or acquiring channel voltages (collector-emitter voltage, drain-source voltage, etc.) of transistors and the like. The present invention is not limited to this.

[0473] Figures 2 and 7 illustrate a method in which the resistance value of the variable resistor circuit 125 is set to a predetermined value, and the current flowing through the variable resistor circuit 125 is measured. Current (leakage current) flows through the variable resistor circuit 125 to the gate (base) terminal of the transistor 117. By measuring the leakage current, the characteristic changes and degradation state of semiconductor elements 117 such as transistors can be tested or evaluated.

[0474] Leakage current measurements are performed by varying or setting the g terminal voltage (V2, V1, V0, Vn) as shown in Figures 3, 4, 5, 6, 34, 35, 36, 37, 38, 39, 40, and 41. The output voltage of the gate driver circuit 113 is also changed, variable, or set to a predetermined value. Furthermore, the c and e terminal voltages of the semiconductor element 117 are set to a predetermined voltage or AGND voltage, or are varied.

[0475] The characteristic equation for leakage current is determined in advance using the method described in Figures 15 and 21. During testing, the leakage current is measured, and the change from the initial value of the determined characteristic equation is calculated. This allows for understanding the test state of the semiconductor device being tested and quantifying the degradation state of the semiconductor device. The direction of the current flowing through the variable resistor circuit 125 is measured or acquired as it changes between the positive and negative directions.

[0476] In the embodiments of the present invention, the transistor 117 to be tested is described using an IGBT as an example, but it is not limited to this. For example, it may be a two-terminal element such as a diode. Furthermore, it is not limited to semiconductor elements, but any electrical element such as a capacitor or resistor can be used. It goes without saying that the matters and contents described in this specification and the drawings can be combined with each other.

[0477] Figures 27, 28, 29, 30, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, and 44 are explanatory diagrams of a test method for the semiconductor element 117 of the present invention as one embodiment. Needless to say, each embodiment can be combined with others.

[0478] For example, it goes without saying that this can be combined with the test apparatus or test method described in Figures 1, 2, 3, 4, 5, 6, 7, 8, 9, and 10. It goes without saying that this can be combined with the test apparatus or test method described in Figures 15, 16, 17, 18, 19, 20, 21, etc.

[0479] Furthermore, it goes without saying that these can be combined with the structures or configurations shown in Figures 11, 12, 13, 14, 15, 16, 17, 18, 19, and 20. Furthermore, it goes without saying that it can be combined with 21 different circuit configurations or driving methods.

[0480] Although the present invention has been specifically described above based on embodiments, it goes without saying that the present invention is not limited thereto and can be modified in various ways without departing from its essence. It goes without saying that the matters or contents described herein and in the drawings may be combined in whole or in part. In the embodiments of the present invention, transistor 117 has been described using an IGBT as an example, but is not limited thereto.

[0481] For example, it goes without saying that an N-channel JFET (Figure 47(a)), a P-channel JFET (Figure 47(b)), an N-channel MOSFET (Figure 47(c)), a P-channel MOSFET (Figure 47(d)), an N-channel bipolar FET (Figure 47(e)), or a P-channel bipolar FET (Figure 47(f)) would also be acceptable.

[0482] Furthermore, the device is not limited to a three-terminal device; it may also be a two-terminal element such as a diode as shown in Figure 47(g). In the case of a two-terminal element, a gate signal Vgs is not required. Alternatively, it may also be a semiconductor element such as a thyristor as shown in Figure 47(h). It goes without saying that the semiconductor testing apparatus and semiconductor device testing method of the present invention can be applied by conducting a test by applying a test current Id with the current power supply 121.

[0483] Although the present invention has been specifically described above based on embodiments, it goes without saying that the present invention is not limited thereto and can be modified in various ways without departing from its essence.

[0484] It goes without saying that the matters or contents described herein and in the drawings can be combined with each other. For example, the switch circuit 124c shown in Figure 8 can be applied to other embodiments. For example, it goes without saying that the configuration or operation in Figures 11 and 13 can be applied to other embodiments such as Figures 1 and 7. Also, it goes without saying that the embodiment in Figure 4 can be applied to the embodiments in Figures 11 and 13. [Industrial applicability]

[0485] This invention allows for more accurate evaluation of transistor characteristics under actual test conditions. Therefore, it can provide an excellent power cycle test apparatus and test method. [Explanation of Symbols]

[0486] 111 Computer (Controller) 112 Gate signal control circuit 113 Gate driver circuit 114 Current control circuit 115 Temperature measurement circuit 116 Operational Amplifier (Buffer Amplifier Circuit) 117 Semiconductor devices (power transistors, etc.) 118 Constant current circuit 121 Current power supply 122 Switch Circuit 124 Switch Circuit 125 Variable resistor 127 Selector 128 Thermometer 131 Control Rack 132 Power supply 134 Heating and Cooling Plate 135 Circulating water pipe 136 Chiller 151 Capacitive reactance 152 Induced reactance 203 Sample Connection Circuit 301 Voltage Measurement Circuit 302 Data Memory 303 Arithmetic Processing Circuit 305 resistor 502 Coil 505 Variable Capacitor 506 Switch Circuit 507 Switch Circuit 509 Voltage generation circuit 521 Temperature Sensor 601 AC / DC Converter Circuit 602 Capacitor 603 Reference Voltage Circuit 604 Transistor 605 Switching Circuit

Claims

1. A test device for a power semiconductor element having a first element terminal, a second element terminal, and a gate terminal, a power supply device having a first power terminal and a second power terminal for supplying a test current or a test voltage; a constant current circuit that supplies a constant current between the first element terminal and the second element terminal; a first switch circuit disposed between the first element terminal and the first power supply terminal; a second switch circuit disposed between the first power supply terminal and the second power supply terminal; a gate driver circuit that applies an on-voltage and an off-voltage to the gate terminal; a voltage acquisition circuit that acquires a terminal-to-terminal voltage between the first element terminal and the second element terminal, turning on the second switch circuit and then turning off the first switch circuit, and turning off the second switch circuit after turning off the first switch circuit, thereby supplying the constant current between the first element terminal and the second element terminal; measuring a terminal voltage between the first element terminal and the second element terminal after a predetermined period has elapsed since the time when the first switch circuit is turned off or the time when the test current or test voltage supplied to the power semiconductor element is stopped; a third inter-terminal voltage v0 at a time when the first switch circuit is turned off or when the test current or test voltage supplied to the power semiconductor element is stopped is calculated from the inter-terminal voltage; The power semiconductor testing device is characterized in that temperature information of the power semiconductor element is obtained from the third inter-terminal voltage v0.

2. A test device for a power semiconductor element having a first element terminal, a second element terminal, and a gate terminal, a power supply device having a first power supply terminal and a second power supply terminal for supplying a test current or a test voltage; a constant current circuit that supplies a constant current between the first element terminal and the second element terminal; a first switch circuit disposed between the first element terminal and the first power supply terminal; a second switch circuit disposed between the first power supply terminal and the second power supply terminal; a gate driver circuit that applies an on-voltage and an off-voltage to the gate terminal; a voltage acquisition circuit that acquires a terminal-to-terminal voltage between the first element terminal and the second element terminal, turning on the second switch circuit and then turning off the first switch circuit, and turning off the second switch circuit after turning off the first switch circuit, thereby supplying the constant current between the first element terminal and the second element terminal; From time t 0 when the first switch circuit is turned off, Set measurement points t1 and t2 such that t2 = s × t1. measuring a first inter-terminal voltage v1 between the first element terminal and the second element terminal at the measurement point t1, measuring a second inter-terminal voltage v2 between the first element terminal and the second element terminal at the measurement point t2, and determining a third inter-terminal voltage v0 between the first element terminal and the second element terminal at the time t0 from the first inter-terminal voltage v1 and the second inter-terminal voltage v2; The power semiconductor testing device is characterized in that temperature information of the power semiconductor element is obtained from the third inter-terminal voltage v0.

3. A test device for a power semiconductor element having a first element terminal, a second element terminal, and a gate terminal, comprising: a power supply device having a first power supply terminal and a second power supply terminal for supplying a test current or a test voltage; a constant current circuit that supplies a constant current between the first element terminal and the second element terminal; a first switch circuit disposed between the first element terminal and the first power supply terminal; a second switch circuit disposed between the first power supply terminal and the second power supply terminal; a gate driver circuit that applies an on-voltage and an off-voltage to the gate terminal; a voltage acquisition circuit that acquires a terminal-to-terminal voltage between the first element terminal and the second element terminal, turning on the second switch circuit and then turning off the first switch circuit, and turning off the second switch circuit after turning off the first switch circuit, thereby supplying the constant current between the first element terminal and the second element terminal; From time t 0 when the first switch circuit is turned off, Set measurement points t1 and t2 such that t2 = 2 × t1. measuring a first inter-terminal voltage v1 between the first element terminal and the second element terminal at the measurement point t1, and measuring a second inter-terminal voltage v2 between the first element terminal and the second element terminal at the measurement point t2; A power semiconductor testing device characterized in that a voltage v0 at time t0 is calculated from the first inter-terminal voltage v1 and the second inter-terminal voltage v2 by the following formula: v0 = (2 + √2)・v1 - (1 + √2)・v2

4. A test device for a power semiconductor element having a first element terminal, a second element terminal, and a gate terminal, comprising: a power supply device having a first power supply terminal and a second power supply terminal for supplying a test current or a test voltage; a constant current circuit that supplies a constant current between the first element terminal and the second element terminal; a first switch circuit disposed between the first element terminal and the first power supply terminal; a second switch circuit disposed between the first power supply terminal and the second power supply terminal; a gate driver circuit that applies an on-voltage and an off-voltage to the gate terminal; a voltage acquisition circuit that acquires a terminal-to-terminal voltage between the first element terminal and the second element terminal, turning on the second switch circuit and then turning off the first switch circuit, and turning off the second switch circuit after turning off the first switch circuit, thereby supplying the constant current between the first element terminal and the second element terminal; measuring a terminal voltage between the first element terminal and the second element terminal at a plurality of predetermined periods from the time when the test current or test voltage supplied to the power semiconductor element is stopped; From the terminal voltage, the values ​​of C, n, and A in the characteristic equation Y=A·C^(-1·t^n) are determined; A power semiconductor testing device characterized in that temperature information of the power semiconductor element is obtained from the measured inter-terminal voltage and the characteristic equation.

5. applying the on-voltage to the gate terminal; 5. The power semiconductor testing device according to claim 1, 2, 3, or 4, characterized in that the terminal voltage between the first element terminal and the second element terminal is measured while the constant current is applied between the first element terminal and the second element terminal.

6. A diode is formed or arranged between the first element terminal and the second element terminal, applying the off voltage to the gate terminal; 5. The power semiconductor testing device according to claim 1, 2, 3, or 4, characterized in that the terminal voltage between the first element terminal and the second element terminal is measured while the constant current is applied between the first element terminal and the second element terminal.

7. A resistor circuit is connected to the gate terminal, 5. The power semiconductor testing device according to claim 1, wherein the resistance value of the resistor circuit can be set.

8. A power semiconductor testing device as described in claim 1, claim 2, claim 3 or claim 4, characterized in that a temperature sensor having a thermocouple is attached to the power semiconductor element.

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