Wiring board assembly, wiring board, and wiring board manufacturing method

Abstract

To provide a wiring board assembly, a wiring board, and a wiring board manufacturing method that suppress damage and peeling during cutting.SOLUTION: A wiring board assembly includes a wiring structure, and a solder resist layer 130 that covers a wiring layer on the surface of the wiring structure and protects a wiring. The solder resist layer covers the surface of the wiring structure to protect the wiring, and includes a slit 132 that exposes a predetermined region of the surface corresponding to the cutting region CR of the surface of the wiring structure. The edge of the outermost insulating layer corresponding to the edge 132a of the slit 132 meanders in a wavy manner.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to a wiring board assembly, a wiring board, and a method for manufacturing a wiring board. [Background technology]

[0002] Conventionally, a wiring board for mounting a semiconductor chip is not manufactured as a single piece, but as an assembly in which a plurality of wiring boards are arranged. The plurality of wiring boards manufactured as an assembly are cut into individual pieces by a cutting tool such as a dicer or slicer. Each individual wiring board obtained by the singulation becomes a wiring board for mounting a semiconductor chip.

[0003] When the assembly is divided into individual pieces, the solder resist layer covering the wiring structure of the wiring board is generally cut together with the wiring structure by a cutting tool. The solder resist layer may be damaged, such as chipped or cracked, by contact with the cutting tool. In response to this, it has been considered to form linear slits in the solder resist layer that are wider than the cutting tool in correspondence with the cutting area on the surface of the wiring structure, and to cut the wiring structure in the cutting area exposed from the linear slit to divide the assembly into individual pieces. By cutting the wiring structure in the cutting area exposed from the linear slit in the solder resist layer, contact between the solder resist layer and the cutting tool can be avoided, and damage to the solder resist layer can be suppressed. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2001-160597 A Summary of the Invention [Problem to be solved by the invention]

[0005] However, when cutting the wiring structure in the cutting region exposed from the linear slit in the solder resist layer, there is a problem that peeling may occur between the solder resist layer and the wiring structure. Specifically, in the cutting region exposed from the linear slit in the solder resist layer, the surface of the wiring structure is not covered with the solder resist layer, and the load acting on the wiring structure from the cutting tool increases in the direction away from the solder resist layer. As a result, the solder resist layer and the wiring structure are peeled off.

[0006] Furthermore, in a structure in which the slit is formed wider than the cutting area to avoid contact between the solder resist layer and the cutting tool (the structure described in Patent Document 1), the load acting on the wiring structure from the cutting tool is applied to the surface of the wiring structure that is not protected by the solder resist layer, which may cause damage such as chips and cracks to occur on the surface of the wiring structure that is not protected by the solder resist layer.

[0007] The disclosed technology has been developed in consideration of the above, and aims to provide a wiring board assembly, a wiring board, and a method for manufacturing a wiring board that can suppress the occurrence of damage and peeling during cutting. [Means for solving the problem]

[0008] In one embodiment, the wiring board assembly disclosed in the present application includes a wiring structure and an insulating layer. The insulating layer covers a surface of the wiring structure and has a slit that exposes a predetermined area of ​​the surface of the wiring structure. The edge of the outermost insulating layer corresponding to the edge of the slit meanders in a wavy manner. Effect of the Invention

[0009] According to one aspect of the wiring board assembly disclosed in the present application, it is possible to suppress the occurrence of damage and peeling during cutting. [Brief description of the drawings]

[0010] [Figure 1]FIG. 1 is a schematic cross-sectional view showing the configuration of a wiring board assembly according to an embodiment. [Diagram 2] FIG. 2 is a plan view showing the configuration of the wiring board assembly according to the embodiment. [Diagram 3] FIG. 3 is an enlarged view showing the shape of the slit. [Figure 4] FIG. 4 is a diagram showing another example of the shape of the edge of the solder resist layer. [Diagram 5] FIG. 5 is a diagram showing another example of the shape of the edge of the solder resist layer. [Figure 6] FIG. 6 is a flowchart showing a method for manufacturing a wiring board assembly and a wiring board according to the embodiment. [Figure 7] FIG. 7 is a diagram showing a specific example of a core substrate forming step. [Figure 8] FIG. 8 is a diagram showing a specific example of the build-up process. [Figure 9] FIG. 9 is a diagram showing a specific example of the solder resist layer forming step. [Figure 10] FIG. 10 is a diagram illustrating the formation of the slits. [Figure 11] FIG. 11 is a diagram showing a specific example of a terminal forming step. [Figure 12] FIG. 12 is a plan view showing the configuration of the wiring board according to the embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Hereinafter, embodiments of a wiring board assembly, a wiring board, and a method for manufacturing a wiring board disclosed in the present application will be described in detail with reference to the drawings. Note that the disclosed technology is not limited to these embodiments.

[0012] 1 is a schematic cross-sectional view showing a configuration of a wiring board assembly 100 according to an embodiment. The wiring board assembly 100 is an assembly in which a plurality of wiring boards 100a are arranged. The plurality of wiring boards 100a manufactured as the wiring board assembly 100 are cut into individual pieces by a cutting tool such as a dicer or a slicer in a cutting region CR formed in a lattice pattern, for example.

[0013] The wiring board assembly 100 has a layered structure, and includes a core substrate 110, a wiring structure 120, and solder resist layers 130 and 140. In the following description, the solder resist layer 140 is the bottom layer and the solder resist layer 130 is the top layer as shown in Fig. 1, but the wiring board assembly 100 may be used, for example, upside down, or in any position.

[0014] Core substrate 110 has wiring layers 113 formed by metal plating on both sides of base material 111, which is a plate-shaped insulator. Wiring layers 113 on both sides are connected by vias 112 that penetrate base material 111 as necessary.

[0015] The wiring structure 120 is a laminate of layers including an insulating insulating layer 121 and a conductive wiring layer 122. The insulating layer 121 is formed of an insulating resin such as an epoxy resin and a polyimide resin. The wiring layer 122 is formed of a metal such as copper or a copper alloy. In FIG. 1, two layers are laminated in the wiring structure 120 above the core substrate 110, and two layers are laminated in the wiring structure 120 below the core substrate 110, but the number of layers to be laminated may be one layer or three or more layers. The adjacent wiring layers 113 and 122 are connected to each other by a via 123 that penetrates the insulating layer 121 as necessary.

[0016] Solder resist layer 130 is a layer that covers wiring layer 122 on the surface of wiring structure 120 and protects the wiring. Solder resist layer 130 is a layer made of an insulating photosensitive resin such as an acrylic resin or a polyimide resin, and is one of the insulating layers. Solder resist layer 130 is an example of an outermost insulating layer.

[0017] The solder resist layer 130 side of the wiring board assembly 100 is the surface on which an electronic component such as a semiconductor chip is mounted. At the position where the semiconductor chip is to be mounted, an opening 131 is formed in the solder resist layer 130. Since the solder resist layer 130 is formed using a photosensitive resin, it is possible to form the opening 131 by exposure and development. Then, in the opening 131, a connection terminal 150 is formed for connecting the wiring layer 122 of the wiring structure 120 and the electrode of the semiconductor chip.

[0018] Solder resist layer 130 also has slits 132 corresponding to cut regions CR on the surface of wiring structure 120. Cut regions CR on the surface of wiring structure 120 are exposed in slits 132. Since solder resist layer 130 is formed using a photosensitive resin, it is possible to form slits 132 together with openings 131 by exposure and development.

[0019] Like solder resist layer 130, solder resist layer 140 is a layer that covers wiring layer 122 on the surface of wiring structure 120 and protects the wiring. Solder resist layer 140 is a layer made of an insulating photosensitive resin such as an acrylic resin or a polyimide resin, and is one of the insulating layers. Solder resist layer 140 is an example of an outermost insulating layer.

[0020] The solder resist layer 140 side of the wiring board assembly 100 is the surface to be connected to external components, devices, etc. At positions where external connection terminals for electrically connecting to external components or devices are to be formed, openings 141 are formed in the solder resist layer 140, and the wiring layer 122 of the wiring structure 120 is exposed from the openings 141. External connection terminals such as solder balls are formed in the openings 141. Since the solder resist layer 140 is formed using a photosensitive resin, the openings 141 can be formed by exposure and development.

[0021] Solder resist layer 140 also has slits 142 corresponding to cut regions CR on the surface of wiring structure 120. Cut regions CR on the surface of wiring structure 120 are exposed in slits 142. Solder resist layer 140 is formed using a photosensitive resin, and therefore slits 142 can be formed together with openings 141 by exposure and development.

[0022] Fig. 2 is a plan view showing a configuration of a wiring board assembly 100 according to an embodiment. Fig. 2 shows a top view of the wiring board assembly 100 as viewed from the solder resist layer 130 side. As shown in Fig. 2, a plurality of slits 132 are formed in the solder resist layer 130 along cutting regions CR formed in a lattice pattern. The plurality of slits 132 intersect with each other.

[0023] Fig. 3 is an enlarged view showing the shape of slits 132. Fig. 3 shows an enlarged view of portion A in Fig. 2. Note that, although the shape of slits 132 in solder resist layer 130 will be described here, slits 142 in solder resist layer 140 also have a similar shape to slits 132.

[0024] 3, edge 132a of solder resist layer 130 corresponding to the edge of slit 132 has a wavy, meandering shape. Compared to a solder resist layer having a non-wandering edge, solder resist layer 130 having edge 132a that meanders in a wavy manner has a smaller contact area between solder resist layer 130 and the periphery of cutting region CR on the surface of wiring structure 120, and therefore the frictional force acting on solder resist layer 130 from the cutting tool is smaller.

[0025] That is, when the wiring structure 120 is cut by the cutting tool in the cutting region CR exposed from the slit 132, the edge 132a of the solder resist layer 130 corresponding to the edge of the slit 132 comes into contact with the cutting tool. At this time, since the edge 132a of the solder resist layer 130 meanders in a wavy manner, the frictional force acting from the cutting tool to the solder resist layer 130 is relatively small, and the load acting from the cutting tool to the solder resist layer 130 is not so large. As a result, the occurrence of damage and peeling of the solder resist layer 130 can be suppressed. In addition, since the peeling of the solder resist layer 130 can be prevented, the adhesion between the surface of the wiring structure 120 and the solder resist layer 130 is maintained outside the cutting region CR. Furthermore, since the solder resist layer 130 protects the wiring structure 120, chipping and cracking of the surface of the wiring structure 120 can be prevented.

[0026] Moreover, edge 132a of solder resist layer 130 corresponding to the edge of slit 132 meanders in a wavy manner including waves made up of a plurality of arcs connected to each other. Specifically, edge 132a of solder resist layer 130 is configured by connecting a plurality of semicircular arc-shaped convex portions to each other. By having edge 132a of solder resist layer 130 corresponding to the edge of slit 132 meander in a wavy manner including waves made up of a plurality of arcs connected to each other, the contact area between solder resist layer 130 and the periphery of cut region CR on the surface of wiring structure 120 is reduced.

[0027] Furthermore, the multiple convex portions constituting edge portion 132a of solder resist layer 130 have apexes at positions that contact the periphery of cutting region CR, thereby minimizing the contact area between solder resist layer 130 and the periphery of cutting region CR on the surface of wiring structure 120.

[0028] Furthermore, at least one convex portion 132a1 of the multiple convex portions constituting edge portion 132a of solder resist layer 130 is located opposite a corner formed by multiple intersecting slits 132. This suppresses peeling between solder resist layer 130 and wiring structure 120 near the corner formed by multiple intersecting slits 132, and as a result, adhesion between the surface of wiring structure 120 and solder resist layer 130 is maintained.

[0029] The shape of the edge 132a of the solder resist layer 130 corresponding to the edge of the slit 132 may be various other shapes as long as it is a wavy meandering shape. FIG. 4 and FIG. 5 are diagrams showing other examples of the shape of the edge 132a of the solder resist layer 130. For example, as shown in FIG. 4, the shape of the edge 132a of the solder resist layer 130 may be a shape that meanders in a wavy manner and the convex portion 132a1 of the solder resist layer 130 is omitted. In other words, the edge 132a of the solder resist layer 130 may be a shape that does not have a corner that faces the corner formed by the multiple slits 132 that intersect with each other. Since the edge 132a of the solder resist layer 130 does not have a corner, peeling, chipping, and cracking of the solder resist layer 130 due to contact with a cutting tool can be suppressed.

[0030] 5, the edge 132a of the solder resist layer 130 may be wavy including a triangular wave. Although not shown, the edge 132a of the solder resist layer 130 may meander in a wavy shape including at least one wave selected from a wave consisting of a plurality of mutually connected arcs, a triangular wave, a square wave, and a trapezoidal wave. At least one of the plurality of convex portions constituting the edge 132a of the solder resist layer 130 may be different in size from at least one of the other plurality of convex portions.

[0031] Next, a method for manufacturing the wiring board assembly 100 and wiring board 100a configured as described above will be described with a specific example with reference to Fig. 6. Fig. 6 is a flowchart showing a method for manufacturing the wiring board assembly 100 and wiring board 100a according to the embodiment.

[0032] First, a core substrate 110 that becomes a support member of the wiring substrate assembly 100 is formed (step S101). Specifically, as shown in FIG. 7, for example, vias 112 that penetrate the substrate 111, which is a plate-shaped insulator, are formed, and wiring layers 113 of metal such as copper are formed on both sides of the substrate 111 by, for example, copper foil or copper plating. FIG. 7 is a diagram showing a specific example of a core substrate forming step. The wiring layers 113 on both sides of the substrate 111 are connected by vias 112 formed by plating of metal such as copper, as necessary. As the substrate 111, for example, a reinforcing material such as glass woven fabric impregnated with insulating resin such as epoxy resin can be used. As the reinforcing material, glass nonwoven fabric, aramid woven fabric, aramid nonwoven fabric, etc. can be used in addition to glass woven fabric. As the insulating resin, polyimide resin, cyanate resin, etc. can be used in addition to epoxy resin.

[0033] A plurality of adjacent wiring board forming regions 100b are set on the upper and lower surfaces of core substrate 110 at intervals equal to the width of cutting region CR, and wiring substrates 100a are formed in each of wiring board forming regions 100b. That is, a plurality of wiring substrates 100a are formed using one core substrate 110.

[0034] Then, wiring structure 120 is formed on the upper and lower surfaces of core substrate 110 by a build-up method (step S102). Specifically, as shown in Fig. 8, insulating layer 121 is formed on the upper and lower surfaces of core substrate 110, and wiring layer 122 is formed on the surface of insulating layer 121. Fig. 8 is a diagram showing a specific example of the build-up process. Insulating layer 121 is formed using insulating resin such as epoxy resin or polyimide resin. Also, wiring layer 122 is formed by plating a metal such as copper.

[0035] Between wiring layer 113 and wiring layer 122 of core substrate 110, or between wiring layers 122 of adjacent layers, a via 123 formed by plating with a metal such as copper is connected as necessary. Insulating layer 121 and wiring layer 122 may be laminated in multiple layers on the upper and lower surfaces of core substrate 110, respectively.

[0036] When wiring structure 120 is formed, wiring layer 122 on the surface of wiring structure 120 is covered with solder resist layers 130, 140 (step S103). That is, wiring layer 122 on the surface of wiring structure 120 laminated on the upper surface of core substrate 110 is covered with solder resist layer 130, and wiring layer 122 on the surface of wiring structure 120 laminated on the lower surface of core substrate 110 is covered with solder resist layer 140.

[0037] Then, as shown in Fig. 9, for example, openings 131 are formed in solder resist layer 130 on the side on which the semiconductor chip is mounted at positions where connection terminals to the semiconductor chip are to be provided. Wiring layer 122 on the surface of wiring structure 120 is exposed at the bottom of openings 131. Fig. 9 is a diagram showing a specific example of the solder resist layer formation step. Furthermore, slits 132 are formed in solder resist layer 130 at positions corresponding to cut regions CR on the surface of wiring structure 120. Cut regions CR on the surface of wiring structure 120 are exposed at the bottom of slits 132.

[0038] Meanwhile, openings 141 are formed in solder resist layer 140 on the side to be connected to external components or devices at positions where external connection terminals are to be provided. Wiring layer 122 on the surface of wiring structure 120 is exposed at the bottom of openings 141. Also, slits 142 are formed in solder resist layer 140 at positions corresponding to cutting regions CR on the surface of wiring structure 120. Cutting regions CR on the surface of wiring structure 120 are exposed at the bottom of slits 142.

[0039] Since a photosensitive resin is used for the solder resist layers 130 and 140, it is possible to simultaneously form the openings 131 and the slits 132, or the openings 141 and 142, by exposure and development. Furthermore, exposure and development of the solder resist layer 130 and exposure and development of the solder resist layer 140 may be carried out separately.

[0040] Fig. 10 is a diagram illustrating the formation of the slits 132. For example, as shown in the upper part of Fig. 10, a pattern mask is formed on the surface of the solder resist layer 130 in accordance with the shape of the slits 132 (and the openings 131), and exposure is performed to harden the solder resist layer 130 in the portions where the pattern mask is not formed. Specifically, the solder resist layer 130 is hardened in the regions where the slits 132 (and the openings 131) are not formed. The portions of the solder resist layer 130 that are hardened by exposure to light become the remaining portions that remain after development.

[0041] When solder resist layer 130 is hardened by exposure to light, development is performed, and only the hardened remaining portion remains on the surface of wiring structure 120. That is, as shown in the lower part of Fig. 10, for example, the remaining portion of solder resist layer 130 covers the surface of wiring structure 120, and slits 132 that expose cut regions CR on the surface of wiring structure 120 are formed in the portions other than the remaining portion. Edges 132a of solder resist layer 130 corresponding to the edges of slits 132 meander in a wavy manner.

[0042] Then, connection terminals for connecting a semiconductor chip are formed in the openings 131 of the solder resist layer 130 (step S104). That is, the connection terminals 150 are formed in the openings 131 by, for example, copper plating. Through the steps up to this point, a wiring board assembly 100 including a plurality of wiring boards 100a is obtained, for example, as shown in FIG. 11. FIG. 11 is a diagram showing a specific example of the terminal formation step. Note that, if necessary, a semiconductor chip may be mounted on the solder resist layer 130 side, and the connection terminals 150 and electrodes of the semiconductor chip may be joined by, for example, solder or the like.

[0043] Then, individual wiring boards 100a are separated and singulated (step S105). Specifically, the wiring board assembly 100 shown in FIG. 11 is cut in the cutting region CR exposed from the slit 132 by a cutting tool such as a dicer or slicer to obtain a plurality of wiring boards 100a. At this time, since the edge 132a (see FIG. 3) of the solder resist layer 130 corresponding to the edge of the slit 132 meanders in a wavy manner, the frictional force acting from the cutting tool to the solder resist layer 130 is relatively small, and the load acting from the cutting tool to the solder resist layer 130 is not so large. As a result, damage and peeling of the solder resist layer 130 can be suppressed. Furthermore, since peeling of the solder resist layer 130 can be prevented, adhesion between the surface of the wiring structure 120 and the solder resist layer 130 is maintained outside the cutting region CR. Furthermore, since the solder resist layer 130 protects the wiring structure 120, chipping and cracking of the surface of the wiring structure 120 can be prevented.

[0044] In each wiring board 100a, as shown in Fig. 12, for example, the side surface of the solder resist layer 130 is formed along the peripheral edge 120a of the surface of the wiring structure 120, and meanders in a wavy manner. Fig. 12 is a plan view showing the configuration of the wiring board 100a according to the embodiment. Although not shown, in each wiring board 100a, the side surface of the solder resist layer 140 is formed along the peripheral edge 120a of the surface of the wiring structure 120, similar to the side surface of the solder resist layer 130, and meanders in a wavy manner.

[0045] As described above, the wiring board assembly (e.g., wiring board assembly 100) according to the embodiment has a wiring structure (e.g., wiring structure 120) and an outermost insulating layer (e.g., solder resist layers 130, 140). The wiring structure is composed of a wiring layer (e.g., wiring layer 122) and an insulating layer (e.g., insulating layer 121). The outermost insulating layer covers the surface of the wiring structure and has slits (e.g., slits 132, 142) that expose a predetermined region (e.g., cutting region CR) of the surface of the wiring structure. The edges of the outermost insulating layer corresponding to the edges of the slits meander in a wavy manner. As a result, the wiring board assembly according to the embodiment can suppress the occurrence of damage and peeling during cutting.

[0046] In addition, the edge of the outermost insulating layer corresponding to the edge of the slit may meander in a wave shape including at least one wave selected from a wave consisting of a plurality of mutually connected circular arcs, a triangular wave, a square wave, and a trapezoidal wave. As a result, according to the wiring board assembly of the embodiment, the contact area between the outermost insulating layer (e.g., the solder resist layer 130, 140) and the periphery of the cut region on the surface of the wiring structure is reduced. Furthermore, according to the wiring board assembly of the embodiment, chipping and cracks on the upper surface of the wiring structure can be prevented compared to the conventional example in which the periphery of the wiring structure is not covered by the outermost insulating layer.

[0047] Furthermore, the multiple convex portions constituting the edge of the outermost insulating layer may have apexes at positions that contact the periphery of the predetermined region, thereby minimizing the contact area between the outermost insulating layer (e.g., solder resist layers 130, 140) and the periphery of the cut region on the surface of the wiring structure according to the wiring board assembly of the embodiment.

[0048] In addition, at least one of the plurality of convex portions constituting the edge of the outermost insulating layer may have a size different from that of at least another of the plurality of convex portions, whereby the wiring board assembly according to the embodiment can further suppress the occurrence of damage and peeling during cutting.

[0049] The outermost insulating layer may also have a plurality of slits that intersect with each other. At least one of the plurality of convex portions (e.g., convex portion 132a1) that constitutes the edge of the outermost insulating layer corresponding to the edge of the slits may be located opposite to a corner formed by the plurality of slits that intersect with each other. As a result, according to the wiring board assembly of the embodiment, peeling between the outermost insulating layer (e.g., solder resist layers 130, 140) and the wiring structure can be suppressed near the corner formed by the plurality of slits that intersect with each other. [Explanation of symbols]

[0050] 100 Wiring board assembly 100a Wiring board 110 Core Board 120 Wiring structure 120a Periphery 130, 140 Solder resist layer 132, 142 Slit 132a Edge 132a1 Convex part CR cutting area

Claims

1. a wiring structure including a wiring layer and an insulating layer; an outermost insulating layer covering a surface of the wiring structure and having a slit for exposing a predetermined region of the surface of the wiring structure; having The edge of the outermost insulating layer corresponding to the edge of the slit meanders in a wavy manner. A wiring board assembly comprising:

2. The edge of the outermost insulating layer is A wave-like meandering pattern including at least one wave selected from a wave consisting of a plurality of interconnected circular arcs, a triangular wave, a square wave, and a trapezoidal wave.

2. The wiring board assembly according to claim 1.

3. The plurality of protruding portions constituting the edge of the outermost insulating layer are A peak is provided at a position adjacent to the periphery of the predetermined region.

2. The wiring board assembly according to claim 1.

4. At least one of the plurality of convex portions constituting the edge of the outermost insulating layer is The size of the plurality of convex portions is different from that of at least one of the other convex portions.

2. The wiring board assembly according to claim 1.

5. the outermost insulating layer has a plurality of the slits intersecting each other, At least one of the plurality of convex portions constituting the edge of the outermost insulating layer is Located opposite to a corner formed by the plurality of slits intersecting each other 2. The wiring board assembly according to claim 1.

6. The insulating layer located on a surface of the wiring structure, The outermost insulating layer is exposed between a plurality of protruding portions constituting an edge portion of the outermost insulating layer.

2. The wiring board assembly according to claim 1.

7. a wiring structure including a wiring layer and an insulating layer; an outermost insulating layer covering a surface of the wiring structure; having The outermost insulating layer is A wiring board having a wavy, meandering side surface formed along the periphery of the surface of the wiring structure.

8. The insulating layer located on a surface of the wiring structure, The outermost insulating layer is exposed between the plurality of protruding portions constituting the side surface of the outermost insulating layer.

8. The wiring board according to claim 7.

9. forming a wiring structure including a wiring layer and an insulating layer; forming an outermost insulating layer that covers a surface of the wiring structure and has a slit that exposes a predetermined region of the surface of the wiring structure; cutting the wiring structure into individual pieces at the predetermined regions exposed through the slits; The step of forming the outermost insulating layer includes: The edge of the outermost insulating layer corresponding to the edge of the slit is made to meander in a wavy manner.

4. A method for manufacturing a wiring board comprising the steps of:

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