Silicon carbide substrate, silicon carbide epitaxial substrate, method for manufacturing silicon carbide substrate, and method for manufacturing silicon carbide semiconductor device

Abstract

To improve the yield of a silicon carbide semiconductor device.SOLUTION: The first main plane is the (000-1) plane or a plane inclined at an off angle of 8° or less with respect to the (000-1) plane. The first main plane is composed of a first peripheral region and a first central region surrounded by the first peripheral region. The first central region is divided into a plurality of first square regions, each side of which is 250 μm in length. If the average value of Sa in the plurality of first square regions is the first arithmetic mean height, the first arithmetic mean height is 0.1 nm or less. First polishing marks are not formed in the first central region. The maximum length of the first polishing mark is 1 mm or more, the maximum width of the first polishing mark is 1 μm or more, and the maximum depth of the first polishing mark is 1 nm or more.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a silicon carbide substrate, a silicon carbide epitaxial substrate, a method for manufacturing a silicon carbide substrate, and a method for manufacturing a silicon carbide semiconductor device. [Background technology]

[0002] International Publication WO 2016 / 063632 (Patent Document 1) describes a silicon carbide substrate having a main surface with a surface roughness of 0.1 nm or less. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] International Publication No. 2016 / 063632 Summary of the Invention [Problem to be solved by the invention]

[0004] An object of the present disclosure is to improve the yield of silicon carbide semiconductor devices. [Means for solving the problem]

[0005] The silicon carbide substrate according to the present disclosure includes a first main surface, a second main surface, and an outer periphery. The second main surface is opposite to the first main surface. The outer periphery is continuous with each of the first main surface and the second main surface. The first main surface is a (000-1) plane or a plane inclined at an off angle of 8° or less with respect to the (000-1) plane. The polytype of silicon carbide constituting the silicon carbide substrate is 4H. The first main surface is composed of a first outer periphery region within 3 mm from the outer periphery and a first central region surrounded by the first outer periphery region. The first central region is divided into a plurality of first square regions, each having a side length of 250 μm. When the average value of Sa in the plurality of first square regions is defined as a first arithmetic mean height, the first arithmetic mean height is 0.1 nm or less. No first polishing marks are formed in the first central region. The maximum length of the first polishing marks is 1 mm or more, the maximum width of the first polishing marks is 1 μm or more, and the maximum depth of the first polishing marks is 1 nm or more. Effect of the Invention

[0006] According to the present disclosure, the yield of silicon carbide semiconductor devices can be improved. [Brief description of the drawings]

[0007] [Figure 1] FIG. 1 is a schematic plan view showing the configuration of a first main surface of a silicon carbide substrate in accordance with this embodiment. [Diagram 2] FIG. 2 is a schematic cross-sectional view taken along line II-II in FIG. [Diagram 3] FIG. 3 is a plan view illustrating a configuration of a second main surface of the silicon carbide substrate according to this embodiment. [Figure 4] FIG. 4 is a schematic plan view showing the structure of polishing marks. [Diagram 5] FIG. 5 is a schematic cross-sectional view taken along line VV in FIG. [Figure 6] FIG. 6 is a plan view illustrating a configuration of a silicon carbide epitaxial substrate according to this embodiment. [Figure 7] FIG. 7 is a schematic cross-sectional view taken along line VII-VII in FIG. [Figure 8]FIG. 8 is a flow diagram showing an overview of a method for manufacturing a silicon carbide substrate according to this embodiment. [Figure 9] FIG. 9 is a schematic diagram showing a step of performing chemical mechanical polishing on a silicon carbide substrate. [Figure 10] FIG. 10 is a flow diagram illustrating a schematic method for manufacturing a silicon carbide semiconductor device according to this embodiment. [Figure 11] FIG. 11 is a cross-sectional view illustrating a configuration of a silicon carbide epitaxial substrate according to this embodiment. [Figure 12] FIG. 12 is a schematic cross-sectional view showing a step of forming a body region. [Figure 13] FIG. 13 is a schematic cross-sectional view showing a step of forming a source region. [Figure 14] FIG. 14 is a schematic cross-sectional view showing a step of forming a trench in the third main surface of the silicon carbide epitaxial layer. [Figure 15] FIG. 15 is a schematic cross-sectional view showing a step of forming a gate insulating film. [Figure 16] FIG. 16 is a schematic cross-sectional view showing a step of forming a gate electrode and an interlayer insulating film. [Figure 17] FIG. 17 is a schematic cross-sectional view showing the configuration of a silicon carbide semiconductor device in accordance with this embodiment. [Figure 18] FIG. 18 is a graph showing the relationship between the polishing rate of a silicon carbide substrate and the weight concentration of alumina abrasive grains. [Figure 19] FIG. 19 is a graph showing the relationship between the incidence rate of first polishing marks and the weight concentration of alumina abrasive grains in the first central region of the silicon carbide substrate. [Figure 20] FIG. 20 is a diagram showing the relationship between Sa (arithmetic mean height) and the weight concentration of alumina abrasive grains on the first main surface of the silicon carbide substrate. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] [Description of the embodiments of the present disclosure]

[0009] First, embodiments of the present disclosure will be listed and described.

[0010] (1) A silicon carbide substrate 100 according to the present disclosure includes a first main surface 1, a second main surface 2, and an outer peripheral edge 9. The second main surface 2 is opposite to the first main surface 1. The outer peripheral edge 9 is continuous with each of the first main surface 1 and the second main surface 2. The first main surface 1 is a (000-1) plane or a plane inclined at an off angle of 8° or less with respect to the (000-1) plane. The polytype of silicon carbide constituting the silicon carbide substrate 100 is 4H. The first main surface 1 is composed of a first outer peripheral region 12 within 3 mm from the outer peripheral edge 9 and a first central region 11 surrounded by the first outer peripheral region 12. The first central region 11 is divided into a plurality of first square regions 61 with a side length of 250 μm. When the average value of Sa in the plurality of first square regions 61 is defined as a first arithmetic mean height, the first arithmetic mean height is 0.1 nm or less. In the first central region, no first polishing marks 35 are formed. The maximum length of the first polishing marks 35 is 1 mm or more, the maximum width of the first polishing marks 35 is 1 μm or more, and the maximum depth of the first polishing marks 35 is 1 nm or more.

[0011] (2) According to the silicon carbide substrate 100 relating to (1) above, second polishing marks 36 may be formed in the first central region. The maximum length of second polishing marks 36 may be less than 1 mm, the maximum width of second polishing marks 36 may be less than 1 μm, and the maximum depth of second polishing marks 36 may be 1 nm or more.

[0012] (3) According to silicon carbide substrate 100 according to (1) or (2) above, second main surface 2 may be configured with second outer peripheral region 22 within 3 mm from outer peripheral edge 9, and second central region 21 surrounded by second outer peripheral region 22. Second central region 21 may be divided into a plurality of second square regions 62, each having a side length of 250 μm. When the average value of Sa in the plurality of second square regions 62 is defined as the second arithmetic mean height, the first arithmetic mean height may be smaller than the second arithmetic mean height.

[0013] (4) According to silicon carbide substrate 100 according to (3) above, the second arithmetic mean height may be greater than 0.1 nm and less than 0.2 nm.

[0014] (5) The silicon carbide substrate 100 according to the present disclosure includes a first main surface 1, a second main surface 2, and an outer peripheral edge 9. The second main surface 2 is opposite to the first main surface 1. The outer peripheral edge 9 is continuous with each of the first main surface 1 and the second main surface 2. The first main surface 1 is a (000-1) plane or a plane inclined at an off angle of 8° or less with respect to the (000-1) plane. The polytype of silicon carbide constituting the silicon carbide substrate 100 is 4H. The first main surface 1 is composed of a first outer peripheral region 12 within 3 mm from the outer peripheral edge 9 and a first central region 11 surrounded by the first outer peripheral region 12. The first central region 11 is divided into a plurality of first square regions 61 with a side length of 250 μm. The second main surface 2 is composed of a second outer peripheral region 22 within 3 mm from the outer peripheral edge 9 and a second central region 21 surrounded by the second outer peripheral region 22. The second central region 21 is divided into a plurality of second square regions 62, each having a side length of 250 μm. If the average value of Sa in the plurality of first square regions 61 is defined as a first arithmetic mean height, and the average value of Sa in the plurality of second square regions 62 is defined as a second arithmetic mean height, the first arithmetic mean height is smaller than the second arithmetic mean height.

[0015] (6) According to silicon carbide substrate 100 relating to (5) above, the second arithmetic mean height may be greater than 0.1 nm and less than 0.2 nm.

[0016] (7) A silicon carbide epitaxial substrate according to the present disclosure includes silicon carbide substrate 100 according to any one of (1) to (6) above, and a silicon carbide epitaxial layer provided on first main surface 1.

[0017] (8) In the silicon carbide epitaxial substrate according to the above, the silicon carbide epitaxial layer may include a third main surface 3 located on the opposite side to the surface facing the first main surface 1. The third main surface 3 may be composed of a third outer peripheral region 32 located within 3 mm from the outer peripheral edge 9 of the silicon carbide epitaxial layer, and a third central region 31 surrounded by the third outer peripheral region 32. The third central region 31 may be divided into a plurality of third square regions 63, each having a side length of 250 μm. When the average value of Sa in the plurality of third square regions 63 is defined as a third arithmetic mean height, the third arithmetic mean height may be 0.15 nm or less. Bounces may not be formed on the third main surface 3.

[0018] (9) A method for manufacturing a silicon carbide semiconductor device according to the present disclosure includes the following steps: A silicon carbide substrate 100 according to any one of (1) to (6) above is prepared. A silicon carbide epitaxial layer 20 is formed on first main surface 1. An electrode 116 is formed on silicon carbide epitaxial layer 20.

[0019] (10) A method for manufacturing a silicon carbide substrate 100 according to the present disclosure includes a step of chemically mechanically polishing a first main surface 1 of a silicon carbide substrate 100 using a polishing liquid 310. The polishing liquid 310 contains alumina abrasive grains 312 and an oxidizing agent 311. The first main surface 1 is a (000-1) plane or a plane inclined at an off angle of 8° or less with respect to the (000-1) plane. The oxidation-reduction potential of the polishing liquid 310 is 1000 V or more. The average particle size of the alumina abrasive grains 312 is less than 0.2 μm. The weight concentration of the alumina abrasive grains 312 in the polishing liquid 310 is 0.6% or more and 1.2% or less. The oxidizing agent 311 does not contain permanganate.

[0020] (11) According to the method for manufacturing silicon carbide substrate 100 relating to (10) above, the oxidation-reduction potential may be 1200V or less.

[0021] (12) According to the method for manufacturing silicon carbide substrate 100 according to (10) or (11) above, the average grain size may be equal to or greater than 0.1 μm.

[0022] (13) In the method for manufacturing silicon carbide substrate 100 according to any one of (10) to (12) above, oxidizing agent 311 may contain nitrate. [Details of the embodiment of the present disclosure]

[0023] Hereinafter, an embodiment of the present disclosure will be described with reference to the drawings. In the following drawings, the same or corresponding parts are given the same reference numerals, and the description thereof will not be repeated. In the crystallographic description in this specification, an individual orientation is indicated by [], a collective orientation by <>, an individual plane by (), and a collective plane by {}. In addition, for negative indices, a "-" (bar) is placed before the number in crystallography, but in this specification, a negative sign is placed before the number.

[0024] <Silicon carbide substrate>

[0025] First, the configuration of silicon carbide substrate 100 according to this embodiment will be described. Fig. 1 is a plan view schematic showing the configuration of a first main surface 1 of silicon carbide substrate 100 according to this embodiment. Fig. 2 is a cross-sectional schematic view taken along line II-II in Fig. 1.

[0026] As shown in FIG. 1 and FIG. 2, silicon carbide substrate 100 according to this embodiment has a first main surface 1, a second main surface 2, and an outer peripheral edge 9. The second main surface 2 is opposite to the first main surface 1. The outer peripheral edge 9 is continuous with each of the first main surface 1 and the second main surface 2. The first main surface 1 is composed of a first outer peripheral region 12 and a first central region 11. The first outer peripheral region 12 is a region within 3 mm from the outer peripheral edge 9. The first central region 11 is surrounded by the first outer peripheral region 12. The first central region 11 is continuous with the first outer peripheral region 12. The polytype of silicon carbide constituting silicon carbide substrate 100 is, for example, 4H.

[0027] 1, when viewed along a straight line perpendicular to the first main surface 1, the first main surface 1 extends along each of a first direction 101 and a second direction 102. When viewed along a straight line perpendicular to the first main surface 1, the second direction 102 is a direction perpendicular to the first direction 101. The outer peripheral edge 9 has, for example, an orientation flat 7 and an arc-shaped portion 8.

[0028] 1 , the orientation flat 7 is linear when viewed along a straight line perpendicular to the first main surface 1. The orientation flat 7 extends along a first direction 101. The arc-shaped portion 8 is continuous with the orientation flat 7. The arc-shaped portion 8 is arc-shaped when viewed along a straight line perpendicular to the first main surface 1.

[0029] The first direction 101 is, for example, the <11-20> direction. The first direction 101 may be, for example, the [11-20] direction. The first direction 101 may be a direction obtained by projecting the <11-20> direction onto the first main surface 1. From another perspective, the first direction 101 may be, for example, a direction including a <11-20> directional component.

[0030] The second direction 102 is, for example, the <1-100> direction. The second direction 102 may be, for example, the [1-100] direction. The second direction 102 may be, for example, a direction obtained by projecting the <1-100> direction onto the first main surface 1. From another perspective, the second direction 102 may be, for example, a direction including a <1-100> directional component. The third direction 103 is a direction from the second main surface 2 toward the first main surface 1. The third direction 103 is perpendicular to each of the first direction 101 and the second direction 102.

[0031] The first main surface 1 is a (000-1) plane or a plane inclined at an off angle of 8° or less with respect to the (000-1) plane. When the first main surface 1 is inclined with respect to the (000-1) plane, the inclination angle (off angle θ) with respect to the (000-1) plane may be, for example, 1° or more, or 2° or more. When the first main surface 1 is inclined with respect to the (000-1) plane, the inclination direction (off direction) of the first main surface 1 is, for example, the <11-20> direction. The off direction is not particularly limited. The off angle θ may be, for example, 7° or less, or 6° or less.

[0032] The maximum diameter W1 of the first main surface 1 is, for example, 100 mm (4 inches) or more. The maximum diameter W1 of the first main surface 1 may be 150 mm (6 inches) or more, or may be 200 mm (8 inches) or more. The maximum diameter W1 of the first main surface 1 is not particularly limited, but may be, for example, 400 mm (16 inches) or less.

[0033] When viewed along a straight line perpendicular to the first main surface 1, the maximum diameter W1 of the first main surface 1 is the longest linear distance between two different points on the outer peripheral edge 9. When viewed along a straight line perpendicular to the first main surface 1, the distance from the boundary between the first outer peripheral region 12 and the first central region 11 to the outer peripheral edge 9 is taken as a second width W2, and the second width W2 is 3 mm. From another perspective, the width (second width W2) of the first outer peripheral region 12 in the direction extending radially from the center of the first main surface 1 (radial direction) is 3 mm.

[0034] In this specification, 4 inches means 100 mm or 101.6 mm (4 inches x 25.4 mm / inch). 6 inches means 150 mm or 152.4 mm (6 inches x 25.4 mm / inch). 8 inches means 200 mm or 203.2 mm (8 inches x 25.4 mm / inch). 16 inches means 400 mm or 406.4 mm (16 inches x 25.4 mm / inch).

[0035] As shown in FIG. 1, the first central region 11 is divided into a plurality of first square regions 61. The length of one side of each of the plurality of first square regions 61 is 250 μm. The first side of each of the plurality of first square regions 61 is parallel to the first direction 101. The second side of each of the plurality of first square regions 61 is parallel to the second direction 102. The first side is continuous with the second side. The first side is perpendicular to the second side. As shown in FIG. 1, the plurality of first square regions 61 are arranged in a lattice shape along the first direction 101 and the second direction 102. The plurality of first square regions 61 may be arranged in the first central region 11 so that the number of the plurality of first square regions 61 is maximized.

[0036] 3 is a plan schematic diagram showing the configuration of second main surface 2 of silicon carbide substrate 100 according to this embodiment. Second main surface 2 is configured with second outer peripheral region 22 and second central region 21. Second outer peripheral region 22 is a region within 3 mm from outer peripheral edge 9. Second central region 21 is surrounded by second outer peripheral region 22. Second central region 21 is continuous with second outer peripheral region 22.

[0037] If the distance from the boundary between the second outer peripheral region 22 and the second central region 21 to the outer peripheral edge 9 as viewed along a straight line perpendicular to the second main surface 2 is defined as a second width W2, the second width W2 is 3 mm. From another perspective, the width (second width W2) of the second outer peripheral region 22 in the direction extending radially from the center of the second main surface 2 (radial direction) is 3 mm.

[0038] As shown in FIG. 3, the second central region 21 is divided into a plurality of second square regions 62. The length of one side of each of the plurality of second square regions 62 is 250 μm. The first side of each of the plurality of second square regions 62 is parallel to the first direction 101. The second side of each of the plurality of second square regions 62 is parallel to the second direction 102. The first side is continuous with the second side. The first side is perpendicular to the second side. As shown in FIG. 3, the plurality of second square regions 62 are arranged in a lattice shape along the first direction 101 and the second direction 102. The plurality of second square regions 62 may be arranged in the second central region 21 so that the number of the plurality of second square regions 62 is maximized.

[0039] Next, the arithmetic mean height defined as Sa will be described.

[0040] The arithmetic mean height defined as Sa can be measured, for example, by a white light interference microscope. For example, Nikon's BW-D507 can be used as the white light interference microscope. The magnification of the objective lens is, for example, 20 times. Sa is a parameter obtained by extending the two-dimensional arithmetic mean roughness Ra to three dimensions. Sa is a three-dimensional surface texture parameter defined in the international standard ISO25178.

[0041] The average value of Sa in the multiple first square regions 61 is defined as a first arithmetic mean height. According to the silicon carbide substrate 100 according to the present embodiment, the first arithmetic mean height is equal to or less than 0.1 nm. The first arithmetic mean height may be, for example, equal to or less than 0.095 nm, or equal to or less than 0.09 nm. The first arithmetic mean height may be, for example, equal to or more than 0.05 nm, or equal to or more than 0.07 nm.

[0042] The average value of Sa in the multiple second square regions 62 is the second arithmetic mean height. According to the silicon carbide substrate 100 according to the present embodiment, the first arithmetic mean height may be smaller than the second arithmetic mean height. The value obtained by subtracting the first arithmetic mean height from the second arithmetic mean height may be 0.01 nm or more, or may be 0.02 nm or more.

[0043] According to silicon carbide substrate 100 according to the present embodiment, the second arithmetic mean height may be greater than 0.1 nm and less than 0.2 nm. The second arithmetic mean height may be, for example, greater than 0.11 nm and less than 0.19 nm, or greater than 0.12 nm and less than 0.18 nm.

[0044] Next, the structure of the polishing marks will be described. Fig. 4 is a schematic plan view showing the structure of the polishing marks. Fig. 5 is a schematic cross-sectional view taken along line VV in Fig. 4.

[0045] 4 and 5, polishing marks 36 may be formed on first main surface 1. Polishing marks 36 are scratches formed during mechanical polishing. Polishing marks 36 are formed, for example, by abrading a part of the surface of silicon carbide substrate 100 with abrasive grains 312.

[0046] As shown in Fig. 4, the polishing marks 36 are formed in a linear shape. When viewed along a straight line perpendicular to the first main surface 1, the polishing marks 36 extend in a certain direction (fourth direction 104) (see Fig. 5). When viewed along a straight line perpendicular to the first main surface 1, the length of a line segment connecting both ends of the polishing marks 36 is defined as the maximum length L of the polishing marks 36. When viewed along a straight line perpendicular to the first main surface 1, the maximum value of the width of the polishing marks 36 along a direction perpendicular to the line segment connecting both ends of the polishing marks 36 is defined as the maximum width W3 of the polishing marks 36.

[0047] 5, the polishing marks 36 are recesses. The maximum value of the depth of the polishing marks 36 in the third direction 103 is set to a maximum depth D of the polishing marks 36. The fourth direction 104 is perpendicular to the third direction 103. The fourth direction 104 may be inclined with respect to the first direction 101 or may be parallel to the first direction 101. The fourth direction 104 may be inclined with respect to the second direction 102 or may be parallel to the second direction 102.

[0048] In the first central region 11, the first polishing marks 35 are not formed. The maximum length of the first polishing marks 35 is 1 mm or more, the maximum width of the first polishing marks 35 is 1 μm or more, and the maximum depth of the first polishing marks 35 is 1 nm or more. From another perspective, the first polishing marks 35 are relatively large polishing marks. In the first central region 11, large polishing marks are not formed.

[0049] Second polishing marks 36 may be formed in the first central region 11. The maximum length of the second polishing marks 36 may be less than 1 mm, the maximum width of the second polishing marks 36 may be less than 1 μm, and the maximum depth of the second polishing marks 36 may be 1 nm or more. From another perspective, the second polishing marks 36 are relatively small polishing marks. Small polishing marks may be formed in the first central region 11.

[0050] Polishing marks other than the first polishing marks 35 and the second polishing marks 36 are called third polishing marks. The third polishing marks are polishing marks of a medium size. In the first central region 11, the third polishing marks may or may not be formed.

[0051] In the second central region 21, first polishing marks 35 may or may not be formed. In the second central region 21, second polishing marks 36 may or may not be formed. In the second central region 21, third polishing marks may or may not be formed. <Silicon carbide epitaxial substrate>

[0052] Next, the configuration of the silicon carbide epitaxial substrate according to this embodiment will be described.

[0053] Fig. 6 is a plan view schematic diagram showing the configuration of the silicon carbide epitaxial substrate according to this embodiment. Fig. 7 is a cross-sectional schematic diagram taken along line VII-VII in Fig. 6. As shown in Figs. 6 and 7, the silicon carbide epitaxial substrate 200 according to this embodiment has a silicon carbide substrate 100 and a silicon carbide epitaxial layer 20. The silicon carbide epitaxial layer 20 is provided on a first main surface 1 of the silicon carbide substrate 100. The silicon carbide epitaxial layer 20 is in contact with the first main surface 1.

[0054] Silicon carbide epitaxial layer 20 has a third main surface 3. Third main surface 3 is located on the opposite side to the surface facing first main surface 1. Third main surface 3 constitutes the front surface of silicon carbide epitaxial substrate 200. Second main surface 2 constitutes the back surface of silicon carbide epitaxial substrate 200. As shown in FIG. 7 , first main surface 1 is located between third main surface 3 and second main surface 2 in third direction 103. 6, when viewed along a straight line perpendicular to third main surface 3, third main surface 3 extends along each of first direction 101 and second direction 102. Silicon carbide epitaxial layer 20 has an outer circumferential edge (second outer circumferential edge 19) which has, for example, second orientation flat 17 and second arc-shaped portion 18. 6, the second orientation flat 17 is linear when viewed along a straight line perpendicular to the third principal surface 3. The second orientation flat 17 extends along the first direction 101. The second arc-shaped portion 18 is continuous with the second orientation flat 17. The second arc-shaped portion 18 is arc-shaped when viewed along a straight line perpendicular to the third principal surface 3.

[0055] The third main surface 3 is composed of a third outer peripheral region 32 and a third central region 31. The third outer peripheral region 32 is a region within 3 mm from the outer peripheral edge (second outer peripheral edge 19) of the silicon carbide epitaxial layer 20. The third central region 31 is surrounded by the third outer peripheral region 32. The third central region 31 is continuous with the third outer peripheral region 32.

[0056] If the distance from the boundary between the third outer peripheral region 32 and the third central region 31 to the outer peripheral edge (second outer peripheral edge 19) is defined as a second width W2 when viewed along a straight line perpendicular to the third main surface 3, the second width W2 is 3 mm. From another perspective, the width (second width W2) of the third outer peripheral region 32 in the direction extending radially from the center of the third main surface 3 (radial direction) is 3 mm.

[0057] As shown in FIG. 6, the third central region 31 is divided into a plurality of third square regions 63. The length of one side of each of the plurality of third square regions 63 is 250 μm. The first side of each of the plurality of third square regions 63 is parallel to the first direction 101. The second side of each of the plurality of third square regions 63 is parallel to the second direction 102. The first side is continuous with the second side. The first side is perpendicular to the second side. As shown in FIG. 6, the plurality of third square regions 63 are arranged in a lattice shape along the first direction 101 and the second direction 102. The plurality of third square regions 63 may be arranged in the third central region 31 so that the number of the plurality of third square regions 63 is maximized.

[0058] The average value of Sa in the multiple third square regions 63 is the third arithmetic mean height. The third arithmetic mean height is, for example, 0.15 nm or less. The third arithmetic mean height may be, for example, 0.14 nm or less, or 0.13 nm or less. The third arithmetic mean height may be, for example, 0.11 nm or more, or 0.12 nm or more. The third arithmetic mean height may be greater than the first arithmetic mean height. The third arithmetic mean height may be greater than the second arithmetic mean height.

[0059] The third main surface 3 may not have any bouncing. The bouncing is a streak-like protrusion. The height of the bouncing is 1 nm or less. The width of the bouncing is 1 μm or less. The bouncing extends in a direction perpendicular to the direction in which the orientation flat extends. In other words, the bouncing extends in the second direction 102 when viewed along a straight line perpendicular to the third main surface 3. The width of the bouncing is the length of the bouncing in the first direction 101.

[0060] <Method for manufacturing silicon carbide substrate>

[0061] Next, a method for manufacturing the silicon carbide substrate 100 according to this embodiment will be described. Fig. 8 is a flow diagram showing an overview of the method for manufacturing the silicon carbide substrate 100 according to this embodiment. As shown in Fig. 8, the method for manufacturing the silicon carbide substrate 100 according to this embodiment mainly includes a step (S10) of growing a silicon carbide single crystal, a step (S20) of forming the silicon carbide substrate 100, a step (S30) of mechanically polishing the silicon carbide substrate 100, and a step (S40) of chemically mechanically polishing the silicon carbide substrate 100.

[0062] First, a step (S10) of growing a silicon carbide single crystal is performed. Specifically, a silicon carbide single crystal is formed by sublimation. Next, a step (S20) of forming a silicon carbide substrate 100 is performed. Specifically, the silicon carbide single crystal is cut into a plurality of silicon carbide substrates 100 by a saw wire.

[0063] Next, a step (S30) of mechanically polishing the silicon carbide substrate 100 is performed. Specifically, the silicon carbide substrate 100 is placed between a first platen (not shown) and a second platen (not shown). Next, a slurry is introduced between the silicon carbide substrate 100 and the first platen and between the silicon carbide substrate 100 and the second platen. The slurry contains, for example, diamond abrasive grains and water. The diameter of the diamond abrasive grains is, for example, not less than 1 μm and not more than 3 μm. In this manner, mechanical polishing is performed on each of the first main surface 1 and the second main surface 2 of the silicon carbide substrate 100.

[0064] Next, a step (S40) of chemically mechanically polishing silicon carbide substrate 100 is performed. Fig. 9 is a schematic diagram showing the step of chemically mechanically polishing silicon carbide substrate 100. As shown in Fig. 9, chemical mechanical polishing apparatus 300 has polishing cloth 301, polishing head 302, vacuum pump 304, and pressure unit 305. Polishing cloth 301 is, for example, a nonwoven fabric-based polishing cloth (KV) manufactured by Poval Kogyo. Pressurizing unit 305 is, for example, an air cylinder.

[0065] 9, in the step (S40) of chemically mechanically polishing silicon carbide substrate 100, first main surface 1 of silicon carbide substrate 100 is subjected to chemical mechanical polishing using polishing liquid 310. Polishing liquid 310 contains abrasive grains 312 and oxidizing agent 311. Abrasive grains 312 are alumina (aluminum oxide). Oxidizing agent 311 does not contain permanganate. Oxidizing agent 311 contains, for example, a nitrate. The nitrate is, for example, aluminum nitrate, magnesium nitrate, or the like.

[0066] The first main surface 1 is a (000-1) plane or a plane inclined at an off angle of 8° or less with respect to the (000-1) plane. When the first main surface 1 is inclined with respect to the (000-1) plane, the inclination angle (off angle θ) with respect to the (000-1) plane may be, for example, 1° or more, or 2° or more. When the first main surface 1 is inclined with respect to the (000-1) plane, the inclination direction (off direction) of the first main surface 1 is, for example, the <11-20> direction. The off direction is not particularly limited. The off angle θ may be, for example, 7° or less, or 6° or less.

[0067] The oxidation-reduction potential of the polishing liquid 310 is 1000 V or more. The oxidation-reduction potential may be, for example, 1050 V or more, or 1100 V or more. The oxidation-reduction potential may be 1200 V or less, or 1150 V or less.

[0068] The average particle size of the alumina abrasive grains 312 is less than 0.2 μm. The average particle size of the alumina abrasive grains 312 may be, for example, 0.18 μm or less, or 0.16 μm or less. The average particle size of the alumina abrasive grains 312 may be, for example, 0.1 μm or more, or 0.12 μm or more. The average particle size of the alumina abrasive grains 312 is determined as a median diameter (D50) using, for example, a laser diffraction particle size distribution meter.

[0069] The weight concentration of the alumina abrasive grains 312 in the polishing liquid 310 is 0.6% or more and 1.2% or less. The weight concentration of the alumina abrasive grains 312 in the polishing liquid 310 may be, for example, 0.7% or more, or 0.8% or more. The weight concentration of the alumina abrasive grains 312 in the polishing liquid 310 may be, for example, 1.1% or less, or 1.0% or less.

[0070] First main surface 1 of silicon carbide substrate 100 is disposed so as to face polishing cloth 301. A polishing liquid 310 containing abrasive grains 312 is supplied between silicon carbide substrate 100 and polishing cloth 301. The rotation speed of polishing head 302 is, for example, 80 rpm. The rotation speed of a surface plate on which polishing cloth 301 is provided is, for example, 80 rpm. The average processing surface pressure F is, for example, 300 g / cm. 2 The flow rate of the polishing liquid 310 is, for example, 2.0 liters per minute. The processing time is, for example, 2 hours.

[0071] In this manner, chemical mechanical polishing is performed on first main surface 1 of silicon carbide substrate 100. Similarly, chemical mechanical polishing may be performed on second main surface 2 of silicon carbide substrate 100. First main surface 1 and second main surface 2 may be chemically mechanically polished simultaneously or separately. In this manner, silicon carbide substrate 100 ( FIG. 1 ) according to this embodiment is obtained.

[0072] <Method for manufacturing silicon carbide semiconductor device>

[0073] Next, a method for manufacturing the silicon carbide semiconductor device 400 according to this embodiment will be described. Fig. 10 is a flow diagram that outlines the method for manufacturing the silicon carbide semiconductor device 400 according to this embodiment. As shown in Fig. 10, the method for manufacturing the silicon carbide semiconductor device 400 according to this embodiment mainly includes a step (S5) of preparing a silicon carbide epitaxial substrate 200, a step (S3) of processing the silicon carbide epitaxial layer 20, and a step (S4) of forming an electrode on the silicon carbide epitaxial layer 20.

[0074] First, a step (S5) of preparing a silicon carbide epitaxial substrate 200 is performed. The step (S5) of preparing a silicon carbide epitaxial substrate 200 includes a step (S1) of preparing a silicon carbide substrate 100, and a step (S2) of forming a silicon carbide epitaxial layer 20 on the silicon carbide substrate 100. In the step (S1) of preparing a silicon carbide substrate 100, the silicon carbide substrate 100 according to this embodiment is prepared (see FIG. 1).

[0075] Next, a step (S2) of forming silicon carbide epitaxial layer 20 on silicon carbide substrate 100 is performed. Specifically, silicon carbide epitaxial layer 20 is formed by epitaxial growth on first main surface 1 of silicon carbide substrate 100. In the epitaxial growth, for example, silane (SiH4) and propane (C3H8) are used as source gases, and hydrogen (H2) is used as a carrier gas. The temperature of the epitaxial growth is, for example, about 1400°C or higher and 1700°C or lower. In the epitaxial growth, an n-type impurity such as nitrogen is introduced into silicon carbide epitaxial layer 20. In this manner, silicon carbide epitaxial substrate 200 according to this embodiment is prepared.

[0076] Fig. 11 is a cross-sectional schematic diagram showing a configuration of a silicon carbide epitaxial substrate 200 according to this embodiment. As shown in Fig. 11, the silicon carbide epitaxial substrate 200 according to this embodiment has a silicon carbide substrate 100 and a silicon carbide epitaxial layer 20. The silicon carbide epitaxial layer 20 is provided on the silicon carbide substrate 100.

[0077] Silicon carbide epitaxial layer 20 may have a buffer layer 41, a drift layer 42, and a third main surface 3. Buffer layer 41 is in contact with first main surface 1 of silicon carbide substrate 100. Drift layer 42 is provided on buffer layer 41. The nitrogen concentration contained in drift layer 42 may be lower than the nitrogen concentration contained in buffer layer 41. Third main surface 3 is formed of drift layer 42.

[0078] Next, a step (S3) is performed of processing silicon carbide epitaxial layer 20. Specifically, the following processing is performed on silicon carbide epitaxial layer 20. First, ions are implanted into silicon carbide epitaxial layer 20.

[0079] 12 is a cross-sectional schematic diagram showing a step of forming a body region. In the step of forming a body region, p-type impurities such as aluminum are ion-implanted into third main surface 3 of silicon carbide epitaxial layer 20. This forms body region 113 having p-type conductivity. Portions where body region 113 is not formed become drift layer 42 and buffer layer 41. Body region 113 has a thickness of, for example, 0.9 μm. Silicon carbide epitaxial layer 20 includes buffer layer 41, drift layer 42, and body region 113.

[0080] Next, a step of forming a source region is performed. Fig. 13 is a schematic cross-sectional view showing the step of forming a source region. Specifically, n-type impurities such as phosphorus are ion-implanted into the body region 113. This forms a source region 114 having an n-type conductivity. The thickness of the source region 114 is, for example, 0.4 µm. The concentration of the n-type impurity contained in the source region 114 is higher than the concentration of the p-type impurity contained in the body region 113.

[0081] Next, a p-type impurity such as aluminum is ion-implanted into the source region 114 to form a contact region 118. The contact region 118 is formed so as to penetrate the source region 114 and the body region 113 and to be in contact with the drift layer 42. The concentration of the p-type impurity contained in the contact region 118 is higher than the concentration of the n-type impurity contained in the source region 114.

[0082] Next, activation annealing is performed to activate the implanted impurities. The temperature of the activation annealing is, for example, 1500° C. to 1900° C. The activation annealing time is, for example, about 30 minutes. The atmosphere of the activation annealing is, for example, an argon atmosphere.

[0083] Next, a step of forming a trench in the third main surface 3 of the silicon carbide epitaxial layer 20 is performed. FIG. 14 is a cross-sectional schematic diagram showing a step of forming a trench in the third main surface 3 of the silicon carbide epitaxial layer 20. A mask 117 having an opening is formed on the third main surface 3 including the source region 114 and the contact region 118. The source region 114, the body region 113, and a part of the drift layer 42 are removed by etching using the mask 117. For example, inductively coupled plasma reactive ion etching can be used as the etching method. Specifically, for example, inductively coupled plasma reactive ion etching using SF6 or a mixed gas of SF6 and O2 as a reactive gas is used. A recess is formed in the third main surface 3 by etching.

[0084] Next, thermal etching is performed in the recess. The thermal etching can be performed, for example, by heating in an atmosphere containing a reactive gas having at least one or more types of halogen atoms, with the mask 117 formed on the third main surface 3. The at least one or more types of halogen atoms include at least one of chlorine (Cl) atoms and fluorine (F) atoms. The atmosphere includes, for example, Cl2, BCl3, SF6, or CF4. For example, a mixed gas of chlorine gas and oxygen gas is used as the reactive gas, and the thermal etching is performed at a heat treatment temperature of, for example, 700°C or more and 1000°C or less. Note that the reactive gas may contain a carrier gas in addition to the above-mentioned chlorine gas and oxygen gas. For example, nitrogen gas, argon gas, or helium gas can be used as the carrier gas.

[0085] 14, a trench 56 is formed in the third main surface 3 by thermal etching. The trench 56 is defined by a sidewall surface 53 and a bottom wall surface 54. The sidewall surface 53 is composed of the source region 114, the body region 113, and the drift layer 42. The bottom wall surface 54 is composed of the drift layer 42. Next, the mask 117 is removed from the third main surface 3.

[0086] Next, a step of forming a gate insulating film is performed. Fig. 15 is a cross-sectional schematic diagram showing the step of forming a gate insulating film. Specifically, silicon carbide epitaxial substrate 200 having trench 56 formed in third main surface 3 is heated in an atmosphere containing oxygen at a temperature of, for example, 1300°C or more and 1400°C or less. As a result, gate insulating film 115 is formed which is in contact with drift layer 42 at bottom wall surface 54, in contact with drift layer 42, body region 113, and source region 114 at side wall surface 53, and in contact with source region 114 and contact region 118 at third main surface 3.

[0087] Next, a step of forming a gate electrode is performed. Fig. 16 is a schematic cross-sectional view showing a step of forming a gate electrode and an interlayer insulating film. Gate electrode 127 is formed in trench 56 so as to contact gate insulating film 115. Gate electrode 127 is disposed in trench 56 and formed on gate insulating film 115 so as to face each of sidewall surface 53 and bottom wall surface 54 of trench 56. Gate electrode 127 is formed, for example, by LPCVD (Low Pressure Chemical Vapor Deposition).

[0088] Next, the interlayer insulating film 126 is formed. The interlayer insulating film 126 is formed so as to cover the gate electrode 127 and to be in contact with the gate insulating film 115. The interlayer insulating film 126 is formed, for example, by chemical vapor deposition. The interlayer insulating film 126 is made of a material containing, for example, silicon dioxide. Next, the interlayer insulating film 126 and the gate insulating film 115 are partly etched so as to form openings on the source region 114 and the contact region 118. As a result, the contact region 118 and the source region 114 are exposed from the gate insulating film 115.

[0089] Next, a step of forming a source electrode is performed. The source electrode 116 is formed so as to contact each of the source region 114 and the contact region 118. The source electrode 116 is formed by, for example, a sputtering method. The source electrode 116 is made of, for example, a material including Ti (titanium), Al (aluminum) and Si (silicon).

[0090] Next, alloying annealing is performed. Specifically, the source electrode 116 in contact with each of the source region 114 and the contact region 118 is held at a temperature of, for example, 900° C. or more and 1100° C. or less for about 5 minutes. As a result, at least a portion of the source electrode 116 is silicided. As a result, the source electrode 116 in ohmic junction with the source region 114 is formed. The source electrode 116 may be in ohmic junction with the contact region 118.

[0091] Next, the source wiring 119 is formed. The source wiring 119 is electrically connected to the source electrode 116. The source wiring 119 is formed so as to cover the source electrode 116 and the interlayer insulating film 126.

[0092] Next, a step of forming a drain electrode is performed. First, the silicon carbide substrate 100 is polished at the second main surface 2. This reduces the thickness of the silicon carbide substrate 100. Next, the drain electrode 123 is formed. The drain electrode 123 is formed so as to be in contact with the second main surface 2. In this manner, the silicon carbide semiconductor device 400 according to this embodiment is manufactured.

[0093] 17 is a cross-sectional schematic diagram showing the configuration of a silicon carbide semiconductor device according to this embodiment. The silicon carbide semiconductor device 400 is, for example, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The silicon carbide semiconductor device 400 mainly includes a silicon carbide epitaxial substrate 200, a gate electrode 127, a gate insulating film 115, a source electrode 116, a drain electrode 123, a source wiring 119, and an interlayer insulating film 126. The silicon carbide epitaxial substrate 200 includes a buffer layer 41, a drift layer 42, a body region 113, a source region 114, and a contact region 118. The silicon carbide semiconductor device 400 may be, for example, an IGBT (Insulated Gate Bipolar Transistor) or the like.

[0094] Next, the effects of this embodiment will be described.

[0095] Carbon surfaces have a higher chemical reactivity than silicon surfaces, which means that the polishing rate of the carbon surface is higher than that of the silicon surface during chemical mechanical polishing, and the polished surface tends to become rougher.

[0096] Furthermore, colloidal silica may be used as the abrasive grains 312 when chemically mechanically polishing the silicon carbide substrate 100. However, colloidal silica is a relatively soft abrasive grain, and therefore the polishing rate cannot be increased. On the other hand, alumina is harder than colloidal silica. Therefore, although the polishing rate can be increased, the roughness of the polished surface tends to increase.

[0097] The inventors have conducted extensive research into ways to improve the polishing rate of the carbon surface while suppressing an increase in the roughness of the carbon surface, and have arrived at the following findings.

[0098] First, the inventors focused on the weight concentration of the alumina abrasive grains 312 in the polishing liquid 310. Basically, the polishing rate increases as the weight concentration of the alumina abrasive grains 312 in the polishing liquid 310 increases. However, when the weight concentration of the alumina abrasive grains 312 in the polishing liquid 310 is greater than 1.2%, large polishing marks are likely to occur, and the carbon surface becomes rough. On the other hand, when the weight concentration of the alumina abrasive grains 312 in the polishing liquid 310 is less than 0.6%, the physical polishing action becomes too weak, and the carbon surface becomes rough.

[0099] According to the method for manufacturing silicon carbide substrate 100 according to the present disclosure, the weight concentration of alumina abrasive grains 312 in polishing liquid 310 is not less than 0.6% and not more than 1.2%. This makes it possible to increase the polishing rate while suppressing an increase in roughness of the carbon surface in the step of chemically and mechanically polishing silicon carbide substrate 100.

[0100] Secondly, the inventors focused on the average particle size of the alumina abrasive grains 312. Basically, the larger the average particle size of the alumina abrasive grains 312, the higher the polishing rate. However, if the average particle size of the alumina abrasive grains 312 is excessively large, processing damage is formed on the polished surface in the step of chemically and mechanically polishing the silicon carbide substrate 100. In this case, when the silicon carbide epitaxial layer 20 is formed on the silicon carbide substrate 100, the haze on the surface of the silicon carbide epitaxial layer 20 becomes large.

[0101] According to the method for manufacturing silicon carbide substrate 100 according to the present disclosure, the average grain size of alumina abrasive grains 312 is less than 0.2 mm. This makes it possible to increase the polishing rate while suppressing an increase in haze on the surface of silicon carbide epitaxial layer 20 when forming silicon carbide epitaxial layer 20 on silicon carbide substrate 100.

[0102] Thirdly, the inventors focused on the oxidation-reduction potential of oxidizing agent 311 and polishing liquid 310. By using oxidizing agent 311 that does not contain permanganate and setting the oxidation-reduction potential of polishing liquid 310 to 1000 V or more, it is possible to increase the polishing rate while suppressing an increase in roughness of the carbon surface.

[0103] The method for manufacturing a silicon carbide substrate 100 according to the present disclosure includes a step of chemically mechanically polishing a first main surface 1 of a silicon carbide substrate 100 using a polishing liquid 310. The polishing liquid 310 contains alumina abrasive grains 312 and an oxidizing agent 311. The first main surface 1 is a (000-1) plane or a plane inclined at an off angle of 8° or less with respect to the (000-1) plane. The oxidation-reduction potential of the polishing liquid 310 is 1000 V or more. The average particle size of the alumina abrasive grains 312 is less than 0.2 mm. The weight concentration of the alumina abrasive grains 312 in the polishing liquid 310 is 0.6% or more and 1.2% or less. The oxidizing agent 311 does not contain permanganate.

[0104] According to the method for manufacturing silicon carbide substrate 100 according to the present disclosure, the oxidation-reduction potential may be equal to or less than 1200 V. This makes it possible to suppress an increase in roughness of the carbon surface caused by an excessively high polishing rate.

[0105] According to the method for manufacturing silicon carbide substrate 100 according to the present disclosure, the average grain size may be equal to or greater than 0.1 mm, which makes it possible to maintain a high polishing rate.

[0106] According to the method for manufacturing silicon carbide substrate 100 according to the present disclosure, oxidizing agent 311 may contain nitrate. Nitrate has a smaller effect on the polishing cloth than permanganate. Therefore, by using oxidizing agent 311 containing nitrate, the range of options for the polishing cloth can be expanded. As a result, a polishing cloth that can easily smooth the surface can be used.

[0107] According to silicon carbide substrate 100 according to the present disclosure, the first arithmetic mean height is equal to or less than 0.1 nm. First polishing marks 35 are not formed in first central region 11. Therefore, when a silicon carbide semiconductor device is manufactured using silicon carbide substrate 100, it is possible to suppress the occurrence of electric field concentration in first central region 11. As a result, it is possible to improve the yield of silicon carbide semiconductor devices.

[0108] Example 1

[0109] Silicon carbide substrates 100 according to samples 1-1 to 1-8 were manufactured using the method for manufacturing a silicon carbide substrate 100 according to this embodiment. Specifically, chemical mechanical polishing was performed on first main surface 1 of silicon carbide substrate 100 using polishing liquid 310. Polishing liquid 310 contains abrasive grains 312 and an oxidizing agent 311. Abrasive grains 312 are alumina. Oxidizing agent 311 contains nitrate.

[0110] The oxidation-reduction potential of the polishing liquid 310 was set to 1000 V or more. The average particle size of the alumina abrasive grains 312 was set to 0.18 μm. The first main surface 1 was a surface inclined at an off angle of 4° with respect to the (000-1) plane.

[0111] In the step (S40) of chemically mechanically polishing the silicon carbide substrate 100 according to Samples 1-1 to 1-8, different weight concentrations of alumina abrasive grains 312 were used. Specifically, the weight concentrations of alumina abrasive grains 312 relative to polishing liquid 310 in the step (S40) of chemically mechanically polishing the silicon carbide substrate 100 according to Samples 1-1 to 1-8 were 0.4%, 0.6%, 0.8%, 1.0%, 1.2%, 1.4%, 1.6%, and 2.0%, respectively.

[0112] Fig. 18 is a diagram showing the relationship between the polishing rate of silicon carbide substrate 100 and the weight concentration of alumina abrasive grains 312. As shown in Fig. 18, when the weight concentration of alumina abrasive grains 312 was less than 0.6%, the polishing rate of silicon carbide substrate 100 dropped rapidly. On the other hand, when the weight concentration of alumina abrasive grains 312 was in the range of 0.6% or more and 2.0% or less, the polishing rate of silicon carbide substrate 100 did not change significantly.

[0113] 19 is a diagram showing the relationship between the incidence of first polishing marks 35 on the first main surface 1 of silicon carbide substrate 100 and the weight concentration of alumina abrasive grains 312. The incidence of first polishing marks 35 is the ratio of the number of measurement areas where first polishing marks 35 have occurred to the number of all measurement areas on first main surface 1. The area of ​​the measurement areas for first polishing marks 35 was 250 μm × 250 μm.

[0114] 19, when the weight concentration of the alumina abrasive grains 312 was greater than 1.2%, the incidence of the first polishing marks 35 increased rapidly. On the other hand, when the weight concentration of the alumina abrasive grains 312 was in the range of 0.4% or more and 1.2% or less, the incidence of the first polishing marks 35 was 0%.

[0115] Fig. 20 is a diagram showing the relationship between Sa (arithmetic mean height) and the weight concentration of alumina abrasive grains 312 on first main surface 1 of silicon carbide substrate 100. As shown in Fig. 20, when the weight concentration of alumina abrasive grains 312 was greater than 1.2% and less than 0.6%, Sa increased rapidly. On the other hand, when the weight concentration of alumina abrasive grains 312 was in the range of 0.6% or more and 1.2% or less, Sa maintained a low value.

[0116] Example 2

[0117] For silicon carbide substrate 100 according to Samples 4-1 to 4-3, first main surface 1 of silicon carbide substrate 100 was subjected to chemical mechanical polishing using polishing liquid 310. Polishing liquid 310 contains abrasive grains 312 and an oxidizing agent 311. First main surface 1 was a surface inclined at an off angle of 4° with respect to the (000-1) plane. Table 1 shows the chemical mechanical polishing of silicon carbide substrate 100 according to Samples 4-1 to 4-3. [Table 1]

[0118] In the step (S40) of chemically and mechanically polishing silicon carbide substrate 100 in accordance with sample 4-1, abrasive grains 312 were colloidal silica. The average particle size of abrasive grains 312 was 0.01 μm. The concentration of abrasive grains 312 was 20% by weight. Oxidizing agent 311 containing nitrate was used.

[0119] In the step (S40) of chemically mechanically polishing silicon carbide substrate 100 according to sample 4-2, alumina was used as abrasive grains 312. The average grain size of abrasive grains 312 was 0.25 μm. The concentration of abrasive grains 312 was 1 wt %. Oxidizing agent 311 containing nitrate was used.

[0120] In the step (S40) of chemically mechanically polishing silicon carbide substrate 100 in accordance with sample 4-3, alumina was used as abrasive grains 312. The average particle size of abrasive grains 312 was 0.18 μm. The concentration of abrasive grains 312 was 1 wt %. Oxidizing agent 311 containing nitrate was used.

[0121] Table 2 shows the polishing rates of silicon carbide substrates 100 according to samples 4-1 to 4-3, Sa on first main surface 1, the presence or absence of first polishing creases 35 on first main surface 1, and the presence or absence of second polishing creases 36 on first main surface 1. [Table 2]

[0122] As shown in Table 2, the polishing rates of the silicon carbide substrates 100 according to Samples 4-2 and 4-3 were higher than that of the silicon carbide substrate 100 according to Sample 4-1. The values ​​of Sa on the first main surface 1 were approximately the same in the silicon carbide substrates 100 according to Samples 4-2 and 4-3. The silicon carbide substrates 100 according to Samples 4-1 and 4-2 had first polishing marks 35 on the first main surface 1. On the other hand, the silicon carbide substrate 100 according to Sample 4-3 did not have first polishing marks 35 on the first main surface 1. Each of the silicon carbide substrates 100 according to Samples 4-1 to 4-3 had second polishing marks 36 on the first main surface 1.

[0123] From the above results, in the silicon carbide substrate 100 according to sample 4-3, it was possible to maintain Sa low and increase the polishing rate of the silicon carbide substrate 100 without generating first polishing marks 35.

[0124] Next, a silicon carbide epitaxial layer 20 was formed on the first main surface 1 of each of the silicon carbide substrates 100 according to samples 4-1 to 4-3. The haze of the third main surface 3 of the silicon carbide epitaxial layer 20 was measured. Haze is an index representing the degree of surface roughness. As the surface roughness decreases, the haze value decreases. A completely flat surface has a haze of 0. The unit of haze is dimensionless.

[0125] The haze was measured using a WASAVI series "SiCA 6X" manufactured by Lasertec Corporation. Specifically, light with a wavelength of 546 nm was irradiated onto the third main surface 3 of the silicon carbide epitaxial substrate from a light source such as a mercury xenon lamp, and the reflected light of the light was observed by a light receiving element. The difference between the brightness of a pixel in the observed image and the brightness of the pixels surrounding the pixel was quantified.

[0126] Specifically, the maximum haze value was derived for a rectangular region obtained by dividing one observation field of view, which was 1.8 mm square, into 64 parts. One observation field of view was an imaging region of 1024 × 1024 pixels. The maximum haze value was derived as the absolute value of the edge strength in the horizontal and vertical directions of the observation field of view calculated using a Sobel filter. By the above procedure, the maximum haze value of each observation field of view was observed on the third principal surface 3. The average value of the maximum haze values ​​of each observation field of view was determined as the haze value on the third principal surface 3.

[0127] Table 3 shows the haze values ​​on third main surface 3 of silicon carbide epitaxial layer 20 formed on the silicon carbide substrate according to samples 4-1 to 4-3. [Table 3]

[0128] As shown in Table 3, the haze on the third main surface 3 of silicon carbide epitaxial layer 20 formed on the silicon carbide substrate according to Sample 4-3 was smaller than the haze on the third main surface 3 of silicon carbide epitaxial layer 20 formed on the silicon carbide substrate according to Sample 4-2. From the above results, it was possible to reduce the haze on the third main surface 3 of silicon carbide epitaxial layer 20 formed on the silicon carbide substrate 100 according to Sample 4-3.

[0129] The present disclosure includes the following embodiments. (Appendix 1) A first main surface; a second major surface opposite the first major surface; and a silicon carbide substrate comprising: the first main surface is a (000-1) plane or a plane inclined at an off-angle of 8° or less with respect to the (000-1) plane, the polytype of silicon carbide constituting the silicon carbide substrate is 4H; the first main surface is composed of a first outer peripheral region within 3 mm from the outer peripheral edge, and a first central region surrounded by the first outer peripheral region, The first central region is divided into a plurality of first square regions, each having a side length of 250 μm; When an average value of Sa in the plurality of first square regions is defined as a first arithmetic mean height, the first arithmetic mean height is 0.1 nm or less, In the first central region, a first polishing mark is not formed, A silicon carbide substrate, wherein the first polishing marks have a maximum length of 1 mm or more, a maximum width of 1 μm or more, and a maximum depth of 1 nm or more. (Appendix 2) A second polishing mark is formed in the first central region, 2. The silicon carbide substrate of claim 1, wherein the second polishing marks have a maximum length of less than 1 mm, a maximum width of less than 1 μm, and a maximum depth of 1 nm or more. (Appendix 3) the second main surface is composed of a second outer peripheral region within 3 mm from the outer peripheral edge and a second central region surrounded by the second outer peripheral region, The second central region is divided into a plurality of second square regions each having a side length of 250 μm; 3. The silicon carbide substrate according to claim 1, wherein, when an average value of Sa in the plurality of second square regions is a second arithmetic mean height, the first arithmetic mean height is smaller than the second arithmetic mean height. (Appendix 4) 4. The silicon carbide substrate of claim 3, wherein the second arithmetic mean height is greater than 0.1 nm and smaller than 0.2 nm. (Appendix 5) A first main surface; a second major surface opposite the first major surface; and a silicon carbide substrate comprising: the first main surface is a (000-1) plane or a plane inclined at an off-angle of 8° or less with respect to the (000-1) plane, the polytype of silicon carbide constituting the silicon carbide substrate is 4H; the first main surface is composed of a first outer peripheral region within 3 mm from the outer peripheral edge, and a first central region surrounded by the first outer peripheral region, The first central region is divided into a plurality of first square regions, each having a side length of 250 μm; the second main surface is composed of a second outer peripheral region within 3 mm from the outer peripheral edge and a second central region surrounded by the second outer peripheral region, The second central region is divided into a plurality of second square regions each having a side length of 250 μm; A silicon carbide substrate, wherein an average value of Sa in the plurality of first square regions is a first arithmetic mean height, and an average value of Sa in the plurality of second square regions is a second arithmetic mean height, the first arithmetic mean height being smaller than the second arithmetic mean height. (Appendix 6) 6. The silicon carbide substrate of claim 5, wherein the second arithmetic mean height is greater than 0.1 nm and smaller than 0.2 nm. (Appendix 7) A silicon carbide substrate according to claim 1 or 2; a silicon carbide epitaxial layer provided on the first main surface. (Appendix 8) the silicon carbide epitaxial layer includes a third main surface located opposite to a surface facing the first main surface, the third main surface is composed of a third outer peripheral region within 3 mm from an outer peripheral edge of the silicon carbide epitaxial layer, and a third central region surrounded by the third outer peripheral region, The third central region is divided into a plurality of third square regions, each of which has a side length of 250 μm; When an average value of Sa in the plurality of third square regions is defined as a third arithmetic mean height, the third arithmetic mean height is 0.15 nm or less, 8. The silicon carbide epitaxial substrate according to claim 7, wherein no bouncing is formed on the third main surface. (Appendix 9) preparing a silicon carbide substrate according to claim 1 or 2; forming a silicon carbide epitaxial layer on the first main surface; and forming an electrode on the silicon carbide epitaxial layer. (Appendix 10) The method includes a step of chemically and mechanically polishing a first main surface of a silicon carbide substrate using a polishing liquid; The polishing liquid contains alumina abrasive grains and an oxidizing agent, the first main surface is a (000-1) plane or a plane inclined at an off-angle of 8° or less with respect to the (000-1) plane, The oxidation-reduction potential of the polishing liquid is 1000 V or more; The alumina abrasive grains have an average grain size of less than 0.2 μm; The weight concentration of the alumina abrasive grains in the polishing liquid is 0.6% or more and 1.2% or less, The method for producing a silicon carbide substrate, wherein the oxidizing agent does not contain permanganate. (Appendix 11) 11. The method for producing a silicon carbide substrate according to claim 10, wherein the oxidation-reduction potential is 1200 V or less. (Appendix 12) 12. The method for manufacturing a silicon carbide substrate according to claim 10 or 11, wherein the average grain size is 0.1 μm or more. (Appendix 13) 12. The method for producing a silicon carbide substrate according to claim 10 or 11, wherein the oxidizing agent contains a nitrate.

[0130] The embodiments and examples disclosed herein are illustrative in all respects and should not be considered as limiting. The scope of the present invention is defined by the claims, not the above description, and is intended to include the meaning equivalent to the claims and all modifications within the scope. [Explanation of symbols]

[0131] 1 First main surface 2 Second main surface 3 Third main surface 7 Orientation Flat 8 Arc-shaped section 9 Outer rim 11 1st central area 12 First outer area 17 2nd Orientation Flat 18 Second circular arc 19 Second outer edge 20 Silicon carbide epitaxial layer 21 Second central area 22 Second outer peripheral area 31 Third central area 32 Third outer area 35 1st polishing mark 36 2nd polishing mark (polishing mark) 41 Buffer layer 42 Drift Layer 53 Side wall 54 Bottom wall 56 Trench 61 1st square area 62 Second square area 63 Third square area 100 Silicon carbide substrate 101 1st direction 102 Second direction 103 Third direction 104 4th direction 113 Body Region 114 Source Region 115 Gate insulating film 116 Source electrode (electrode) 117 Mask 118 Contact Area 119 Source wiring 123 Drain electrode 126 Interlayer insulating film 127 Gate electrode 200 Silicon carbide epitaxial substrate 300 Chemical mechanical polishing equipment 301 Polishing cloth 302 Polishing Head 304 Vacuum Pump 305 Pressurizing section 310 Polishing liquid 311 Oxidizing agents 312 Abrasive grain (alumina abrasive grain) 400 Silicon carbide semiconductor device D Maximum depth F Average machining surface pressure L Length W1 Maximum diameter W2 Second width W3 Maximum width

Claims

1. A first major surface; a second major surface opposite the first major surface; and a silicon carbide substrate including: an outer circumferential edge continuous to each of the first main surface and the second main surface; the first main surface is a (000-1) plane or a plane inclined at an off-angle of 8° or less with respect to the (000-1) plane, the polytype of silicon carbide constituting the silicon carbide substrate is 4H; the first main surface is composed of a first outer peripheral region within 3 mm from the outer peripheral edge and a first central region surrounded by the first outer peripheral region, The first central region is divided into a plurality of first square regions, each having a side length of 250 μm, When an average value of Sa in the plurality of first square regions is defined as a first arithmetic mean height, the first arithmetic mean height is 0.1 nm or less, No first polishing marks are formed in the first central region, a silicon carbide substrate, wherein the first polishing marks have a maximum length of 1 mm or more, a maximum width of 1 μm or more, and a maximum depth of 1 nm or more.

2. a second polishing mark is formed in the first central region; 2. The silicon carbide substrate according to claim 1, wherein the second polishing marks have a maximum length of less than 1 mm, a maximum width of less than 1 μm, and a maximum depth of 1 nm or more.

3. the second main surface is composed of a second outer peripheral region within 3 mm from the outer peripheral edge and a second central region surrounded by the second outer peripheral region, The second central region is divided into a plurality of second square regions, each having a side length of 250 μm, 3 . The silicon carbide substrate according to claim 1 , wherein an average value of Sa in said plurality of second square regions is defined as a second arithmetic mean height, and said first arithmetic mean height is smaller than said second arithmetic mean height.

4. The silicon carbide substrate according to claim 3 , wherein said second arithmetic mean height is greater than 0.1 nm and less than 0.2 nm.

5. A first major surface; a second major surface opposite the first major surface; and a silicon carbide substrate including: an outer circumferential edge continuous to each of the first main surface and the second main surface; the first main surface is a (000-1) plane or a plane inclined at an off-angle of 8° or less with respect to the (000-1) plane, the polytype of silicon carbide constituting the silicon carbide substrate is 4H; the first main surface is composed of a first outer peripheral region within 3 mm from the outer peripheral edge and a first central region surrounded by the first outer peripheral region, The first central region is divided into a plurality of first square regions, each having a side length of 250 μm, the second main surface is composed of a second outer peripheral region within 3 mm from the outer peripheral edge and a second central region surrounded by the second outer peripheral region, The second central region is divided into a plurality of second square regions, each having a side length of 250 μm, a silicon carbide substrate, wherein an average value of Sa in the plurality of first square regions is a first arithmetic mean height, and an average value of Sa in the plurality of second square regions is a second arithmetic mean height, and the first arithmetic mean height is smaller than the second arithmetic mean height.

6. The silicon carbide substrate according to claim 5 , wherein said second arithmetic mean height is greater than 0.1 nm and less than 0.2 nm.

7. A silicon carbide substrate according to claim 1 or claim 5; a silicon carbide epitaxial layer provided on the first main surface.

8. the silicon carbide epitaxial layer includes a third main surface located on the opposite side of the surface facing the first main surface, the third main surface is composed of a third outer peripheral region within 3 mm from an outer peripheral edge of the silicon carbide epitaxial layer, and a third central region surrounded by the third outer peripheral region, The third central region is divided into a plurality of third square regions, each having a side length of 250 μm, When an average value of Sa in the plurality of third square regions is defined as a third arithmetic mean height, the third arithmetic mean height is 0.15 nm or less, The silicon carbide epitaxial substrate according to claim 7 , wherein no bounting is formed on said third main surface.

9. A step of preparing the silicon carbide substrate according to claim 1 or claim 5; forming a silicon carbide epitaxial layer on the first main surface; and forming an electrode on the silicon carbide epitaxial layer.

10. chemically and mechanically polishing the first main surface of the silicon carbide substrate using a polishing liquid; The polishing liquid contains alumina abrasive grains and an oxidizing agent, the first main surface is a (000-1) plane or a plane inclined at an off-angle of 8° or less with respect to the (000-1) plane, The oxidation-reduction potential of the polishing liquid is 1000 V or more, The alumina abrasive grains have an average grain size of less than 0.2 μm; a weight concentration of the alumina abrasive grains in the polishing liquid is 0.6% or more and 1.2% or less; The method for producing a silicon carbide substrate, wherein the oxidizing agent does not contain permanganate.

11. The method for manufacturing a silicon carbide substrate according to claim 10 , wherein the oxidation-reduction potential is 1200 V or less.

12. 12. The method for manufacturing a silicon carbide substrate according to claim 10, wherein the average grain size is equal to or greater than 0.1 μm.

13. 12. The method for manufacturing a silicon carbide substrate according to claim 10, wherein the oxidizing agent includes a nitrate.

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