Capacitor component

Abstract

To provide a capacitor component which is excellent in the capacity per unit area.SOLUTION: An embodiment of the present invention provides a capacitor component including: a substrate having a first surface and a second surface facing each other; a first interlayer arranged on the first surface side of the substrate, the first interlayer including the first trench; a first trench capacitor arranged on the first trench; a second interlayer arranged on the second surface side of the substrate, the second interlayer including a second trench; a second trench capacitor arranged on the second trench; and a penetration via penetrating the substrate and connecting the first trench capacitor and the second trench capacitor to each other.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to a capacitor component. [Background technology]

[0002] Recently, portable IT products such as smartphones and wearable devices are becoming thinner. This has led to an increased need to make passive components thinner to reduce the overall package thickness. As a result, active research is being conducted on thin film silicon capacitors, which can achieve a thinner thickness than multilayer ceramic capacitors (MLCCs).

[0003] Such thin film silicon capacitors have a drawback in that they have a lower capacitance relative to the mounting area compared to conventional multilayer ceramic capacitors, and therefore there is a need for research into thin film silicon capacitors that have a higher capacitance relative to the same mounting area. Summary of the Invention [Problem to be solved by the invention]

[0004] One of several objects of the present invention is to provide a capacitor component having excellent capacitance per unit area.

[0005] However, the scope of the present invention is not limited to the above, and can be more easily understood in the course of describing specific embodiments of the present invention. [Means for solving the problem]

[0006] One embodiment of the present invention provides a capacitor component including a substrate having a first surface and a second surface facing each other, a first interlayer disposed on the first surface side of the substrate and including a first trench, a first trench capacitor disposed in the first trench, a second interlayer disposed on the second surface side of the substrate and including a second trench, a second trench capacitor disposed in the second trench, and a through via penetrating the substrate to connect the first trench capacitor and the second trench capacitor. Effect of the Invention

[0007] One of the various advantages of the present invention is that it provides a capacitor component with excellent capacitance per unit area. [Brief description of the drawings]

[0008] [Figure 1] 1 is a plan view illustrating a capacitor component according to an embodiment of the present invention; [Diagram 2] 2 is a cross-sectional view that illustrates a cross section taken along line II' in FIG. 1. [Diagram 3] 3 is a cross-sectional view that illustrates a cross section taken along the line II-II' in FIG. 2. [Figure 4] This is a modified example of FIG. [Diagram 5] This is a modified example of FIG. [Figure 6] FIG. 11 is a plan view illustrating a capacitor component according to another embodiment of the present invention. [Figure 7] 7 is a cross-sectional view that shows a schematic cross section taken along line III-III' in FIG. 6. [Figure 8] 7 is a cross-sectional view that shows a schematic cross section taken along line IV-IV' in FIG. 6. [Figure 9] 2A to 2C are cross-sectional views illustrating main steps of a method for manufacturing a capacitor component according to an embodiment of the present invention. [Figure 10] 2A to 2C are cross-sectional views illustrating main steps of a method for manufacturing a capacitor component according to an embodiment of the present invention. [Figure 11]2A to 2C are cross-sectional views illustrating main steps of a method for manufacturing a capacitor component according to an embodiment of the present invention. [Figure 12] 2A to 2C are cross-sectional views illustrating main steps of a method for manufacturing a capacitor component according to an embodiment of the present invention. [Figure 13] 2A to 2C are cross-sectional views illustrating main steps of a method for manufacturing a capacitor component according to an embodiment of the present invention. [Figure 14] 2A to 2C are cross-sectional views illustrating main steps of a method for manufacturing a capacitor component according to an embodiment of the present invention. [Figure 15] 2A to 2C are cross-sectional views illustrating main steps of a method for manufacturing a capacitor component according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, the embodiments of the present invention will be described with reference to specific embodiments and the accompanying drawings. However, the embodiments of the present invention can be modified into various other forms, and the scope of the present invention is not limited to the embodiments described below. Furthermore, the embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. Therefore, the shapes and sizes of elements in the drawings may be exaggerated for clearer explanation, and elements indicated by the same reference numerals in the drawings are the same elements.

[0010] In addition, in the drawings, parts that are not relevant to the description are omitted in order to clearly explain the present invention, and the size and thickness of each component shown in the drawings are arbitrarily shown for convenience of explanation, so the present invention is not necessarily limited to those shown in the drawings. Components having the same function within the same concept are described using the same reference numerals. Furthermore, throughout the specification, when a part is said to "include" a certain component, this does not mean that other components are excluded, but that the part may further include other components, unless otherwise specified.

[0011] FIG. 1 is a plan view that shows a schematic representation of a capacitor component 100 according to one embodiment of the present invention; FIG. 2 is a cross-sectional view that shows a schematic representation of a cross-section taken along line I-I' in FIG. 1; FIG. 3 is a cross-sectional view that shows a schematic representation of a cross-section taken along line II-II' in FIG. 2; and FIG. 4 is a modified example of FIG. 3.

[0012] 1 and 2, a capacitor component 100 according to one embodiment of the present invention may include a substrate 110, interlayers 121, 122, trench capacitors 140, 160, and through vias 151, 152.

[0013] The substrate 110 may have a first surface 101 and a second surface 102 facing each other in a first direction DR1. The substrate 110 may include a semiconductor material, for example, a group IV semiconductor, a group III-V compound semiconductor, or a group II-IV compound semiconductor. For example, the group IV semiconductor may include silicon, germanium, or silicon-germanium. The substrate 110 may be provided, for example, as a bulk wafer, but the present invention is not limited thereto.

[0014] The first interlayer 121 is disposed on the first surface 101 side of the substrate 110 and may include a first trench TR1. The second interlayer 122 is disposed on the second surface 102 side of the substrate 110 and may include a second trench TR2. The interlayers 121 and 122 may include an insulating material, such as an oxide, a nitride, or a combination thereof. The interlayers 121 and 122 may include, for example, an oxide film of the substrate 110 or a native oxide of the substrate 110.

[0015] The interlayers 121, 122 including oxide and / or nitride may have a higher etching rate and the etching amount may be more accurately controlled than the substrate 110. Thus, by forming the trenches TR1, TR2 in the interlayers 121, 122 through an etching process or the like, it is possible to ensure ease and accuracy of the process compared to forming the trenches TR1, TR2 in the substrate 110.

[0016] The first trench TR1 may extend from one surface of the first interlayer 121 toward the first surface 101 of the substrate 110 based on the first direction. The second trench TR2 may extend from one surface of the second interlayer 122 toward the second surface 102 of the substrate 110 based on the first direction.

[0017] The number and arrangement of the first and second trenches TR1, TR2 do not need to be particularly limited. At least one each of the first and second trenches TR1, TR2 may be arranged, but the first interlayer 121 preferably includes a plurality of first trenches TR1, and the second interlayer 122 preferably includes a plurality of second trenches TR2. The height of the first and second trenches TR1, TR2 in the first direction does not need to be particularly limited, and may be several tens of nm to several tens of μm depending on the size of the capacitor component 100 and the target capacitance.

[0018] Although the cross sections of the first and second trenches TR1, TR2 are shown to have a rectangular shape, the present invention is not limited thereto, and the first and second trenches TR1, TR2 may have various cross sections such as a circular shape, an elliptical shape, a trapezoidal shape, etc. In addition, the first and second trenches TR1, TR2 may have inclined side surfaces such that their widths decrease toward the first surface 101 and the second surface 102 of the substrate 110, respectively, depending on the aspect ratio, and the bottom surfaces of the first and second trenches TR1, TR2 may have a convex curved surface toward the first surface 101 and the second surface 102, respectively, but the present invention is not limited thereto.

[0019] Referring to FIG. 3, the first trenches TR1 may be spaced apart from one another in a second direction DR2 intersecting the first direction DR1, and each of the first trenches TR1 may extend in a third direction DR3 intersecting the first and second directions. However, the present invention is not limited thereto. For example, as shown in FIG. 4, in one embodiment, the first trenches TR1 may be spaced apart from one another in the second direction DR2 and the third direction DR3. In addition, the second trench TR2 may be symmetrical to the first trench TR1 in the first direction DR1, and therefore the above description regarding the shape of the first trench TR1 may be similarly applied to the second trench TR2.

[0020] 2, a first trench capacitor 140 may be disposed in the first trench TR1, and a second trench capacitor 160 may be disposed in the second trench TR2. The shapes of the first and second trench capacitors 140 and 160 are not particularly limited, but for example, the first trench capacitor 140 may include a first dielectric layer 143 and first and second electrodes 141 and 142 sandwiching the first dielectric layer therebetween, and the second trench capacitor 160 may include a second dielectric layer 163 and third and fourth electrodes 161 and 162 sandwiching the second dielectric layer therebetween.

[0021] The first electrode 141 may conformally cover one surface of the first interlayer 121 and the inner walls of the first trenches TR1, and the third electrode 161 may conformally cover one surface of the second interlayer 122 and the inner walls of the second trenches TR2. The first electrode 141 and the second electrode 142 are disposed to face each other with the first dielectric layer 143 interposed therebetween, and the third electrode 161 and the fourth electrode 162 are disposed to face each other with the second dielectric layer 163 interposed therebetween, thereby forming the first and second trench capacitors 140 and 160 having a metal-insulator-metal (MIM) structure. Voltages of different polarities are applied between the first electrode 141 and the second electrode 142, and voltages of different polarities are applied between the third electrode 161 and the fourth electrode 162, thereby forming the capacitances of the first and second trench capacitors 140 and 160.

[0022] The first to fourth electrodes 141, 142, 161, 162 may include, for example, a metal, a metal oxide, a metal nitride, a metal oxynitride, doped polysilicon, and some other suitable conductive material or combinations thereof. The first to fourth electrodes 141, 142, 161, 162 may include, for example, copper (Cu), titanium (Ti), titanium (Ti) nitride, tantalum (Ta), and tantalum (Ta) nitride, but the present invention is not limited thereto.

[0023] The first and second dielectric layers 143 and 163 may include, for example, one or more of silicon oxide, zirconium oxide, hafnium oxide, niobium oxide, titanium oxide, lanthanum oxide, tantalum oxide, lithium oxide, and aluminum oxide, but the present invention is not limited thereto. Also, the first and second dielectric layers 143 and 163 may be formed as a composite layer in which a plurality of metal oxides are stacked in order to improve leakage characteristics, and for example, the first and second dielectric layers 143 and 163 may have a form in which zirconium oxide-aluminum oxide-zirconium oxide are stacked in sequence.

[0024] In one embodiment, the capacitor component 100 may include a first cover layer 131 covering the first trench capacitor 140 and a second cover layer 132 covering the second trench capacitor 160. The first and second cover layers 131, 132 may essentially serve to protect the first and second trench capacitors 140, 160. Referring to FIGS. 2 to 4, an empty space within the first trench TR1 may be filled with the first cover layer 131, and an empty space within the second trench TR2 may be filled with the second cover layer 132.

[0025] The cover layers 131 and 132 may include the same material as the interlayers 121 and 122, but the present invention is not limited thereto, and the first interlayer 121 and the first cover layer 131 may include different materials, and the second interlayer 122 and the second cover layer 132 may include different materials, as necessary. As described below, the first cover layer 131 may be formed integrally with the first dielectric layer 143, and the second cover layer 132 may be formed integrally with the second dielectric layer 163, so that the cover layers 131 and 132 may include a high dielectric constant material having a higher dielectric constant than the interlayers 121 and 122 in order to ensure a high dielectric constant. As an example, the interlayers 121 and 122 may include silicon oxide, and the cover layers 131 and 132 may include hafnium oxide, but the present invention is not limited thereto.

[0026] 2, the through vias 151 and 152 may penetrate the substrate 110 to connect the first trench capacitor 140 and the second trench capacitor 160. More specifically, the through vias 151 and 152 may include a first through via 151 connecting the first electrode 141 and the third electrode 161, and a second through via 152 connecting the second electrode 142 and the fourth electrode 162 and spaced apart from the first through via.

[0027] The insides of the through vias 151 and 152 may be filled with conductive materials 181 and 182, thereby electrically connecting the first trench capacitor 140 and the second trench capacitor 160 in parallel. That is, the capacitance of the capacitor component 100 is the sum of the individual capacitances of the first and second trench capacitors 140 and 160 connected in parallel, so that the capacitance per unit area may be improved.

[0028] The through vias 151, 152 may have sloping sides such that the width increases or decreases from the first surface 101 to the second surface 102 depending on the aspect ratio, but the invention is not limited thereto. The conductive materials 181, 182 may include metals or other suitable conductive materials, such as copper (Cu), titanium (Ti), titanium (Ti) nitride, etc., but the invention is not limited thereto.

[0029] In one embodiment, the through vias 151 and 152 may include first and second connection vias CV1 and CV2 that penetrate the first interlayer 121 and are spaced apart from each other with the first trench TR1 therebetween, and third and fourth connection vias CV3 and CV4 that penetrate the second interlayer 122 and are spaced apart from each other with the second trench TR2 therebetween. The through vias 151 and 152 may connect the first trench capacitor 140 and the second trench capacitor 160 through the first to fourth connection vias CV1, CV2, CV3, and CV4.

[0030] Specifically, the first and second electrodes 141 and 142 may extend into the first and second connection vias CV1 and CV2, respectively, and the third and fourth electrodes 161 and 162 may extend into the third and fourth connection vias CV3 and CV4, respectively. In this case, the first through via 151 may connect the first electrode 141 disposed in the first connection via CV1 to the third electrode 161 disposed in the third connection via CV3, and the second through via 152 may connect the second electrode 142 disposed in the second connection via CV2 to the fourth electrode 162 disposed in the fourth connection via CV4. Meanwhile, although not shown, separate conductive pads may be disposed at the upper and lower ends of the through vias 151 and 152 to connect the trench capacitors 140 and 160 to the conductive materials 181 and 182.

[0031] 2 and 3, a first electrode 141 is disposed on an inner wall of the first connection via CV1, and the inside of the first connection via CV1 may be filled with a first cover layer 131 except for the space in which the first electrode 141 is disposed. A second electrode 142 is disposed on an inner wall of the second connection via CV2, and the inside of the second connection via CV2 may be filled with the first cover layer 131 except for the space in which the second electrode 142 is disposed.

[0032] Furthermore, since the second connection via CV2 can be formed after the first dielectric layer 143 and the second electrode 142 are formed by a process described below, the height of the second connection via CV2 in the first direction can be greater than the height of the first connection via CV1 in the first direction. That is, one end of the first connection via CV1 can be disposed at a level closer to the first surface 101 than one end of the second connection via CV2. Here, one end of the first connection via CV1 and one end of the second connection via CV2 refer to ends spaced apart from the first surface 101. From the same perspective, the height of the fourth connection via CV4 in the first direction can be greater than the height of the third connection via CV3 in the first direction. That is, one end of the third connection via CV3 can be disposed at a level closer to the second surface 102 than one end of the fourth connection via CV4. Here, one end of the third connection via CV3 and one end of the fourth connection via CV4 refer to ends spaced apart from the second surface 102.

[0033] Meanwhile, as shown in Fig. 3, the first connection via CV1 and the second connection via CV2 may each have a shape extending in the third direction DR3, but the present invention is not limited thereto. For example, as shown in Fig. 4, the first connection via CV1 and the second connection via CV2 may each be arranged in a plurality, and the plurality of first connection vias CV1 may be arranged spaced apart from each other in the third direction DR3, and the plurality of second connection vias CV2 may be arranged spaced apart from each other in the third direction DR3.

[0034] First and second external electrodes 161, 162 connected to the first electrode 141 and the second electrode 142, respectively, may be disposed on the first cover layer 131. The first external electrode 161 may be electrically connected to the first electrode 141 via a first wiring layer 171 disposed in the first cover layer 131, and the second external electrode 162 may be electrically connected to the second electrode 142 via a second wiring layer 172 disposed in the first cover layer 131. Materials forming the external electrodes 161, 162 and the wiring layers 171, 172 are not particularly limited and may include metals or other suitable conductive materials.

[0035] The number, size, aspect ratio, and the like of the wiring layers 171 and 172 do not need to be particularly limited as long as the lower surfaces of the first external electrode 161 and the second external electrode 162 are arranged to be coplanar. However, by a process described later, the end of the second electrode 142 can be arranged at a level more adjacent to the lower surfaces of the external electrodes 161 and 162 than the end of the first electrode 141, so that the height of the second wiring layer 172 in the first direction can be smaller than the height of the first wiring layer 171 in the first direction.

[0036] Fig. 5 is a modified example of Fig. 2. Referring to Fig. 5, the capacitor component 100' according to an embodiment may include a molding part 190 covering at least a part of an outer surface of the substrate 110. More preferably, the molding part 190 may cover outer surfaces of the substrate 110, the interlayers 121 and 122, and the cover layers 131 and 132, and a lower surface of the second cover layer 132. The molding part 190 may play a role in protecting the substrate 110, the interlayers 121 and 122, and the cover layers 131 and 132, etc. The molding part 190 may be formed by transfer molding a resin such as an epoxy resin.

[0037] FIG. 6 is a plan view that shows a schematic cross-sectional view of a capacitor component 100'' according to another embodiment of the present invention, FIG. 7 is a cross-sectional view that shows a schematic cross-sectional view along line III-III' in FIG. 6, and FIG. 8 is a cross-sectional view that shows a schematic cross-sectional view along line IV-IV' in FIG. 6.

[0038] 6 to 8, a plurality of first external electrodes 161'' and a plurality of second external electrodes 162'' may be arranged. As shown in FIG. 7, a plurality of first external electrodes 161'' may be connected to one first electrode 141. Also, as shown in FIG. 8, a plurality of second external electrodes 162'' may be connected to one second electrode 142. By increasing the number of the first external electrodes 161'' and the second external electrodes 162'', the distance between the first external electrodes 161'' in the third direction and the distance between the second external electrodes 162'' in the third direction can be narrowed, thereby reducing the ESL of the capacitor component 100''.

[0039] 9 to 15 are cross-sectional views showing main steps for explaining a method for manufacturing a capacitor component according to an embodiment of the present invention. Hereinafter, an exemplary method for manufacturing a capacitor component 100 according to an embodiment of the present invention will be described with reference to FIGS.

[0040] 9, after a substrate 110 is provided, through vias 151 and 152 may be formed by a laser drill or the like. Then, conductive materials 181 and 182 may be deposited inside the through vias 151 and 152 by a plating method, a sputtering method, or the like.

[0041] 10, a first interlayer 121 and a second interlayer 122 may be formed on the first surface 101 side and the second surface 102 side of the substrate 110, respectively. The interlayers 121 and 122 may be formed by depositing an insulating material or may be formed as an oxide film of the substrate 110. Then, a first trench TR1 and a second trench TR2 extending toward the substrate 110 based on a first direction DR1 may be formed by etching a part of the interlayers 121 and 122 using a mask pattern and an etching device. In addition, a part of the interlayers 121 and 122 formed on the first through via 151 may be etched until the first conductive material 181 is exposed, thereby forming first and second connection vias CV1 and CV2.

[0042] 11, a first electrode 141 and a third electrode 161 may be formed using an ALD (Atomic Layer Deposition) or AVD (Atomic Vapor Deposition) process, etc. The first electrode 141 may be conformally formed along one surface of the first interlayer 121, the inner wall of the first trench TR1, and the inner wall of the first connection via CV1, and the third electrode 161 may be conformally formed along one surface of the second interlayer 122, the inner wall of the second trench TR2, and the inner wall of the second connection via CV2.

[0043] 12, an insulating material that is the same as or different from the interlayers 121 and 122 may be deposited on the first and second interlayers 121 and 122, respectively, to form a part of the first cover layer 131 and the second cover layer 132. In this case, the first and second cover layers 131 and 132 disposed on the first electrode 141 and the third electrode 161 may serve as a dielectric layer that subsequently forms a capacitance. However, the present invention is not limited thereto, and a dielectric layer may be formed by separately depositing a material different from the cover layers 131 and 132 on the interlayers 121 and 122.

[0044] 13, a portion of the cover layers 131, 132 filled inside the first and second trenches TR1, TR2 and a portion of the cover layers 131, 132 deposited on the second through via 152 may be etched. At this time, the portion of the cover layers 131, 132 deposited on the second through via 152 may be etched until the second conductive material 182 is exposed, thereby forming second and fourth connection vias CV2, CV4.

[0045] 14, the second electrode 142 and the fourth electrode 162 may be formed using an ALD (Atomic Layer Deposition) or AVD (Atomic Vapor Deposition) process. At this time, the first cover layer disposed between the first electrode 141 and the second electrode 142 may serve as the first dielectric layer 143, and the second cover layer disposed between the third electrode 161 and the fourth electrode 162 may serve as the second dielectric layer 163. Thus, the first dielectric layer 143 and the first cover layer 131 may be integrally formed, and the second dielectric layer 163 and the second cover layer 132 may be integrally formed, but the present invention is not limited thereto.

[0046] Next, as shown in Fig. 15, a previously designed amount of insulating material is further deposited to form cover layers 131 and 132. Finally, as shown in Fig. 2, a portion of the cover layers 131 and 132 is etched to form a first wiring layer 171 connected to the first electrode 141 and a second wiring layer 172 connected to the second electrode 142, and first and second external electrodes 161 and 162 are formed on the first and second wiring layers 171 and 172, respectively, thereby manufacturing the capacitor component 100 of Fig. 2.

[0047] However, the present invention is not limited to this, and after forming the first interlayer 121, the first trench capacitor 140, and the first cover layer 131 on the first surface 101 of the substrate 110, the substrate 110 may be flipped over to form the second interlayer 122, the second trench capacitor 160, and the second cover layer 132, and the specific steps and their order may vary depending on the arrangement form of each component.

[0048] The present invention is not limited by the above-described embodiments and the accompanying drawings, but is limited by the scope of the accompanying claims. Therefore, within the scope of the technical idea of ​​the present invention described in the claims, various substitutions, modifications and changes are possible by a person having ordinary knowledge in the art, and these also belong to the scope of the present invention.

[0049] In addition, the expression "one embodiment" does not mean the same embodiment, but is provided to emphasize and describe each unique feature that is different from the others. However, the above-mentioned one embodiment does not exclude being realized in combination with the features of another embodiment. For example, even if a matter described in a specific embodiment is not described in another embodiment, it can be understood as a description related to the other embodiment, unless there is a description that is opposite or contradictory to the matter in the other embodiment.

[0050] In the present invention, "connected" is a concept including not only direct connection but also indirect connection via an adhesive layer or the like. Furthermore, "electrically connected" is a concept including both physical connection and no connection. Furthermore, expressions such as "first, second" are used to distinguish one component from another component, and do not limit the order and / or importance of the components. In some cases, the first component may be named the second component, and similarly, the second component may be named the first component, within the scope of the right. [Explanation of symbols]

[0051] 100: Capacitor parts 110: Substrate 121, 122: Interlayer 131, 132: Cover layer 140, 160: Trench capacitor 151, 152: Through via 141: 1st electrode 161:Third electrode 142:Second electrode 162: 4th electrode 143: First dielectric layer 163: Second dielectric layer 161, 162: External electrode 171, 172: Wiring layers 181, 182: Conductive material 190: Molding section TR1, TR2: Trench CV1, CV2, CV3, CV4: Connected vias

Claims

1. a substrate having a first surface and a second surface opposed to each other; a first interlayer disposed on the first surface side of the substrate and including a first trench; a first trench capacitor disposed in the first trench; a second interlayer disposed on a second surface side of the substrate and including a second trench; a second trench capacitor disposed in the second trench; a through via penetrating the substrate to connect the first trench capacitor and the second trench capacitor; A capacitor component comprising:

2. the first trench capacitor includes a first dielectric layer and first and second electrodes disposed with the first dielectric layer therebetween; The capacitor component of claim 1 , wherein the second trench capacitor includes a second dielectric layer and third and fourth electrodes disposed with the second dielectric layer therebetween.

3. The capacitor component according to claim 2 , wherein the through vias include a first through via connecting the first electrode and a third electrode and a second through via connecting the second electrode and a fourth electrode.

4. The capacitor component according to claim 1 , wherein the inside of the through via is filled with a conductive material.

5. 4. The capacitor component of claim 3, further comprising first and second connection vias that penetrate the first interlayer and are spaced apart from each other with the first trench therebetween, and third and fourth connection vias that penetrate the second interlayer and are spaced apart from each other with the second trench therebetween.

6. the first and second electrodes extend into the first and second connecting vias, respectively; the third and fourth electrodes extend into the third and fourth connecting vias, respectively; the first through via connects the first electrode disposed inside the first connection via and the third electrode disposed inside the third connection via; The capacitor component according to claim 5 , wherein the second through via connects the second electrode disposed inside the second connection via and the fourth electrode disposed inside the fourth connection via.

7. 2. The capacitor assembly of claim 1, further comprising a first cover layer covering the first trench capacitor and a second cover layer covering the second trench capacitor.

8. the first interlayer and the first cover layer include different materials; The capacitor component of claim 7 , wherein the second interlayer and the second cover layer comprise different materials.

9. the first surface and the second surface face each other in a first direction; the first interlayer includes a plurality of the first trenches; The first trenches are spaced apart from one another in a second direction intersecting the first direction, The capacitor component according to claim 1 , wherein each of the first trenches extends in a third direction intersecting the first direction and the second direction.

10. the first surface and the second surface face each other in a first direction; the first interlayer includes a plurality of the first trenches; The capacitor component according to claim 1 , wherein the first trenches are spaced apart from each other in a second direction intersecting the first direction and a third direction intersecting the first and second directions.

11. 3. The capacitor component of claim 2, further comprising a first cover layer covering the first trench capacitor, and first and second external electrodes disposed on the first cover layer and connected to the first electrode and the second electrode, respectively.

12. The capacitor component according to claim 11 , wherein the first and second external electrodes are each arranged in a plurality of pieces.

13. The capacitor component according to claim 1 , further comprising a molding portion covering at least a portion of an outer surface of the substrate.

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