Light-emitting device

Abstract

To provide a light-emitting device capable of suppressing variation in luminance among pixels.SOLUTION: A light-emitting device comprises a pixel, a first circuit, and a second circuit. The first circuit has a function to generate a signal containing a value of the current extracted from the pixel. The second circuit has a function to correct an image signal according to the signal. The pixel includes at least a light-emitting element, a first transistor, and a second transistor. The first transistor has a function to control the supply of current to the light-emitting element according to the image signal. The second transistor has a function to control the extraction of current from the pixel. The first and second transistors preferably include a first semiconductor region overlapping a gate, a second semiconductor region in contact with a source or a drain, and a third semiconductor region provided between the first semiconductor region and the second semiconductor region.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to an article, a method, or a manufacturing method. , manufacture, or composition of matter. One embodiment of the present invention is a semiconductor device, a display device, a light-emitting device, a memory device, and a driving method thereof. In particular, one embodiment of the present invention relates to a semiconductor device, a display device, The present invention relates to a light-emitting device, a power storage device, a storage device, a driving method thereof, or a manufacturing method thereof. For example, the present invention relates to a semiconductor device, particularly a light-emitting device in which a transistor is provided in each pixel. do.

[0002] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Display devices, light-emitting devices, electro-optical devices, semiconductor circuits, and electronic devices are all semiconductor devices. It may have a location. [Background technology]

[0003] The specific configuration of an active matrix light emitting device using a light emitting element is as follows: Although it varies by manufacturer, it usually consists of at least a light-emitting element and a video signal input to the pixel. The transistor to be controlled (switching transistor) and the current value to be supplied to the light emitting element A transistor (drive transistor) that controls the pixel is provided in each pixel.

[0004] By making all the transistors in the pixel have the same polarity, In the manufacturing process, a process such as adding an impurity element that gives one conductivity to the semiconductor film is performed. In the following Patent Document 1, a pixel is formed by only n-channel transistors. A constructed light emitting device display is described.

[0005] In an active matrix light emitting device using light emitting elements, light is supplied to the light emitting elements in accordance with an image signal. The variation in threshold voltage of the transistor (drive transistor) that controls the current value supplied to the The above-mentioned variation in threshold voltage is likely to affect the brightness of the light-emitting element. In order to prevent this effect, in the following Patent Document 2, the source voltage of the driving transistor is changed to the threshold voltage and mobility, and based on the detected threshold voltage and mobility, a program corresponding to a display image is generated. A display device for setting gram data signals is described. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2003-195810 A [Patent Document 2] JP 2009-265459 A Summary of the Invention [Problem to be solved by the invention]

[0007] The output current from the pixel, which is used to detect the electrical characteristics of the driving transistor, is several The current has a very small value of about tens to hundreds of nA. If an off-state current flows between the power supply lines in a circuit that is electrically connected to the power supply lines, In this case, it becomes difficult to accurately detect the electrical characteristics of the operating transistor. Even if the image signal input to the pixel is corrected using the current input to the driving transistor, The current value supplied to the light emitting element is corrected so that the influence of the electrical characteristics of the capacitor is reduced. is difficult.

[0008] In light of the above technical background, one aspect of the present invention provides a liquid crystal display device in which luminance variations between pixels are suppressed. Another object of the present invention is to provide a novel light-emitting device. Another object of one embodiment of the present invention is to provide a novel semiconductor device. It shall be one of the following.

[0009] The description of these problems does not preclude the existence of other problems. The embodiment does not necessarily have to solve all of these problems. The above will become apparent from the description in the specification, drawings, claims, etc. It is possible to extract other issues from the descriptions in the patent, claims, etc. [Means for solving the problem]

[0010] One embodiment of the present invention is a light-emitting device including a pixel and first and second circuits. The circuit has the function of generating a signal that contains the value of the current drawn from the pixel. The pixel has a function of correcting an image signal according to the signal. The first transistor is a transistor that emits light in accordance with an image signal. The second transistor has a function of controlling the supply of current to the photoelement. The semiconductor films of the first and second transistors have a function of controlling the extraction of the gate A first semiconductor region overlapping the electrode and a second semiconductor region contacting the source electrode or the drain electrode. and a third semiconductor region provided between the first semiconductor region and the second semiconductor region. The hydrogen concentration in the third semiconductor region is higher than the hydrogen concentrations in the first and second semiconductor regions. It is preferable that

[0011] In the above embodiment, the semiconductor film is preferably an oxide semiconductor.

[0012] One embodiment of the present invention is a semiconductor device including a wiring, a first transistor, a second transistor, and a first capacitor. The light-emitting device includes at least a first capacitance element, a second capacitance element, and a light-emitting element. The transistor includes a first semiconductor film and a first gate electrode overlapping each other through the first semiconductor film. The second transistor has a second semiconductor film and a second gate electrode. The first capacitor is connected to one of a source electrode and a drain electrode of the first transistor. The second capacitance element has a function of holding a potential difference between the gate electrode of the first transistor and the second capacitance element. A potential difference is maintained between one of the source electrode and the drain electrode of the transistor and the second gate electrode. The second transistor has a function of maintaining electrical continuity between the second gate electrode and the wiring. The drain current of the first transistor is supplied to the light emitting element. The first semiconductor film includes a first semiconductor region overlapping the first gate electrode and a first transistor. a second semiconductor region in contact with the source electrode or drain electrode of the transistor; and a third semiconductor region provided between the first and second semiconductor regions. a fourth semiconductor region overlapping the gate electrode of the second transistor; a fifth semiconductor region in contact with the source electrode or the drain electrode; and a sixth semiconductor region disposed between the third and fourth semiconductor regions. The hydrogen concentration of the third semiconductor region is The hydrogen concentration of the sixth semiconductor region is preferably higher than that of the first and second semiconductor regions. The hydrogen concentration is preferably higher than the hydrogen concentrations in the fourth and fifth semiconductor regions.

[0013] In the above embodiment, the first and second semiconductor films are preferably made of an oxide semiconductor.

[0014] One embodiment of the present invention is a semiconductor device including first and second wirings, first to fifth transistors, and a capacitor. The light emitting device includes at least a first transistor and a light emitting element. The second electrode of the capacitor is connected to the first electrode of the capacitor. The second transistor is electrically connected to one of the source electrode and the drain electrode of the fifth transistor. The transistor maintains a conductive state between the second wiring and the gate electrode of the fifth transistor. The third transistor has a function of controlling a first electrode of the capacitor and a second electrode of the fifth transistor. The fourth transistor has a function of controlling the conduction state between the gate electrode of the first transistor and the gate electrode of the second transistor. Conduction between one of the source electrode and drain electrode of the transistor No. 5 and the anode of the light-emitting element The semiconductor films of the first to fifth transistors have a gate electrode and a first semiconductor region overlapping the source electrode or the drain electrode; and a second semiconductor region in contact with the source electrode or the drain electrode. and a third semiconductor region provided between the first semiconductor region and the second semiconductor region. The hydrogen concentration of the third semiconductor region is higher than the hydrogen concentrations of the first and second semiconductor regions. is preferred.

[0015] One embodiment of the present invention is a semiconductor device including first to third wirings, first to fifth transistors, and a capacitor. The light emitting device includes at least a first transistor and a light emitting element. The second electrode of the capacitor is connected to the first electrode of the capacitor. One of the source electrode and the drain electrode of the fifth transistor and the anode of the light emitting element are electrically connected to The second transistor is connected to the second wiring and the gate electrode of the fifth transistor. The third transistor has a function of controlling conduction between the first electrode of the capacitor and the second electrode of the first transistor. The fourth transistor has a function of controlling the conduction state between the gate of the fourth transistor and the gate of the fifth transistor. The fifth transistor is connected to one of the source electrode and the drain electrode of the fifth transistor and the third wiring. The semiconductor films of the first to fifth transistors are gate electrodes. A first semiconductor region overlapping the source electrode and a second semiconductor region contacting the source electrode or the drain electrode. a body region and a third semiconductor region disposed between the first semiconductor region and the second semiconductor region; The hydrogen concentration of the third semiconductor region is higher than the hydrogen concentrations of the first and second semiconductor regions. , it is preferable that it is high.

[0016] In the above embodiment, the semiconductor film is preferably an oxide semiconductor.

[0017] In the above embodiment, the oxide semiconductor is indium, zinc, M (M is Mg, Al, Ti, It is preferred that the element contains at least one of these elements: Ga, Y, Zr, La, Ce, Nd, or Hf.

[0018] One aspect of the present invention is a display device including the light-emitting device according to the above aspect, a microphone, and an operation key. It is an electronic device. Effect of the Invention

[0019] According to one embodiment of the present invention, it is possible to provide a light-emitting device in which variation in luminance between pixels is suppressed. According to one embodiment of the present invention, a novel light-emitting device can be provided. According to one embodiment of the present invention, a novel semiconductor device can be provided.

[0020] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have to have all of these effects. Effects other than these may also be included. The above is self-evident from the description, drawings, claims, etc. Other effects can be extracted from the claims and other descriptions. [Brief description of the drawings]

[0021] [Figure 1] FIG. 1 illustrates a structure of a light-emitting device. [Diagram 2] FIG. 2 is a diagram showing the configuration of a pixel. [Diagram 3] 4 is a timing chart showing the operation of a pixel. [Figure 4] FIG. 2 is a diagram showing a connection relationship between a pixel portion and a sampling circuit. [Diagram 5] FIG. 2 is a diagram showing the configuration of a pixel. [Figure 6] 4 is a timing chart showing the operation of a pixel. [Figure 7] FIG. 2 is a diagram showing the configuration of a pixel. [Figure 8] 4 is a timing chart showing the operation of a pixel. [Figure 9] FIG. 2 is a diagram showing the configuration of a pixel. [Figure 10] 4 is a timing chart showing the operation of a pixel. [Figure 11] Schematic diagram of the monitor circuit. [Figure 12] FIG. 1 illustrates a structure of a light-emitting device. [Figure 13] FIG. 2 shows a configuration of a pixel portion. [Figure 14] FIG. 2 is a diagram showing the configuration of a pixel. [Figure 15] 4 is a timing chart showing the operation of a pixel. [Figure 16] FIG. [Figure 17] FIG. 1 is a cross-sectional view of a transistor. [Figure 18] FIG. 1 is a cross-sectional view of a transistor. [Figure 19]1A and 1B are a cross-sectional view and a top view of a transistor. [Figure 20] 1A and 1B are a cross-sectional view and a top view of a transistor. [Figure 21] 1A and 1B are a cross-sectional view and a top view of a transistor. [Figure 22] FIG. 1 illustrates a band structure of a transistor. [Figure 23] 1A and 1B are a cross-sectional view and a top view of a transistor. [Figure 24] FIG. 1 is a cross-sectional view of a transistor. [Diagram 25] 1A and 1B are a cross-sectional view and a top view of a transistor. [Figure 26] FIG. 1 is a cross-sectional view of a transistor. [Figure 27] FIG. 1 is a cross-sectional view of a transistor. [Figure 28] FIG. 1 is a cross-sectional view of a transistor. [Figure 29] FIG. 1 is a cross-sectional view of a transistor. [Diagram 30] Top view of a pixel. [Diagram 31] FIG. [Diagram 32] FIG. [Diagram 33] Electronic devices illustration. [Diagram 34] FIG. 4 is a diagram illustrating the temperature dependence of resistivity. [Diagram 35] Cs-corrected high-resolution TEM image of a cross section of CAAC-OS, and a schematic cross-sectional diagram of CAAC-OS. [Diagram 36] Cs-corrected high-resolution TEM image of the CAAC-OS in the plane. [Figure 37] 13A to 13C show structural analyses of a CAAC-OS and a single-crystal oxide semiconductor by XRD. [Figure 38] Electron diffraction pattern of CAAC-OS. [Figure 39] FIG. 1 shows the change in the crystal part of an In-Ga-Zn oxide due to electron irradiation. [Diagram 40] Schematic diagram explaining the film formation model of CAAC-OS and nc-OS. [Diagram 41] A diagram explaining InGaZnO4 crystals and pellets. [Diagram 42] Schematic diagram explaining a film formation model of CAAC-OS. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0022] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following description, and the embodiments and aspects thereof may be modified without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various modifications may be made to the scope and details of the present invention. The present disclosure should not be construed as being limited to the following description of the embodiments. In the embodiments described below, the same parts or parts having similar functions are denoted by the same reference numerals. These figures are commonly used in the following drawings, and their repeated explanations will be omitted.

[0023] In addition, in the drawings, the size, layer thickness, or area may be exaggerated for clarity. Therefore, the scale is not necessarily limited to that shown in the drawings. The above is a formula, and is not limited to the shapes or values ​​shown in the drawings. For example, Variations in signals, voltages, or currents due to timing differences, or variations in signals, voltages, Or, it is possible to include current variation.

[0024] In this specification, a transistor is a small element including a gate, a drain, and a source. It is an element that has at least three terminals. And the drain (drain terminal, drain region) A channel is formed between the source (source terminal, source region or source electrode) and the The transistor has a drain region, and a current can flow through the drain, the channel region, and the source. Here, the source and drain are determined by the structure or operating conditions of the transistor. Since the capacitance varies depending on the semiconductor device, it is difficult to determine which is the source and which is the drain. Here, the portion functioning as a source and the portion functioning as a drain are called a source or drain. One of the source and drain is called the first electrode, and the other of the source and drain is called the second electrode. The other electrode may be referred to as the second electrode.

[0025] In this specification, a node is a wiring provided for electrically connecting elements. This refers to any of the following points.

[0026] In this specification, the ordinal numbers "first," "second," and "third" are used to avoid confusion of the elements. It should be noted that the numbers are added to avoid confusion and are not intended to be limiting.

[0027] In this specification, "A and B are connected" does not mean that A and B are directly connected. In addition to those that are electrically connected, A and B are also included. "Connected" means that there is an object between A and B that has some electrical effect. When a device is connected to a power source, it enables the transmission and reception of electrical signals between A and B.

[0028] The arrangement of each circuit block in the drawings is for the purpose of explanation only. Although the diagram shows different circuit blocks realizing different functions, the actual circuits and areas In some cases, different functions may be realized within the same circuit block. In addition, the functions of each circuit block in the drawings are specified for the purpose of explanation, Even if the circuit is shown as a single circuit block, in the actual circuit or domain, In some cases, processing is provided in multiple circuit blocks.

[0029] (Embodiment 1) In this embodiment, a circuit configuration of a light-emitting device which is one embodiment of the present invention will be described.

[0030] <Specific configuration example 1 of the light emitting device> An example of the configuration of a light-emitting device according to one embodiment of the present invention will be described. The configuration of a light emitting device 10 according to the embodiment is shown as an example in a block diagram. Although the components are classified by function and shown as independent blocks, the actual structure may differ from the It is difficult to completely separate components by function, and one component may be involved in multiple functions. It is also possible that...

[0031] The light emitting device 10 shown in FIG. 1 includes a panel 25 having a plurality of pixels 11 in a pixel section 24, and a control A controller 26, a CPU 27, an image processing circuit 13, an image memory 28, a memory 29, and a monitor. The light emitting device 10 shown in FIG. 30 and a drive circuit 31.

[0032] The CPU 27 executes commands input from the outside or commands stored in a memory provided within the CPU 27. The CPU 11 controls the operation of the various circuits in the light emitting device 10 by decoding the commands received from the CPU 11. By this, the device has the function of executing the command.

[0033] The monitor circuit 12 calculates the value of the drain current from the drain current output from the pixel 11. The memory 29 stores the data included in the signal. It has the function of storing information.

[0034] The image memory 28 has a function of storing image data 32 input to the light emitting device 10 . In addition, in FIG. 1, a case where only one image memory 28 is provided in the light emitting device 10 is illustrated. In addition, multiple image memories 28 may be provided in the light emitting device 10. For example, red, blue, green, etc. The pixel section 24 generates a full-color image based on three image data 32 corresponding to each of the three hues. When an image is displayed, an image memory 28 corresponding to each image data 32 is provided. You can do that too.

[0035] The image memory 28 is, for example, a dynamic random access memory (DRAM). Memory), SRAM (Static Random Access Memory) Alternatively, the image memory 28 may include a VRAM (Video Random Access Memory). o RAM) may also be used.

[0036] The image processing circuit 13, in accordance with an instruction from the CPU 27, stores the image data 32 in the image memory 28. and reads image data 32 from the image memory 28. The image processing circuit 13 also has a function of generating an image signal Sig from the CPU 27. According to the command from the user, the data stored in the memory 29 is read and the data is used to It has a function to correct the image signal Sig.

[0037] When an image signal Sig including image data 32 is input, the controller 26 controls the panel 25 The image signal Sig is then processed in accordance with the specifications of the image processing circuit 21 and then supplied to the panel 25. do.

[0038] The driving circuit 31 has a function of selecting the pixels 11 of the pixel section 24 on a row-by-row basis. The driving circuit 30 also receives the image signal Sig from the controller 26. 31 to the pixels 11 in the row selected by the pixel 31.

[0039] The controller 26 controls various circuits used to drive the drive circuits 30 and 31. The driving circuit 30 has a function of supplying a driving signal to the panel 25. The driving signal includes a Control start pulse signal SSP, clock signal SCK, latch signal LP, drive circuit 3 1, a start pulse signal GSP, a clock signal GCK, and the like.

[0040] The light emitting device 10 has a function of providing data and instructions to a CPU 27 of the light emitting device 10. The input device may include a keyboard, a pointing device, etc. Devices, touch panels, sensors, etc. can be used.

[0041] The pixel section 24, the driving circuit 30, and the driving circuit 31 each have an oxide semiconductor in the channel region. An oxide semiconductor transistor having a low off-state current may be used. Since the light-emitting device 10 is extremely small, it consumes little power by using an oxide semiconductor transistor. For details of the oxide semiconductor transistor, This will be explained in the second embodiment.

[0042] Note that in an oxide semiconductor transistor, impurities such as hydrogen and moisture can cause The threshold voltage is easily changed. Therefore, an oxide semiconductor is used for the driving transistor of the pixel 11. In this case, the light emitting device 10 is provided with a function for correcting the threshold voltage of the driving transistor. As a specific configuration of the light emitting device 10 having the above-mentioned correction function, an example will be described below. Let me list and explain.

[0043] Pixel configuration example 1 FIG. 2 shows an example of a circuit diagram of the pixel 11. The pixel 11 includes transistors 55 to The light-emitting element 54 includes a capacitor 57, a capacitance element 58, and a light-emitting element 54.

[0044] The potential of the pixel electrode of the light emitting element 54 is controlled in accordance with the image signal Sig input to the pixel 11. The luminance of the light emitting element 54 is determined by the potential difference between the pixel electrode and the common electrode. For example, when an OLED is used as the light emitting element 54, either the anode or the cathode One functions as a pixel electrode, and the other functions as a common electrode. A pixel in which the anode of the light emitting element 54 is used as a pixel electrode and the cathode of the light emitting element 54 is used as a common electrode. Eleven configurations are shown as examples.

[0045] The transistor 56 controls the conduction state between the wiring SL and the gate of the transistor 55. The transistor 55 has a function of providing a light-emitting element 54 having one of a source and a drain thereof. the other of the source and the drain is electrically connected to the wiring VL. The transistor 57 is connected to the wiring ML and one of the source and drain of the transistor 55. One of the pair of electrodes of the capacitor 58 is a transistor. The other end is electrically connected to the anode of the light-emitting element 54. This is being continued.

[0046] The switching of the transistor 56 is performed by electrically connecting the gate of the transistor 56 to the The switching of the transistor 57 is performed according to the potential of the wiring GL. This is performed according to the potential of the wiring GL electrically connected to the gate of the transistor 57.

[0047] The transistor included in the pixel 11 is made of an oxide semiconductor or an amorphous, microcrystalline, polycrystalline, or monocrystalline semiconductor. A semiconductor such as crystalline silicon or germanium can be used. Since the transistor 56 contains an oxide semiconductor in the channel formation region, the off-state current of the transistor 56 can be reduced by extremely The transistor 56 having the above configuration can be provided in the pixel 11. By using this, transistors made of semiconductors such as ordinary silicon and germanium can be The charge stored on the gate of transistor 55 is smaller than that of transistor 56. Leaks can be prevented.

[0048] Therefore, like a still image, the same image is not displayed on the pixel section 24 over several consecutive frame periods. In the case where an image signal Sig having image data is written, the driving frequency is lowered. In other words, the number of times the image signal Sig is written to the pixel section 24 within a certain period is reduced. For example, even if the electron donor water is removed, the image can still be displayed. The amount of impurities such as hydrogen and oxygen deficiency is reduced, resulting in high purity. Purified oxide semiconductor By using this for the semiconductor film of the transistor 56, the interval for writing the image signal Sig can be reduced to 10 seconds or less. The time can be preferably 30 seconds or more, and more preferably 1 minute or more. The longer the interval at which the image signal Sig is written, the more the power consumption can be reduced. can.

[0049] In addition, the potential of the image signal Sig can be held for a longer period of time, The display can be displayed without providing the pixel 11 with the capacitance element 58 for holding the potential of the gate of the transistor 55. This can prevent degradation of the displayed image quality.

[0050] In FIG. 2, the pixel 11 may include a transistor, a diode, a resistor element, etc., as necessary. The semiconductor memory device may further include other circuit elements such as a capacitor, an inductor, etc.

[0051] In addition, in FIG. 2, each transistor has a gate on at least one side of the semiconductor film. However, a pair of gates may be provided with a semiconductor film sandwiched therebetween.

[0052] FIG. 2 illustrates an example in which all the transistors are n-channel type. When all the transistors in the are the same channel type, in the manufacturing process of the transistors, It is possible to omit some of the steps such as adding impurity elements that give the semiconductor film one conductivity. However, in the light-emitting device according to one embodiment of the present invention, the transistor in the pixel 11 does not necessarily have to be a It is not necessary that all the light emitting elements 54 are n-channel type. The cathode of the light emitting element 54 is electrically connected to the wiring CL. In this case, it is preferable that at least the transistor 55 is an n-channel type. When the anode of the optical element 54 is electrically connected to the wiring CL, at least the transistor It is preferable that the capacitor 55 is of the p-channel type.

[0053] Also, in FIG. 2, the transistor in the pixel 11 has a single gate, so that the transistor is a single transistor. Although a single gate structure having a channel forming region is illustrated, The configuration is not limited to this. Any or all of the transistors in the pixel 11 may be electrically By having a plurality of gates electrically connected to each other, a multi-channel semiconductor device having a plurality of channel forming regions is formed. A gate structure may also be used.

[0054] Pixel operation example 1 Next, an example of the operation of the pixel 11 shown in FIG. 2 will be described.

[0055] FIG. 3 shows a relationship between the potential of the wiring GL electrically connected to the pixel 11 shown in FIG. 2 and the potential of the wiring SL. 3 is a timing chart showing the potential of the image signal Sig. The diagram shows a case where all the transistors included in the pixel 11 shown in FIG. 2 are n-channel type. This illustrates the case.

[0056] First, in the period t1, a high-level potential is applied to the wiring GL. The transistor 56 and the transistor 57 are turned on. Then, the potential of the image signal Sig is applied to the wiring SL. The potential Vdata is applied to the transistor 56. It is given to gate 55.

[0057] Further, a potential Vano is applied to the wiring VL, and a potential Vcat is applied to the wiring CL. The potential Vano is a sum of the threshold voltage Vthe of the light emitting element 54 and the potential Vcat of the transistor 55. It is desirable to set the potential higher than the potential obtained by adding the threshold voltage Vth. By providing the potential difference between the potentials Vdata and Vdata, the The value of the drain current is determined. Then, the drain current is supplied to the light emitting element 54. In this way, the luminance of the light emitting element 54 is determined.

[0058] In addition, in the case where the transistor 55 is an n-channel transistor, the potential of the wiring ML in the period t1 is The potential of the wiring CL is lower than the potential obtained by adding the threshold voltage Vthe of the light emitting element 54, and the potential of the wiring VL The potential of the line ML is higher than the potential obtained by adding the threshold voltage Vth of the transistor 55 to the potential of the line ML. With the above configuration, even if the transistor 57 is on, The drain current of 55 can be made to flow preferentially to the wiring ML rather than to the light emitting element 54. .

[0059] Next, in a period t2, a low-level potential is applied to the wiring GL. The transistor 56 and the transistor 57 are turned off. A potential Vdata is held at the gate of the transistor 55. A potential Vdata is held at the wiring VL. A potential Vano is applied to the wiring CL, and a potential Vcat is applied to the wiring CL. emits light according to a determined luminance during period t1.

[0060] Next, in a period t3, a high-level potential is applied to the wiring GL. The gate of the transistor 55 is connected to the wiring SL. A potential is applied so that the gate voltage becomes larger than the threshold voltage Vth. The potential of the wiring ML is set to the potential of the wiring CL. The potential of the wiring VL becomes lower than the potential obtained by adding the threshold voltage Vthe of the wiring ML. The potential becomes higher than the potential obtained by adding the threshold voltage Vth of the transistor 55 to the potential. Therefore, the drain current of the transistor 55 is made to flow preferentially to the wiring ML rather than to the light emitting element 54. It is possible.

[0061] The drain current of the transistor 55 is supplied to the monitor circuit via the line ML. The monitor circuit uses the drain current flowing through the line ML to measure the value of the drain current. In the light-emitting device according to one aspect of the present invention, a signal including the above-mentioned The value of the potential Vdata of the image signal Sig supplied to the pixel 11 is corrected using the signal. It is possible.

[0062] In the light-emitting device having the pixel 11 shown in FIG. 2, the operation of the period t2 is followed by the operation of the period t3. For example, in the pixel 11, the operation from the period t1 to the period t2 may be performed several times. After the above operation is repeated 10 times, the operation in the period t3 may be performed. After performing the operation for the period t3, the image signal corresponding to the minimum gradation value 0 is By writing to the pixels 11 in the same row, the light emitting elements 54 are put into a non-emitting state, and then the pixels in the next row are written. In element 11, the operation in period t3 may be performed.

[0063] <Connection between pixel section and sampling circuit> Next, the pixel section 24 shown in FIG. 1 is connected to a sampling circuit corresponding to a part of the driving circuit 30. An example of the connection configuration is shown in FIG.

[0064] The pixel section 24 shown in FIG. 4 includes a plurality of pixels 11 and a plurality of wirings GL1 to GLy. A number of wirings GL, a number of wirings SL indicated by wirings SL1 to SLx, and wirings ML1 to A plurality of wirings ML indicated by a wiring MLx and a plurality of wirings VL1 to VLx indicated by wirings VL2 to VLx A wiring VL is provided. The pixels 11 are connected to at least one of the wirings GL. At least one of the wirings SL, at least one of the wirings ML, and at least one of the wirings VL The first and second electrodes are electrically connected to each other.

[0065] The type and number of wirings provided in the pixel section 24 depend on the configuration, number and arrangement of the pixels 11. Specifically, in the case of the pixel section 24 shown in FIG. 11 are arranged in a matrix, and wirings GL1 to GLy, wirings SL1 to SLy, SLx, wiring ML1 to wiring MLx, wiring VL1 to wiring VLx are arranged in the pixel section 24. This shows an example of a case where

[0066] The drain current taken out from the pixel 11 via the wirings ML1 to MLx is The signal is supplied to a monitor circuit (not shown) via a line TER.

[0067] The circuit 21 has a function of supplying a predetermined potential to the wiring ML in accordance with a potential input to the wiring PRE. For example, the pixel 11 shown in FIG. 2 operates according to the timing chart shown in FIG. When the light-emitting element 5 is turned on, the potential of the wiring CL is changed from the circuit 21 to the wiring ML during the period t1. Alternatively, a potential lower than the potential obtained by adding the threshold voltage Vthe of 4 may be supplied.

[0068] FIG. 4 illustrates an example in which the circuit 21 includes a transistor 22. A potential input to the wiring PRE is supplied to the gate of the transistor 22. The conduction state between the wiring 33 and the wiring ML is controlled according to the potential of the wiring PRE input to the gate. This has the function of controlling.

[0069] In addition, in FIG. 4, the conduction state between the wiring ML and the wiring TER is controlled according to the potential of the wiring MSEL. A transistor 34 is provided which functions to control the

[0070] Pixel configuration example 2 The pixel 11 shown in FIG. 5 includes transistors 70 to 75, a capacitor 76, and a capacitor The transistor 70 has a normal gate (first gate) and a light emitting element 78. In addition to the first gate, a second gate is provided which overlaps with the first gate via a semiconductor film. do.

[0071] Specifically, the transistor 72 has a gate connected to the wiring GLa and a source or a drain connected to a wiring GLa. The other of the source and drain is connected to a line SL, and the other of the source and drain is connected to a first gate of the transistor 70. The transistor 71 has a gate connected to the wiring GLb, and a source and a drain connected to the wiring GLb. One of the inputs is connected to one of the source and drain of the transistor 75, and the other of the source and drain is connected to are electrically connected to the first gate of the transistor 70. 70 has one of its source and drain connected to one of the source and drain of transistor 75; The other of the source and drain is electrically connected to the wiring VL. The gate of the transistor 73 is connected to the wiring GLb, one of the source and drain is connected to the wiring BL, and the source and drain are connected to the wiring BL. The other drain is electrically connected to the second gate of the transistor 70. The transistor 74 has a gate connected to the wiring GLd and one of a source and a drain connected to the wiring ML. , the other of the source and drain is connected to one of the source and drain of transistor 75, The transistor 75 has a gate connected to the wiring GLc, a source and a drain connected to the wiring GLc, and a drain connected to the wiring GLc. The other end of the rain is electrically connected to the pixel electrode of the light emitting element 78 .

[0072] One of the pair of electrodes of the capacitor 76 is connected to the second gate of the transistor 70. the other is electrically connected to one of the source and drain of transistor 75 The capacitor 77 has a pair of electrodes, one of which is connected to the first The other is electrically connected to one of the source and drain of the transistor 75. The common electrode of the light emitting element 78 is electrically connected to the wiring CL. There are.

[0073] Pixel operation example 2 Next, taking the pixel 11 shown in FIG. 5 as an example, the operation of the pixel of the light-emitting device according to one embodiment of the present invention will be described. This article explains the work.

[0074] FIG. 6A is a timing chart of potentials input to the wirings GLa to GLd. 6 shows a timing chart of the potential of the image signal Sig input to the line SL. The timing chart shown in A) is a timing chart in which all the transistors included in the pixel 11 shown in FIG. This illustrates an example of a channel type.

[0075] First, in a period t1, a low-level potential is applied to the wiring GLa, and a high-level potential is applied to the wiring GLb. A potential of the line GLc is applied to the line GLd, a low-level potential is applied to the line GLc, and a high-level potential is applied to the line GLd. Therefore, the transistors 71, 73, and Transistor 74 is turned on, and transistor 72 and transistor 75 are turned off.

[0076] In addition, the wiring VL is applied with a potential Vano, the wiring BL is applied with a potential V0, and the wiring ML is applied with a potential V1. A potential Vcat is applied to the wiring CL electrically connected to the common electrode of the light emitting element 78, Therefore, the first gate of the transistor 70 (hereinafter referred to as node A) A potential V1 is applied to the second gate of the transistor 70 (hereinafter referred to as node B). A potential V0 is applied to one of the source and drain of the transistor 70 (hereinafter referred to as node C). A potential V1 is applied to (the call).

[0077] The potential Vano should be higher than the potential obtained by adding the threshold voltage Vthe of the light-emitting element 78 and the threshold voltage Vth of the transistor 70 to the potential Vcat. And the potential V0 should be a potential sufficiently high with respect to node C to shift the threshold voltage Vth of the transistor 70 in the negative direction. Specifically, when the voltage Vbg (the voltage corresponding to the potential difference between node B and node C) is 0V, taking the threshold voltage Vth of the transistor 70 as Vth0 and the threshold voltage Vth of the transistor 70 in the period t1 as Vth1, it is preferable that Vth1 < Vth0 holds. With the above configuration, since the transistor 70 becomes normally-on, even when the potential difference between node A and node C, that is, the gate voltage of the transistor 70 is 0V, the transistor 70 can be turned on.

[0078]

[0079]

[0080] Next, in the period t2, a low-level potential is applied to the wiring GLa, a high-level potential is applied to the wiring GLb, a low-level potential is applied to the wiring GLc, and a low-level potential is applied to the wiring GLd. Thus, the transistor 71 and the transistor 73 are turned on,

[0080]

[0081]

[0082]

[0083]

[0084]

[0085]

[0086]

[0087]

[0088]

[0089]

[0090]

[0091]

[0092]

[0093]

[0094]

[0095]

[0096]

[0097]

[0098]

[0099]

[0100] [[IDTransistor 72, transistor 74, and transistor 75 are turned off.

[0080] A potential Vano is applied to the wiring VL, and a potential V0 is applied to the wiring BL. Therefore, the state in which the potential V0 is applied to the node B is maintained, and at the start of the period t2, Since the threshold voltage Vth of the transistor 70 remains shifted in the negative direction from Vth1, During the period t2, the transistor 70 is on. The drain current of transistor 70 is As a result, the potentials of nodes A and C start to rise. When the potential of node C rises, The voltage Vbg corresponding to the potential difference between node B and node C decreases, and the threshold voltage of transistor 70 Vth shifts in the positive direction. And finally, the threshold voltage of the transistor 70 When Vth approaches 0V, the transistor 70 turns off. When the threshold voltage Vth is 0V, the potential difference between node B and node C is V0-V2.

[0081] That is, when the potential difference between nodes B and C is V0-V2, the transistor 70 , the threshold voltage Vth is set so that the drain current converges to 0 A for a gate voltage of 0 V. The potential difference V0-V2 between the nodes B and C is corrected to 0 V. is applied to

[0082] Next, in a period t3, a high-level potential is applied to the wiring GLa, and a low-level potential is applied to the wiring GLb. A low-level potential is applied to the wiring GLc, a high-level potential is applied to the wiring GLd, This causes transistors 72 and 74 to turn on. , transistor 71, transistor 73, and transistor 75 are turned off.

[0083] In addition, the line VL is supplied with a potential Vano, and the line SL is supplied with a potential Vdata of the image signal Sig. A potential V1 is applied to the wiring ML. The node B is a floating Since the node C is in the state of V1, when the node C changes from the potential V2 to the potential V1, As a result, the potential of node B changes from V0 to V0+V1-V2. Since the potential difference V0-V2 is maintained, the threshold voltage Vth of the transistor 70 becomes 0V. In addition, a potential Vdata is applied to node A, and the gate of transistor 70 is turned on. The output voltage is Vdata-V1.

[0084] Next, in a period t4, a low-level potential is applied to the wiring GLa, and a low-level potential is applied to the wiring GLb. A low level potential is applied to the wiring GLc, a high level potential is applied to the wiring GLd, Therefore, transistor 75 is turned on and transistors 71 and Therefore, transistor 74 is turned off.

[0085] The wiring VL is connected to a potential Vano, and the wiring VL is connected to a common electrode of the light-emitting element 78. A potential Vcat is applied to CL. During a period t4, the transistor 75 When the potential of node C changes to potential V3, the potential of node A changes to potential V4. Vdata+V3-V1, the potential of node B is V0-V2+V3. Even if the potentials of nodes B and C change, the potential difference V0-V2 is held in the capacitance element 76. The potential difference Vdata-V1 is held in the capacitance element 77. A drain current of a value corresponding to the gate voltage of the transistor 70 flows between L and the wiring CL. The luminance of the light emitting element 78 is determined according to the value of the drain current.

[0086] In the light-emitting device having the pixel 11 shown in FIG. The other input and the second gate of transistor 70 are electrically isolated from each other. Therefore, the transistor 70 is normally on. In some cases, i.e., when the original threshold voltage Vth0 of the transistor 70 has a negative value, In the case where the potential of one of the source and drain of the transistor 70 is the first potential during the period t2, Charge can be stored in the capacitance element 76 until the potential becomes higher than the potential V0 of the gate of the transistor 2. Therefore, in the light-emitting device according to one embodiment of the present invention, the transistor 70 is normally on. However, during the period t2, the drain current converges to 0 A for a gate voltage of 0 V. , the threshold voltage Vth can be corrected to 0V.

[0087] Therefore, the other of the source and drain of the transistor 70 and the second In a light-emitting device having a pixel 11 shown in FIG. 5, in which the gate of the first gate electrode is electrically isolated from the gate of the second gate electrode, for example, When an oxide semiconductor is used for the semiconductor film of the transistor 70, the transistor 70 Even if the display is negatively charged, display unevenness can be reduced and high quality display can be achieved.

[0088] The above is the correction of the threshold voltage in the pixel 11 (hereinafter referred to as internal correction). This corresponds to the operation example of 1. Next, in addition to the internal correction, pixel correction caused by the variation in threshold voltage is performed. 11. When suppressing the luminance variation between the pixels by correcting the image signal (hereinafter referred to as external correction) The operation of pixel 11 will now be described.

[0089] Taking the pixel 11 shown in FIG. 5 as an example, when external correction is performed in addition to internal correction, 1 to GLd and an image signal input to the wiring SL. The timing chart of the potential of the signal Sig is shown in FIG. The timing chart is based on the assumption that all transistors included in the pixel 11 shown in FIG. This illustrates a case where:

[0090] First, from the period t1 to the period t4, the above The pixel 11 operates according to the above description.

[0091] Next, in a period t5, a low-level potential is applied to the wiring GLa, and a low-level potential is applied to the wiring GLb. A low-level potential is applied to the wiring GLc, a high-level potential is applied to the wiring GLd, Therefore, the transistor 74 is turned on, and the transistors 71 and Transistor 72, transistor 73, and transistor 75 are turned off.

[0092] A potential Vano is applied to the wiring VL, and a potential V1 is applied to the wiring ML. Furthermore, the wiring ML is electrically connected to a monitor circuit.

[0093] By the above operation, the drain current of the transistor 70 flows through the transistor 74 and the wiring ML. The monitor circuit detects the drain current flowing through the line ML. A signal including the value of the drain current as information is generated using the drain current. In the light emitting device, the voltage of the image signal Sig supplied to the pixel 11 is adjusted by using the above signal. The value of the position Vdata can be corrected.

[0094] The external correction operation performed during period t5 is always performed after the operation during period t4. For example, in a light emitting device, the operation from period t1 to period t4 is not required to be repeated multiple times. In addition, in the pixels 11 in one row, the operation in the period t5 may be performed after the operation in the period t6. After the operation of t5 is performed, the image signal Sig corresponding to the minimum gradation value 0 is By writing to the pixels 11 in one row, the light emitting elements 78 are put into a non-emitting state, and then the pixels in the next row are In 11, the operation in period t5 may be performed.

[0095] Even if external correction is performed without internal correction, the transistors between the pixels 11 In addition to the variation in the threshold voltage of the transistor 70, other characteristics of the transistor 70 such as mobility, etc. It is possible to correct the variation in electrical characteristics. However, in addition to external correction, internal correction is also possible. When this is done, the negative or positive shift of the threshold voltage is corrected by internal correction. Thus, in external compensation, the capacitance of the transistor 70 other than the threshold voltage, such as the mobility, is used. Therefore, in addition to external correction, internal correction is also performed. In this case, the amplitude of the potential of the image signal after correction is set to be, as compared with the case where only external correction is performed, Therefore, the amplitude of the potential of the image signal is too large, and the gray scale value The potential difference between the image signals becomes larger, and the brightness changes in the image become a smooth gradation. This prevents the situation where it becomes difficult to express the image in a certain way, and reduces the deterioration of image quality. This can prevent this from happening.

[0096] Pixel configuration example 3 Next, another specific example of the configuration of the pixel 11 will be described.

[0097] FIG. 7 shows an example of a circuit diagram of the pixel 11. The pixel 11 includes transistors 80 to The pixel includes a capacitor 85, a light-emitting element 86, and a capacitor element 87.

[0098] The potential of the pixel electrode of the light emitting element 86 is controlled in accordance with the image signal Sig input to the pixel 11. The luminance of the light emitting element 86 is determined by the potential difference between the pixel electrode and the common electrode. For example, when an OLED is used as the light emitting element 86, either the anode or the cathode One functions as a pixel electrode, and the other functions as a common electrode. A pixel in which the anode of the light emitting element 86 is used as a pixel electrode and the cathode of the light emitting element 86 is used as a common electrode. Eleven configurations are shown as examples.

[0099] The transistor 85 controls the conduction state between the wiring 88 and the gate of the transistor 80. The transistor 83 has a function of connecting one of a pair of electrodes of the capacitor 87 and the transistor The transistor 82 has a function of controlling the conduction state between the gate of the transistor 80 and the gate of the transistor 82. A function of controlling the electrical continuity between the wiring SL and one of a pair of electrodes of the capacitance element 87. The other of the pair of electrodes of the capacitor 87 is connected to the source and drain of the transistor 80. Transistor 84 is electrically connected to the source and output of transistor 80. It has a function of controlling the electrical connection between one of the drains and the pixel electrode of the light emitting element 86 . The transistor 81 is connected between one of the source and drain of the transistor 80 and the wiring ML. The other of the source and drain of the transistor 80 is a It is electrically connected to the line VL.

[0100] The switching of the transistors 82 and 85 is The gate of the transistor 85 is controlled according to the potential of the wiring GLA electrically connected to the gate of the transistor 85 . The switching of the transistors 83 and 84 is The transistor 84 is controlled in accordance with the potential of the wiring GLB electrically connected to the gate of the transistor 84. The switching of the transistor 81 is performed by a wiring GL It is controlled according to the potential of C.

[0101] The transistor included in the pixel 11 is made of an oxide semiconductor or an amorphous, microcrystalline, polycrystalline, or monocrystalline semiconductor. A semiconductor such as crystalline silicon or germanium can be used. A transistor 82, a transistor 83, and a transistor 85 each include an oxide semiconductor in a channel formation region. As a result, the off-state current of the transistors 82, 83, and 85 can be reduced significantly. The transistor 82 and the transistor 8 3 and transistor 85 are used in pixel 11, so that ordinary silicon, germanium, etc. The transistors formed of the above semiconductor are transistors 82, 83, and The leakage of charge stored in the gate of transistor 80 is reduced compared to the case where the transistor is used as transistor 85. It can be prevented.

[0102] Therefore, like a still image, the same image data is displayed on the pixel area over several consecutive frame periods. When an image signal Sig having data is written, the driving frequency is lowered. In other words, In other words, even if the number of times that the image signal Sig is written to the pixel section within a certain period of time is reduced, the image For example, a highly purified oxide semiconductor can be used as a transistor. 82, the transistor 83, and the transistor 85 are used as semiconductor films to output an image signal Si The interval between writing g should be 10 seconds or more, preferably 30 seconds or more, and more preferably 1 minute or more. The longer the interval at which the image signal Sig is written, the Power consumption can be further reduced.

[0103] In addition, the potential of the image signal Sig can be held for a longer period of time, The display can be displayed without providing the pixel 11 with a capacitance element 87 for holding the potential of the gate of the transistor 80. This can prevent degradation of the displayed image quality.

[0104] In FIG. 7, the pixel 11 may include a transistor, a diode, a resistor, etc., as necessary. The semiconductor memory device may further include other circuit elements such as a capacitor, an inductor, etc.

[0105] In addition, in FIG. 7, each transistor has a gate on at least one side of the semiconductor film. However, a pair of gates may be provided with a semiconductor film sandwiched therebetween.

[0106] FIG. 7 illustrates an example in which all the transistors are n-channel type. When all the transistors in the are the same channel type, in the manufacturing process of the transistors, It is possible to omit some of the steps such as adding impurity elements that give the semiconductor film one conductivity. However, in the light-emitting device according to one embodiment of the present invention, the transistor in the pixel 11 does not necessarily have to be a It is not necessary that all of the light emitting elements 86 are n-channel type. The cathode of the light emitting element 86 is electrically connected to the wiring CL. In the case where a transistor is used, it is preferable that at least the transistor 80 is an n-channel type. When the anode of the optical element 86 is electrically connected to the wiring CL, at least the transistor Preferably, the transistor 80 is of the p-channel type.

[0107] In addition, in FIG. 7, the transistor in the pixel 11 has a single gate, so that the transistor Although a single gate structure having a channel forming region is illustrated, The configuration is not limited to this. Any or all of the transistors in the pixel 11 may be electrically By having a plurality of gates electrically connected to each other, a multi-channel semiconductor device having a plurality of channel forming regions is formed. A gate structure may also be used.

[0108] Pixel operation example 3 Next, an example of the operation of the pixel 11 shown in FIG. The potentials of the wirings GLA, GLB, and GLC electrically connected to the pixel 11 and the wiring S 8(A) shows a timing chart of the potential of the image signal Sig supplied to the image input terminal L. The timing chart shown in FIG. 7 assumes that all the transistors included in the pixel 11 are n-channel transistors. This shows an example of a channel type.

[0109] First, in a period t1, a low-level potential is applied to the wiring GLA, and a high-level potential is applied to the wiring GLB. A high-level potential is applied to the wiring GLC. The transistors 81, 83, and 84 are turned on, and the transistors 82 and Transistor 81 and transistor 84 are turned on. As a result, one of the source and drain of the transistor 80 and a pair of electrodes of the capacitor 87 The other of the poles (hereinafter referred to as node A) is supplied with the potential V0 of the wiring ML.

[0110] Further, a potential Vano is applied to the wiring VL, and a potential Vcat is applied to the wiring CL. The potential Vano is higher than the potential V0 plus the threshold voltage Vthe of the light emitting element 86. In addition, it is preferable that the potential V0 is a potential Vcat plus a threshold voltage Vth of the light emitting element 86. It is desirable that the potential V0 is lower than the potential obtained by adding e. During the period t1, a current can be prevented from flowing through the light emitting element 86.

[0111] Next, a low-level potential is applied to the wiring GLB, so that the transistors 83 and Transistor 84 turns off and node A is held at potential V0.

[0112] Next, in a period t2, a high-level potential is applied to the wiring GLA, and a low-level potential is applied to the wiring GLB. A potential of the bell is applied to the line GLC, and a potential of the low level is applied to the line GLC. The transistor 82 and the transistor 85 are turned on, and the transistors 81, 84 and And transistor 83 is turned off.

[0113] When the period t1 is changed to the period t2, the potential applied to the wiring GLA is changed from a low level to a high level. After switching to the high level, the potential applied to the wiring GLC is switched from high to low. By carrying out such an operation, the voltage applied to the wiring GLA This can prevent the potential of node A from fluctuating due to potential switching.

[0114] Further, a potential Vano is applied to the wiring VL, and a potential Vcat is applied to the wiring CL. The line SL is supplied with a potential Vdata of the image signal Sig, and the line 88 is supplied with a potential V The potential V1 is the potential Vcat plus the threshold voltage Vth of the transistor 80. A potential Vano is higher than the potential Vth of the transistor 80. Lower is preferable.

[0115] In the pixel configuration shown in FIG. 7, the potential V1 is set to the threshold voltage Vthe of the light emitting element 86, and the potential V cat, the light emitting element 86 will not turn on as long as the transistor 84 is off. does not emit light. Therefore, it is possible to widen the range of values ​​that can be set for the potential V0. It is also possible to widen the range of values ​​that can be taken as V1-V0. The degree of freedom in setting the value is increased, thereby reducing the time required to obtain the threshold voltage of the transistor 80. Even if the threshold voltage acquisition period is limited, the transistor can be accurately obtained. It is possible to obtain 80 threshold voltages.

[0116] By the above operation, the voltage of node A is applied to the gate of transistor 80 (hereinafter referred to as node B). A potential V1 higher than the potential obtained by adding the threshold voltage to the potential V1 is input, and the transistor 80 is turned on. Therefore, the charge of the capacitance element 87 is discharged through the transistor 80, and the potential V0 is reached. The potential of node A, which has been turned on, starts to rise. Then, the potential of node A finally reaches V1-Vth When the gate voltage of the transistor 80 converges to the threshold voltage Vth, the transistor 80 will be off.

[0117] In addition, one of the pair of electrodes of the capacitance element 87 (shown as node C) is connected to a wiring S The potential Vdata of the image signal Sig applied to the L is applied via the transistor 82. do.

[0118] Next, in a period t3, a low-level potential is applied to the wiring GLA, and a high-level potential is applied to the wiring GLB. A potential of the bell is applied to the line GLC, and a potential of the low level is applied to the line GLC. The transistor 83 and the transistor 84 are turned on, and the transistors 81, 85 and Transistor 82 is turned off.

[0119] When the period t2 shifts to the period t3, the potential applied to the wiring GLA is changed from a high level to a low level. After the potential is switched to the low level, the potential applied to the wiring GLB is changed from low to high. With the above configuration, it is desirable to switch the potential applied to the wiring GLA. Fluctuations in the potential at node A can be prevented.

[0120] Further, a potential Vano is applied to the wiring VL, and a potential Vcat is applied to the wiring CL.

[0121] By the above operation, the potential Vdata is applied to the node B, so that the gate of the transistor 80 Therefore, the gate voltage of the transistor 80 is Vdata-V1+Vth. The threshold voltage Vth can be set to a value that takes this into account. Therefore, the variation in the threshold voltage Vth of the light emitting element 86 can be suppressed. This can suppress the variation in the current value, thereby reducing the unevenness in the brightness of the light emitting device. .

[0122] In addition, by increasing the fluctuation of the potential applied to the wiring GLB, the threshold voltage of the transistor 84 It is possible to prevent the voltage variation from affecting the current value supplied to the light emitting element 86. In other words, the high-level potential applied to the wiring GLB is set to a value sufficiently higher than the threshold voltage of the transistor 84. The low-level potential applied to the wiring GLB is set to be higher than the threshold voltage of the transistor 84. By making the resistor small enough, the transistor 84 can be switched on and off reliably. The variation in the threshold voltage of the transistor 84 affects the current value of the light emitting element 86. It can be prevented.

[0123] The above corresponds to an example of the operation of the pixel 11 including the internal correction. Next, in addition to the internal correction, When the luminance variation among the pixels 11 caused by the variation in the threshold voltage is suppressed by external correction, The operation of pixel 11 in this case will be described.

[0124] Taking the pixel 11 shown in FIG. 7 as an example, when external correction is performed in addition to internal correction, A timing chart of a potential input to the wiring GLC and an image signal input to the wiring SL The timing chart of the potential Vdata of the signal Sig is shown in FIG. The timing chart shown in FIG. 7B is a timing chart in which all the transistors included in the pixel 11 shown in FIG. This illustrates an example of a channel type.

[0125] First, from the period t1 to the period t3, the above The pixel 11 operates according to the above description.

[0126] Next, in a period t4, a low-level potential is applied to the wiring GLA, and a low-level potential is applied to the wiring GLB. A potential of the bell is applied to the line GLC, and a high-level potential is applied to the line GLC. Transistor 81 is turned on and transistors 82 through 85 are turned off.

[0127] A potential Vano is applied to the wiring VL, and the wiring ML is electrically connected to the monitor circuit. will be done.

[0128] By the above operation, the drain current Id of the transistor 80 flows through the transistor 82 instead of the light emitting element 86. The monitor circuit detects the drain current flowing through the line ML. A signal including the value of the drain current Id as information is generated using the drain current Id. In the light emitting device according to one aspect of the present invention, the image signal is supplied to the pixel 11 using the above signal. The value of the potential Vdata of the signal Sig can be corrected.

[0129] In the light-emitting device having the pixel 11 shown in FIG. 7, the operation of the period t3 is followed by the operation of the period t4. For example, in a light emitting device, the operation of the period t1 to the period t3 may be performed several times. After the above-mentioned operation is repeated 10 times, the operation in the period t4 may be performed. After performing the operation for the period t4, the image signal corresponding to the minimum gradation value 0 is By writing to the pixels 11 in the same row, the light emitting elements 86 are put into a non-emitting state, and then the pixels in the next row are written. In element 11, the operation in period t4 may be performed.

[0130] In the light-emitting device having the pixel 11 shown in FIG. Since the other and the gate of transistor 80 are electrically separated, the potentials of the two are individually Therefore, during period t2, the source and The other potential of the drain is the potential of the gate of the transistor 80 plus the threshold voltage Vth. Therefore, the transistor 80 is normally on. When the threshold voltage Vth has a negative value, the transistor In the transistor 80, the capacitance element 87 is charged until the source potential becomes higher than the gate potential V1. Therefore, in the light-emitting device according to one embodiment of the present invention, Even if the transistor 80 is normally on, the threshold voltage can be obtained during the period t2. During the interval t3, the gate voltage of the transistor 80 is adjusted to a value taking into account the threshold voltage Vth. The pressure can be set.

[0131] Therefore, in the pixel 11 shown in FIG. 7, for example, the semiconductor film of the transistor 80 is made of an oxide semiconductor. Even if the transistor 80 is normally on, for example, when a liquid crystal display is used, the display unevenness can be reduced. This allows for high quality display.

[0132] Even if external correction is performed without internal correction, the transistors between the pixels 11 In addition to the variation in the threshold voltage of the transistor 80, the mobility and other characteristics of the transistor 80 other than the threshold voltage are also considered. However, in addition to the external compensation, the internal compensation can also be used to compensate for the variation in the electrical characteristics of the When a positive shift is also performed, the negative or positive shift of the threshold voltage is corrected by internal correction. Thus, in the external correction, the threshold voltage of the transistor 80, such as the mobility, is Therefore, in addition to external compensation, internal compensation is also required. When external compensation is also performed, the amplitude of the potential of the image signal after compensation is Therefore, when the amplitude of the potential of the image signal is too large, the step The potential difference of the image signal between the adjustment values ​​becomes larger, and the brightness change in the image is expressed as a smooth gradation. This prevents the situation where it becomes difficult to express the image in a creative way, and improves image quality. It can prevent the deterioration.

[0133] Pixel configuration example 4 Next, a specific example of the configuration of the pixel 11, which is different from that in FIG. 7, will be described.

[0134] FIG. 9 shows an example of a circuit diagram of the pixel 11. The pixel 11 includes transistors 40 to The pixel includes a capacitor 45, a light-emitting element 46, a capacitive element 47, and a capacitive element .

[0135] The potential of the pixel electrode of the light emitting element 46 is controlled in accordance with the image signal Sig input to the pixel 11. The luminance of the light emitting element 46 is determined by the potential difference between the pixel electrode and the common electrode. For example, when an OLED is used as the light emitting element 46, either the anode or the cathode One functions as a pixel electrode, and the other functions as a common electrode. A pixel in which the anode of the light emitting element 46 is used as a pixel electrode and the cathode of the light emitting element 46 is used as a common electrode. Eleven configurations are shown as examples.

[0136] The transistor 42 is connected to the wiring SL and one of a pair of electrodes of the capacitor 47. The other of the pair of electrodes of the capacitor 47 is a transistor. The transistor 45 is electrically connected to the gate of the transistor The transistor 43 has a function of controlling the conduction state between the gate of the capacitor 40 and the One of the pair of electrodes of the transistor 47 and one of the source and drain of the transistor 40 The transistor 44 has a function of controlling the conduction state between the source and drain of the transistor 40. and has a function of controlling the conduction state between one of the drains and the anode of the light emitting element 46. The transistor 41 is connected to one of the source and the drain of the transistor 40 and the wiring ML. 9, the source of the transistor 40 has a function of controlling the conduction state between the The other of the drains is electrically connected to the wiring VL. One of the electrodes is electrically connected to one of the pair of electrodes of the capacitance element 47, and the other is It is electrically connected to one of the source and drain of the transistor 40 .

[0137] The switching of the transistor 42 is performed by electrically connecting the gate of the transistor 42 to the The transistors 43 and 45 are controlled according to the potential of the wiring GLC. The switching occurs when the transistor 43 and the transistor 45 are electrically connected to the gates of the transistor 43 and the transistor 45. The switching of the transistor 44 is controlled according to the potential of the line GLB. The gate of the transistor 44 is controlled according to the potential of the wiring GLD electrically connected to the gate of the transistor 44. The switching of the transistor 41 is performed by changing the voltage of the wiring GLA electrically connected to the gate of the transistor 41. The power supply is controlled according to the power supply position.

[0138] The transistor included in the pixel 11 is made of an oxide semiconductor or an amorphous, microcrystalline, polycrystalline, or monocrystalline semiconductor. A semiconductor such as crystalline silicon or germanium can be used. Since the transistor 45 contains an oxide semiconductor in the channel formation region, the off-state current of the transistor 45 can be reduced by extremely The transistor 45 having the above configuration can be mounted on the pixel 11. By using this, transistors made of ordinary semiconductors such as silicon and germanium can be The charge stored on the gate of transistor 40 is much smaller than that of transistor 45. Leaks can be prevented.

[0139] Therefore, like a still image, the same image data is displayed on the pixel area over several consecutive frame periods. When an image signal Sig having data is written, the driving frequency is lowered. In other words, In other words, even if the number of times that the image signal Sig is written to the pixel section within a certain period of time is reduced, the image For example, a highly purified oxide semiconductor can be used as a transistor. By using the semiconductor film 42, the interval between writing the image signal Sig can be set to 10 seconds or more, preferably The time can be set to at least 30 seconds, and more preferably at least 1 minute. The longer the interval at which g is written, the more power consumption can be reduced.

[0140] In addition, the potential of the image signal Sig can be held for a longer period of time, The display can be displayed without providing the pixel 11 with the capacitance element 47 for holding the potential of the gate of the transistor 40. This can prevent degradation of the displayed image quality.

[0141] In FIG. 9, the pixel 11 may include a transistor, a diode, a resistor, etc., as necessary. The semiconductor memory device may further include other circuit elements such as a capacitor, an inductor, etc.

[0142] In addition, in FIG. 9, each transistor has a gate on at least one side of the semiconductor film. However, a pair of gates may be provided with a semiconductor film sandwiched therebetween.

[0143] FIG. 9 illustrates an example in which all the transistors are n-channel type. When all the transistors in the are the same channel type, in the manufacturing process of the transistors, It is possible to omit some of the steps such as adding impurity elements that give the semiconductor film one conductivity. However, in the light-emitting device according to one embodiment of the present invention, the transistor in the pixel 11 does not necessarily have to be a It is not necessary that all the light emitting elements 46 are n-channel type. The cathode of the light emitting element 46 is electrically connected to the wiring CL. In the case where a transistor is used, it is preferable that at least the transistor 40 is an n-channel type. When the anode of the optical element 46 is electrically connected to the wiring CL, at least the transistor Preferably, the transistor 40 is of the p-channel type.

[0144] In addition, in FIG. 9, the transistor in the pixel 11 has a single gate, so that the transistor Although a single gate structure having a channel forming region is illustrated, The configuration is not limited to this. Any or all of the transistors in the pixel 11 may be electrically By having a plurality of gates electrically connected to each other, a multi-channel semiconductor device having a plurality of channel forming regions is formed. A gate structure may also be used.

[0145] Pixel operation example 4 FIG. 10 shows the potentials of the wirings GLA to GLD electrically connected to the pixel 11 shown in FIG. 10 is a timing chart showing an example of the potential of the image signal Sig supplied to the wiring SL. The timing chart shown in FIG. 10 is a timing chart in which all the transistors included in the pixel 11 shown in FIG. This is an example of an n-channel type.

[0146] First, in a period t1, a high-level potential is applied to the wiring GLA, and a high-level potential is applied to the wiring GLB. A potential of the low level is applied to the wiring GLC, a potential of the low level is applied to the wiring GLD, Therefore, the transistors 43, 45, and 4 1 is turned on, and transistor 42 and transistor 44 are turned off. The gate of the transistor 40 is supplied with a potential Vi2 of the wiring 49. The potential Vi1 of the wiring ML is applied to one of the source and the drain.

[0147] The potential Vi1 is greater than the potential Vcat plus the threshold voltage Vthe of the light emitting element 46. It is desirable that the potential Vi2 is lower than the threshold voltage Vth of the transistor 40. It is desirable that the potential be higher than the potential added to the potential Vi1. The output voltage becomes Vi2-Vi1, and transistor 40 turns on.

[0148] Moreover, a potential Vi1 is applied to the line VL, and a potential Vcat is applied to the line CL.

[0149] Next, in a period t2, a low-level potential is applied to the wiring GLA, and a high-level potential is applied to the wiring GLB. A high-level potential is applied to the wiring GLC, a low-level potential is applied to the wiring GLD, Therefore, the transistor 43 and the transistor 45 are turned on. As a result, the transistors 42, 44, and 41 are turned off. Thus, the potential Vi2 is held at the gate of the transistor 40. The potential i2 is applied, and the potential Vcat is applied to the line CL.

[0150] By the above operation, the charge of the capacitance element 47 is discharged through the transistor 40 that is on. The potential of one of the source and drain of the transistor 40, which was at potential Vi1, begins to rise. Finally, the potential of one of the source and drain of the transistor 40 becomes Vi2- When the gate voltage of transistor 40 converges to the threshold voltage Vth, Zyster 40 turns off.

[0151] In the pixel configuration shown in FIG. 9, the potential Vi2 is set to the potential Vcat by multiplying the threshold voltage of the light emitting element 46 by Even if the voltage Vthe is increased beyond the sum of Vthe, the light emitting element 4 Therefore, it is possible to widen the range of values ​​that can be set for the potential Vi1. This makes it possible to widen the range of values ​​that can be taken as Vi2-Vi1. Since the degree of freedom in setting the value of 2-Vi1 is increased, the time required to obtain the threshold voltage of the transistor 40 is reduced. Even if the time required to obtain the threshold voltage is shortened or the period during which the threshold voltage is obtained is limited, the The threshold voltage of the transistor 40 can be obtained.

[0152] Next, in a period t3, a high-level potential is applied to the wiring GLA, and a low-level potential is applied to the wiring GLB. A high-level potential is applied to the wiring GLC, and a low-level potential is applied to the wiring GLD. Therefore, the transistor 42 and the transistor 41 are turned on. The transistors 43, 44, and 45 are turned off. The potential Vdata of the image signal Sig is applied to the transistor L. The voltage is applied to one of a pair of electrodes of a capacitance element 47 via a capacitor 42.

[0153] Since transistor 45 is off, the gate of transistor 40 is floating. In addition, since the threshold voltage Vth is held in the capacitance element 47, When a potential Vdata is applied to one of the pair of electrodes, the capacitance The gate of the transistor 40 is electrically connected to the other of the pair of electrodes of the element 47. The potential of the wiring ML is Vdata+Vth. The potential is applied to one of the source and drain of the transistor 40 via the A voltage Vdata-Vi1 is applied to 48, and the gate voltage of the transistor 40 is Vth +Vdata-Vi1.

[0154] When the period t2 transitions to the period t3, the potential applied to the wiring GLB changes from a high level to a low level. After the potential is switched to the low level, the potential applied to the wiring GLC is changed from low to high. With the above configuration, it is desirable to switch the potential applied to the wiring GLC. This can prevent the potential at the gate of transistor 40 from fluctuating.

[0155] Next, in a period t4, a low-level potential is applied to the wiring GLA, and a low-level potential is applied to the wiring GLB. A potential of the bell is applied, a low-level potential is applied to the wiring GLC, and a high-level potential is applied to the wiring GLD. This causes transistor 44 to turn on, and transistors 42 and Transistor 43, transistor 45 and transistor 41 are turned off.

[0156] Moreover, a potential Vi2 is applied to the line VL, and a potential Vcat is applied to the line CL.

[0157] By the above operation, the threshold voltage Vth is held in the capacitance element 47, and the voltage Vda ta-Vi1 is held, the anode of the light-emitting element 46 is at the potential Vel, and the transistor 4 The potential of the gate of transistor 40 is Vdata+Vth+Vel-Vi1. The gate voltage is Vdata+Vth-Vi1.

[0158] The potential Vel is set when a current is passed through the transistor 40 to the light emitting element 46. Specifically, it is set to a potential between the potential Vi2 and the potential Vcat. become.

[0159] Therefore, the gate voltage of the transistor 40 is set to a value taking into account the threshold voltage Vth. The above configuration can suppress the variation in the threshold voltage Vth of the transistor 40. Therefore, the variation in the current value supplied to the light emitting element 46 can be suppressed, and the brightness of the light emitting device can be improved. This can reduce the noise.

[0160] In addition, by increasing the fluctuation of the potential applied to the wiring GLD, the threshold voltage of the transistor 44 It is possible to prevent the voltage variation from affecting the current value supplied to the light emitting element 46. In other words, the high-level potential applied to the wiring GLD is set to a value sufficiently higher than the threshold voltage of the transistor 44. In addition, the low-level potential applied to the wiring GLD is set to be higher than the threshold voltage of the transistor 44. By making the resistor small enough, transistor 44 can be reliably switched on and off. It is to be noted that the variation in the threshold voltage of the transistor 44 affects the current value of the light emitting element 46. It can be prevented.

[0161] The above corresponds to an example of the operation of the pixel 11 including the internal correction. Next, in addition to the internal correction, When the luminance variation among the pixels 11 caused by the variation in the threshold voltage is suppressed by external correction, The operation of pixel 11 in this case will be described.

[0162] Taking the pixel 11 shown in FIG. 9 as an example, when external correction is performed in addition to internal correction, A timing chart of a potential input to the wiring GLD and an image signal input to the wiring SL The timing chart of the potential Vdata of the signal Sig is shown in FIG. The timing chart shown in FIG. 0(B) is for when all the transistors included in the pixel 11 shown in FIG. This shows an example in which the transistor is an n-channel type.

[0163] First, from the period t1 to the period t4, similarly to the timing chart shown in FIG. The pixel 11 operates according to the above description.

[0164] Next, in a period t5, a high-level potential is applied to the wiring GLA, and a low-level potential is applied to the wiring GLB. A high-level potential is applied to the wiring GLC, a low-level potential is applied to the wiring GLD, Therefore, the transistor 41 is turned on, and the transistor 45, Transistor 42, transistor 43 and transistor 44 are turned off.

[0165] A potential Vi2 is applied to the wiring VL, and the wiring ML is electrically connected to the monitor circuit. can be.

[0166] By the above operation, the drain current Id of the transistor 40 flows through the transistor 40 instead of the light emitting element 46. The monitor circuit detects the drain voltage flowing through the line ML. A signal including the value of the drain current Id as information is generated using the drain current Id. In the light emitting device according to one aspect of the present invention, the image signal is supplied to the pixel 11 using the above signal. The value of the potential Vdata of the signal Sig can be corrected.

[0167] In the light-emitting device having the pixel 11 shown in FIG. 9, the operation of the period t4 is followed by the operation of the period t5. For example, in a light emitting device, the operation of the period t1 to the period t4 may be performed several times. After the above operation is repeated 10 times, the operation in the period t5 may be performed. After performing the operation for the period t5, the image signal corresponding to the minimum gradation value 0 is By writing to the pixels 11 in the same row, the light emitting elements 46 are put into a non-emitting state, and then the pixels in the next row are written. In element 11, the operation in period t5 may be performed.

[0168] In the light-emitting device having the pixel 11 shown in FIG. Since the other and the gate of transistor 40 are electrically isolated, the potentials of the two are individually Therefore, during the period t2, the source and The other potential of the drain is the potential of the gate of the transistor 40 plus the threshold voltage Vth. Therefore, the transistor 40 is normally on. When the threshold voltage Vth has a negative value, the transistor In the transistor 40, a charge is stored in the capacitance element 47 until the source potential becomes higher than the gate potential. Therefore, in the light-emitting device according to one embodiment of the present invention, transistor 4 Even if 0 is normally on, the threshold voltage can be obtained in the period t2, and In 4, the gate voltage of the transistor 40 is set to a value taking into account the threshold voltage Vth. It can be set.

[0169] Therefore, in the light-emitting device according to one embodiment of the present invention, for example, the semiconductor film of the transistor 40 In the case where an oxide semiconductor is used, even if the transistor 40 is normally on, the display This reduces glare and enables high-quality display.

[0170] Even if external correction is performed without internal correction, the transistors between the pixels 11 In addition to the variation in the threshold voltage of the transistor 40, the mobility and other characteristics of the transistor 40 other than the threshold voltage are also considered. However, in addition to the external compensation, the internal compensation can also be used to compensate for the variation in the electrical characteristics of the When a positive shift is also performed, the negative or positive shift of the threshold voltage is corrected by internal correction. Thus, in the external correction, the threshold voltage of the transistor 40, such as the mobility, is Therefore, in addition to external compensation, internal compensation is also required. When external compensation is also performed, the amplitude of the potential of the image signal after compensation is Therefore, when the amplitude of the potential of the image signal is too large, the step The potential difference of the image signal between the adjustment values ​​becomes larger, and the brightness change in the image is expressed as a smooth gradation. This prevents the situation where it becomes difficult to express the image in a creative way, and improves image quality. It can prevent the deterioration.

[0171] <Monitor circuit configuration example> Next, a configuration example of the monitor circuit 12 is shown in FIG. 11. The monitor circuit 12 shown in FIG. It includes an operational amplifier 60 , a capacitive element 61 , and a switch 62 .

[0172] One of the pair of electrodes of the capacitance element 61 is electrically connected to the inverting input terminal (-) of the operational amplifier 60. The other of the pair of electrodes of the capacitance element 61 is connected to the output terminal of the operational amplifier 60. The switch 62 discharges the charge stored in the capacitance element 61. Specifically, the capacitance element 61 has a function of controlling the conduction state between a pair of electrodes. The non-inverting input terminal (+) of the operational amplifier 60 is electrically connected to the wiring 68. A potential Vano is supplied to the wiring 68.

[0173] When the pixel 11 shown in FIG. 7 operates according to the timing chart shown in FIG. A potential Vano or a potential V0 is supplied to the wiring 68. When the voltage V V is applied to the wiring 68 according to the timing chart shown in FIG. The potential Vi1 or ano is supplied.

[0174] When a current is extracted from the pixel 11 through the wiring ML for external correction, the By making the monitor circuit 12 function as a voltage follower, a potential Vano After supplying the signal, the monitor circuit 12 is made to function as an integrating circuit to obtain the signal from the pixel 11. Specifically, by turning on switch 62, the current output from wire 68 is converted into a voltage. The potential Vano supplied to the switch 11 is supplied to the wiring ML via the monitor circuit 12. When the switch 62 is in the OFF state, the dopant output from the pixel 11 is When a drain current is supplied to the wiring TER, a charge is stored in the capacitance element 61. A voltage is generated between a pair of electrodes of the drain electrode 11. The voltage is generated by the drain voltage supplied to the wiring TER. Since it is proportional to the total current, the OUT wire electrically connected to the output terminal of the operational amplifier 60 A potential corresponding to the total amount of drain current within a predetermined period is applied to the drain electrode 14.

[0175] In order to perform internal correction in the pixel 11 shown in FIG. 7, a potential V When supplying 0, the monitor circuit 12 is made to function as a voltage follower. In this case, the switch 62 is turned on to supply a potential V0 to the wiring 68 through the monitor circuit 66. It can be supplied to the wiring ML via the line 12.

[0176] In order to perform internal correction in the pixel 11 shown in FIG. 9, a potential V When supplying i1, the monitor circuit 12 is made to function as a voltage follower. Specifically, by turning on the switch 62, the potential Vi1 supplied to the wiring 68 is monitored. The signal can be supplied to the wiring ML via the -circuit 12.

[0177] In the case of the pixel 11 shown in FIG. 7, when performing internal correction, a potential V0 is supplied to the line ML. When performing external correction, a potential Vano is supplied to the wiring ML. The potential supplied to the wiring 68 of the monitor circuit 12 is switched between the potential Vano and the potential V0. In the case of pixel 11 shown in FIG. 9, internal correction is performed. When performing external correction, a potential Vi1 is supplied to the wiring ML. When performing external correction, a potential Vano is supplied to the wiring ML. The potential supplied to the wiring ML is switched by supplying a potential to the wiring 68 of the monitor circuit 12. This can be achieved by switching the applied potential between potential Vano and potential Vi1.

[0178] In the circuit 21 shown in FIG. 4, when the wiring 33 is electrically connected to the wiring ML, Alternatively, the potential V0 or the potential Vi1 may be supplied to the wiring 33. In this case, the internal correction is When performing external correction, the potential V0 or the potential Vi1 of the wiring 33 is supplied to the wiring ML. The monitor circuit 12 can supply the potential Vano to the wiring ML via the wiring TER. In this case, the potential Vano on the wiring 68 of the monitor circuit 12 is switched to another potential. It may be supplied without replacement.

[0179] <Specific configuration example 2 of the light emitting device> The light emitting device 10 shown in FIG. 1 may correct an image only by internal correction without performing external correction. An example of the pixel configuration in this case is shown in FIG.

[0180] For example, when the light emitting device 10 performs only internal correction, the monitor circuit 12 and the memory 13 shown in FIG. The memory 29 is not required. An example of this case is shown in FIG. 12. The components of FIG. 12 are the same as those shown in FIG. Please refer to the following.

[0181] For example, if the light emitting device 10 performs only internal correction, the circuit 21 shown in FIG. 4 is not necessary. An example of this case is shown in Fig. 13. For the components in Fig. 13, refer to the description in Fig. 4.

[0182] Pixel configuration example 5 FIG. 14A shows an example of a configuration of a pixel 11 included in a light-emitting device according to one embodiment of the present invention. show.

[0183] The pixel 11 includes transistors 90 to 94, a capacitor element 95, and a light-emitting element 96. In FIG. 14A, the transistors 90 to 94 are n-channel transistors. The figure shows an example of a panel type.

[0184] The transistor 91 is connected to a wiring SL and one of a pair of electrodes of the capacitor 95. The other of the pair of electrodes of the capacitor 95 has a function of selecting a conductive state or a non-conductive state. is electrically connected to one of the source and drain of the transistor 90. 92 is a resistor for selecting a conductive state or a non-conductive state between the wiring IL and the gate of the transistor 90. The transistor 93 has a function of selecting one of a pair of electrodes of a capacitor 95 and It has a function of selecting a conductive state or a non-conductive state between the gate of the transistor 90 and the gate of the transistor 90 . The transistor 94 is connected to one of the source and drain of the transistor 90 and the light-emitting element 96. The cathode of the light-emitting element 96 has a function of selecting a conductive state or a non-conductive state between the cathode and the anode. , and is electrically connected to the wiring CL.

[0185] In addition, in FIG. 14A, the other of the source and the drain of the transistor 90 is connected to the wiring VL. are electrically connected.

[0186] The selection of the conductive or non-conductive state of the transistor 91 is performed by the transistor 91 The potential of the wiring GLa electrically connected to the gate of the transistor 92 is determined by the potential of the wiring GLa electrically connected to the gate of the transistor 92. The selection of the conductive or non-conductive state of the transistor 92 is determined by a resistor R1 electrically connected to the gate of the transistor 92. The potential of the wiring GLa is determined. The selection is determined by the potential of the wiring GLb electrically connected to the gate of the transistor 93. The selection of the conductive or non-conductive state of transistor 94 is determined by the gate of transistor 94. It is determined by the potential of the wiring GLc electrically connected to the port.

[0187] Next, FIG. 14B shows another example of the pixel 11 included in the light-emitting device according to one embodiment of the present invention. Shows.

[0188] The pixel 11 includes transistors 90 to 94, a capacitor element 95, and a light-emitting element 96. In FIG. 14B, the transistors 90 to 94 are n-channel transistors. The figure shows an example of a panel type.

[0189] The transistor 91 is connected to a wiring SL and one of a pair of electrodes of the capacitor 95. The other of the pair of electrodes of the capacitor 95 has a function of selecting a conductive state or a non-conductive state. is electrically connected to one of the source and drain of the transistor 90 and the anode of the light emitting element 96. The transistor 92 is connected to the gate of the transistor 90. The transistor 93 has a function of selecting an on state or a non-conducting state. The conductive state or non-conductive state between one of the electrodes of the transistor 90 and the gate of the transistor 90 is The transistor 94 has a function of selecting the source and drain of the transistor 90. On the other hand, a conductive state or a non-conductive state between the anode of the light emitting element 96 and the wiring RL is selected. The other of the source and the drain of the transistor 90 is electrically connected to the wiring VL. is connected to

[0190] The selection of the conductive or non-conductive state of the transistor 91 is performed by the transistor 91 The potential of the wiring GLa electrically connected to the gate of the transistor 92 is determined by the potential of the wiring GLa electrically connected to the gate of the transistor 92. The selection of the conductive or non-conductive state of the transistor 92 is determined by a resistor R1 electrically connected to the gate of the transistor 92. The potential of the wiring GLa is determined. The selection is determined by the potential of the wiring GLb electrically connected to the gate of the transistor 93. The selection of the conductive or non-conductive state of transistor 94 is determined by the gate of transistor 94. It is determined by the potential of the wiring GLc electrically connected to the port.

[0191] Note that in FIG. 14A and FIG. 14B, transistors 90 to 94 It is sufficient to have a gate on at least one side of the semiconductor film. The gate may have a pair of gates present at both ends.

[0192] In addition, in FIG. 14(A) and FIG. 14(B), transistors 90 to 94 are all In the example shown, all the transistors 90 to 94 are n-channel types. In the case where the polarities are the same, one conductivity type is imparted to the semiconductor film in the manufacturing process of the transistor. However, in one embodiment of the present invention, the steps of adding impurity elements can be omitted. In the light emitting device according to the present invention, it is not necessary that all of the transistors 90 to 94 are n-channel. The anode of the light emitting element 96 is connected to one of the source and drain of the transistor 94. When electrically connected to the other side, at least the transistor 90 is an n-channel type. It is preferable that the cathode of the light emitting element 96 is connected to one of the source and drain of the transistor 94. If electrically connected, then at least transistor 90 is preferably of the p-channel type. In this case, the anode of the light emitting element 96 is electrically connected to the wiring CL.

[0193] In addition, when the transistor 90 is operated in the saturation region when a current is passed through it, the channel length or It is preferable that the channel width of the transistor 91 to the transistor 94 is longer than that of the transistor 92. By increasing the channel length or width, the characteristics become flat in the saturation region. Alternatively, the kink effect can be reduced by increasing the channel length or width. This allows the transistor 90 to pass a large amount of current even in the saturation region. do.

[0194] In addition, in FIG. 14(A) and FIG. 14(B), transistors 90 to 94 are By having a single gate, it is a single-gate structure having a single channel forming region. However, the present invention is not limited to this configuration. Any or all of the transistors 94 may have multiple gates electrically connected to each other. Alternatively, the semiconductor device may have a multi-gate structure having a plurality of channel forming regions.

[0195] Pixel operation example 5 Next, an example of the operation of the pixel 11 shown in FIG. 14(A) will be described.

[0196] FIG. 15A illustrates wirings GLa to GLaG which are electrically connected to the pixel 11 illustrated in FIG. The potential of the line GLc and the potential of the image signal Sig supplied to the line SL are controlled by a timing chart. However, the timing chart shown in FIG. As shown in FIG. 15A, the transistor 94 is an n-channel type. The operation of the pixel 11 shown in FIG. 14A mainly includes a first operation during a period t1, a second operation during a period t2, and a third operation during a period t3. and a third operation in period t3.

[0197] First, the first operation performed during the period t1 will be described. A low-level potential is applied to the line GL a, a low-level potential is applied to the line GL b, and a low-level potential is applied to the line GL c is given a high level potential. This turns on transistor 94, Transistor 91 through transistor 93 are turned off.

[0198] Further, a potential Vano is applied to the wiring VL, and a potential Vcat is applied to the wiring CL. The potential Vano is greater than the potential obtained by adding the threshold voltage Vthe of the light emitting element 96 to the potential Vcat. In the following, it is assumed that the threshold voltage Vthe of the light emitting element 96 is 0V. do.

[0199] During the period t1, the above operation causes one of the source and drain of the transistor 90 (node A) is a potential obtained by adding the threshold voltage Vthe of the light emitting element 96 to the potential Vcat. In the following, if we assume that the threshold voltage Vthe is 0V, the potential of node A is It becomes Vcat.

[0200] Next, a second operation performed during the period t2 will be described. A high-level potential is applied to the line La, a low-level potential is applied to the line GLb, and a A low-level potential is applied to Lc. Therefore, the transistors 91 and 92 turns on and transistor 93 and transistor 94 turn off.

[0201] When the period t1 transitions to the period t2, the potential applied to the wiring GLa changes from a low level to a high level. After the voltage is switched to the high level, the potential applied to the wiring GLc is changed from high to low. With the above configuration, it is desirable to switch the potential applied to the wiring GLa. This can prevent the potential at node A from fluctuating.

[0202] Further, a potential Vano is applied to the wiring VL, and a potential Vcat is applied to the wiring CL. A potential V0 is applied to the wiring IL, and a potential Vdata of an image signal is applied to the wiring SL. The potential V0 is obtained by multiplying the potential Vcat by the threshold voltage Vth of the transistor 90 and the The potential Vano is higher than the potential obtained by adding the threshold voltage Vthe of the optical element 96. It is desirable that the potential be lower than the potential obtained by adding the threshold voltage Vth of 90.

[0203] During period t2, the above operation causes the gate of transistor 90 (shown as node B) Since a potential V0 is applied to transistor 90, transistor 90 is turned on. The charge of the capacitance element 95 is discharged through the capacitor 90, and the potential of the node A, which was at the potential Vcat, rises. Finally, when the potential of node A reaches the potential V0-Vth, When the gate voltage of the transistor 90 decreases to the threshold voltage Vth, the transistor 90 In addition, one electrode of the capacitor 95 (shown as node C) is supplied with a potential Vdata is given.

[0204] Next, a third operation performed during the period t3 will be described. A low-level potential is applied to the line La, a high-level potential is applied to the line GLb, and a A high-level potential is applied to Lc. Therefore, the transistors 93 and 94 turns on, and transistor 91 and transistor 92 turn off.

[0205] When the period t2 transitions to the period t3, the potential applied to the wiring GLa changes from a high level to a low level. After the potential applied to the wiring GLb and wiring GLc is changed from low level to With the above configuration, it is desirable to switch the potential applied to the wiring GLa to a high level. The switching can prevent the potential at node A from fluctuating.

[0206] Further, a potential Vano is applied to the wiring VL, and a potential Vcat is applied to the wiring CL.

[0207] During the period t3, the above operation provides the node B with a potential Vdata, so that the transistor The gate voltage of the transistor 90 is Vdata-V0+Vth. The gate voltage can be set to a value that takes into account the threshold voltage Vth. The variation in the threshold voltage Vth of the transistor 90 affects the current value supplied to the light emitting element 96. Alternatively, the transistor 90 may degrade and the threshold voltage Vt Even if h changes, the change is prevented from affecting the current value supplied to the light emitting element 96. Therefore, display unevenness can be reduced, and high-quality display can be achieved.

[0208] Next, an example of the operation of the pixel 11 shown in FIG. 14(B) will be described.

[0209] FIG. 15B illustrates wirings GLa to GLaG which are electrically connected to the pixel 11 illustrated in FIG. The potential of the line GLc and the potential Vdata supplied to the wiring SL are shown in a timing chart. However, the timing chart shown in FIG. As shown in FIG. 15B, the transistor 94 is an n-channel type. The operation of the pixel 11 shown in FIG. 14(B) is mainly a first operation in a period t1, a second operation in a period t2, and a third operation in a period t3. and a third operation in a period t3.

[0210] First, the first operation performed during the period t1 will be described. A low-level potential is applied to the line GL a, a low-level potential is applied to the line GL b, and a low-level potential is applied to the line GL c is given a high level potential. This turns on transistor 94, Transistor 91 through transistor 93 are turned off.

[0211] Further, a potential Vano is applied to the wiring VL, and a potential Vcat is applied to the wiring CL. As described above, the potential Vano is obtained by adding the threshold voltage Vthe of the light emitting element 96 to the potential Vcat. The potential V1 is applied to the wiring RL. V1 is lower than the potential Vcat plus the threshold voltage Vthe of the light emitting element 96. By setting the potential V1 to the above value, a current is supplied to the light emitting element 96 during the period t1. can be prevented from flowing.

[0212] During the period t1, the above operation causes one of the source and drain of the transistor 90 (node A potential V1 is applied to a node A shown in FIG.

[0213] Next, a second operation performed during the period t2 will be described. A high-level potential is applied to the line La, a low-level potential is applied to the line GLb, and a A low-level potential is applied to Lc. Therefore, the transistors 91 and 92 turns on and transistor 93 and transistor 94 turn off.

[0214] When the period t1 transitions to the period t2, the potential applied to the wiring GLa changes from a low level to a high level. After the voltage is switched to the high level, the potential applied to the wiring GLc is changed from high to low. With the above configuration, it is desirable to switch the potential applied to the wiring GLa. This can prevent the potential at node A from fluctuating.

[0215] Further, a potential Vano is applied to the wiring VL, and a potential Vcat is applied to the wiring CL. A potential V0 is applied to the wiring IL, and a potential Vdata of an image signal is applied to the wiring SL. As described above, the potential V0 is obtained by multiplying the potential Vcat by the threshold voltage of the transistor 90. The potential Van is higher than the sum of the voltage Vth and the threshold voltage Vthe of the light emitting element 96. It is desirable that the potential be lower than the potential obtained by adding the threshold voltage Vth of the transistor 90 to the potential o. Unlike the case of the pixel 11 shown in FIG. 14(A), the case of the pixel 11 shown in FIG. 14(B) The anode of the light emitting element 96 is electrically connected to one of the source and drain of the transistor 90. Therefore, the value of the current supplied to the light emitting element 96 during the period t2 is kept small. Therefore, in the case of the pixel 11 shown in FIG. 14B, the pixel 11 shown in FIG. 14A is smaller than that shown in FIG. It is preferable to set the potential V0 to a lower value than the above.

[0216] During period t2, the above operation causes the gate of transistor 90 (shown as node B) Since a potential V0 is applied to transistor 90, transistor 90 is turned on. The charge in the capacitance element 95 is discharged through the capacitor 90, and the potential of the node A, which was at potential V1, begins to rise. Finally, when the potential of node A reaches the potential V0-Vth, that is, the transistor When the gate voltage of transistor 90 decreases to the threshold voltage Vth, transistor 90 becomes non- In addition, a current is applied to one electrode (shown as node C) of the capacitance element 95. The position Vdata is given.

[0217] Next, a third operation performed during the period t3 will be described. A low-level potential is applied to the line La, a high-level potential is applied to the line GLb, and a A low-level potential is applied to Lc. This turns on the transistor 93, Transistor 91, transistor 92, and transistor 94 are turned off.

[0218] When the period t2 transitions to the period t3, the potential applied to the wiring GLa changes from a high level to a low level. After the potential is switched to the low level, the potential applied to the wiring GLb is changed from low to high. With the above configuration, it is desirable to switch the potential applied to the wiring GLa. This can prevent the potential at node A from fluctuating.

[0219] Further, a potential Vano is applied to the wiring VL, and a potential Vcat is applied to the wiring CL.

[0220] During the period t3, the above operation provides the node B with a potential Vdata, so that the transistor The gate voltage of the transistor 90 is Vdata-V0+Vth. The gate voltage can be set to a value that takes into account the threshold voltage Vth. The variation in the threshold voltage Vth of the transistor 90 affects the current value supplied to the light emitting element 96. Alternatively, the transistor 90 may degrade and the threshold voltage Vt Even if h changes, the change is prevented from affecting the current value supplied to the light emitting element 96. Therefore, display unevenness can be reduced, and high-quality display can be achieved.

[0221] A light-emitting device according to one embodiment of the present invention having a pixel 11 shown in FIG. 14(A) and FIG. 14(B). In this case, the other of the source and drain of the transistor 90 and the gate of the transistor 90 are Since they are electrically separated, the potential of each can be controlled individually. In the second operation, the potential of the other of the source and drain of the transistor 90 is set to the transistor The potential of the gate of the transistor 90 can be set to a value higher than the potential obtained by adding the threshold voltage Vth. Therefore, when the transistor 90 is normally on, that is, when the threshold voltage Vt When h has a negative value, the source potential of transistor 90 is Charge can be stored in the capacitance element 95 until the potential of the capacitor 95 becomes higher than the potential V0 of the input terminal. In the light-emitting device according to one embodiment of the present invention, even if the transistor 90 is normally on, In the second operation, the threshold voltage can be obtained, and in the third operation, the threshold voltage V The gate voltage of the transistor 90 can be set to a value that takes th into account.

[0222] Therefore, in the light-emitting device according to one embodiment of the present invention, for example, In the case where an oxide semiconductor is used, even if the transistor 90 is normally on, the display This reduces glare and enables high-quality display.

[0223] The structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. It is possible.

[0224] (Embodiment 2) In this embodiment, a semiconductor device according to the present invention is used in a pixel portion and a driver circuit of a light-emitting device according to one embodiment of the present invention. An oxide semiconductor transistor capable of performing the above-described operations will be described.

[0225] <Transistor configuration example 1> 16 and 17 show a top-gate structure as an example of a transistor included in a light-emitting device. 1 shows a transistor.

[0226] In FIG. 16, a transistor 394 provided in a driver circuit and a transistor 395 provided in a pixel portion are 17 shows a top view of transistor 390 and a cross-sectional view of transistor 394 and transistor 390. FIG. 16A is a top view of transistor 394, and FIG. 17A is a cross-sectional view taken along the dashed line X1-X2 in FIG. FIG. 17(B) is a cross-sectional view taken along the dashed line X3-X4 in FIG. 16(B). 16A) is a cross-sectional view taken along the dashed line Y1-Y2, and FIG. 16B is a cross-sectional view taken along the dashed line Y3-Y4. FIG. 17A shows the channel of transistor 390 and transistor 394. FIG. 17B is a cross-sectional view of a transistor 390 and a transistor 3 is a cross-sectional view of a star 394 in the channel width direction.

[0227] In the top view of the transistor, the transistor 394 and As with the transistor 390, some of the components may be omitted in the drawings. The dashed line X1-X2 direction and the dashed line X3-X4 direction are the channel length direction, and the dashed line Y1-Y The two directions and the dashed dotted line Y3-Y4 direction may be referred to as a channel width direction.

[0228] The transistor 390 shown in FIG. 17 is an oxide film on an insulating film 364 formed on a substrate 362. A semiconductor film 366, a conductive film 368 and a conductive film 370 in contact with the oxide semiconductor film 366, and an insulating film a conductive film 374 overlapping with the oxide semiconductor film 366 with the insulating film 372 interposed therebetween. Note that an insulating film 376 is provided over the transistor 390.

[0229] A transistor 394 shown in FIG. 17 includes a conductive film 261 formed over a substrate 362 and a conductive film An insulating film 364 on the insulating film 364, an oxide semiconductor film 266 on the insulating film 364, and an oxide semiconductor film A conductive film 268, a conductive film 270, and an insulating film 272 are in contact with the insulating film 266. The conductive film 274 overlaps with the oxide semiconductor film 266. An insulating film 376 is provided.

[0230] The transistor 394 includes a conductive film 26 overlapping with the oxide semiconductor film 266 with the insulating film 364 interposed therebetween. That is, the conductive film 261 functions as a gate electrode. The transistor 394 is a transistor with a dual gate structure. 390 and has the same effect.

[0231] The conductive film 274 and the conductive film 261 are not electrically connected to each other, and different potentials are applied to each of them. In this way, the threshold voltage of the transistor 394 can be controlled. As shown in FIG. 1, the conductive film 274 and the conductive film 261 are electrically connected to each other and the same potential is applied to them. This increases the on-current, reduces the initial characteristic variation, suppresses deterioration during -GBT stress testing, and In addition, it is possible to suppress the fluctuation in the on-current rise voltage at different drain voltages.

[0232] The driver circuit and the pixel portion of the light-emitting device according to one embodiment of the present invention have different transistor structures. The transistors included in the driver circuit have a dual-gate structure. In comparison, the driver circuit includes a transistor with a high on-state current.

[0233] In addition, in order to correct the threshold voltage of a transistor, such as a transistor 70 shown in FIG. Dual-gate transistors are used for some of the transistors used in the pixel area. It is also possible.

[0234] In addition, in a light-emitting device, the channel lengths of the transistors included in the driver circuit and the pixel portion are different. It is also possible.

[0235] Typically, the channel length of the transistor 394 included in the driver circuit is set to less than 2.5 μm. The thickness of the transistor included in the pixel portion can be set to 1.45 μm or more and 2.2 μm or less. The channel length of the resistor 390 is set to 2.5 μm or more, or 2.5 μm or more and 20 μm or less. This can be done.

[0236] The channel length of the transistor 394 included in the driving circuit is set to less than 2.5 μm, preferably 1 By making the thickness greater than or equal to 45 μm and less than or equal to 2.2 μm, the transistor 390 included in the pixel portion can be As a result, it is possible to create a driver circuit capable of high-speed operation. It can be manufactured.

[0237] In the oxide semiconductor film 366, the conductive film 368, the conductive film 370, and the conductive film 374 are not overlapped. The region where the oxide semiconductor film 266 does not have oxygen includes an element that forms oxygen vacancies. In the region not overlapping with the conductive film 268, the conductive film 270, and the conductive film 274, oxygen vacancies are formed. Hereinafter, the elements that form oxygen vacancies will be referred to as impurity elements. Representative examples of rare gas elements include hydrogen and rare gas elements. The impurity elements are fluorine, neon, argon, krypton and xenon. Uranium, carbon, nitrogen, fluorine, aluminum, silicon, phosphorus, chlorine, etc. are added to the oxide semiconductor film 3 66 and the oxide semiconductor film 266.

[0238] The insulating film 376 is a film containing hydrogen, and is typically a nitride insulating film. 6 is in contact with the oxide semiconductor film 366 and the oxide semiconductor film 266, The hydrogen contained in the oxide semiconductor film 366 diffuses into the oxide semiconductor film 266. In a region where the oxide semiconductor film 266 and the insulating film 376 are in contact with each other, Contains a lot of elements.

[0239] When hydrogen is added to an oxide semiconductor in which oxygen vacancies have been formed by the addition of an impurity element, the oxygen vacancies Hydrogen enters the loss site and a donor level is formed near the conduction band. As a result, the oxide semiconductor The conductivity of the oxide semiconductor increases and it becomes a conductor. An oxide semiconductor that has become a conductor is called an oxide conductor. In general, oxide semiconductors have a large energy gap and are therefore highly resistant to visible light. On the other hand, an oxide conductor is an oxide semiconductor having a donor level near the conduction band. Therefore, the effect of absorption due to the donor level is small, and it is oxidized by visible light. It has the same level of transparency as a semiconductor.

[0240] Here, the resistance of a film formed of an oxide conductor (hereinafter referred to as an oxide conductor film) The temperature dependency of the rate will be explained with reference to FIG.

[0241] Here, a sample having an oxide conductor film was prepared. The oxide conductor film (OC_SiN x ), In a doping apparatus, argon is added to the oxide semiconductor film and the oxide semiconductor film is brought into contact with the silicon nitride film. The oxide conductor film (OC_Ar doped + SiN x ), or Pla In the plasma processing apparatus, the oxide semiconductor film is exposed to argon plasma, and the silicon nitride film is The oxide conductive film formed by contacting with the plasma (OC_Ar+SiN x ) The silicon nitride film contains hydrogen.

[0242] Oxide conductive film (OC_SiN x The method for preparing a sample containing the ZnO film is as follows. A silicon oxynitride film with a thickness of 400 nm was formed by plasma CVD, and then the oxygen plasma was By exposing the silicon oxynitride film to a plasma and adding oxygen ions to it, oxygen is released by heating. Next, a silicon oxynitride film that releases oxygen when heated was formed. A sputtering target with an atomic ratio of In:Ga:Zn=1:1:1.2 was used on the film. A 100 nm thick In-Ga-Zn oxide film was formed by sputtering. Heat treatment in a nitrogen atmosphere at 50℃, then heat treatment in a nitrogen and oxygen mixed gas atmosphere at 450℃ Next, a silicon nitride film with a thickness of 100 nm was formed by plasma CVD. Then, the sample was heat-treated at 350° C. in a mixed gas atmosphere of nitrogen and oxygen.

[0243] Oxide conductor film (OC_Ar doped + SiN x The method for preparing the sample containing A 400 nm thick silicon oxynitride film is formed on a glass substrate by plasma CVD. After that, it is exposed to oxygen plasma to add oxygen ions to the silicon oxynitride film, A silicon oxynitride film that releases oxygen by heating was formed. On the silicon oxynitride film, sputtering was performed with the atomic ratio of In:Ga:Zn=1:1:1.2. A 100 nm thick In-Ga-Zn oxide was deposited by sputtering using a 100 nm thick target. The film was then heated in a nitrogen atmosphere at 450°C, and then heated in a nitrogen and oxygen mixture at 450°C. The substrate was then heat-treated in a gas atmosphere. Next, a doping device was used to deposit an In-Ga-Zn oxide film. The acceleration voltage was 10 kV and the dose was 5 × 10 14 / cm 2 of argon was added, Oxygen vacancies were created in the In-Ga-Zn oxide film. Next, a 10-cm thick film was formed by plasma CVD. Next, a silicon nitride film with a thickness of 0 nm was formed in a nitrogen and oxygen mixed gas atmosphere at 350°C. Heat treated.

[0244] Oxide conductive film (OC_Ar plasma + SiN x The preparation method of the sample including A silicon oxynitride film with a thickness of 400 nm was formed on a glass substrate by plasma CVD. A silicon oxynitride film that releases oxygen when heated by exposing it to oxygen plasma after formation. Next, a silicon oxynitride film having an atomic ratio of In was formed on the silicon oxynitride film which releases oxygen by heating. A sputtering method using a sputtering target of Ga:Zn=1:1:1.2 A 100 nm thick In-Ga-Zn oxide film was formed and heated in a nitrogen atmosphere at 450°C. After the heat treatment, the substrate was heated at 450°C in a mixed gas atmosphere of nitrogen and oxygen. In the argon plasma processing device, argon plasma is generated and accelerated argon ions are ionized into In- The oxygen vacancies were created by colliding with the Ga-Zn oxide film. Then, a silicon nitride film with a thickness of 100 nm was formed. The specimen was heat-treated in a nitrogen atmosphere.

[0245] Next, the resistivity of each sample was measured and the results are shown in Figure 34. Here, the resistivity was measured using a four-terminal The van der Pauw method was used. In FIG. 34, the horizontal axis indicates the measurement temperature, and the vertical axis indicates The resistivity of the oxide conductor film (OC_SiN x The measurement results of ) are shown with square marks, and Compound conductor film (OC_Ar plasma+SiN x The measurement results of ) are shown with triangles, and the oxidation Physical conductor film (OC_Ar dope+SiN x ) The measurement results are indicated by circles.

[0246] Although not shown, the oxide semiconductor film that is not in contact with the silicon nitride film has a high resistivity. Therefore, it was difficult to measure the resistivity of an oxide conductor film, which has a lower resistivity than an oxide semiconductor film. It is clear that...

[0247] As can be seen from FIG. 34, the oxide conductor film (OC_Ar doped+SiN x ) and oxidation Physical conductor film (OC_Ar plasma+SiN x ) contains oxygen vacancies and hydrogen, The resistivity fluctuation is small. Typically, the resistivity fluctuation rate is 80K or higher and 290K or lower. is less than ±20%. Or, the resistivity fluctuation rate is between 150K and 250K. The error is less than ±10%. In other words, oxide conductors are degenerate semiconductors, and the conduction band edge and the ferroelectric It is estimated that the valence level of the oxide conductor film is equal to or approximately equal to the valence level of the By using the oxide conductor film as the source and drain regions of a transistor, The contact with the conductive film functioning as the drain electrode is an ohmic contact, and the oxide conductor The contact resistance between the film and the conductive film functioning as the source electrode and the drain electrode can be reduced. Since the resistivity of the oxide conductor has a low temperature dependency, the oxide conductor film and the source and drain electrodes The variation in contact resistance with the conductive film that functions as the in-electrode is small, resulting in a highly reliable transistor. It is possible to create a

[0248] Here, a partial enlarged view of the oxide semiconductor film 366 is shown in FIG. 1. The transistor 390 will be described with reference to a partially enlarged view of an oxide semiconductor film 366 included in the transistor 390. As shown in FIG. 18A, the oxide semiconductor film 366 is A region 366a in contact with the insulating film 376, a region 366b in contact with the insulating film 372, In addition, when the side surface of the conductive film 374 has a tapered shape, 74. The tapered portion of the second end 366 may have an overlapping region 366c.

[0249] The region 366a functions as a source region and a drain region. 370 is tungsten, titanium, aluminum, copper, molybdenum, chromium, or tantalum When the semiconductor is made of a conductive material that easily bonds with oxygen, such as an element or an alloy, it is called an oxide semiconductor. The oxygen contained in the conductive film 366 is bonded to the conductive material contained in the conductive film 368 and the conductive film 370. In addition, oxygen vacancies are formed in the oxide semiconductor film 366. In the case where some of the constituent elements of the conductive material forming the conductive film 368 and the conductive film 370 are mixed into As a result, the region 366a in contact with the conductive film 368 or the conductive film 370 has a conductive and function as a source region or a drain region.

[0250] The region 366b functions as a low resistance region. In addition, when the side surface of the conductive film 374 has a tapered shape, In this case, the impurity element passes through the tapered portion of the conductive film 374 and is added to the region 366c. The region 366c has a lower concentration of rare gas elements, which are an example of impurity elements, compared to the region 366b. However, the region 366c includes an impurity element. The in-line breakdown voltage can be increased.

[0251] In the case where the oxide semiconductor film 366 is formed by a sputtering method, the regions 366a to 36 6d each contain a rare gas element, and compared to region 366a and region 366d, region The concentration of the rare gas element is higher in the region 366b and the region 366c. When 6 is formed by a sputtering method, a rare gas element is used as the sputtering gas. Therefore, a rare gas element is contained in the oxide semiconductor film 366 and the regions 366b and In 366c, rare gas elements are intentionally added to form oxygen vacancies. This is the cause. Note that in the regions 366b and 366c, A rare gas element other than 6d may be added.

[0252] In addition, since the region 366b is in contact with the insulating film 376, it is more difficult to obtain a uniform thickness than the region 366a and the region 366d. The concentration of hydrogen is higher in the region 366b. When hydrogen diffuses, the region 366c has a higher hydrogen concentration than the regions 366a and 366d. However, the hydrogen concentration is higher in region 366b than in region 366c.

[0253] In the region 366b and the region 366c, secondary ion mass spectrometry (SIMS) is performed. The hydrogen concentration obtained by Daily Ion Mass Spectrometry is , 8×10 19 atoms / cm 3 or more, or 1×10 20 atoms / cm 3 Above, again is 5 x 10 20atoms / cm 3 In addition, the area 366a and the area The hydrogen concentration obtained by secondary ion mass spectrometry in region 366d is 5 × 10 19 atoms / cm 3 or less, or 1×10 19 atoms / cm 3 or less, or 5 x 10 18 atoms / cm 3 or less, or 1×10 18 atoms / cm 3 or less, or 5 x 10 17 atoms / cm 3 or less, or 1×10 16 atoms / cm 3 It can be as follows:

[0254] In addition, impurity elements include boron, carbon, nitrogen, fluorine, aluminum, silicon, and phosphorus. When chlorine is added to the oxide semiconductor film 366, the regions 366b and 366c are Therefore, compared with the region 366a and the region 366d, only the region 3 The concentration of the impurity element is higher in the region 366b and the region 366c. In 66c, the concentration of impurity elements obtained by secondary ion mass spectrometry is 1×10 1 8 atoms / cm 3 More than 1×10 22 atoms / cm 3 or less, or 1×10 19 at oms / cm 3 More than 1×10 21 atoms / cm 3 or less, or 5 x 10 19 atoms / cm 3 5×10 or more 20 atoms / cm 3 It can be as follows:

[0255] Compared to the region 366d, the regions 366b and 366c have a high hydrogen concentration and a low rare gas concentration. The amount of oxygen vacancies is large due to the addition of silicon elements. This results in high electrical conductivity and a low resistance region. Typically, the resistivity of the region 366b and the region 366c is 1×10 -3 Ω cm or more 1×10 4 Less than Ωcm or 1×10 -3 Ωcm or more 1×10 -1 Less than Ωcm It is possible.

[0256] In the regions 366b and 366c, the amount of hydrogen is equal to or less than the amount of oxygen vacancies. If the thickness is small, hydrogen is easily captured by oxygen vacancies and is less likely to diffuse into the region 366d which is the channel. As a result, a transistor having normally-off characteristics can be manufactured.

[0257] Region 366d functions as a channel.

[0258] In addition, the oxide semiconductor film 36 is formed by using the conductive film 368, the conductive film 370, and the conductive film 374 as masks. After doping the impurity element into the conductive film 374, the area of ​​the upper surface of the conductive film 374 may be reduced ( More specifically, after the impurity element is added to the oxide semiconductor film 366, Then, a slimming process is performed on a mask (such as a photoresist) on the conductive film 374. Next, the conductive film 374 and the insulating film 372 are etched using the mask. By this process, a conductive film 374a and an insulating film 372a shown in FIG. 18B can be formed. The slimming process can be, for example, an ashing process using oxygen radicals. can be applied.

[0259] As a result, in the oxide semiconductor film 366, the region 366c and the region 366 which is a channel are An offset region 366e is formed between the first and second electrodes 366a and 366b. The length of the bit region 366e is set to be less than 0.1 μm, thereby reducing the on-state current of the transistor. It is possible to reduce the

[0260] The insulating film 372 and the insulating film 272 function as gate insulating films.

[0261] The conductive film 368 and the conductive film 370, and the conductive film 268 and the conductive film 270 form a source electrode and It also functions as a drain electrode.

[0262] The conductive film 374 and the conductive film 274 function as gate electrodes.

[0263] The transistor 390 and the transistor 394 in this embodiment function as channels. Between the region 366d which functions as a source region and a drain region, and the region 366a which functions as a The region 366b and / or the region 366c function as a low resistance region. It is possible to reduce the resistance between the source region and the drain region, and the transistor 3 The transistor 90 and the transistor 394 have a large on-current and a high field effect mobility.

[0264] In the transistors 390 and 394, the conductive film 374 and the conductive film 3 Since the conductive film 374 does not overlap with the conductive film 368 and the conductive film 370, It is possible to reduce the parasitic capacitance between the conductive film 274 and the conductive film 370. Since the conductive film 274, the conductive film 268, and the conductive film 270 do not overlap with each other, As a result, the parasitic capacitance between the substrate 362 and the semiconductor device 270 can be reduced. When a laminated substrate is used, the conductive film 368, the conductive film 370, the conductive film 374, and the conductive film 26 8 and the conductive film 270 and the conductive film 274 can reduce signal delay.

[0265] In the transistor 390, the conductive film 368, the conductive film 370, and the conductive film 374 are By adding a rare gas element to the oxide semiconductor film 366 as a mask, a region having oxygen vacancies can be formed. In the transistor 394, the conductive film 268, the conductive film 270, and The conductive film 274 is used as a mask to add an impurity element to the oxide semiconductor film 266, so that the oxide semiconductor film 266 is A region having oxygen vacancies is formed. Furthermore, the region having oxygen vacancies is formed by arranging the insulating film containing hydrogen. Since the insulating film 376 is in contact with the insulating film 376, hydrogen contained in the insulating film 376 is diffused into the region having oxygen vacancies. In other words, the low resistance region is formed by self-alignment. can be done.

[0266] In addition, the transistor 390 and the transistor 394 in this embodiment are By adding a rare gas element to the silicon dioxide, oxygen vacancies are formed and hydrogen is added. This allows the conductivity in the region 366b to be increased and the transistor It is possible to reduce the variation in the conductivity of the region 366b for each of the electrodes. By adding rare gas elements and hydrogen to 366b, the conductivity of region 366b can be controlled. be.

[0267] The configuration shown in FIG. 17 will be described in detail below.

[0268] The substrate 362 can be any of a variety of substrates and is not limited to a specific one. Examples of the substrate include a semiconductor substrate (e.g., a single crystal substrate or a silicon substrate), an SOI substrate, Plate, glass substrate, quartz substrate, plastic substrate, metal substrate, stainless steel substrate, Substrate with stainless steel foil, tungsten substrate, tungsten foil substrates, flexible substrates, laminated films, paper containing fibrous materials, or base films Examples of glass substrates include barium borosilicate glass and aluminoborosilicate glass. Acid glass, soda lime glass, etc. Flexible substrates, laminated films, base materials Examples of films include the following: Polyethylene naphthalate (PET), Polyethersulfone (P For example, there are plastics such as acrylic and other synthetic resins. Examples include polypropylene, polyester, polyvinyl fluoride, and Examples of the material include polyvinyl chloride, polyamide, polyimide, and aramid. , epoxy, inorganic deposition film, paper, etc. In particular, semiconductor substrates, single crystal substrates, Alternatively, by manufacturing a transistor using an SOI substrate or the like, the characteristics, size, or Manufacturing small-sized transistors with little variation in shape, high current capacity By configuring a circuit using such transistors, the power consumption of the circuit can be reduced. Alternatively, a higher degree of circuit integration can be achieved.

[0269] In addition, a flexible substrate is used as the substrate 362, and a transistor is formed directly on the flexible substrate. Alternatively, a release layer may be provided between the substrate 362 and the transistor. After a semiconductor device is partially or entirely completed thereon, it is separated from the substrate 362 and is then mounted on another substrate. In this case, the transistors can be mounted on substrates with poor heat resistance or flexible substrates. The above-mentioned peeling layer may be formed, for example, of a tungsten film and a silicon oxide film. The laminated structure is made of an inorganic film and an organic resin film such as polyimide formed on a substrate. Composition etc. can be used.

[0270] An example of a substrate on which a transistor is transferred is a substrate on which the above-mentioned transistor is formed. In addition to the available substrates, paper substrates, cellophane substrates, aramid film substrates, polyimide film substrates, Rubber substrate, stone substrate, wood substrate, cloth substrate (natural fibers (silk, cotton, hemp), synthetic fibers (nylon, Polyurethane, polyester) or regenerated fiber (acetate, cupra, rayon, regenerated The substrates used are made of synthetic polyester, leather, or rubber. This allows the formation of transistors with good characteristics and low power consumption. It is possible to manufacture devices that are less likely to break, heat resistant, lightweight, or thin.

[0271] The insulating film 364 can be formed as a single layer or a stack of an oxide insulating film or a nitride insulating film. Note that in order to improve interface characteristics with the oxide semiconductor film 266 and the oxide semiconductor film 366, Therefore, in the insulating film 364, at least the oxide semiconductor film 266 and the oxide semiconductor film 366 The contact region is preferably formed of an oxide insulating film. By using an oxide insulating film that releases oxygen more efficiently, the insulating film 364 The oxygen can be transferred to the oxide semiconductor film 266 and the oxide semiconductor film 366. do.

[0272] The thickness of the insulating film 364 is 50 nm or more and 5000 nm or less, or 100 nm or more and 3000 nm or less. The thickness of the insulating film 364 can be set to 200 nm or less, or 1000 nm or more. This can increase the amount of oxygen released from the insulating film 364. The interface states at the interfaces between the oxide semiconductor film 266 and the oxide semiconductor film 366 and the oxide semiconductor film The oxygen vacancies in the region 366d of the oxide semiconductor film 366 are reduced. It is possible to do so.

[0273] The insulating film 364 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or nitride. Silicon, aluminum oxide, hafnium oxide, gallium oxide, Ga-Zn oxide, etc. may be used, and may be provided as a single layer or a multilayer.

[0274] The oxide semiconductor film 366 and the oxide semiconductor film 266 are typically made of In—Ga oxide, I n-Zn oxide, In-M-Zn oxide (M is Mg, Al, Ti, Ga, Y, Zr, L The oxide semiconductor film 366 is formed of an oxide of a metal such as Cr, Ce, Nd, or Hf. The oxide semiconductor film 266 has a light-transmitting property.

[0275] Note that in the case where the oxide semiconductor film 366 and the oxide semiconductor film 266 are an In-M-Zn oxide, The atomic ratio of In to M is 25% when the sum of In and M is 100 atomic %. atomic% or more, M is less than 75 atomic%, or In is 34 atomic% or more , M is less than 66 atomic%.

[0276] The oxide semiconductor film 366 and the oxide semiconductor film 266 have an energy gap of 2 eV or more. Or it is 2.5 eV or more, or 3 eV or more.

[0277] The oxide semiconductor film 366 and the oxide semiconductor film 266 each have a thickness of 3 nm to 200 nm. Alternatively, it may be 3 nm or more and 100 nm or less, or 3 nm or more and 50 nm or less.

[0278] The oxide semiconductor film 366 and the oxide semiconductor film 266 are In-M-Zn oxide (M is Mg, In the case of Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf, In-M-Zn oxide The atomic ratio of the metal elements in the sputtering target used to deposit the oxide is In: It is preferable that M or more and Zn is M or more. The atomic ratio of the metal elements in the get is In:M:Zn=1:1:1, In:M:Zn=1 :1:1.2, In:M:Zn=2:1:1.5, In:M:Zn=2:1:2.3, I The preferred values ​​are n:M:Zn=2:1:3, In:M:Zn=3:1:2, etc. The atomic ratios of the oxide semiconductor film 366 and the oxide semiconductor film 266 are each determined by adding an upper limit value as an error. The atomic ratio of the metal elements contained in the sputtering target is within ±40%. Includes fluctuations.

[0279] In addition, in the oxide semiconductor film 366 and the oxide semiconductor film 266, When silicon or carbon is contained, oxygen vacancies are increased, and the oxide semiconductor film 366 and the oxide The oxide semiconductor film 366 and the oxide semiconductor In the film 266, especially in the region 366d, the concentrations of silicon and carbon (secondary ion mass The concentration obtained by the analytical method is 2 x 10 18 atoms / cm 3 or less, or 2 x 10 1 7atoms / cm 3 As a result, the transistor has a threshold voltage of It has electrical characteristics in which the voltage is positive (also called normally-off characteristics).

[0280] In the oxide semiconductor film 366 and the oxide semiconductor film 266, particularly in the region 366d, The concentration of alkali metals or alkaline earth metals obtained by secondary ion mass spectrometry is , 1×10 18 atoms / cm 3 or less, or 2 x 10 16 atoms / cm 3 The following It is preferable that the alkali metal and the alkaline earth metal form a catalyst when bonded to an oxide semiconductor. In some cases, carriers may be generated, which may increase the off-state current of the transistor. Therefore, it is preferable to reduce the concentration of alkali metal or alkaline earth metal in region 366d. As a result, the transistor has electrical characteristics in which the threshold voltage is positive (normally-on). (also called the "f" characteristic.

[0281] In the oxide semiconductor film 366 and the oxide semiconductor film 266, nitrogen is particularly present in the region 366d. When an element is included, electrons that act as carriers are generated, the carrier density increases, and the material becomes n-type. As a result, the transistor 390 using the oxide semiconductor film containing nitrogen can be obtained. 394 tends to be normally-on. In particular, in the region 366d, it is preferable that the nitrogen is reduced as much as possible. The nitrogen concentration obtained by secondary ion mass spectrometry was 5×10 18 atoms / cm 3 Below It is preferable to do so.

[0282] In the oxide semiconductor film 366 and the oxide semiconductor film 266, particularly in the region 366d, It is preferable to reduce the carrier density of the oxide semiconductor film by reducing the impurity elements. For example, in the oxide semiconductor film 366 and the oxide semiconductor film 266, the region 366d In this case, the carrier density is 1×10 17 pieces / cm 3 or less, or 1×10 15 pieces / cm 3 or less, or 1×10 13 pieces / cm 3 or less, or 1×10 11 pieces / cm 3 The following shall be preferable.

[0283] The oxide semiconductor film 366 and the oxide semiconductor film 266 have low impurity concentrations and low defect state densities. By using an oxide semiconductor film with a low thermal conductivity, a transistor with better electrical characteristics can be realized. Here, the impurity concentration is low and the defect level density is low (oxygen vacancy). High purity genuine or substantially high purity genuine is called high purity genuine or substantially high purity genuine. Since highly intrinsic oxide semiconductors have few carrier generation sources, it is possible to reduce the carrier density. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film may be formed. The transistor has electrical characteristics in which the threshold voltage is positive (also called normally-off characteristics). In addition, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film is likely to have defect states. Since the density is low, the trap level density may also be low. The oxide semiconductor film, which is highly pure and intrinsic, has a significantly small off-state current and is When the voltage between the electrodes (drain voltage) is in the range of 1V to 10V, the off-state current is Below the measurement limit of the parameter analyzer, i.e. 1×10 -13 Achieving a characteristic of A or less Therefore, a transistor in which a channel region is formed in the oxide semiconductor film can be In some cases, the change in electrical characteristics is small, resulting in a highly reliable transistor.

[0284] The oxide semiconductor film 366 and the oxide semiconductor film 266 may have a non-single crystal structure, for example. Non-single crystal structures include, for example, CAAC-OS (C Axis Aligned Crystals). talline Oxide Semiconductor), polycrystalline structure, microcrystalline structure Among non-single crystal structures, the amorphous structure has the highest defect level density. CAAC-OS has the lowest defect density. For details on CAAC-OS, see This will be explained in the sixth embodiment.

[0285] Note that the oxide semiconductor film 366 and the oxide semiconductor film 266 have an amorphous structure and a microcrystalline structure. The structure has two or more of the following regions: a region of a polycrystalline structure, a region of a CAAC-OS structure, and a region of a single crystal structure. The mixed film may be, for example, a region having an amorphous structure, a region having a microcrystalline structure, Two or more of the following regions: a polycrystalline structure region, a CAAC-OS region, and a single-crystalline structure region In some cases, the mixed film has a single layer structure having an amorphous structure, a microcrystalline structure, or the like. Two of the following structures are selected: a region of a crystal structure, a region of a polycrystalline structure, a region of a CAAC-OS structure, and a region of a single crystal structure. There are cases where the above structures are laminated.

[0286] Note that in the oxide semiconductor film 366 and the oxide semiconductor film 266, the region 366b and the region In addition, the oxide semiconductor film 366 and the oxide semiconductor In the film 266, the crystallinity of the region 366c may be different from that of the region 366d. When an impurity element is added to the region 366b or the region 366c, This is because the region 366c is damaged, resulting in a decrease in crystallinity.

[0287] The insulating film 272 and the insulating film 372 are formed of a single layer or a stack of an oxide insulating film or a nitride insulating film. Note that the interface characteristics between the oxide semiconductor film 366 and the oxide semiconductor film 266 can be In order to improve the thermal conductivity, the insulating film 272 and the insulating film 372 each include at least an oxide semiconductor film. The region in contact with the oxide semiconductor film 366 and the oxide semiconductor film 266 is preferably formed using an oxide insulating film. The insulating film 272 and the insulating film 372 are preferably made of, for example, silicon oxide or silicon oxynitride. , silicon oxide nitride, silicon nitride, aluminum oxide, hafnium oxide, gallium oxide Alternatively, Ga-Zn oxide or the like may be used, and it may be provided as a single layer or a multilayer.

[0288] In addition, the insulating film 272 and the insulating film 372 have a blocking effect against oxygen, hydrogen, water, and the like. By providing the insulating film, oxygen from the oxide semiconductor film 366 and the oxide semiconductor film 266 can be prevented. and hydrogen from the outside into the oxide semiconductor film 366 and the oxide semiconductor film 266. It is possible to prevent the intrusion of water, etc. It is an insulating film that has a blocking effect on oxygen, hydrogen, water, etc. Examples include aluminum oxide, aluminum oxynitride, gallium oxide, gallium oxynitride, Yttrium oxide, yttrium oxynitride, hafnium oxide, hafnium oxynitride, etc. do.

[0289] The insulating film 272 and the insulating film 372 are made of hafnium silicate (HfSiO x ), Nitrogen-doped hafnium silicate (HfSi x O y N z ), nitrogen-added Huff HfAl x O y N z ), hafnium oxide, yttrium oxide, etc. The use of high-k materials can reduce gate leakage of transistors.

[0290] The insulating films 272 and 372 are formed using an oxide insulating film that releases oxygen by heating. By using the insulating film 272, oxygen contained in the insulating film 272 and the insulating film 372 can be converted to oxide by heat treatment. The oxide semiconductor film 266 can be transferred to the semiconductor film 366 and the oxide semiconductor film 266 .

[0291] In addition, a silicon oxynitride film with few defects is used as the insulating film 272 and the insulating film 372. The silicon oxynitride film with few defects can be formed at a temperature of 100K or less after the heat treatment. In the spectrum obtained by ESR measurement, the g value is 2.037 or more and 2.039 or less. A first signal, a second signal with a g value of 2.001 to 2.003, and a g value of 1 A third signal between .964 and 1.966 is observed. Note that the first signal and Split width of the second signal and split width of the second signal and the third signal The width is about 5 mT in the X-band ESR measurement. The total density of spins is 1×10 18 spins / cm 3 Less than 1×1 0 17 spins / cm 3 More than 1×10 18 spins / cm 3 is less than.

[0292] In addition, in the ESR spectrum below 100K, the g value is 2.037 to 2.039. The first signal, the second signal with a g value between 2.001 and 2.003, and the g value between 1. The third signal, between 964 and 1.966, is nitrogen oxide (NO x , x is between 0 and 2 or 1 or more and 2 or less). That is, the signals of the first to third signals The lower the total density of the pins, the lower the nitrogen oxide content in the silicon oxynitride film. It can be said that.

[0293] In addition, the silicon oxynitride film with few defects has a nitrogen concentration measured by secondary ion mass spectrometry. But 6×10 20 atoms / cm 3 The insulating film 272 and the insulating film 372 are as follows. By using a silicon oxynitride film with few defects, nitrogen oxide is less likely to be generated, and The carrier transport at the interface between the oxide semiconductor film 366 and the insulating film is In addition, the electrical characteristics of the transistor included in the light-emitting device can be improved. It is possible to reduce the shift in threshold voltage and reduce the fluctuation in the electrical characteristics of the transistor. It can be reduced.

[0294] The thickness of the insulating film 272 and the insulating film 372 is 5 nm or more and 400 nm or less, or 5 nm or more and 300 nm or less. 00 nm or less, or 10 nm or more and 250 nm or less.

[0295] The conductive films 368, 370, 374, 268, 270, 261, and 274 are made of aluminum. Aluminum, Chromium, Copper, Tantalum, Titanium, Molybdenum, Nickel, Iron, Cobalt, Tungste or an alloy containing the above-mentioned metal elements, or It can be formed by using an alloy of manganese, zirconium, etc. The conductive film may be a single layer. For example, a silicon-containing aluminum film may be used. Single layer structure, single layer structure of copper film containing manganese, two-layer structure with titanium film laminated on aluminum film Structure: Two-layer structure with titanium film laminated on titanium nitride film; Tungsten film on titanium nitride film A two-layer structure in which a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film. A two-layer structure in which a copper film is laminated on a copper film containing manganese; a two-layer structure in which a titanium film and its titanium are laminated on a copper film containing manganese; A three-layer structure in which an aluminum film is laminated on a titanium film and a titanium film is further formed on top of that. A three-layer structure in which a copper film containing manganese is formed on top of a copper film containing manganese. Aluminum, titanium, tantalum, tungsten, molybdenum, chromium, etc. An alloy film of one or more combinations of elements selected from the group consisting of aluminum, neodymium, and scandium, or Alternatively, a nitride film may be used.

[0296] The conductive films 368, 370, 374, 268, 270, 261, and 274 are made of indium. Tin oxide, indium oxide with tungsten oxide, indium oxide with tungsten oxide Indium zinc oxide, indium oxide with titanium oxide, indium tin oxide with titanium oxide Translucent materials such as indium zinc oxide and indium tin oxide containing silicon oxide A conductive material may also be used. It may also be a laminated structure of a conductive material containing the element.

[0297] The thickness of the conductive films 368, 370, 374, 268, 270, 261, and 274 is 30 nm or less. It may be at most 500 nm, or at least 100 nm and at most 400 nm.

[0298] The insulating film 376 is a film containing hydrogen, and a representative example is a nitride insulating film. The insulating film can be formed using silicon nitride, aluminum nitride, or the like.

[0299] <Transistor configuration example 2> Next, another structure of a transistor included in a light-emitting device will be described with reference to FIG. Here, a transistor 391 is used as a modification of the transistor 390 provided in the pixel portion. In the description, the insulating film 364 of the transistor 391 is connected to the transistor 394 of the driver circuit. or the structures of the conductive films 368, 370, and 374 can be appropriately applied. can.

[0300] 19A to 19C are top views and cross-sectional views of a transistor 391 included in a light-emitting device. 19A is a top view of the transistor 391, and FIG. 19(A) is a cross-sectional view taken along the dashed line Y3-Y4 in FIG. 19(A), and FIG. 19(C) is a cross-sectional view taken along the dashed line Y3-Y4 in FIG. FIG. 11 is a cross-sectional view taken along dashed line X3-X4.

[0301] A transistor 391 illustrated in FIG. 19 includes a conductive film 368, a conductive film 370, and a conductive film 374. The insulating film 364 has a two-layer or three-layer structure. The other components are the same as those of the transistor 39. It is the same as 0 and has the same effect.

[0302] First, the conductive film 368, the conductive film 370, and the conductive film 374 will be described.

[0303] The conductive film 368 is a laminate of a conductive film 368a, a conductive film 368b, and a conductive film 368c. In addition, the conductive film 368a and the conductive film 368c cover the surface of the conductive film 368b. That is, the conductive film 368a and the conductive film 368c function as a protective film for the conductive film 368b. do.

[0304] Like the conductive film 368, the conductive film 370 includes a conductive film 370a, a conductive film 370b, and a conductive film 370c. The conductive film 370a and the conductive film 370c are laminated in this order, and the conductive film 370a and the conductive film 370c are laminated in this order. That is, the conductive film 370a and the conductive film 370c cover the surface of the conductive film 370b. It functions as a protective film for b.

[0305] The conductive film 374 is formed by laminating a conductive film 374a and a conductive film 374b in this order.

[0306] The conductive film 368a, the conductive film 370a, and the conductive film 374a include the conductive film 368b, the conductive film 370b, which prevents a metal element contained in the conductive film 374b from diffusing into the oxide semiconductor film 366. The conductive films 368a, 370a, and 374a are formed using a material other than the conductive film 368a. Titanium, tantalum, molybdenum, tungsten, or alloys thereof, or titanium nitride, The insulating layer 11 can be formed using tantalum nitride, molybdenum nitride, tungsten nitride, or the like. The conductive film 368a, the conductive film 370a, and the conductive film 374a are made of a Cu-X alloy (X is Mn, It can be formed using Ni, Cr, Fe, Co, Mo, Ta, or Ti).

[0307] The conductive films 368b, 370b, and 374b are formed using a low-resistance material. The conductive film 368b, the conductive film 370b, and the conductive film 374b are made of copper, aluminum, It can be formed using gold, silver, etc., or alloys, or compounds that contain these as the main components. can.

[0308] The conductive film 368c and the conductive film 370c are each formed of the conductive film 368b and the conductive film 370b. The conductive film 368b and the conductive film 370 are formed by using a film in which a metal element is passivated. The metal element contained in b migrates to the oxide semiconductor film 366 in the process of forming the insulating film 376. The conductive film 368c and the conductive film 370c may be made of a metal silicide. , metal silicide nitride, etc., and a representative example is CuSi x (x> 0), CuSi x N y (x>0, y>0), etc.

[0309] Here, a method for forming the conductive film 368c and the conductive film 370c will be described. The conductive film 368b and the conductive film 370b are formed using copper. The film 370c is CuSi x N y It is formed using (x>0, y>0).

[0310] The conductive film 368b and the conductive film 370b are heated in a reducing atmosphere of hydrogen, ammonia, carbon monoxide, or the like. The conductive film 368b and the conductive film 370b are exposed to the plasma generated by the above-mentioned method to reduce oxides on the surfaces of the conductive film 368b and the conductive film 370b. do.

[0311] Next, the conductive film 368b and the conductive film 370b are heated at 200° C. or more and 400° C. or less. As a result, copper contained in the conductive film 368b and the conductive film 370b is exposed to silane as a catalyst. The silane is decomposed into Si and H2, and the conductive film 368b and the conductive film 370b are CuSi x (x>0) is formed.

[0312] Next, the conductive film 368b and the conductive film 370b are heated in an ammonia atmosphere or a nitrogen atmosphere, etc. By exposing the conductive film 368b and the conductive film 370b to plasma generated in an atmosphere containing CuSi formed on the surface x (x>0) reacts with nitrogen contained in the plasma to form a conductive film 36 8c and the conductive film 370c, CuSi x N y (x>0, y>0) is formed.

[0313] In the above steps, the conductive film 368b and the conductive film 370b are heated in an ammonia atmosphere or a nitrogen atmosphere. After exposure to plasma generated in a nitrogen-containing atmosphere such as a nitrogen atmosphere, the The conductive film 368b and the conductive film 370b are exposed to silane while being heated at 368c and the conductive film 370c are CuSi x N y (x>0, y>0) may be formed. stomach.

[0314] Next, the insulating film 364 in which the nitride insulating film 364a and the oxide insulating film 364b are stacked is He explains.

[0315] For example, the nitride insulating film 364a may be made of silicon nitride, silicon nitride oxide, or aluminum nitride. The oxide insulating film 364 can be formed using aluminum nitride oxide, aluminum oxide, or the like. b is formed using silicon oxide, silicon oxynitride, aluminum oxide, etc. By providing the nitride insulating film 364a on the substrate 362 side, hydrogen, water, etc. from the outside can be prevented. It is possible to prevent diffusion of the oxide semiconductor film 366.

[0316] <Transistor configuration example 3> Next, another configuration of a transistor included in a light emitting device will be described with reference to FIGS. 20 and 21. Here, a transistor 390 provided in the pixel portion is described as a modified example. The description will be given using transistors 392 and 393, but the transistor 394 in the driver circuit will be The structure of the oxide semiconductor film 366 included in the transistor 392 or the structure of the oxide semiconductor film 366 included in the transistor 393 The structure of the included oxide semiconductor film 366 can be applied as appropriate.

[0317] 20A to 20C are top views and cross-sectional views of a transistor 392 included in a light-emitting device. 20A is a top view of the transistor 392, and FIG. 20(A) is a cross-sectional view taken along the dashed line Y3-Y4 in FIG. 20(A), and FIG. 20(C) is a cross-sectional view taken along the dashed line Y3-Y4 in FIG. FIG. 11 is a cross-sectional view taken along dashed line X3-X4.

[0318] In the transistor 392 illustrated in FIG. 20, the oxide semiconductor film 366 has a multilayer structure. Specifically, the oxide semiconductor film 366 is formed by dividing the oxide semiconductor film 367a into the insulating film 364 and the oxide semiconductor film 367b. an oxide semiconductor film 367b in contact with the oxide semiconductor film 367a; b: An oxide semiconductor in contact with the conductive film 368, the conductive film 370, the insulating film 372, and the insulating film 376 The other configurations are the same as those of the transistor 390, and the same effects are obtained. It plays a key role.

[0319] The oxide semiconductor film 367a, the oxide semiconductor film 367b, and the oxide semiconductor film 367c are typically In particular, In-Ga oxide, In-Zn oxide, and In-M-Zn oxide (M is Mg, A It is formed of a metal oxide such as Ti, Ga, Y, Zr, La, Ce, Nd, or Hf. .

[0320] The oxide semiconductor film 367a and the oxide semiconductor film 367c are typically made of In-Ga Oxide, In-Zn oxide, In-Mg oxide, Zn-Mg oxide, In-M-Zn oxide (M is Mg, Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf), In addition, the energy of the conduction band minimum is closer to the vacuum level than that of the oxide semiconductor film 367b. is the energy of the conduction band minimum of the oxide semiconductor film 367a and the oxide semiconductor film 367c, and The difference in energy between the conduction band minimum of the oxide semiconductor film 367b and the conduction band minimum of the oxide semiconductor film 367c is 0.05 eV or more and 0.0 7 eV or more, 0.1 eV or more, or 0.2 eV or more and 2 eV or less, 1 eV or less, 0. The energy difference between the vacuum level and the bottom of the conduction band is 5 eV or less, or 0.4 eV or less. It is also called electron affinity.

[0321] The oxide semiconductor film 367b is an In-M-Zn oxide (M is Mg, Al, Ti, Ga, Y, In the case of the oxide semiconductor film 367b, the oxide semiconductor film 367b is formed by adding the oxide semiconductor film 367b. In the target used, the atomic ratio of metal elements is In:M:Zn=x1:y1:z1. Then 、 x1 / y1 is 1 / 3 or more and 6 or less, and further 1 or more and 6 or less, and z1 / y1 is preferably 1 / 3 or more and 6 or less, and more preferably 1 or more and 6 or less. When the ratio is set to 1 or more and 6 or less, a CAAC-OS film is formed as the oxide semiconductor film 367b. A typical example of the atomic ratio of the metal elements in the target is In:M:Zn=1. :1:1, In:M:Zn=1:1:1.2, In:M:Zn=2:1:1.5, In: M:Zn=2:1:2.3, In:M:Zn=2:1:3, In:M:Zn=3:1:2 etc.

[0322] The oxide semiconductor film 367a and the oxide semiconductor film 367c are an In-M-Zn oxide (M is M g, Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf), oxide semiconductor The film 367a and the oxide semiconductor film 367c were formed using a gold target. If the atomic ratio of group elements is In:M:Zn=x2:y2:z2, 、 x2 / y2 <x1 / y 1, and z2 / y2 is preferably 1 / 3 or more and 6 or less, and more preferably 1 or more and 6 or less. Note that when z2 / y2 is set to 1 or more and 6 or less, the oxide semiconductor film 367a and the oxide The CAAC-OS film is easily formed as the semiconductor film 367c. Representative examples of atomic ratios are In:M:Zn=1:3:2 and In:M:Zn=1:3. :4, In:M:Zn=1:3:6, In:M:Zn=1:3:8, In:M:Zn=1 :4:3, In:M:Zn=1:4:4, In:M:Zn=1:4:5, In:M:Zn =1:4:6, In:M:Zn=1:6:3, In:M:Zn=1:6:4, In:M: Zn=1:6:5, In:M:Zn=1:6:6, In:M:Zn=1:6:7, In: Examples include M:Zn=1:6:8, In:M:Zn=1:6:9, etc.

[0323] Note that the oxide semiconductor films 367a, 367b, and 367c The atomic ratios each include a variation of ±40% from the above atomic ratios as an error.

[0324] The atomic ratio is not limited to these, and an appropriate atomic ratio may be used depending on the required semiconductor characteristics. Just use the following.

[0325] The oxide semiconductor film 367a and the oxide semiconductor film 367c may have the same composition. The oxide semiconductor film 367a and the oxide semiconductor film 367c are made of In:Ga:Zn=1:3. :2, 1:3:4, 1:4:5, 1:4:6, 1:4:7, or 1:4:8 atomic ratio In-Ga-Zn oxide may also be used.

[0326] Alternatively, the oxide semiconductor film 367a and the oxide semiconductor film 367c may have different compositions. For example, the oxide semiconductor film 367a may be an In- A Ga-Zn oxide was used as the oxide semiconductor film 367c. Alternatively, an In-Ga-Zn oxide having an atomic ratio of 1:4:5 may be used.

[0327] The oxide semiconductor film 367a and the oxide semiconductor film 367c have a thickness of 3 nm or more and 100 nm or less. The thickness of the oxide semiconductor film 367b is 3 nm or more, or 3 nm or more and 50 nm or less. 200nm or less, or 3nm or more and 100nm or less, or 3nm or more and 50nm or less. Note that the oxide semiconductor film 367a and the oxide semiconductor film 367c are the oxide semiconductor film 3 By making the thickness thinner than 67b, the amount of variation in the threshold voltage of the transistor is reduced. is possible.

[0328] The oxide semiconductor film 367a, the oxide semiconductor film 367b, and the oxide semiconductor film 367c The interface is a scanning transmission electron microscope (STEM). In some cases, it may be possible to observe the lesion using a microscope.

[0329] The oxide semiconductor film 367a and the oxide semiconductor film 367b are less likely to have oxygen vacancies than the oxide semiconductor film 367b. The oxide semiconductor film 367c is provided in contact with the upper surface and the lower surface of the oxide semiconductor film 367b. This can reduce oxygen vacancies in the oxide semiconductor film 367b. The oxide semiconductor film 367b is an oxide semiconductor film having one or more metal elements constituting the oxide semiconductor film 367b. The oxide semiconductor film 367 a and the oxide semiconductor film 367b. The interface state density at the interface with the oxide semiconductor film 367b is extremely low. It is possible to reduce the oxygen vacancies that are present in the crystal.

[0330] In addition, by providing the oxide semiconductor film 367a, the electric field such as the threshold voltage of the transistor can be reduced. The variation in characteristics can be reduced.

[0331] In addition, the oxide semiconductor film 367b includes one or more metal elements. Since the oxide semiconductor film 367b is provided in contact with the oxide semiconductor film 367c, At the interface with the semiconductor film 367c, carrier scattering is unlikely to occur, and the field effect of the transistor The mobility can be increased.

[0332] The oxide semiconductor films 367a and 367c are formed by the insulating film 364 and the insulating film The constituent element of the oxide semiconductor film 372 is mixed into the oxide semiconductor film 367b, and an impurity level is formed. It also functions as a barrier film to prevent this.

[0333] From the above, the transistor described in this embodiment has improved electrical characteristics such as a threshold voltage. This is a transistor with reduced fluctuations.

[0334] FIG. 21 shows a transistor having a different structure from that shown in FIG.

[0335] 21A to 21C are top views and cross-sectional views of a transistor 393 included in a light-emitting device. FIG. 21A is a top view of the transistor 393, and FIG. 21B is a top view of the transistor 393. 21(A) is a cross-sectional view taken along the dashed line Y3-Y4 in FIG. 21(A), and FIG. 21(C) is a cross-sectional view taken along the dashed line Y3-Y4 in FIG. 21A is a cross-sectional view taken along the dashed line X3-X4. Note that in FIG. 21A, for clarity, the substrate 362 21B, the insulating film 364, the insulating film 372, the insulating film 376, etc. are omitted. FIG. 21(C) is a cross-sectional view of the transistor 393 in the channel width direction. 3 is a cross-sectional view of a transistor 393 in the channel length direction.

[0336] In a transistor 393 illustrated in FIG. 21, an oxide semiconductor film 366 is in contact with an insulating film 364. an oxide semiconductor film 367b in contact with the oxide semiconductor film 367b and the insulating film 372; Alternatively, the semiconductor layer 367c may have a laminated structure.

[0337] <Band structure> Here, the band structures of the transistors shown in FIGS. 22(A) is a band structure of the transistor 392 shown in FIG. 20 for ease of understanding. Therefore, the insulating film 364, the oxide semiconductor film 367a, the oxide semiconductor film 367b, and the oxide semiconductor The energy (Ec) of the conduction band minimum of the film 367c and the insulating film 372 is shown in FIG. B) is a band structure of the transistor 393 shown in FIG. 21, for ease of understanding. The insulating film 364, the oxide semiconductor film 367b, the oxide semiconductor film 367c, and the insulating film 372 The energy at the bottom of the conductive band (Ec) is shown.

[0338] As shown in FIG. 22A, the oxide semiconductor film 367a, the oxide semiconductor film 367b, and the oxide semiconductor film 367c are In the oxide semiconductor film 367c, the energy of the conduction band minimum changes continuously. The oxide semiconductor film 367a, the oxide semiconductor film 367b, and the oxide semiconductor film 367c are This can also be understood from the fact that oxygen easily diffuses between the elements. The oxide semiconductor films 367a, 367b, and 367c have the following compositions: Although it is a laminate of films with different thicknesses, it can also be said that it is physically continuous.

[0339] The oxide semiconductor film, which is laminated with a common main component, is not simply laminated but is continuously joined. In this case, the energy of the conduction band edge changes continuously between layers. In other words, the interface between each layer is fabricated so that a U-shaped well structure is formed. In oxide semiconductors, defect states such as trap centers and recombination centers, or carrier The laminated structure is formed so that there are no impurities that hinder the flow of oxygen. When impurities are present between layers of a semiconductor film, the continuity of the energy band is lost, and The carriers disappear due to trapping or recombination.

[0340] Note that in FIG. 22A, the Ec of the oxide semiconductor film 367a and the Ec of the oxide semiconductor film 367c are the same. Although similar cases are shown, they may be different.

[0341] As shown in FIG. 22A, the oxide semiconductor film 367b serves as a well, and the transistor 39 In FIG. 2, it can be seen that a channel is formed in the oxide semiconductor film 367b. The oxide semiconductor film 367a, the oxide semiconductor film 367b, and the oxide semiconductor film 367c have a conduction band minimum. Since the energy of changes continuously, a U-shaped well structure channel is used as a buried channel. It is also possible to say that.

[0342] As shown in FIG. 22B, the oxide semiconductor film 367b and the oxide semiconductor film 367c In the above, the energy of the conduction band minimum may change continuously.

[0343] As shown in FIG. 22B, the oxide semiconductor film 367b serves as a well, and the transistor 39 3, it can be seen that a channel is formed in the oxide semiconductor film 367b.

[0344] The transistor 392 illustrated in FIG. 20 includes an oxide semiconductor film 367b including one kind of metal element. Since the oxide semiconductor film 367a and the oxide semiconductor film 367c include the above, The interface between the oxide semiconductor film 367a and the oxide semiconductor film 367b and the oxide semiconductor film 367 Therefore, an interface state is unlikely to be formed at the interface between the oxide semiconductor film 367c and the oxide semiconductor film 367b. By providing the conductive film 367a and the oxide semiconductor film 367c, This can reduce the variation and fluctuation in electrical characteristics such as the voltage.

[0345] The transistor 393 illustrated in FIG. 21 includes an oxide semiconductor film 367b including one kind of metal element. Since the oxide semiconductor film 367c contains the above-mentioned oxide semiconductor film, Therefore, the interface state is unlikely to be formed at the interface with the oxide semiconductor film 367b. By providing 367c, the variation of electrical characteristics such as the threshold voltage of the transistor and Fluctuations can be reduced.

[0346] <Transistor configuration example 4> Next, another structure of a transistor included in a light-emitting device will be described with reference to FIGS. 23 and 24. explain.

[0347] 23A to 23C are top views and cross-sectional views of a transistor 150 included in a light-emitting device. 23A is a top view of the transistor 150, and FIG. 23(A) is a cross-sectional view taken along the dashed line Y3-Y4 in FIG. 23(A), and FIG. 23(C) is a cross-sectional view taken along the dashed line Y3-Y4 in FIG. FIG. 11 is a cross-sectional view taken along dashed line X3-X4.

[0348] The transistor 150 shown in FIG. 23 is an oxide film on an insulating film 104 formed on a substrate 102. A semiconductor film 106, an insulating film 108 in contact with the oxide semiconductor film 106, and an opening in the insulating film 108. The conductive film 110 in contact with the oxide semiconductor film 106 in a part of the portion 140a and the insulating film 108 The conductive film 112 is in contact with the oxide semiconductor film 106 in part of the opening 140b. The conductive film 114 overlaps with the oxide semiconductor film 106 with the oxide semiconductor film 108 interposed therebetween. An insulating film 116 and an insulating film 118 may be provided on the star 150 .

[0349] In the oxide semiconductor film 106, the conductive film 110, the conductive film 112, and the conductive film 114 are not overlapped. In the following, the element that forms the oxygen vacancy is referred to as the oxygen vacancy. The following explanation will be given as pure elements. Representative examples of impurity elements are hydrogen, boron, carbon, nitrogen, and fluorine. There are fluorine, aluminum, silicon, phosphorus, chlorine, and rare gas elements. Representative examples of rare gas elements These include helium, neon, argon, krypton and xenon.

[0350] When an impurity element is added to an oxide semiconductor film, a bond between a metal element and oxygen in the oxide semiconductor film is formed. The bond is broken, and oxygen vacancies are formed. Alternatively, an impurity element is added to the oxide semiconductor film. Then, oxygen that has been bonded to a metal element in the oxide semiconductor film is bonded to an impurity element, and the oxygen is converted from the metal element to an impurity element. As a result, oxygen is released from the oxide semiconductor film, and oxygen vacancies are formed. The rear density increases and the conductivity becomes higher.

[0351] Here, a partial enlarged view of the oxide semiconductor film 106 is shown in FIG. The semiconductor film 106 has a region 106a in contact with the conductive film 110 and the conductive film 112 and a region 106b in contact with the insulating film 106. 16, and regions 106c and 106d overlapping with the insulating film 108. Yes.

[0352] Region 106a is highly conductive and acts as a source region and a It functions as a drain region.

[0353] The region 106b and the region 106c function as low resistance regions. The region 106b contains more impurity elements than the region 106c. In addition, when the side surface of the conductive film 114 has a tapered shape, The portion may overlap the conductive film 114.

[0354] The impurity element is a rare gas element, and the oxide semiconductor film 106 is formed by a sputtering method. In this case, the regions 106a to 106d each contain a rare gas element, and the region 106a The concentrations of rare gas elements are higher in regions 106b and 106c than in regions 106d. This is because, when the oxide semiconductor film 106 is formed by a sputtering method, Since a rare gas element is used as the etching gas, the oxide semiconductor film 106 contains a rare gas element. In addition, in order to form oxygen vacancies in the regions 106b and 106c, This is because rare gas elements are added to the regions 106b and 106c. In the region 106b, a rare gas element different from that in the region 106a and the region 106d may be added.

[0355] Impurity elements are boron, carbon, nitrogen, fluorine, aluminum, silicon, phosphorus, or salt. In the case of a GaN-GaN GaN, only the regions 106b and 106c contain the impurity element. The impurity elements in the regions 106b and 106c are higher than those in the regions 106a and 106d. In the regions 106b and 106c, the impurity concentration obtained by SIMS is The concentration of the pure element is 1×10 18 atoms / cm 3 More than 1×10 22 atoms / cm 3 or less, or 1×10 19 atoms / cm 3 More than 1×10 21 atoms / cm 3 below , or 5 × 10 19 atoms / cm 3 5×10 or more 20 atoms / cm 3 The following It is possible.

[0356] When the impurity element is hydrogen, the regions 106b and 106c are larger than the regions 106a and 106d. The concentration of the impurity element is higher in the region 106b and the region 106c. The hydrogen concentration measured by SIMS is 8×10 19 atoms / cm 3 That's all, Or 1×1020 atoms / cm 3 or more, or 5 x 10 20 atoms / cm 3 That's all It is possible.

[0357] Since the regions 106b and 106c contain impurity elements, oxygen vacancies increase, and the carrier As a result, regions 106b and 106c become more conductive and have a lower resistance. It functions as an anti-region.

[0358] The impurity elements are hydrogen, boron, carbon, nitrogen, fluorine, aluminum, silicon, and lithium. In this case, the region 1 may contain one or more of the rare gas elements, fluorine, arsenic, or chlorine. In the region 06b and the region 106c, oxygen vacancies formed by rare gas elements, and Hydrogen, boron, carbon, nitrogen, fluorine, aluminum, silicon, phosphorus, or Due to interaction with one or more of the chlorines, regions 106b and 106c become more conductive. This may happen.

[0359] The region 106d functions as a channel.

[0360] A region of the insulating film 108 that overlaps with the oxide semiconductor film 106 and the conductive film 114 is a gate electrode. The insulating film 108 functions as an insulating film. The region where the insulating film 10 and the conductive film 112 overlap functions as an interlayer insulating film.

[0361] The conductive film 110 and the conductive film 112 function as a source electrode and a drain electrode. The conductive film 114 functions as a gate electrode.

[0362] In the manufacturing process of the transistor 150 in this embodiment, The conductive film 110 and the conductive film 112 function as a source electrode and a drain electrode. Therefore, in the transistor 150, the conductive film 114 is formed at the same time. The conductive film 110 and the conductive film 112 do not overlap each other, and the conductive film 114 and the conductive film 110 and the conductive film 112 do not overlap each other. As a result, the parasitic capacitance between the substrate 102 and the conductive film 112 can be reduced. When a large-area substrate is used, the signal delay in the conductive film 110, the conductive film 112, and the conductive film 114 It is possible to reduce the delay.

[0363] In the transistor 150, the conductive film 110, the conductive film 112, and the conductive film 114 are As a mask, an impurity element is added to the oxide semiconductor film 106. A low resistance region can be formed by the above method.

[0364] As the substrate 102, a substrate 362 shown in FIG.

[0365] As the insulating film 104, the insulating film 364 shown in FIG.

[0366] The oxide semiconductor film 106 is an oxide semiconductor film 266 and an oxide semiconductor film 366 shown in FIG. can be used appropriately.

[0367] The insulating film 108 may be formed by appropriately using the insulating film 272 and the insulating film 372 shown in FIG. .

[0368] The conductive film 110, the conductive film 112, and the conductive film 114 are formed at the same time, and therefore are made of the same material and have the same thickness. It has the same laminated structure.

[0369] The conductive films 110, 112, and 114 are the conductive films 368, 370, 374, and 26 shown in FIG. 8, 270, 261, and 274 can be used as appropriate.

[0370] The insulating film 116 can be formed as a single layer or a stack of an oxide insulating film or a nitride insulating film. Note that in order to improve interface characteristics with the oxide semiconductor film 106, At least a region in contact with the oxide semiconductor film 106 is preferably formed using an oxide insulating film. In addition, by using an oxide insulating film which releases oxygen by heating as the insulating film 116, By the heat treatment, oxygen contained in the insulating film 116 can be moved to the oxide semiconductor film 106. It is possible.

[0371] The insulating film 116 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or nitride. Silicon, aluminum oxide, hafnium oxide, gallium oxide, Ga-Zn oxide, etc. may be used, and may be provided as a single layer or a multilayer.

[0372] The insulating film 118 is preferably a film that functions as a barrier film against hydrogen, water, and the like from the outside. The insulating film 118 may be made of, for example, silicon nitride, silicon oxide nitride, or aluminum oxide. Any of the above may be used, and the film may be provided as a single layer or a multilayer.

[0373] The thickness of the insulating film 116 and the insulating film 118 is 30 nm or more and 500 nm or less, or The thickness can be 00 nm or more and 400 nm or less.

[0374] Note that, like the transistor 394 illustrated in FIG. 17, the transistor 150 has an insulating film 104 A conductive film is provided under the oxide semiconductor film 106 so as to overlap with the oxide semiconductor film 106, thereby forming a dual-gate structure. It is possible.

[0375] <Transistor configuration example 5> Next, another structure of a transistor included in a light-emitting device will be described with reference to FIGS. 25 and 26. explain.

[0376] 25A to 25C are top views and cross-sectional views of a transistor 450 included in a light-emitting device. 25A is a top view of the transistor 450, and FIG. 25(A) is a cross-sectional view taken along the dashed line Y3-Y4 in FIG. 25(A), and FIG. 25(C) is a cross-sectional view taken along the dashed line Y3-Y4 in FIG. FIG. 11 is a cross-sectional view taken along dashed line X3-X4.

[0377] The transistor 450 shown in FIG. 25 is an oxide film on an insulating film 404 formed on a substrate 402. A semiconductor film 406, an insulating film 408 in contact with the oxide semiconductor film 406, and a The conductive film 414 overlaps with the oxide semiconductor film 406, and the insulating film 414 is in contact with the oxide semiconductor film 406. 418, an insulating film 416 formed on the insulating film 418, and a insulating film 418 and an insulating film 416 The conductive film 410 in contact with the oxide semiconductor film 406 in the opening 440 a and the insulating film 418 The conductive film 412 in contact with the oxide semiconductor film 406 in the opening 440b of the insulating film 416 has.

[0378] In the transistor 450, the conductive film 414 functions as a gate electrode. The conductive film 410 and the conductive film 412 function as a source electrode and a drain electrode.

[0379] In the oxide semiconductor film 406, the conductive film 410, the conductive film 412, and the conductive film 414 are not overlapped. In the following, the element that forms the oxygen vacancy is referred to as the oxygen vacancy. The following explanation will be given as pure elements. Representative examples of impurity elements are hydrogen, boron, carbon, nitrogen, and fluorine. There are fluorine, aluminum, silicon, phosphorus, chlorine, and rare gas elements. Representative examples of rare gas elements These include helium, neon, argon, krypton and xenon.

[0380] When an impurity element is added to an oxide semiconductor film, a bond between a metal element and oxygen in the oxide semiconductor film is formed. The bond is broken, and oxygen vacancies are formed. Alternatively, an impurity element is added to the oxide semiconductor film. Then, oxygen that has been bonded to a metal element in the oxide semiconductor film is bonded to an impurity element, and the oxygen is converted from the metal element to an impurity element. As a result, oxygen is released from the oxide semiconductor film, and oxygen vacancies are formed. The rear density increases and the conductivity becomes higher.

[0381] Here, a partial enlarged view of the oxide semiconductor film 406 is shown in FIG. In this manner, the oxide semiconductor film 406 is in contact with the conductive film 410, the conductive film 412, or the insulating film 418. The conductive film 41 has a region 406b in contact with the insulating film 408 and a region 406d in contact with the insulating film 408. When the side surface of the conductive film 414 has a tapered shape, the conductive film 414 has a region 406c overlapping the tapered portion. You may do so.

[0382] The region 406b functions as a low resistance region. In addition, when the side surface of the conductive film 414 has a tapered shape, In this case, the impurity element passes through the tapered portion of the conductive film 414 and is added to the region 406c. The region 406c has a lower concentration of rare gas elements, which are an example of impurity elements, compared to the region 406b. However, the region 406c contains an impurity element. The in-line breakdown voltage can be increased.

[0383] In the case where the oxide semiconductor film 406 is formed by a sputtering method, the regions 406b to 40 6d each contain a rare gas element, and compared to region 406d, region 406b and region The oxide semiconductor film 406c has a higher concentration of rare gas elements. When the sputtering method is used, rare gas elements are used as the sputtering gas, so the oxide semiconductor The membrane 406 contains a rare gas element, and the regions 406b and 406c This is because rare gas elements are intentionally added to form oxygen vacancies. In the region 406b and the region 406c, a rare gas element different from that in the region 406d is added. It may be possible.

[0384] In addition, since the region 406b is in contact with the insulating film 418, the region 406b is in contact with the insulating film 418, and therefore, compared with the region 406d, b has a higher hydrogen concentration. Also, when hydrogen diffuses from region 406b to region 406c, The hydrogen concentration in the region 406c is higher than that in the region 406d. Region 406b has a higher hydrogen concentration.

[0385] In the region 406b and the region 406c, secondary ion mass spectrometry (SIMS) is performed. The hydrogen concentration obtained by Daily Ion Mass Spectrometry is , 8×10 19 atoms / cm 3 or more, or 1×10 20 atoms / cm 3 Above, again is 5 x 10 20 atoms / cm 3 In addition, the secondary The hydrogen concentration obtained by ion mass spectrometry is 5×10 19 atoms / cm 3 Below, again is 1×1019 atoms / cm 3 or less, or 5 x 10 18 atoms / cm 3 Below, again is 1×10 18 atoms / cm 3 or less, or 5 x 10 17 atoms / cm 3 Below, again is 1×10 16 atoms / cm 3 It can be as follows:

[0386] In addition, impurity elements include boron, carbon, nitrogen, fluorine, aluminum, silicon, and phosphorus. When chlorine is added to the oxide semiconductor film 406, the regions 406b and 406c are Therefore, compared to the region 406d, the region 406b and the region 406c have the impurity element only. The concentration of the impurity element is higher in the region 406b than in the region 406c. The concentration of impurity elements obtained by secondary ion mass spectrometry is 1×10 18 atoms / c m 3 More than 1×10 22 atoms / cm 3 or less, or 1×10 19 atoms / cm 3 Below Top 1×10 21 atoms / cm 3 or less, or 5 x 10 19 atoms / cm 3 More than 5× 10 20 atoms / cm 3 It can be as follows:

[0387] Compared to the region 406d, the regions 406b and 406c have a high hydrogen concentration and a low rare gas concentration. The amount of oxygen vacancies is large due to the addition of silicon elements. This results in high electrical conductivity and a low resistance region. Typically, the resistivity of the region 406b and the region 406c is 1×10-3 Ω cm or more 1×10 4 Less than Ωcm or 1×10 -3 Ωcm or more 1×10 -1 Less than Ωcm It is possible.

[0388] In the regions 406b and 406c, the amount of hydrogen is equal to or less than the amount of oxygen vacancies. If the thickness is small, hydrogen is easily captured by oxygen vacancies and is less likely to diffuse into the region 406d which is the channel. As a result, a transistor having normally-off characteristics can be manufactured.

[0389] Region 406d functions as a channel.

[0390] In addition, an impurity element is added to the oxide semiconductor film 406 by using the conductive film 414 as a mask, and then the conductive film 414 is The area of ​​the top surface of each of the conductive films 414 may be reduced (see FIG. 26(B)). Specifically, after an impurity element is added to the oxide semiconductor film 406, a mass spectrometry is performed on the conductive film 414. A slimming process is then performed on the mask (e.g., photoresist). The conductive film 414 and the insulating film 408 are etched by the above process. The conductive film 414a and the insulating film 408a shown in FIG. For example, an ashing process using oxygen radicals or the like can be applied.

[0391] As a result, in the oxide semiconductor film 406, the region 406c and the region 406 An offset region 406e is formed between the first and second electrodes 406a and 406b. The length of the bit region 406e is set to less than 0.1 μm, thereby reducing the on-current of the transistor. It is possible to reduce the

[0392] As the substrate 402 shown in FIG. 25, the substrate 362 shown in FIG. 17 can be appropriately used.

[0393] As the insulating film 404 shown in FIG. 25, the insulating film 364 shown in FIG. 17 can be appropriately used. do.

[0394] The oxide semiconductor film 406 illustrated in FIG. 25 is a composite oxide semiconductor film including the oxide semiconductor film 266 illustrated in FIG. A conductive film 366 may be used as appropriate.

[0395] The insulating film 408 shown in FIG. 25 is formed by appropriately using the insulating film 272 and the insulating film 372 shown in FIG. It is possible.

[0396] The conductive films 410, 412, and 414 shown in FIG. 25 are the same as the conductive films 368, 370, and 374, 268, 270, 261, and 274 can be used as appropriate.

[0397] The insulating film 116 shown in FIG. 23 can be used as the insulating film 416 shown in FIG.

[0398] The insulating film 376 shown in FIG. 17 can be used as the insulating film 418 shown in FIG.

[0399] The thickness of the insulating film 416 and the insulating film 418 is 30 nm or more and 500 nm or less, or The thickness can be 00 nm or more and 400 nm or less.

[0400] In the transistor 450, the conductive film 414 does not overlap with the conductive film 410 or the conductive film 412. It is possible to reduce the parasitic capacitance between the conductive film 414 and the conductive film 410 and between the conductive film 412 and the conductive film 414. As a result, when a large-area substrate is used as the substrate 402, the conductive film 410 and the conductive film 4 12 and the conductive film 414 can reduce signal delay.

[0401] In the transistor 450, the conductive film 414 is used as a mask to form a mask in which the impurity element is an oxide. The semiconductor film 406 is doped with the fluorine atom. In other words, the low resistance region can be formed by self-alignment. can.

[0402] Note that like the transistor 394 illustrated in FIG. 17, the transistor 450 has an insulating film 404 A conductive film is provided under the oxide semiconductor film 406 so as to overlap with the oxide semiconductor film 406, thereby forming a dual-gate structure. It is possible.

[0403] The structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. It is possible.

[0404] (Embodiment 3) In this embodiment, a semiconductor device used in a pixel portion and a driver circuit of a light-emitting device according to one embodiment of the present invention will be described. Modified examples of the transistor will be described with reference to FIGS. 27 to 29. The transistor is formed by a semiconductor film 828 formed on an insulating film 824 on a substrate 821 and an oxide semiconductor film 828 formed on an insulating film 824 on a substrate 821. An insulating film 837 in contact with the oxide semiconductor film 828 and a The insulating film 837 is a gate insulating film. The conductive film 840 also functions as a gate electrode.

[0405] In addition, the insulating film 846 in contact with the oxide semiconductor film 828 and the insulating film 8 The transistor is provided with an insulating film 846 and an insulating film 847. In the example shown in FIG. 1, conductive films 856 and 857 in contact with an oxide semiconductor film 828 are provided in a transistor. The conductive films 856 and 857 function as a source electrode and a drain electrode. In addition, an insulating film 862 in contact with the insulating film 847 and the conductive films 856 and 857 is provided. It is being done.

[0406] Note that the structure of the transistor described in this embodiment and the conductive film and insulating film in contact with the structure are The structure of the transistor described in the above embodiment and the conductive film and the insulating film in contact with the structure are It can be used appropriately.

[0407] In the transistor illustrated in FIG. 27A, the oxide semiconductor film 828 overlaps with the conductive film 840. and a region 828a formed in the region including the impurity element and sandwiching the region 828a. The conductive films 856 and 857 have regions 828b and 828c. The region 828a functions as a channel region. The regions 828b and 828c are The resistivity is lower than that of the region 828a, and the region 828b can be called a low resistance region. 28b and 828c function as source and drain regions.

[0408] Alternatively, as in the transistor illustrated in FIG. 27B, The regions 828d and 828e in contact with the conductive films 856 and 857 are not doped with impurity elements. In this case, the regions 828d and 828e in contact with the conductive films 856 and 857 and the region 82 Between the region 828 and the region 828a, there are regions 828b and 828c having an impurity element. d and 828e have conductivity when a voltage is applied to the conductive films 856 and 857. It functions as a source region and a drain region.

[0409] Note that in the transistor shown in FIG. 27B, after the conductive films 856 and 857 are formed, An impurity element is added to the oxide semiconductor film using the conductive films 856 and 857 as masks. This can be formed by

[0410] The conductive film 840 may have a tapered end. The angle θ1 between the surface where the conductive film 840 and the conductive film 840 are in contact with each other is less than 90°. or 10° to 85° or 15° to 85° or 30° to 85° The angle may be 45° or less, or 45° or more and 85° or less, or 60° or more and 85° or less. The angle θ1 is set to less than 90°, or 10° to 85°, or 15° to 85°, or or 30° to 85°, or 45° to 85°, or 60° to 85° This improves the coverage of the insulating film 846 on the side surfaces of the insulating film 837 and the conductive film 840. It is possible to do so.

[0411] Next, modified examples of the regions 828b and 828c will be described. 27(F) is an enlarged view of the oxide semiconductor film 828 and its vicinity shown in FIG. The channel length L is the distance between the regions containing a pair of impurity elements.

[0412] As shown in FIG. 27C, in the cross section in the channel length direction, the region 828a and the region The boundary between 828b and 828c coincides with or is aligned with the end of the conductive film 840 via the insulating film 837. In other words, in the top view, the area 828a and the areas 828b and 828c are substantially the same. The boundary of the conductive film 840 coincides or almost coincides with the edge of the conductive film 840.

[0413] Alternatively, as shown in FIG. 27D, in the cross section in the channel length direction, a region 828a However, there is a region that does not overlap with the conductive film 840. This region functions as an offset region. The length of the offset region in the channel length direction is L off Note that the offset is If there are multiple offset areas, the length of each offset area is L. off That is said. off teeth, Included in the channel length L. Also, L off is less than 20% or 10% of the channel length L or less than 5%, or less than 2%.

[0414] Alternatively, as shown in FIG. 27E, in the cross section in the channel length direction, a region 828b 828c has a region overlapping with the conductive film 840 with the insulating film 837 interposed therebetween. The overlap region in the channel length direction functions as a Length L ov L ov is less than 20% of the channel length L, or less than 10%, or Less than 5% or less than 2%.

[0415] Alternatively, as shown in FIG. 27F, in the cross section in the channel length direction, a region 828a and region 828b, and region 828c. The regions 828f and 828g have a higher concentration of impurity elements than the regions 828b and 828c. Here, the regions 828f and 828g overlap the insulating film 837. However, the insulating film 837 and the conductive film 840 may overlap with each other.

[0416] 27C to 27F, the transistor shown in FIG. As described above, the transistor shown in FIG. 27B may also have the same characteristics as those shown in FIG. ) structure can be applied as appropriate.

[0417] In the transistor shown in FIG. 28A, an end of an insulating film 837 is disposed outside an end of a conductive film 840. That is, the insulating film 837 protrudes from the conductive film 840. Since the insulating film 846 can be separated from the insulating film 828a, the nitrogen contained in the insulating film 846 can be Therefore, it is possible to suppress the intrusion of hydrogen, hydrogen, etc. into the region 828a that functions as a channel region. can.

[0418] In the transistor shown in FIG. 28B, the insulating film 837 and the conductive film 840 have a tapered shape. In other words, the insulating film 837 and the conductive film 840 are in contact with each other. The angle θ1 between the surface of the oxide semiconductor film 828 and the side surface of the conductive film 840 and the insulating film 837 The angle θ2 between the surface where the insulating film 837 is in contact and the side surface of the insulating film 837 is different. The angle may be less than 30°, or between 30° and 85°, or between 45° and 70°. For example, when the angle θ2 is smaller than the angle θ1, the coverage of the insulating film 846 is improved. When θ2 is greater than the angle θ1, the transistor can be miniaturized.

[0419] Next, regarding the modified examples of the regions 828b and 828c, FIG. 28(C) to FIG. 28(F) are used. 28C to 28F are diagrams illustrating the oxide semiconductor An enlarged view of the vicinity of membrane 828.

[0420] As shown in FIG. 28C, in the cross section in the channel length direction, a region 828a and a region The boundary between 828b and 828c coincides with or is in contact with the end of the conductive film 840 via the insulating film 837. That is, in the top view, the area 828a and the area 828b are substantially the same. The boundary of c coincides or approximately coincides with the end of the conductive film 840.

[0421] Alternatively, as shown in FIG. 28D, in the cross section in the channel length direction, a region 828a However, there is a region that does not overlap with the conductive film 840. This region functions as an offset region. That is, in the top view, the ends of the regions 828b and 828c are aligned with the ends of the insulating film 837. , and does not overlap with the conductive film 840.

[0422] Alternatively, as shown in FIG. 28E, in the cross section in the channel length direction, a region 828b 828c has a region overlapping with the conductive film 840 with the insulating film 837 interposed therebetween. In other words, in the top view, the ends of the regions 828b and 828c are It overlaps with the conductive film 840 .

[0423] Alternatively, as shown in FIG. 28F, in the cross section in the channel length direction, a region 828a and region 828b, and region 828c. The regions 828f and 828g have a higher concentration of impurity elements than the regions 828b and 828c. Here, the regions 828f and 828g overlap the insulating film 837. However, the insulating film 837 and the conductive film 840 may overlap with each other.

[0424] 28C to 28F, the transistor shown in FIG. As described above, the transistor shown in FIG. 28B may also have the same characteristics as those shown in FIG. ) can be appropriately applied.

[0425] In the transistor shown in FIG. 29A, a conductive film 840 has a stacked structure and is in contact with an insulating film 837. The conductive film 840a is in contact with the conductive film 840a, and the conductive film 840b is in contact with the conductive film 840a. The end of the film 840a is located outside the end of the conductive film 840b. However, it has a shape protruding from the conductive film 840b.

[0426] Next, modified examples of the regions 828b and 828c will be described. 9(E) is an enlarged view of the vicinity of the oxide semiconductor film 828 shown in FIG. 29(A).

[0427] As shown in FIG. 29B, in the cross section in the channel length direction, a region 828a and a region The boundary between 828b and 828c is the edge of the conductive film 840a included in the conductive film 840 and the insulating film That is, in the top surface shape, the area 828a and The boundaries of the regions 828b and 828c coincide or nearly coincide with the ends of the conductive film 840. .

[0428] Alternatively, as shown in FIG. 29C, in the cross section in the channel length direction, a region 828a However, there is a region that does not overlap with the conductive film 840. This region functions as an offset region. That is, in the top view, the ends of the regions 828b and 828c overlap the conductive film 840a. It won't happen.

[0429] Alternatively, as shown in FIG. 29D, in the cross section in the channel length direction, a region 828b , 828c has a region overlapping with the conductive film 840, here the conductive film 840a. This is called the overlap region. In other words, in the top view, the ends of the regions 828b and 828c are , overlapping with the conductive film 840a.

[0430] Alternatively, as shown in FIG. 29E, in the cross section in the channel length direction, a region 828a and region 828b, and region 828c. The impurity element is added to the regions 828f and 828g through the conductive film 840a. Therefore, the regions 828f and 828g have a higher concentration of impurity elements than the regions 828b and 828c. Here, the regions 828f and 828g are formed by the conductive film 840a or may overlap with the conductive film 840b.

[0431] Note that the end of the insulating film 837 may be located outside the end of the conductive film 840a.

[0432] Alternatively, the side surface of the insulating film 837 may be curved.

[0433] Alternatively, the insulating film 837 may have a tapered shape. The angle between the surface of the insulating film 837 and the side of the insulating film 837 is less than 90°, preferably 30°. It may be greater than or equal to 90° and less than 90°.

[0434] As shown in FIG. 29, the oxide semiconductor film 828 has a higher impurity content than the regions 828b and 828c. The drain region has low concentration of silicon and high resistivity regions 828f and 828g. Therefore, the threshold voltage of the transistor caused by the electric field in the drain region can be reduced. It is possible to reduce deterioration such as fluctuations in the value voltage.

[0435] The structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. It is possible.

[0436] (Embodiment 4) In this embodiment, an example of a top view and a cross-sectional view of a pixel of a light-emitting device according to one embodiment of the present invention will be described. We will explain about this.

[0437] Pixel Layout FIG. 30 shows an example of a top view of the pixel 11 shown in FIG. In order to clarify the layout of 11, various insulating films, pixel electrodes, and light emitting elements 54 are It has been omitted.

[0438] The structures of the transistors 55, 56, and 57 shown in FIG. The configuration assumes transistor 450 as shown in FIG.

[0439] The transistor 56 includes a conductive film 1003 having a function as a gate and a semiconductor film 1004. and electrically connected to the semiconductor film 1004 and functioning as a source or drain. The conductive film 1003 functions as a wiring GL. The conductive film 1005 functions as a wiring SL through a contact hole. The conductive film 1001 is electrically connected to the conductive film 1001 .

[0440] The transistor 57 includes a conductive film 1003 having a function as a gate and a semiconductor film 1007. and electrically connected to the semiconductor film 1007 and functioning as a source or drain. The conductive film 1008 and the conductive film 1009 are provided. The conductive film 1008 has a contact hole. 1002 serving as the wiring ML.

[0441] The transistor 55 includes a conductive film 1010 having a function as a gate and a semiconductor film 1007. and electrically connected to the semiconductor film 1007 and functioning as a source or drain. The conductive film 1009 and the conductive film 1011 function as the wiring VL. Possesses the ability.

[0442] The capacitor 58 includes a semiconductor film 1007 functioning as a first electrode and a second electrode. A conductive film 1010 that is connected to the semiconductor film 1007 and an insulating film ( The semiconductor film 1007 has a sufficiently low resistance so that it can function as an electrode. It is preferable that the

[0443] The conductive film 1009 is connected to the conductive film 1012, which functions as a pixel electrode. The conductive film 1013 is electrically connected to the anode of the light emitting element 54. It also functions as a cathode or cathode.

[0444] The conductive film 1013 may be made of a metal, an alloy, an electrically conductive compound, or a mixture thereof. Specifically, indium oxide-tin oxide (ITO) can be used. Indium tin oxide, silicon or silicon oxide-containing indium oxide-tin oxide, Indium Zinc Oxide, Tungsten Oxide and indium oxide containing zinc oxide, gold (Au), platinum (Pt), and nickel (Ni) , Tungsten (W), Chromium (Cr), Molybdenum (Mo), Iron (Fe), Cobalt ( Co, copper (Cu), palladium (Pd), titanium (Ti), and other elements in the first group of the periodic table or elements in group 2, i.e., alkaline metals such as lithium (Li) and cesium (Cs). Alkaline earth metals such as calcium (Ca) and strontium (Sr), magnesium Magnesium (Mg) and alloys containing these (MgAg, AlLi), europium (Eu) , ytterbium (Yb) and other rare earth metals and alloys containing these, other, graphene The above materials can be appropriately selected and the film thickness can be set to an optimal value. This allows the use of top emission, bottom emission or dual emission structures. This makes it possible to create different application structures.

[0445] In one embodiment of the present invention, a light-emitting device includes a light-emitting element that emits light of a single color such as white light and a color The color filter method uses a combination of filters to display full-color images. Alternatively, a plurality of light emitting elements that emit light of different hues may be used. In this method, the light emitting element has The EL layer between the pair of electrodes is painted with different colors, so it is called a color-coded method. Called.

[0446] In the case of the color-by-color method, the EL layer is usually colored using a mask such as a metal mask. This is done by deposition. Therefore, the size of the pixel depends on the accuracy of the deposition of the EL layer. On the other hand, in the case of the color filter method, unlike the separate coloring method, the EL layer is separately colored. Therefore, it is easier to reduce the pixel size than in the case of the color-by-color method. Therefore, a high-definition pixel portion can be realized.

[0447] In the case of a top emission structure, the light emitted from the light emitting element is guided to the wiring, transistors, and Bottom emission structure, which is not blocked by various elements such as capacitors and capacitor elements. Compared to the top-emitting type, the light extraction efficiency from the pixel can be improved. The PVD structure can obtain high brightness even if the current value supplied to the light-emitting element is kept low. This is advantageous for extending the life of the light emitting device.

[0448] In one embodiment of the present invention, a light-emitting device includes a light-emitting element that resonates light emitted from an EL layer. The light source may have a microcavity (microoptical resonator) structure. The structure of the GaN-based GaN-GaN ... Therefore, the brightness and color purity of the pixel portion can be improved.

[0449] <Cross-sectional structure of light-emitting device> FIG. 31 shows an example of a cross-sectional structure of a pixel portion of a light-emitting device according to one embodiment of the present invention. 31, the transistor 56 and the capacitor element 51 included in the pixel 11 shown in FIG. 8 and the cross-sectional structure of the light-emitting element 54.

[0450] Specifically, the light emitting device shown in FIG. 31 has an insulating film 1016 and an insulating film 101 The transistor 56 and the capacitor 58 are disposed on the semiconductor film 16. 004, an insulating film 1015 on the semiconductor film 1004, and a semiconductor film with the insulating film 1015 sandwiched therebetween. A conductive film 1003 which overlaps with the semiconductor film 1004 and functions as a gate and a semiconductor film 1004 are in contact with the conductive film 1003. , the conductive film 1005 provided in the openings of the insulating film 1017 and the insulating film 1018, A conductive layer is provided in the opening of the insulating film 1017 and the insulating film 1018 and is in contact with the semiconductor film 1004. The conductive film 1005 and the conductive film 1006 are transistors. 56 as the source and drain.

[0451] The capacitor 58 is made up of a semiconductor film 1007 functioning as an electrode and an insulating film on the semiconductor film 1007. 1015 overlaps the semiconductor film 1007 with the insulating film 1015 sandwiched therebetween, and serves as an electrode. and a conductive film 1010 that functions as a

[0452] The insulating film 1015 may be formed of aluminum oxide, aluminum oxynitride, or magnesium oxide. , silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, gallium oxide, germanium oxide , yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide An insulating film containing one or more of tantalum oxide may be used as a single layer or a stacked layer. In this specification, an oxynitride is a compound having a higher oxygen content than nitrogen. Nitrogen oxide refers to a material that has a higher nitrogen content than oxygen in its composition. vinegar.

[0453] When an oxide semiconductor is used for the semiconductor film 1004, the insulating film 1016 is It is preferable to use a material capable of supplying oxygen to the insulating film 10. By using the insulating film 1016 as the semiconductor film 1004, oxygen contained in the insulating film 1016 can be moved to the semiconductor film 1004. This can reduce the amount of oxygen vacancies in the semiconductor film 1004. The oxygen contained in the semiconductor film 1004 is transferred to the semiconductor film 1004 by heating after the semiconductor film 1004 is formed. This can be done efficiently by performing heat treatment.

[0454] An insulating film 1017 is provided on the semiconductor film 1004, the conductive film 1003, and the conductive film 1010. An insulating film 1018 is provided on the insulating film 1017, and a conductive film 1005, a conductive film 1006, a conductive film 1009 and an insulating film 1019 are provided. A conductive film 1001 and a conductive film 1012 are provided on the insulating film 1019. The conductive film 1001 The conductive film 1012 is electrically connected to the conductive film 1005 in the opening of the insulating film 1019. is electrically connected to the conductive film 1009 in the opening of the insulating film 1019.

[0455] In the case where an oxide semiconductor is used for the semiconductor film 1004, the insulating film 1017 is formed of an oxide semiconductor. It is preferable that the compound has a function of blocking alkali metals, alkaline earth metals, etc. By providing the insulating film 1017, oxygen can be diffused from the semiconductor film 1004 to the outside and the Therefore, it is possible to prevent hydrogen, water, and the like from entering the semiconductor film 1004. For example, a nitride insulating film can be used. Examples include silicon, silicon oxynitride, aluminum nitride, and aluminum oxynitride. Nitrides with blocking effect against oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc. Instead of the insulating film, an oxide insulating film having a blocking effect against oxygen, hydrogen, water, etc. is provided. As the oxide insulating film having a blocking effect against oxygen, hydrogen, water, and the like, aluminum oxide is preferably used. Aluminum, Aluminum Oxide Nitride, Gallium Oxide, Gallium Oxide Nitride, Yttrium Oxide , yttrium oxide nitride, hafnium oxide, hafnium oxide nitride, etc.

[0456] An insulating film 1020 and a conductive film 1001 are formed on the insulating film 1019, the conductive film 1001, and the conductive film 1012. The conductive film 1013 is provided at the opening of the insulating film 1020. The conductive film 1013 is electrically connected to the conductive film 1012 in FIG. Please refer to paragraph 13.

[0457] An insulating film 1025 is provided over the insulating film 1020 and the conductive film 1013. The insulating film 1025 has an opening at a position overlapping with the conductive film 1013. An insulating film 1026 is provided at a position different from the opening of the insulating film 1025. An EL layer 1027 and a conductive film 1028 are formed on the insulating film 1025 and the insulating film 1026. The conductive film 1013 and the conductive film 1028 are stacked in this order. The overlapping portion sandwiching the conductive film 10 functions as the light emitting element 54. One of the conductive film 1028 and the conductive film 1028 functions as an anode and the other functions as a cathode.

[0458] The light emitting device further includes a substrate 1030 that faces the substrate 1000 with the light emitting element 54 sandwiched therebetween. A shielding film 1031 having a function of shielding light is provided under the substrate 1030. That is, on the surface of the substrate 1030 close to the light emitting element 54, a light shielding layer having a light shielding function is provided. The shielding film 1031 is provided so as to overlap the light emitting element 54. The opening overlaps the light emitting element 54, and the substrate 1030 is provided with a hole in the opening. The transparent substrate 1030 is provided with a colored layer 1032 that transmits visible light in a specific wavelength range.

[0459] The insulating film 1026 is for adjusting the distance between the light emitting element 54 and the substrate 1030. In some cases, it may be omitted.

[0460] In this embodiment, a top panel is used to extract light from the light emitting element 54 from the side opposite to the element substrate. The emission structure is shown, but the bottom emission structure is used to extract the light of the light emitting element 54 from the element substrate side. The light from the light emitting element 54 is incident from the element substrate side and from the opposite side to the element substrate. A dual emission structure in which the output is taken out from the outside can also be one aspect of the present invention.

[0461] The structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. It is possible.

[0462] (Embodiment 5) In this embodiment, a display module and a display panel in which the light-emitting device of one embodiment of the present invention can be used will be described. The electronic device will be described with reference to the drawings.

[0463] <Appearance of the light-emitting device> FIG. 32 is a perspective view showing an example of the appearance of a light-emitting device according to one embodiment of the present invention. The light emitting device shown in FIG. 16 includes a panel 1601, a controller, a power supply circuit, an image processing circuit, an image memory, and The panel has a circuit board 1602 on which a CPU and other components are mounted, and a connection section 1603. The filter 1601 includes a pixel portion 1604 having a plurality of pixels and a filter for selecting the plurality of pixels for each row. A driver circuit 1605 and a driver circuit for controlling the input of an image signal Sig to pixels in a selected row. Path 1606.

[0464] Various signals and a power supply potential are transmitted from the circuit board 1602 through the connection portion 1603 to the panel. The connection part 1603 is connected to an FPC (Flexible Printer d Circuit) can be used. Also, COF tape can be used for the connection part 1603. In the case of using a light-emitting diode, a part of the circuit in the circuit board 1602 or a driving circuit of the panel 1601 may be used. A part of the circuit 1605 and the driver circuit 1606 are formed on a separately prepared chip, and the COF The chip is electrically connected to the COF tape using the Chip On Film (Chip On Film) method. It's fine to leave it there.

[0465] <Examples of electronic device configurations> The light-emitting device according to one embodiment of the present invention can be used in a display device, a notebook personal computer, a recording medium, Image playback devices equipped with a DVD player (typically DVD: Digital Versatile Digital Used for devices that play recording media such as ISC and have a display that can display the images. In addition, an electronic device in which the light-emitting device according to one embodiment of the present invention can be used As devices, mobile phones, portable game consoles, personal digital assistants, e-book terminals, video cameras, Digital still cameras and other cameras, goggle-type displays (head-mounted displays) (car audio, digital audio player), navigation systems, audio playback devices Layers, etc.), copiers, facsimiles, printers, multifunction printers, ATM machines Examples of electronic devices include ATMs and vending machines. show.

[0466] FIG. 33A shows a display device, which includes a housing 3001, a display unit 3002, a support stand 3003, etc. The light-emitting device according to one embodiment of the present invention can be used for the display portion 3002. Display devices include all information displays, such as those for personal computers, TV broadcast reception, and advertisement displays. A display device for displaying information is included.

[0467] FIG. 33B shows a portable information terminal, which includes a housing 3101, a display unit 3102, and operation keys 3103. The light-emitting device according to one embodiment of the present invention can be used in the display portion 3102.

[0468] FIG. 33C shows a display device having a curved housing 3701, a display portion 3702, etc. By using a flexible substrate in the light-emitting device according to one embodiment of the present invention, a curved case can be easily formed. The light emitting device can be used for a display unit 3702 supported by a body 3701. It is therefore possible to provide a display device that is compact, lightweight, and easy to use.

[0469] FIG. 33D shows a portable game machine. The portable game machine includes a housing 3301, a housing 3302, a display unit 3303, A display unit 3304, a microphone 3305, a speaker 3306, an operation key 3307, a star The light-emitting device according to one embodiment of the present invention includes a display portion 3303 or a display The display unit 3303 or the display unit 3304 may be used as one of the display devices of the present invention. By using the light emitting device according to the embodiment, the user experience is excellent and deterioration of quality is unlikely to occur. It is possible to provide a portable game machine that can be used with a portable game machine shown in FIG. The display device has two display units, a display unit 3303 and a display unit 3304. The number of display units is not limited to this.

[0470] FIG. 33E shows an electronic book terminal, which includes a housing 3601, a display portion 3602, and the like. The light-emitting device according to this embodiment can be used for the display portion 3602. By using a substrate that can be used in a flexible light-emitting device, the device can be made flexible. Moreover, it is possible to provide an electronic book terminal that is light and easy to use.

[0471] FIG. 33F shows a mobile phone. A housing 3901 includes a display unit 3902, a microphone 3907, and a speaker. Speaker 3904, camera 3903, external connection part 3906, and operation button 3905 are provided. The light-emitting device according to one embodiment of the present invention can be used for the display portion 3902. In addition, when the light-emitting device according to one embodiment of the present invention is formed on a flexible substrate, The light emitting device can be applied to a display portion 3902 having a curved surface as shown in FIG. do.

[0472] The structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. It is possible.

[0473] (Embodiment 6) In this embodiment, a structure of an oxide semiconductor that can be used in one embodiment of the present invention and a composition thereof will be described. The membrane model will now be explained.

[0474] In this specification, "parallel" means that two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Line" refers to the state in which two straight lines are arranged at an angle between -30° and 30°. "Perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, the angle may be between 85° and 95°. This refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0475] In addition, in this specification, when the crystal is a trigonal or rhombohedral crystal, it is represented as a hexagonal crystal system. .

[0476] <<Structure of oxide semiconductors>> The structure of an oxide semiconductor will be described below.

[0477] Oxide semiconductors are classified into single-crystal oxide semiconductors and non-single-crystal oxide semiconductors. As a non-single-crystal oxide semiconductor, CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor, polycrystalline oxide semiconductor Examples of the oxide semiconductor include a conductor, a microcrystalline oxide semiconductor, and an amorphous oxide semiconductor.

[0478] From another point of view, the oxide semiconductor is classified into an amorphous oxide semiconductor and a crystalline oxide semiconductor other than the amorphous oxide semiconductor. Crystalline oxide semiconductors are classified into single crystal oxide semiconductors, CAAC-O S, polycrystalline oxide semiconductors, and microcrystalline oxide semiconductors.

[0479] CAAC-OS First, let me explain about CAAC-OS. xis aligned nanocrystals) It is also possible.

[0480] CAAC-OS is an oxide semiconductor that has multiple crystal parts (also called pellets) aligned along the c-axis. It is a conductor.

[0481] Transmission Electron Microscope (TEM) A composite analysis image (high resolution) of the bright-field image and the diffraction pattern of CAAC-OS was obtained by using a scope. When observing the high-resolution TEM image, multiple pellets can be confirmed. In the high-resolution TEM image, the boundaries between the pellets, i.e., grain boundaries, are not clearly visible. Therefore, it is not possible to clearly confirm the presence of the CAAC-OS. Therefore, it can be said that the decrease in electron mobility caused by the above phenomenon is unlikely to occur.

[0482] The CAAC-OS observed by TEM will be described below. This shows a high-resolution TEM image of a cross section of CAAC-OS observed from a direction approximately parallel to the sample surface. For high-resolution TEM imaging, spherical aberration correction (SAC) is required. The spherical aberration corrector function was used. In particular, it is called a Cs-corrected high-resolution TEM image. This was carried out using an atomic resolution analytical electron microscope, such as the JEM-ARM200F manufactured by Nippon Denki Co., Ltd. This can be done.

[0483] FIG. 35(B) shows an enlarged Cs-corrected high-resolution TEM image of region (1) in FIG. 35(A). From FIG. 35(B), it can be seen that the metal atoms are arranged in layers in the pellet. The arrangement of each metal atom layer is the same as that of the surface on which the CAAC-OS film is formed (also called the surface on which the film is formed). The surface on which the CAAC-OS is formed or the top surface of the CAAC-OS reflects the unevenness of the surface on which the CAAC-OS is formed or the top surface of the CAAC-OS.

[0484] As shown in Figure 35(B), CAAC-OS has a characteristic atomic arrangement. The characteristic atomic arrangement is shown by auxiliary lines in Figure 35(B) and Figure 35(C). Therefore, the size of each pellet is about 1 nm to 3 nm, and the size of each pellet is about 1 nm to 3 nm. It can be seen that the size of the gap caused by the inclination of the The zeolites can also be referred to as nanocrystals (nc).

[0485] Here, based on the Cs-corrected high-resolution TEM image, the pellet of CAAC-OS on the substrate 5120 was The layout of the 5100 is shown diagrammatically as a stack of bricks or blocks. (See FIG. 35(D)). The inclination between the pellets observed in FIG. 35(C) The location where the crack occurs corresponds to an area 5161 shown in FIG.

[0486] FIG. 36(A) shows the Cs Corrected high-resolution TEM images are shown for regions (1), (2), and (3) in FIG. 36(A). The enlarged Cs-corrected high-resolution TEM images are shown in Fig. 36(B), Fig. 36(C), and Fig. 36(D), respectively. 36(D). From Fig. 36(B), Fig. 36(C) and Fig. 36(D), the pellet is It can be seen that the metal atoms are arranged in triangular, tetragonal or hexagonal shapes. However, no regularity is observed in the arrangement of metal atoms among different pellets.

[0487] Next, the CA analyzed by X-ray diffraction (XRD) We will explain AC-OS. For example, CAAC-OS with InGaZnO4 crystals When the structure is analyzed using the out-of-plane method, the result is as shown in Figure 37(A). A peak may appear at a diffraction angle (2θ) of about 31°. Since the crystal orientation of CAAC-OS is attributed to the (009) plane of nO4, the crystal orientation of CAAC-OS is considered to be c-axis oriented. It can be seen that the c-axis is oriented in a direction substantially perpendicular to the surface on which the film is formed or the upper surface.

[0488] In addition, in the out-of-plane structural analysis of CAAC-OS, 2θ is 31° In addition to the peaks around 2θ of 36°, a peak may also appear around 2θ of 36°. The peaks near the c-axis indicate that some of the CAAC-OS contains crystals that do not have the c-axis orientation. The more preferable CAAC-OS is the structure solution by the out-of-plane method. In the analysis, a peak is observed at 2θ of approximately 31°, but no peak is observed at 2θ of approximately 36°.

[0489] On the other hand, in-plan X-ray irradiation is performed on CAAC-OS in a direction perpendicular to the c-axis. When the structure is analyzed by the δ method, a peak appears at 2θ of about 56°. This peak is due to In It is assigned to the (110) plane of the GaZnO4 crystal. In the case of CAAC-OS, 2θ is set to 56 The sample was rotated around the normal vector of the sample surface as the axis (φ axis) while performing the analysis. Even if a φ scan is performed, no clear peak appears as shown in FIG. 37(B). However, in the case of a single crystal oxide semiconductor such as InGaZnO4, 2θ is fixed at around 56° and φ shift is When scanning was performed, the peaks attributable to the crystal plane equivalent to the (110) plane were as shown in FIG. Therefore, from the structural analysis using XRD, CAAC-OS has the following structure: It can be seen that the orientation of the a-axis and b-axis is irregular.

[0490] Next, we will explain the CAAC-OS analyzed by electron diffraction. For CAAC-OS with nO4 crystals, a probe with a diameter of 300 nm was placed parallel to the sample surface. When an electron beam is incident, a diffraction pattern (selected area transmission electron diffraction) like that shown in Figure 38(A) is obtained. This diffraction pattern may show the InGaZnO4 This includes spots due to the (009) plane of the crystal. Therefore, even with electron diffraction, The pellets contained in the CAAC-OS have a c-axis orientation, and the c-axis is approximately aligned on the surface to be formed or the upper surface. On the other hand, the same sample was probed perpendicular to the sample surface. The diffraction pattern when an electron beam with a diameter of 300 nm is incident is shown in FIG. (B) shows a ring-shaped diffraction pattern. Therefore, by electron diffraction, It is seen that the a-axis and b-axis of the pellets contained in the CAAC-OS have no orientation. In addition, the first ring in FIG. 38(B) is the (010) plane of the InGaZnO4 crystal. This is thought to be due to the (100) plane and other factors. The second ring in Figure 38(B) This is thought to be due to the (110) plane, etc.

[0491] In addition, the CAAC-OS is an oxide semiconductor with a low density of defect states. Examples of defects include impurity-induced defects and oxygen vacancies. C-OS can also be considered an oxide semiconductor with a low impurity concentration. It can also be said that the oxide semiconductor has few oxygen vacancies.

[0492] Impurities contained in an oxide semiconductor can act as carrier traps or carrier generation sources. In addition, oxygen vacancies in an oxide semiconductor may become carrier traps or may cause hydrogen By capturing atoms, they can become a carrier generation source.

[0493] The impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metals. For example, oxygen is more abundant than metal elements such as silicon that constitute oxide semiconductors. Elements with strong bonding strength with the oxide semiconductor remove oxygen from the oxide semiconductor, thereby changing the atomic arrangement of the oxide semiconductor. In addition, heavy metals such as iron and nickel, argon, and nitrogen Carbon oxide and other elements have a large atomic radius (or molecular radius), so they can easily arrange the atoms of oxide semiconductors. This causes the crystallinity to decrease.

[0494] In addition, an oxide semiconductor with a low density of defect states (few oxygen vacancies) can reduce the carrier density. Such an oxide semiconductor can be obtained by using a high-purity intrinsic or substantially high-purity intrinsic oxide. CAAC-OS has a low impurity concentration and a low density of defect states. It is easy to obtain a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor. A transistor using C-OS has electrical characteristics in which the threshold voltage is negative (normal In addition, the acid is highly pure or substantially pure. The oxide semiconductor has fewer carrier traps. The charge takes a long time to be discharged and behaves like a fixed charge. Therefore, transistors using oxide semiconductors with high impurity concentrations and high defect state densities are On the other hand, transistors using CAAC-OS may have unstable electrical characteristics. The resulting transistor has small fluctuations in electrical characteristics and is highly reliable.

[0495] In addition, because the density of defect states in CAAC-OS is low, the capacitive coupling generated by light irradiation can be suppressed. Therefore, the transistor using CAAC-OS is less likely to be captured by the defect level. The electrical characteristics of a transistor vary little when exposed to visible or ultraviolet light.

[0496] <Microcrystalline oxide semiconductor> Next, a microcrystalline oxide semiconductor will be described.

[0497] Microcrystalline oxide semiconductors are regions where crystals can be confirmed in high-resolution TEM images. A region in which no clear crystal part can be confirmed is also included. The crystal part contained in the crystal is 1 nm to 100 nm or 1 nm to 10 nm in size. In particular, microcrystals with a size of 1 nm to 10 nm or 1 nm to 3 nm are often found. The oxide semiconductor having nanocrystals is called nc-OS (nanocrystalline- The nc-OS is called the "High Resolution Oxide Semiconductor." In some cases, the grain boundaries cannot be clearly seen in the TEM images. Therefore, in the following, we will refer to the pellets in nc-OS as the pellets of the same origin. The crystalline part of S is sometimes called a pellet.

[0498] The nc-OS is a nano-sized area (e.g., an area of ​​1 nm to 10 nm, especially 1 nm to 3 nm). The nc-OS has periodic atomic arrangement in the sub-nm region. There is no regularity in the crystal orientation between the dots. Therefore, no orientation is observed throughout the film. Therefore, depending on the analysis method, nc-OS may be indistinguishable from amorphous oxide semiconductors. For example, there is an XRD apparatus that uses X-rays with a diameter larger than that of the pellet for nc-OS. When structural analysis is performed using the out-of-plane method, No peaks were detected. Also, for nc-OS, the probe diameter (e.g. When electron diffraction (also called selected area electron diffraction) is performed using an electron beam with a diameter of 50 nm or more, On the other hand, for nc-OS, a halo-like diffraction pattern is observed. Nanobeam electron diffraction using an electron beam with a probe diameter close to the pellet size or smaller than the pellet size. When the electron diffraction pattern is applied to the nc-OS, a spot is observed. In some cases, a bright area that appears circular (ring-shaped) may be observed. Multiple spots may be observed within a patchy region.

[0499] In this way, the crystal orientation between the pellets (nanocrystals) is not regular, so nc- OS with RANC (Random Aligned nanocrystals) oxide semiconductors, or NANCs (Non-Aligned Nanocrystals) ) can also be referred to as an oxide semiconductor.

[0500] The nc-OS is an oxide semiconductor with higher order than an amorphous oxide semiconductor. The nc-OS has a lower density of defect states than the amorphous oxide semiconductor. There is no regularity in the crystal orientation between different pellets. Therefore, nc-OS is The defect level density is higher than that of AC-OS.

[0501] <Amorphous oxide semiconductor> Next, the amorphous oxide semiconductor will be described.

[0502] Amorphous oxide semiconductors are oxides in which the atomic arrangement in the film is irregular and there are no crystal parts. An example is an oxide semiconductor that has an amorphous state, such as quartz.

[0503] In the case of an amorphous oxide semiconductor, no crystalline parts can be confirmed in a high-resolution TEM image.

[0504] When the structure of amorphous oxide semiconductors is analyzed using an XRD device, out-of-plane In the analysis by the ane method, no peaks indicating crystal planes were detected. When electron diffraction is performed on the amorphous oxide semiconductor, a halo pattern is observed. However, when nanobeam electron diffraction is performed, no spots are observed, and only a halo pattern is observed. It is measured.

[0505] There are various views on amorphous structures. For example, A structure that does not have a completely amorphous structure is called a completely amorphous structure. In addition, the distance between the nearest neighbors or the second nearest neighbors is called the A structure that has order but no long-range order is sometimes called an amorphous structure. According to the strictest definition, an oxide semiconductor that has even a slight degree of order in its atomic arrangement is called an amorphous semiconductor. In addition, oxides with at least long-range order cannot be called solid oxide semiconductors. The semiconductor cannot be called an amorphous oxide semiconductor. For example, the CAAC-OS and nc-OS are It cannot be called a compound semiconductor.

[0506] Amorphous-like oxide semiconductor Note that an oxide semiconductor may have a structure between an nc-OS and an amorphous oxide semiconductor. An oxide semiconductor having such a structure is particularly called an amorphous-like oxide semiconductor (a-li ke OS:amorphous-like Oxide Semiconductor ) is called

[0507] In a-like OS, voids are observed in high-resolution TEM images. In addition, there are cases where crystals can be clearly seen in high-resolution TEM images. and regions where no crystalline portion can be identified.

[0508] Because of the porosity, the a-like OS is an unstable structure. To demonstrate that the OS has a less stable structure compared with CAAC-OS and nc-OS. , shows the change in structure due to electron irradiation.

[0509] The samples to be irradiated with electrons were a-like OS (referred to as sample A), nc-OS ( Sample B) and CAAC-OS (sample C) are prepared. The sample in is also an In-Ga-Zn oxide.

[0510] First, high-resolution cross-sectional TEM images of each sample are obtained. It can be seen that each of the samples has a crystalline portion.

[0511] The determination of which part is regarded as one crystal part can be made as follows. For example, The unit cell of the InGaZnO4 crystal has three In-O layers and one Ga-Zn-O layer. It is known that the structure has a total of nine layers, including six layers, stacked in layers in the c-axis direction. The spacing between adjacent layers is approximately the same as the lattice spacing (also called the d value) of the (009) plane. The value is calculated to be 0.29 nm from crystal structure analysis. The area where the spacing is 0.28 nm or more and 0.30 nm or less is considered to be the crystal part of InGaZnO4. The lattice fringes correspond to the ab plane of the InGaZnO4 crystal.

[0512] Figure 39 shows an example of the average size of the crystal parts (22 to 45 places) of each sample. However, the length of the lattice fringes mentioned above is the size of the crystal part. It can be seen that the crystal part of eOS becomes larger according to the cumulative dose of electron irradiation. As shown by (1) in Figure 39, the initial TEM observation showed a size of about 1.2 nm. The crystal part (also called the initial nucleus) was 4.2×10 in size, but the cumulative irradiation dose was 4.2×10 8 e - / nm 2 On the other hand, in the nc-OS, the size of the nanoparticles grows to about 2.6 nm. For CAAC-OS, the cumulative electron dose from the start of electron irradiation was 4.2 × 10 8 e - / nm 2 It can be seen that there is no change in the size of the crystals within the range of As shown in (2) and (3) in 39, the nc-OS and The sizes of the crystal parts of the CAAC-OS and CAAC-OS are about 1.4 nm and 2.1 nm, respectively. I realize something.

[0513] Thus, in a-like OS, the growth of crystals can be observed by electron irradiation. On the other hand, the growth of the crystals in the nc-OS and CAAC-OS was hardly observed by electron irradiation. In other words, a-like OS is not seen in nc-OS and CAAC-OS. It can be seen that compared with S, it has a less stable structure.

[0514] In addition, because of the porosity, a-like OS is more resistant to vascular endothelial cell proliferation than nc-OS and CAAC-OS. Specifically, the density of the a-like OS is lower than that of a single crystal of the same composition. The density of nc-OS is 78.6% or more and less than 92.3% of that of CAAC. The density of the -OS is 92.3% or more and less than 100% of the density of a single crystal of the same composition. It is difficult to form an oxide semiconductor film having a density of less than 78% of that of the oxide semiconductor film.

[0515] For example, in an oxide semiconductor with an atomic ratio of In:Ga:Zn=1:1:1, The density of single crystal InGaZnO4 with a hexagonal crystal structure is 6.357 g / cm 3 It becomes. For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, , the density of a-like OS is 5.0g / cm 3 More than 5.9g / cm 3 It is less than. For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, The density of nc-OS and that of CAAC-OS are 5.9 g / cm 3 More than 6.3g / cm 3 It will be less than.

[0516] In addition, there are cases where single crystals with the same composition do not exist. In such cases, the composition may differ in any ratio. By combining single crystals, we estimate the density equivalent to a single crystal of the desired composition. The density corresponding to a single crystal of a desired composition can be determined by combining single crystals of different compositions. The weighted average of the proportion of It is preferable to estimate by combining different types of single crystals.

[0517] As described above, oxide semiconductors have various structures, each of which has various characteristics. The oxide semiconductor may be, for example, an amorphous oxide semiconductor, an a-like OS, or a microcrystalline oxide semiconductor. The layer may be a laminated film having two or more of a semiconductor and a CAAC-OS.

[0518] <<Film formation model>> An example of a film formation model for CAAC-OS and nc-OS will be described below.

[0519] FIG. 40A shows how a CAAC-OS film is formed by a sputtering method. FIG.

[0520] The target 5130 is attached to a backing plate. A plurality of magnets are disposed at positions facing the target 5130. The magnetic field is generated by the magnet. The magnetic field of the magnet is used to increase the deposition speed. The sputtering method is called magnetron sputtering.

[0521] The substrate 5120 is disposed so as to face the target 5130, and the distance therebetween is d ( The target-substrate distance (TS distance) is preferably 0.01 m or more and 1 m or less. The thickness of the deposition chamber is set to 0.02m or more and 0.5m or less. Most of the deposition gas (e.g., oxygen) is The chamber is filled with a gas mixture containing 5% or more by volume of nitrogen, argon, or oxygen. The pressure is controlled to be 0.1 Pa or more and 100 Pa or less, preferably 0.1 Pa or more and 10 Pa or less. By applying a certain voltage to the target 5130, discharge begins and plasma is generated. It is noted that a high-density plasma region is formed near the target 5130 by the magnetic field. In the high density plasma region, the deposition gas is ionized, and ions 5101 are generated. The ions 5101 are, for example, positive oxygen ions (O + ) and argon cations (A r + ) etc.

[0522] Here, the target 5130 has a polycrystalline structure having a plurality of crystal grains, and any of the grains The crystal grains include cleavage planes. FIG. 41(A) shows an example of a cleavage plane included in a target 5130. The crystal structure of InGaZnO4 is shown in Fig. 41(A). This is the structure of an InGaZnO4 crystal. In the Ga-Zn-O layer, the oxygen atoms in each layer are arranged close to each other. It can be seen that the oxygen atom has a negative charge, and the two adjacent G Repulsion occurs between the a-Zn-O layers. As a result, the InGaZnO4 crystals are close to each other. The cleavage plane is between the two Ga-Zn-O layers.

[0523] Ions 5101 generated in the high-density plasma region are applied to the target 5130 side by the electric field. The cleavage plane is accelerated and eventually collides with the target 5130. At this time, flat or pellet-like particles are generated from the cleavage plane. Pellet 5100a and pellet 5100b, which are pellet-shaped sputtered particles, are peeled off and struck. The pellets 5100a and 5100b are the same as the pellets 5101. The impact of a collision can cause distortion of the structure.

[0524] The pellet 5100a is a flat or pellet-shaped pellet having a triangular, for example equilateral, plane. The pellet 5100b has a hexagonal, for example, regular hexagonal, planar surface. The sputtered particles are in the form of a plate or pellet. Pellet 5100b and other flat or pellet-shaped sputter particles are collectively referred to as pellet 5 The planar shape of the pellet 5100 is not limited to a triangle or a hexagon. For example, a triangle (e.g., an equilateral triangle) may have a shape that is made up of multiple triangles. In some cases, the shape may be two squares (for example, a diamond).

[0525] The thickness of the pellet 5100 is determined according to the type of deposition gas. The reason for this will be described later. It is preferable that the thickness of the pellet 5100 is uniform. Thin pellets are preferred over thick cubes. The thickness of the 5100 is 0.4 nm or more and 1 nm or less, preferably 0.6 nm or more and 0.8 nm or less. For example, the pellet 5100 has a width of 1 nm or more and 3 nm or less, preferably The diameter of the pellet 5100 is 1.2 nm or more and 2.5 nm or less. For example, the target 51 having In-Ga-Zn oxide corresponds to the initial nucleus described in . When ions 5101 are bombarded onto the surface of the semiconductor substrate 30, the Ga-Zn-O layer, A pellet 5100 having three layers, an In-O layer and a Ga-Zn-O layer, is exfoliated. (C) shows the structure of the exfoliated pellet 5100 observed from a direction parallel to the c-axis. The plate 5100 is a nanotube having two Ga-Zn-O layers (panels) and an In-O layer (tool). It can also be called a no-size sandwich structure.

[0526] As the pellet 5100 passes through the plasma, it picks up an electrical charge, causing the sides to become negative or positive. The pellet 5100 may be negatively charged, for example, because the oxygen atoms located on the side of the pellet 5100 are negatively charged. The sides of the plate have the same polarity of charge, which causes repulsion between the charges. This allows the CAAC-OS to maintain its flat or pellet-like shape. However, in the case of In-Ga-Zn oxide, the oxygen atom bonded to the indium atom is negatively charged. Or, an acid bonded to an indium atom, a gallium atom, or a zinc atom may The elementary atoms may become negatively charged. Also, the pellet 5100 may become charged as it passes through the plasma. In addition, it bonds with indium atoms, gallium atoms, zinc atoms, oxygen atoms, etc. in the plasma. The difference in size between (2) and (1) in Figure 39 above is due to the This corresponds to the growth in the plasma. Here, when the substrate 5120 is at room temperature, Since the growth of pellet 5100 on 0 is difficult, it becomes nc-OS (Figure 40(B ) See. ) Since the film can be formed at room temperature, even if the substrate 5120 has a large area, In order to grow pellet 5100 in plasma, In this case, it is effective to increase the film formation power in the sputtering method. This makes it possible to stabilize the structure of the pellet 5100.

[0527] As shown in FIG. 40(A) and FIG. 40(B), for example, a pellet 5100 is It flies like a kite through the air and flutters up to the top of the substrate 5120. Pellet 51 Since the 00 is electrically charged, it approaches an area where other pellets 5100 are already deposited. Here, on the upper surface of the substrate 5120, a repulsive force is generated in a direction parallel to the upper surface of the substrate 5120. In addition, the substrate 5120 and the target 51 Since a potential difference is applied between the substrate 5120 and the target 5130, Therefore, the pellet 5100 is disposed on the upper surface of the substrate 5120 in a magnetic The force (Lorentz force) is exerted by the action of the electric field and the electric current. This is explained by Fleming's This can be understood using the left-hand rule.

[0528] The pellet 5100 has a large mass compared to a single atom. In order to move the object, it is important to apply some kind of force from the outside. It is possible that the force is generated by the action of a magnetic field and a current. In order to provide sufficient force to move the top surface of the substrate 5120, The magnetic field parallel to the upper surface of the plate 5120 is 10 G or more, preferably 20 G or more, and more preferably It is preferable to provide an area where the resistance is 30 G or more, and more preferably 50 G or more. On the upper surface of the substrate 5120, a magnetic field parallel to the upper surface of the substrate 5120 is applied to the upper surface of the substrate 5120. At least 1.5 times, preferably at least 2 times, more preferably at least 3 times the magnetic field perpendicular to the surface More preferably, a region in which the difference is 5 times or more is provided.

[0529] At this time, the magnet and the substrate 5120 move or rotate relatively to each other. Thus, the orientation of the horizontal magnetic field on the top surface of the substrate 5120 continues to change. On the upper surface of 5120, the pellet 5100 is subjected to forces from various directions and is moved in various directions. Can be moved.

[0530] Also, when the substrate 5120 is heated as shown in FIG. The resistance due to friction between the substrate 5120 and the substrate 5120 is small. The pellet 5100 glides over the upper surface of the substrate 5120. The movement occurs with the flat surface facing the substrate 5120. When the pellet 5100 reaches the side of the pellet, the sides of the pellet 5100 are joined together. The oxygen atom on the side of 0 is removed. The removed oxygen atom causes the acid in CAAC-OS to be Since the electron vacancies may be filled, the CAAC-OS has a low defect level density. The temperature of the upper surface of 5120 is, for example, 100°C or more and less than 500°C, 150°C or more and less than 450°C. 170° C. or more and less than 400° C. Therefore, Even in this case, it is possible to form a CAAC-OS film.

[0531] In addition, the pellet 5100 is heated on the substrate 5120, whereby the atoms are rearranged, The structural distortion caused by the collision of the ions 5101 is relieved. The pellet 51 with the distortion relieved is shown in FIG. 00 is almost a single crystal. Pellet 5100 is almost a single crystal, Even if the pellets 5100 are heated after being bonded to each other, the pellets 5100 themselves do not expand or contract. Therefore, the gaps between the pellets 5100 widen, causing the grains to It does not form defects such as boundaries or crevasse formation.

[0532] In addition, the CAAC-OS is not made of a single crystal oxide semiconductor. The aggregates of Pellet 5100 (nano crystals) are arranged like piles of bricks or blocks. In addition, there are no grain boundaries between the pellets 5100. The CAAC-OS was deformed, such as shrinking, due to heating during film formation, heating after film formation, or bending. Even in cases where the material is not fully deformed, it is possible to relieve local stress or release strain. This structure is suitable for use in flexible semiconductor devices. The resulting arrangement resembles randomly stacked nanocrystals.

[0533] When the target 5130 is sputtered by ions 5101, not only the pellet 5100 but also However, zinc oxide may peel off. Zinc oxide is lighter than pellet 5100, so Therefore, it will reach the upper surface of the substrate 5120 first. A zinc oxide layer 5102 having a thickness of 0.5 nm to 2 nm is formed. A schematic cross-sectional view is shown in Figure 42.

[0534] As shown in FIG. 42(A), a pellet 5105a and a pellet Here, the pellets 5105a and 5105b are piled up. The pellets 5105c are arranged so that their sides are in contact with each other. After being deposited on pellet 5105b, it slides on pellet 5105b. In another aspect of 5a, a plurality of particles 5103 detached from the target along with zinc oxide. However, due to heating from the substrate 5120, it is crystallized to form a region 5105a1. The particles 5103 may include oxygen, zinc, indium, and gallium, among others.

[0535] As shown in FIG. 42(B), the region 5105a1 is integrated with the pellet 5105a. The pellet 5105c is formed by cutting the pellet 5105a2. It is arranged so as to be in contact with another side surface of 105b.

[0536] Next, as shown in FIG. 42(C), a pellet 5105d is further formed on the pellet 5105a2. and pellet 5105b, and then pellet 5105a2 and pellet 51 It slides on the pellet 5105b. It also slides towards the other side of the pellet 5105c. The pellet 5105 e slides on the zinc oxide layer 5102 .

[0537] As shown in FIG. 42(D), the pellet 5105d has a side surface similar to that of the pellet 510. The pellet 5105e is arranged so that its side surface is in contact with the pellet 5105a. Also, the other side of the pellet 5105d is arranged so as to contact the other side of the pellet 5105c. In the process, a plurality of particles 5103 peeled off from the target 5130 together with zinc oxide are deposited on the substrate. Heat from 5120 causes crystallization, forming region 5105d1.

[0538] As described above, the piled up pellets are arranged so that they come into contact with each other, and the pellets are formed on the side surfaces. As a result of this growth, a CAAC-OS is formed on the substrate 5120. The pellets of C-OS are larger than those of nc-OS. The difference in size between (1) and (2) corresponds to the growth that occurred after deposition.

[0539] In addition, the gaps between the pellets become extremely small, so that one large pellet is formed. One large pellet may have a single crystal structure. For example, The thickness is 10 nm or more and 200 nm or less, or 15 nm or more and 100 nm or less, as viewed from the top surface; or In some cases, the thickness may be between 20 nm and 50 nm. In some cases, the channel formation region of a nitride semiconductor fits into a single large pellet. In other words, the region having a single crystal structure can be used as a channel forming region. As the size of the gate increases, the region having a single crystal structure becomes the channel formation region of the transistor, In some cases, they can be used as source and drain regions.

[0540] In this way, the channel formation region of the transistor and the like are formed in a region having a single crystal structure. By doing so, it may be possible to improve the frequency characteristics of the transistor.

[0541] Based on the above model, it is considered that the pellet 5100 accumulates on the substrate 5120. It is possible to form a CAAC-OS film even if the surface on which the film is to be formed does not have a crystalline structure. This indicates that the growth mechanism is different from epitaxial growth. C-OS does not require laser crystallization and can form a uniform film even on large glass substrates. For example, if the structure of the upper surface (formation surface) of the substrate 5120 is an amorphous structure (e.g., non-crystalline structure), It is possible to form a CAAC-OS film even on a substrate made of amorphous silicon oxide.

[0542] In addition, the CAAC-OS can be used even if the upper surface of the substrate 5120 on which the formation is to be performed is uneven. For example, the pellets 5100 are arranged along the shape of the upper surface of the substrate 5120. If the surface is atomically flat, the pellet 5100 will face down on a flat surface that is parallel to the ab plane. If the pellet 5100 has a uniform thickness, it is flat and has a uniform thickness. A layer with high crystallinity is formed. Then, the layer is stacked n levels (n is a natural number). By this, CAAC-OS can be obtained.

[0543] On the other hand, even if the upper surface of the substrate 5120 has unevenness, the CAAC-OS can be easily formed by the pellet 510. The structure is made up of n layers (n is a natural number) of layers with 0s arranged along the unevenness. Since the surface of the CAAC-OS is uneven, gaps may easily occur between the pellets. However, even in this case, intermolecular forces act between the pellets 5100, and unevenness may occur. The pellets are arranged so that the gaps between them are as small as possible. It is possible to obtain a CAAC-OS having high crystallinity.

[0544] Since the CAAC-OS film is formed by such a model, the sputtered particles have a thin film thickness. It is preferable that the sputtered particles are in the form of pellets. However, the surface facing the substrate 5120 may not be uniform, and the thickness and crystal orientation may not be uniform. be.

[0545] The film formation model shown above shows that a highly crystalline film can be formed even on a substrate surface with an amorphous structure. It is possible to obtain a CAAC-OS having the formula: [Explanation of symbols]

[0546] 10 Light emitting device 11 pixels 12 Monitor circuit 13 Image processing circuit 21 Circuit 22 Transistor 24 Pixel section 25 Panel 26 Controller 27 CPU 28 Image Memory 29 Memory 30 Drive circuit 31 Drive circuit 32 Image data 33 Wiring 34 Transistor 40 Transistor 41 Transistor 42 Transistor 43 Transistor 44 Transistor 45 Transistor 46 Light-emitting element 47 Capacitive element 48 Capacitive element 49 Wiring 54 Light emitting element 55 Transistor 56 Transistor 57 Transistor 58 Capacitive element 60 Operational Amplifiers 61 Capacitive element 62 Switch 68 Wiring 70 Transistor 71 Transistor 72 Transistor 73 Transistor 74 Transistor 75 Transistors 76 Capacitive element 77 Capacitive element 78 Light-emitting element 80 Transistor 81 Transistor 82 Transistor 83 Transistor 84 Transistors 85 Transistors 86 Light-emitting element 87 Capacitive element 88 Wiring 90 Transistor 91 Transistor 92 Transistor 93 Transistor 94 Transistor 95 Capacitive element 96 Light emitting element 102 Substrate 104 Insulating film 106 Oxide semiconductor film 106a area 106b area 106c area 106d area 108 Insulating film 110 Conductive film 112 Conductive film 114 Conductive Film 116 Insulating film 118 Insulating film 140a opening 140b opening 150 Transistors 261 Conductive Film 266 Oxide Semiconductor Film 268 Conductive Film 270 Conductive Film 272 Insulating Film 274 Conductive Film 362 Substrate 364 Insulating Film 364a Nitride insulating film 364b Oxide insulating film 366 Oxide Semiconductor Film 366a area 366b area 366c area 366d area 366e Offset Area 367a Oxide semiconductor film 367b Oxide semiconductor film 367c Oxide semiconductor film 368 Conductive Film 368a Conductive film 368b Conductive film 368c conductive film 370 Conductive Film 370a Conductive film 370b Conductive film 370c conductive film 372 Insulating Film 372a Insulating film 374 Conductive Film 374a Conductive film 374b Conductive film 376 Insulating Film 390 Transistors 391 Transistor 392 Transistors 393 Transistor 394 Transistors 402 Substrate 404 Insulating film 406 Oxide Semiconductor Film 406b area 406c area 406d area 406e Offset Area 408 Insulating film 408a Insulating film 410 Conductive Film 412 Conductive film 414 Conductive film 414a Conductive film 416 Insulating film 418 Insulating film 440a opening 440b opening 450 Transistors 821 Substrate 824 Insulating film 828 Oxide Semiconductor Film 828a area 828b area 828c area 828d area 828e area 828f area 828g area 837 Insulating film 840 Conductive Film 840a Conductive film 840b Conductive film 846 Insulating film 847 Insulating film 856 Conductive film 857 Conductive film 862 Insulating film 1000 boards 1001 Conductive film 1002 Conductive film 1003 Conductive film 1004 Semiconductor film 1005 Conductive film 1006 Conductive film 1007 Semiconductor film 1008 Conductive film 1009 Conductive film 1010 Conductive film 1011 Conductive film 1012 Conductive film 1013 Conductive film 1015 Insulating film 1016 Insulating film 1017 Insulating film 1018 Insulating film 1019 Insulating film 1020 Insulating film 1025 Insulating film 1026 Insulating film 1027 EL layer 1028 Conductive film 1030 Substrate 1031 Shielding membrane 1032 Colored layer 1601 Panel 1602 Circuit Board 1603 Connection 1604 Pixel section 1605 Drive circuit 1606 Drive circuit 3001 Case 3002 Display section 3003 Support stand 3101 Case 3102 Display section 3103 Operation key 3301 Case 3302 Case 3303 Display section 3304 Display section 3305 Microphone 3306 Speaker 3307 Operation key 3308 Stylus 3601 Case 3602 Display section 3701 Case 3702 Display section 3901 Case 3902 Display section 3903 Camera 3904 Speaker 3905 Button 3906 External connection part 3907 Mike 5100 pellets 5100a Pellet 5100b Pellets 5101 AEON 5102 Zinc oxide layer 5103 particles 5105a Pellet 5105a1 area 5105a2 Pellet 5105b Pellet 5105c Pellet 5105d Pellet 5105d1 area 5105e Pellet 5120 PCB 5130 Target 5161 area

Claims

1. having a pixel, The pixel includes first to third transistors and a light emitting element, a gate of the first transistor is electrically connected to a first wiring; one of a source and a drain of the first transistor is electrically connected to a second wiring; the other of the source and the drain of the first transistor is electrically connected to the gate of the second transistor; one of a source and a drain of the second transistor is electrically connected to a third wiring; a gate of the third transistor is electrically connected to a fourth wiring; one of a source and a drain of the third transistor is electrically connected to the other of the source and the drain of the second transistor; the other of the source and the drain of the third transistor is electrically connected to a fifth wiring; A signal different from that input to the fourth wiring is input to the first wiring, an image signal supplied to the second wiring is supplied to a gate of the second transistor via at least the first transistor; the second transistor has a function of supplying a current corresponding to the image signal from the third wiring to the light-emitting element; the third transistor has a function of supplying a current flowing through the second transistor to the fifth wiring; the second transistor has a region functioning as a first gate electrode in a first conductive film; the second transistor has a region functioning as a second gate electrode in a second conductive film; the first conductive film has a region overlapping with the second conductive film with an oxide semiconductor film interposed therebetween; the oxide semiconductor film includes a channel formation region of the second transistor, an upper surface of the oxide semiconductor film has a region in contact with a third conductive film and a region in contact with a first insulating film; the oxide semiconductor film has a region overlapping with the third conductive film with the first insulating film interposed therebetween; When nanobeam electron diffraction is performed on the oxide semiconductor film, a plurality of spots are observed within the ring-shaped region, an upper surface of the first conductive film has a region in contact with a second insulating film; an upper surface of the third conductive film has a region in contact with the second insulating film; the first transistor has a region functioning as a first gate electrode in a fourth conductive film; the third transistor has a region functioning as a first gate electrode in a fifth conductive film; the first transistor does not have a conductive film functioning as a second gate electrode, The third transistor does not have a conductive film functioning as a second gate electrode.

2. In claim 1, The third transistor has a function of extracting a current flowing through the second transistor to the outside of the pixel.

3. In claim 2, A light emitting device having a function of correcting the image signal input to the pixel using the value of the current extracted outside the pixel.

4. In any one of claims 1 to 3, A light emitting device, wherein a potential input to the first conductive film is different from a potential input to the second conductive film.

Images