Circuit board and method of fabricating circuit board

Abstract

To provide a circuit board and a method of fabricating the circuit board capable of reducing the risk of warpage.SOLUTION: A disclosed circuit board is provided, including: an insulating core layer 100 that has a first surface 100a and a second surface 100b opposing each other, an insulating auxiliary member 400 of which at least a part is disposed in the insulating core layer and which has a coefficient of thermal expansion (CTE) different from that of the insulating core layer, a first substrate portion 200 that includes a first insulating layer 230 which is disposed on the first surface, and a first circuit wiring 210 which is embedded in the first insulating layer, and a second substrate portion 300 that includes a second insulating layer 330 which is disposed on the second surface, and a second circuit wiring 310 which is embedded in the second insulating layer.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a circuit board and a method for manufacturing the same. [Background technology]

[0002] With the development of the electronics industry, as electronic devices gradually become more powerful, semiconductor packages are required to be smaller, thinner, and denser at the same time. The number of ICs mounted to increase the density of packages is also increasing. In addition, the ball pitch of ICs is becoming smaller and smaller in order to mount many functions on a circuit board of limited size.

[0003] As technology advances to mount many functions on a limited-sized circuit board, the risk of yield loss due to warpage during product manufacturing increases, making it increasingly important to develop technology to improve warpage. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2019-87723 A Summary of the Invention [Problem to be solved by the invention]

[0005] The present invention has been made in consideration of the above-mentioned problems in the conventional art, and an object of the present invention is to provide a circuit board that reduces the risk of warping, and a manufacturing method thereof. [Means for solving the problem]

[0006] In order to achieve the above-mentioned object, a circuit board according to one embodiment of the present invention comprises an insulating core layer having a first surface and a second surface facing each other, an insulating auxiliary member at least a portion of which is located in the insulating core layer and has a coefficient of thermal expansion (CTE) different from that of the insulating core layer, a first substrate portion including a first insulating layer located on the first surface and a first circuit wiring embedded in the first insulating layer, and a second substrate portion including a second insulating layer located on the second surface and a second circuit wiring embedded in the second insulating layer.

[0007] The insulating support member may have a higher CTE than the insulating core layer. At least a portion of the insulating auxiliary member may be located between a center line of the insulating core layer and the first surface. The insulating core layer may have a recess located on the first surface, and the insulating auxiliary member may be located in the recess. The recess may include a plurality of recesses, and the plurality of recesses may have a lattice structure. The recess may have a trench structure. The recessed portion may include a plurality of recessed portions, and the plurality of recessed portions may have portions intersecting with each other. The CTE of the first substrate portion and the CTE of the second substrate portion may be different from each other. The CTE of the first substrate portion may be smaller than the CTE of the second substrate portion. The first substrate portion may further include a first connection pad located on a surface of the first insulating layer, and the second substrate portion may further include a second connection pad located on a surface of the second insulating layer. The inorganic filler content of the first insulating layer may be greater than the inorganic filler content of the second insulating layer. The semiconductor device may further include a first protective layer located on the first insulating layer and having a first opening overlapping the first connection pad, and a second protective layer located under the second insulating layer and having a second opening overlapping the second connection pad.

[0008] In order to achieve the above-mentioned object, a manufacturing method for a circuit board according to one embodiment of the present invention includes the steps of forming a recess on a first surface of an insulating core layer having a first surface and a second surface facing each other, placing an insulating auxiliary member having a coefficient of thermal expansion (CTE) different from that of the insulating core layer in the recess, forming a first circuit wiring and a first insulating layer on the first surface of the insulating core layer, and forming a second circuit wiring and a second insulating layer on the second surface of the insulating core layer.

[0009] The step of disposing the insulating support member may include disposing an insulating material having a higher CTE than the insulating core layer in the recess. Forming a recess in the first surface of the insulating core layer may include using a laser to drill a hole in the insulating core layer to a depth less than or equal to half the thickness of the insulating core layer measured in a first direction perpendicular to the first surface. The step of forming a recess in the first surface of the insulating core layer may include forming a through hole in a first sub-insulating core layer and bonding the first sub-insulating core layer to a second sub-insulating core layer. Bonding the first sub-insulation core layer to the second sub-insulation core layer may include disposing an adhesive layer between the first sub-insulation core layer and the second sub-insulation core layer. Effect of the Invention

[0010] According to the present invention, the imbalance in the coefficient of thermal expansion (CTE) between the upper and lower parts of the circuit board based on the center line can be alleviated, thereby improving the warpage phenomenon.

[0011] However, the effects of the present invention are not limited to the above-mentioned effects. [Brief description of the drawings]

[0012] [Figure 1] 1 is a cross-sectional view showing a circuit board according to an embodiment. [Figure 2A]2A to 2C are plan views showing various examples in which the insulating auxiliary member shown in FIG. 1 is disposed on an insulating core layer. [Figure 2B] 2A to 2C are plan views showing various examples in which the insulating auxiliary member shown in FIG. 1 is disposed on an insulating core layer. [Figure 2C] 2A to 2C are plan views showing various examples in which the insulating auxiliary member shown in FIG. 1 is disposed on an insulating core layer. [Figure 2D] 2A to 2C are plan views showing various examples in which the insulating auxiliary member shown in FIG. 1 is disposed on an insulating core layer. [Diagram 3] 1. FIG. 4 is a cross-sectional view showing a modified example of the circuit board shown in FIG. [Figure 4] 1A to 1C are cross-sectional views illustrating a method for manufacturing a circuit board according to an embodiment. [Diagram 5] 1A to 1C are cross-sectional views illustrating a method for manufacturing a circuit board according to an embodiment. [Figure 6] 1A to 1C are cross-sectional views illustrating a method for manufacturing a circuit board according to an embodiment. [Figure 7] 1A to 1C are cross-sectional views illustrating a method for manufacturing a circuit board according to an embodiment. [Figure 8] 1A to 1C are cross-sectional views illustrating a method for manufacturing a circuit board according to an embodiment. [Figure 9] 1A to 1C are cross-sectional views illustrating a method for manufacturing a circuit board according to an embodiment. [Figure 10] 1A to 1C are cross-sectional views illustrating a method for manufacturing a circuit board according to an embodiment. [Figure 11] 1A to 1C are cross-sectional views illustrating a method for manufacturing a circuit board according to an embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, specific examples of the embodiments of the present invention will be described in detail with reference to the drawings.

[0014] This invention may be embodied in several different forms and should not be construed as limited to the embodiments set forth herein.

[0015] In the drawings, in order to clearly illustrate the present invention, parts that are not relevant to the description are omitted, and the same reference numerals are used throughout the specification to refer to the same or similar components.

[0016] In addition, the size and thickness of each component shown in the drawings are arbitrarily shown for convenience of explanation, and the present invention is not necessarily limited to those shown in the drawings. In the drawings, the size and thickness are enlarged to clearly show multiple layers and regions. In addition, in the drawings, the thickness of some layers and regions is exaggerated for convenience of explanation.

[0017] The drawings are intended to facilitate understanding of the embodiments disclosed in this specification, and are not intended to limit the technical ideas disclosed in this specification. They should be understood to include all modifications, equivalents, or alternatives included in the idea and technical scope of the present invention.

[0018] Terms including ordinal numbers such as first, second, etc. are used to describe various components, but the components are not limited by the terms. The terms are used only to distinguish one component from another.

[0019] Furthermore, when a part such as a layer, film, region, or plate is "on" or "above" another part, this includes not only the case where it is "directly on" the other part, but also the case where there is another part between them. Conversely, when a part is said to be "directly on" another part, it means that there is no other part in between. Furthermore, when a part is said to be "on" or "above" a reference part, it means that it is located above or below the reference part, and does not necessarily mean that it is located "on" or "above" the direction opposite to gravity.

[0020] Throughout the specification, terms such as "comprises" or "having" are to be understood as specifying the presence of a feature, value, step, operation, component, part, or combination thereof described in the specification, without precluding the possibility of the presence or addition of one or more other features, values, steps, operations, components, parts, or combinations thereof. Thus, when a part is described as "comprising" a certain element, this does not exclude other elements, but means that it may further include other elements, unless specifically stated to the contrary.

[0021] Additionally, throughout the specification, "on a plane" means that the subject part is viewed from above, and "on a cross section" means that the subject part is cut vertically and viewed from the side.

[0022] Furthermore, throughout the specification, "connected" does not only mean that two or more components are directly connected, but also means that two or more components are indirectly connected through other components, that they are not only physically connected but also electrically connected, or that they are referred to by different names depending on their location or function but are integrated.

[0023] Throughout the specification, a substrate is a planar, cross-sectionally thin structure, and a "plane direction of the substrate" refers to a direction parallel to the broad, planar surface of the substrate, and a "thickness direction of the substrate" refers to a direction perpendicular to the broad, planar surface of the substrate.

[0024] Hereinafter, various embodiments and modifications thereof will be described in detail with reference to the drawings.

[0025] FIG. 1 is a cross-sectional view showing a circuit board according to an embodiment.

[0026] Referring to FIG. 1, the circuit board according to this embodiment includes an insulating core layer 100, a first substrate part 200 located on the insulating core layer 100, a second substrate part 300 located below the insulating core layer 100, and an insulating auxiliary member 400 located on the insulating core layer 100.

[0027] The insulating core layer 100 has a predetermined area and thickness. The insulating core layer 100 has a first surface 100a and a second surface 100b facing each other. The insulating core layer 100 has a structure that is wide in a plane and thin in a cross section. The direction perpendicular to the first surface 100a or the second surface 100b means the direction perpendicular to the wide, flat surface of the insulating core layer 100.

[0028] The insulating core layer 100 includes a thermosetting resin such as epoxy resin, polyimide, etc., a thermoplastic resin such as polyethylene (PE), polycarbonate (PC), polyvinyl chloride (PVC), etc., and also includes a resin containing a reinforcing agent such as glass fiber or an inorganic filler, etc. For example, the insulating core layer 100 includes a prepreg, ABF (Ajinomoto Buildup Film), PID (Photo Imageable Dielectric), BT (Bismaleimide Triazine) resin, etc.

[0029] The insulating core layer 100 includes a first insulating core layer 110 located from the center line CL to the first surface 100a, and a second insulating core layer 120 located from the center line CL to the second surface 100b. The insulating core layer 100 has a recess DT formed in a part of the insulating core layer 100 from the first surface 100a. The recess DT is formed in the first insulating core layer 110. The depth of the recess DT measured in a first direction perpendicular to the first surface 100a is smaller than or equal to half the thickness of the insulating core layer 100 measured in the first direction. That is, the recess DT is formed in the first insulating core layer 110 and does not extend to the second insulating core layer 120.

[0030] The first substrate portion 200 is located on the first surface 100a of the insulating core layer 100. The first substrate portion 200 includes a first circuit wiring 210, a first insulating layer 230, a first connection pad 250, and a first protective layer 270.

[0031] The first circuit wiring 210 is located on the first surface 100a of the insulating core layer 100. The first circuit wiring 210 transmits electrical signals. The first circuit wiring 210 is arranged in various patterns. The first circuit wiring 210 includes a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof.

[0032] 1 shows one wiring layer of the first circuit wiring 210 disposed on the first surface 100a, but is not limited thereto, and the first circuit wiring 210 may be configured with multiple wiring layers. That is, the first circuit wiring 210 may be configured with multiple wiring layers stacked on top of the wiring layer located on the first surface 100a, and this also falls within the scope of the present invention. The multiple wiring layers are connected by via layers.

[0033] The first insulating layer 230 is located on the first surface 100a of the insulating core layer 100. The first circuit wiring 210 is embedded in the first insulating layer 230. The first insulating layer 230 includes a thermosetting resin such as epoxy resin or polyimide, or a thermoplastic resin such as polyethylene (PE), polycarbonate (PC), or polyvinyl chloride (PVC). The first insulating layer 230 also includes a resin containing a reinforcing agent such as glass fiber or inorganic filler. As an example, the first insulating layer 230 includes, but is not limited to, prepreg, ABF (Ajinomoto Buildup Film), PID (Photo Imageable Dielectric), and the like.

[0034] The first connection pads 250 are located on the first insulating layer 230. That is, the first connection pads 250 are located on the surface of the first insulating layer 230. The surface of the first insulating layer 230 refers to the surface of the first insulating layer 230 that is opposite to the surface that contacts the first surface 100a. The first connection pads 250 are arranged in various patterns on the first insulating layer 230. The first connection pads 250 include a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof.

[0035] Although not shown, a via layer that electrically connects the first circuit wiring 210 and the first connection pad 250 is formed in the first insulating layer 230. As an example, the via includes copper (Cu), silver (Ag), palladium (Pd), aluminum (Al), nickel (Ni), titanium (Ti), gold (Au), platinum (Pt), or an alloy thereof. The via is formed of the same material as the first circuit wiring 210.

[0036] The first protective layer 270 is disposed on the first insulating layer 230. The first protective layer 270 includes an insulating material such as a solder resist. The first protective layer 270 has a first opening 275 overlapping the first connection pad 250. That is, the first connection pad 250 is exposed to the outside through the first opening 275.

[0037] The second substrate portion 300 is located below the second surface 100b of the insulating core layer 100. The second substrate portion 300 includes a second circuit wiring 310, a second insulating layer 330, a second connection pad 350, and a second protective layer 370.

[0038] The second circuit wiring 310 is located under the second surface 100b of the insulating core layer 100. The second circuit wiring 310 transmits electrical signals. The second circuit wiring 310 is arranged in various patterns. The second circuit wiring 310 includes a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof.

[0039] 1 shows one wiring layer of the second circuit wiring 310 disposed on the second surface 100b, but is not limited thereto, and the second circuit wiring 310 may be configured with multiple wiring layers. That is, the second circuit wiring 310 may be configured with multiple wiring layers including the wiring layer located on the second surface 100b and laminated thereunder, which also falls within the scope of the present invention. The multiple wiring layers are connected with via layers.

[0040] The second insulating layer 330 is located under the second surface 100b of the insulating core layer 100. The second circuit wiring 310 is embedded in the second insulating layer 330. The second insulating layer 330 includes a thermosetting resin such as epoxy resin, polyimide, or a thermoplastic resin such as polyethylene (PE), polycarbonate (PC), or polyvinyl chloride (PVC). The second insulating layer 330 also includes a resin containing a reinforcing agent such as glass fiber or inorganic filler. As an example, the second insulating layer 330 includes, but is not limited to, prepreg, ABF (Ajinomoto Buildup Film), PID (Photo Imageable Dielectric), and the like.

[0041] The second connection pads 350 are located under the second insulating layer 330. That is, the second connection pads 350 are located on the surface of the second insulating layer 330. The surface of the second insulating layer 330 refers to the surface of the second insulating layer 330 that is opposite to the surface that contacts the second surface 100b. The second connection pads 350 are arranged in various patterns under the second insulating layer 330. The second connection pads 350 include a conductive material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof.

[0042] Although not shown, a via layer that electrically connects the second circuit wiring 310 and the second connection pad 350 is formed in the second insulating layer 330. As an example, the via includes copper (Cu), silver (Ag), palladium (Pd), aluminum (Al), nickel (Ni), titanium (Ti), gold (Au), platinum (Pt), or an alloy thereof. The via is formed of the same material as the second circuit wiring 310.

[0043] The second protective layer 370 is located under the second insulating layer 330. The second protective layer 370 includes an insulating material such as a solder resist. The second protective layer 370 has a second opening 375 overlapping the second connection pad 350. That is, the second connection pad 350 is exposed to the outside through the second opening 375.

[0044] The first substrate unit 200 and the second substrate unit 300 have different coefficients of thermal expansion (CTE). The CTE of the first substrate unit 200 and the second substrate unit 300 can be measured using a thermal expansion coefficient measuring device such as a TMA (Thermal Mechanical Analzer) or a dilatometer. For example, the CTE is obtained by measuring the length of expansion or contraction of the first substrate unit 200 and the second substrate unit 300 in the planar direction of the substrate, i.e., in the direction parallel to the wide and flat surface of the substrate, using the thermal expansion coefficient measuring device. In addition, the length of expansion or contraction of the first circuit wiring 210, the second circuit wiring 310, the first insulating layer 230, the second insulating layer 330, the first connection pad 250, the second connection pad 350, the first protective layer 270, and the second protective layer 370 of the first substrate unit 200 and the second substrate unit 300 is measured in the planar direction of the substrate to obtain each CTE. The CTE of the first substrate unit 200 and the second substrate unit 300 is a weighted average of the CTE of each component. That is, the CTE of the first substrate unit 200 is a weighted average of the CTE of each of the first circuit wiring 210, the first insulating layer 230, the first connection pad 250, and the first protective layer 270, and the CTE of the second substrate unit 300 is a weighted average of the CTE of each of the second circuit wiring 310, the second insulating layer 330, the second connection pad 350, and the second protective layer 370. Depending on the configuration of the first and second substrate units (200, 300), the weighted average of the CTE of the first circuit wiring 210 and the CTE of the first insulating layer 230 is used as the CTE of the first substrate unit 200, and the weighted average of the CTE of the second circuit wiring 310 and the CTE of the second insulating layer 330 is used as the CTE of the second substrate unit 300. In order to measure the CTE of the first substrate part 200 and the second substrate part 300, a sample is used to measure the displacement caused by expansion or tension.

[0045] The difference in CTE between the first substrate unit 200 and the second substrate unit 300 occurs due to various reasons including the difference in material, circuit wiring, or the content of inorganic filler in the insulating layer. As an example, the area of ​​the second circuit wiring 310 may be smaller than that of the first circuit wiring 210, and the CTE of the second substrate unit 300 may be larger than that of the first substrate unit 200. In this case, there may be more wiring layers constituting the second circuit wiring 310 than the wiring layers constituting the first circuit wiring 210, and the area of ​​the second circuit wiring 310 may be larger than that of the first circuit wiring 210. As another example, the inorganic filler content of the first insulating layer 230 may be greater than the inorganic filler content of the second insulating layer 330, and the CTE of the first substrate unit 200 may be smaller than the CTE of the second substrate unit 300.

[0046] At least a portion of the insulating auxiliary member 400 is located in the insulating core layer 100. The insulating auxiliary member 400 includes a portion located in the first insulating core layer 110. That is, the insulating auxiliary member 400 includes a portion located between the center line (CL) of the insulating core layer 100 and the first surface 100a.

[0047] The insulating auxiliary member 400 is located in the recess DT of the insulating core layer 100. The upper surface 400a of the insulating auxiliary member 400 is formed at approximately the same height as the first surface 100a, but is not limited to this. For example, the upper surface 400a of the insulating auxiliary member 400 or a part including the upper surface 400a is exposed from the insulating core layer 100, and covers the exposed part of the first substrate portion 200.

[0048] The auxiliary insulating member 400 includes an insulating material, and is made of a material different from that of the insulating core layer 100. The auxiliary insulating member 400 and the insulating core layer 100 have different coefficients of thermal expansion (CTE).

[0049] As an example, the insulating auxiliary member 400 contains an insulating resin material having a higher CTE than the insulating core layer 100. Therefore, the CTE formed by the insulating auxiliary member 400 and the first insulating core layer 110 is higher than the CTE of the second insulating core layer 120. At this time, the CTE formed by the insulating auxiliary member 400 and the first insulating core layer 110 is a weighted average of the CTE of the insulating auxiliary member 400 and the CTE of the first insulating core layer 110. The insulating auxiliary member 400 is arranged on the entire circuit board on a plane.

[0050] The insulating auxiliary member 400 compensates for the CTE imbalance between the first substrate unit 200 and the second substrate unit 300. As an example, when the CTE of the second substrate unit 300 is larger than that of the first substrate unit 200 and there is a risk of warpage due to the CTE imbalance, the insulating auxiliary member 400 having a CTE larger than that of the insulating core layer 100 is disposed in the first insulating core layer 110 to eliminate or mitigate the CTE imbalance. That is, when the CTE of the first substrate unit 200 is lower than that of the second substrate unit 300, the insulating auxiliary member 400 having a CTE higher than that of the insulating core layer 100 is disposed in the first insulating core layer 110 to adjust the CTE of the upper portion and the CTE of the lower portion based on the center line CL to be the same or similar.

[0051] 2A to 2D are plan views showing various examples in which the auxiliary insulating member shown in FIG. 1 is disposed on an insulating core layer.

[0052] The insulating auxiliary member 400 has a predetermined area and thickness. The insulating auxiliary member 400 has a plate structure, is flat, and is circular, elliptical, or polygonal. Referring to FIG. 2, the insulating auxiliary member 400 is arranged to form a certain pattern. As an example, the insulating auxiliary member 400 is arranged in a lattice structure (see FIG. 2A and FIG. 2B). Also, the insulating auxiliary member 400 is formed in a long groove-like trench structure (see FIG. 2C). The insulating auxiliary members 400 having the trench structure are arranged to cross each other (see FIG. 2D). However, the arrangement of the insulating auxiliary member 400 is not limited to the structure shown in FIG. 2A to FIG. 2D, and the insulating auxiliary member 400 may be formed in various patterns.

[0053] FIG. 3 is a cross-sectional view showing a modification of the circuit board shown in FIG.

[0054] The circuit board shown in Fig. 3 has a laminated structure basically similar to that of the circuit board shown in Fig. 1. That is, the circuit board according to the modified example includes an insulating core layer 100, a first substrate portion 200 located on the insulating core layer 100, a second substrate portion 300 located below the insulating core layer 100, and an insulating auxiliary member 400 located on the insulating core layer 100. The first and second substrate portions (200, 300) respectively include first and second circuit wirings (210, 310), first and second insulating layers (230, 330), first and second connection pads (250, 350), and first and second protective layers (270, 370).

[0055] The insulating auxiliary member 400 is positioned on a portion of the circuit board on a plane. A preset CTE imbalance between the first substrate unit 200 and the second substrate unit 300 is calculated. If the difference in CTE between the first substrate unit 200 and the second substrate unit 300 is large in a certain portion, the insulating auxiliary member 400 is disposed in the corresponding portion to prevent the occurrence of compound warpage such as saddle. A Gerber file or the like is used to derive the CTE of the first substrate unit 200 and the second substrate unit 300.

[0056] As an example, referring to FIG. 3, when there is a large CTE imbalance between the first substrate portion 200 and the second substrate portion 300 in a portion (P1) overlapping in a first direction perpendicular to the first surface 100a, an insulating auxiliary member 400 is disposed in the second insulating core layer 120 in the portion P1 to alleviate the CTE imbalance.

[0057] 4 to 11 are cross-sectional views showing a method for manufacturing a circuit board according to an embodiment.

[0058] Hereinafter, a method for manufacturing a circuit board according to one embodiment will be described with reference to FIGS. 1 to 3 as well as FIGS.

[0059] 4, first, an insulating core layer 100 is prepared. As an example, in order to prepare the insulating core layer 100, a copper clad laminate (CCL) having a thin metal layer MS laminated on one or both sides of a prepreg forming the insulating core layer 100 is used.

[0060] 5, a recess DT is formed in the insulating core layer 100. The recess DT is formed on the first surface 100a. For example, the recess DT is formed in a plate structure, a flat shape, a circle, an ellipse, or a polygon. As another example, the recess DT is formed in a trench structure.

[0061] 6 and 7 are plan views showing a method for forming the recess DT in FIG.

[0062] As shown in Fig. 6, the insulating core layer 100 is perforated to a certain depth to form the recess DT. As an example, the recess DT is formed using a laser. The recess DT is formed so that the depth measured in the first direction is smaller than or equal to half the thickness of the insulating core layer 100.

[0063] As another example, as shown in FIG. 7, a first sub-insulating core layer SC1 and a second sub-insulating core layer SC2 are prepared to form an insulating core layer 100. The first sub-insulating core layer SC1 has a thickness equal to or less than that of the second sub-insulating core layer SC2. A through hole PH is formed through the first sub-insulating core layer SC1. A drill or punch is used to form the through hole PH. Next, the first sub-insulating core layer SC1 and the second sub-insulating core layer SC2 are bonded together. For the bonding, an adhesive layer AL is disposed between the first sub-insulating core layer SC1 and the second sub-insulating core layer SC2, and the first sub-insulating core layer SC1 and the second sub-insulating core layer SC2 are bonded together through the adhesive layer AL to form the insulating core layer 100.

[0064] Referring to FIG. 8, the insulating auxiliary member 400 is disposed in the recess DT. The insulating auxiliary member 400 is formed in the recess DT and may protrude from the recess DT. The insulating auxiliary member 400 is formed of an insulating material having a higher CTE than the insulating core layer 100. The insulating auxiliary member 400 has various shapes and sizes according to the difference in CTE between the first substrate portion 200 and the second substrate portion 300, and is disposed in various patterns. In this embodiment, the insulating auxiliary member 400 is formed at the same height as the first surface 100a, but is not limited thereto. As an example, the insulating auxiliary member 400 is formed by inserting an insulating material having a higher CTE than the insulating core layer 100 into the recess DT.

[0065] 9, a first circuit wiring 210 is formed on the first surface 100a of the insulating core layer 100, and a second circuit wiring 310 is formed below the second surface 100b. The first circuit wiring 210 is formed by laminating a plating resist on the insulating core layer 100, exposing and developing it to form a plating resist pattern that is removed only in the area where the first circuit wiring 210 is to be formed, and then laminating a conductive metal on the area where the plating resist pattern is not formed. The second circuit wiring 310 is also formed in a similar manner.

[0066] Referring to FIG. 10, a first insulating layer 230 covering the first circuit wiring 210 is formed on the first surface 100a of the insulating core layer 100, and a second insulating layer 330 covering the second circuit wiring 310 is formed below the second surface 100b.

[0067] Although not shown, vias are formed in the first insulating layer 230 and the second insulating layer 330 to expose the first circuit wiring 210 and the second circuit wiring 310, respectively.

[0068] 9 and 10, the first circuit wiring 210, the first insulating layer 230, the second circuit wiring 310, and the second insulating layer 330 are each shown as being laminated as one layer, but the present invention is not limited to this. That is, another circuit wiring layer and another insulating layer are laminated on the laminated insulating layers, and such lamination is repeated. Also, the number of circuit wiring layers included in the first circuit wiring 210 and the second circuit wiring 310 can be laminated so as to be different from each other.

[0069] 11, a first connection pad 250 is formed on the first insulating layer 230, and a second connection pad 350 is formed under the second insulating layer 330. The first and second connection pads (250, 350) are formed in the same manner as the first and second circuit wirings (210, 310) are previously formed.

[0070] Next, referring back to FIG. 1, a first protective layer 270 is formed on the first insulating layer 230, and a second protective layer 370 is formed under the second insulating layer 330.

[0071] Although the embodiments of the present invention have been described in detail above with reference to the drawings, the present invention is not limited to the above-described embodiments and can be modified in various ways without departing from the technical spirit of the present invention. [Explanation of symbols]

[0072] 100 Insulating core layer 100a, 100b 1st and 2nd faces 110 First insulating core layer 120 Second insulating core layer 200, 300 First and second board sections 210, 310 1st and 2nd circuit wiring 230, 330 First and second insulating layers 250, 350 1st and 2nd connection pads 270, 370 1st and 2nd protective layer 275, 375 1st and 2nd opening 400 Insulating auxiliary material 400a top AL adhesive layer CL center line DT recess MS thin metal layer PH Through Hole P1 part SC1, SC2 1st and 2nd sub-insulation core layers

Claims

1. an insulating core layer having opposing first and second surfaces; an insulating auxiliary member, at least a portion of which is located in the insulating core layer and has a coefficient of thermal expansion (CTE) different from that of the insulating core layer; a first substrate portion including a first insulating layer located on the first surface and a first circuit wiring embedded in the first insulating layer; a second substrate portion including a second insulating layer located on the second surface and a second circuit wiring embedded in the second insulating layer.

2. The circuit board according to claim 1 , wherein the insulating auxiliary member has a CTE higher than that of the insulating core layer.

3. 2 . The circuit board according to claim 1 , wherein at least a portion of the insulating auxiliary member is located between a center line of the insulating core layer and the first surface.

4. the insulating core layer has a recess located on the first surface; The circuit board according to claim 3 , wherein the auxiliary insulating member is located in the recess.

5. The recessed portion includes a plurality of recessed portions, The circuit board according to claim 4 , wherein the plurality of recesses have a lattice structure.

6. The circuit board according to claim 4 , wherein the recess has a trench structure.

7. The recessed portion includes a plurality of recessed portions, The circuit board according to claim 6 , wherein the recesses have portions that intersect with each other.

8. The circuit board according to claim 1 , wherein the CTE of the first substrate portion and the CTE of the second substrate portion are different from each other.

9. The circuit board of claim 8 , wherein the CTE of the first substrate portion is less than the CTE of the second substrate portion.

10. the first substrate portion further includes a first connection pad located on a surface of the first insulating layer; The circuit board according to claim 1 , wherein the second substrate portion further includes a second connection pad located on a surface of the second insulating layer.

11. The circuit board according to claim 1 , wherein the inorganic filler content of the first insulating layer is greater than the inorganic filler content of the second insulating layer.

12. a first protective layer overlying the first insulating layer and having a first opening overlying the first connection pad; 11. The circuit board of claim 10, further comprising: a second protective layer located below the second insulating layer and having a second opening overlapping the second connection pad.

13. forming a recess in an insulating core layer having opposing first and second surfaces; disposing an insulating auxiliary member in the recess, the insulating auxiliary member having a coefficient of thermal expansion (CTE) different from that of the insulating core layer; forming a first circuit wiring and a first insulating layer on the first surface of the insulating core layer; forming a second circuit wiring and a second insulating layer on the second surface of the insulating core layer.

14. The method for manufacturing a circuit board according to claim 13 , wherein the step of disposing the insulating auxiliary member includes disposing an insulating material having a CTE higher than that of the insulating core layer in the recess.

15. 14. The method of claim 13, wherein forming a recess in the first surface of the insulating core layer includes drilling a hole in the insulating core layer using a laser to a depth less than or equal to half the thickness of the insulating core layer measured in a first direction perpendicular to the first surface.

16. The step of forming a recess on the first surface of the insulating core layer comprises: forming a through hole in a first sub-insulation core layer; 14. The method of claim 13, further comprising: bonding the first sub-insulation core layer to a second sub-insulation core layer.

17. 17. The method of claim 16, wherein the step of bonding the first sub-insulation core layer to the second sub-insulation core layer includes disposing an adhesive layer between the first sub-insulation core layer and the second sub-insulation core layer.

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