Insulation converter and control method

JP2025005462APending Publication Date: 2025-01-17SUMITOMO ELECTRIC INDUSTRIES LTD
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Application Number
JP2023105595
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-06-28
Publication Date
2025-01-17

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【0011】 以上のように、この開示によると、簡単な制御により、容易にゼロ電圧スイッチングが達成できる絶縁コンバータ、および制御方法を提供できる。

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Abstract

To provide an insulation converter which can easily achieve zero voltage switching with simple control.SOLUTION: An insulation converter includes: a transformer having primary side winding and secondary side winding; a primary side inverter part; a secondary side inverter part; and a control part for controlling the primary side inverter part and the secondary side inverter part and changing a phase difference between the primary side voltage and secondary side voltage, which are applied to the transformer, to perform power conversion by the transformer. The control part reduces a duty ratio of an output voltage waveform of the inverter part with higher input / output voltage after correction in the primary side inverter part and the secondary side inverter part by using a first decrease amount having a positive correlation with the duty ratio of the output voltage waveform of the inverter part with the low input / output voltage after correction, and a second decrease amount having the positive correlation with predetermined dead time, in accordance with an input / output voltage ratio corrected according to a turn ratio of the primary side winding and the secondary side winding of the transformer.SELECTED DRAWING: Figure 5
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Description

[Technical field]

[0001] This disclosure relates to isolated converters and control methods. [Background technology]

[0002] A DAB (Dual Active Bridge) converter includes a transformer, two inverters connected to the primary and secondary windings of the transformer, respectively, and a control unit that controls the inverters. Non-Patent Document 3, which will be described later, discloses a basic configuration of a DAB converter.

[0003] When the inverter applies two levels of voltage to the transformer, the inverter includes a bridge circuit consisting of four semiconductor switches (hereinafter simply referred to as "switches"). The phase of the switches in the same leg of this bridge circuit is changed by a control unit, thereby performing DC voltage conversion by the converter. In a DAB converter configured in this way, it is necessary to achieve zero voltage switching in each switch to avoid power loss. The technology disclosed in Non-Patent Document 3 changes the phase of each switch by simple control, so zero voltage switching cannot be achieved and power loss is unavoidable.

[0004] On the other hand, Non-Patent Document 2, which will be described later, discloses an invention that aims to realize zero voltage switching by controlling the pulse width of an inverter using the voltage ratio of voltages applied to a transformer. However, the technology disclosed in Non-Patent Document 2 does not take into account dead time, nor does it take into account switching for noise countermeasures other than dead time. Therefore, the technology disclosed in Non-Patent Document 2 has difficulty in suppressing power loss, as does the technology disclosed in Non-Patent Document 3.

[0005] One proposal for solving such problems is disclosed in Non-Patent Document 1, which will be described later. The technology disclosed in Non-Patent Document 1 discloses a method for determining the pulse width of each of two inverters applied to a transformer, taking into account the constants and dead time of circuit elements. To this end, Non-Patent Document 1 divides the operation of the circuit into nine cases and obtains a conditional equation for achieving zero voltage switching. [Prior art documents] [Non-patent literature]

[0006] [Non-Patent Document 1] Yu Yan et al., Securing Full-Power-Range Zero-Voltage Switching in Both Steady-State and Transient Operations for a Dual-Active-Bridge-Based Bidirectional Electric Vehicle Charger, IEEE Transactions on Power Electronics 35 (7), 7506-7519, 2020-07, IEEE [Non-Patent Document 2] Amit Kumar et al., Pwm control of dual active bridge: Comprehensive analysis and experimental verification, IEEE Transactions on Power Electronics 26 (4), 1215-1227, 2011-04, IEEE [Non-Patent Document 3] Shigenori Inoue et al., Bidirectional Isolated DC / DC Converter as a Core Circuit for Next-Generation 3.3kV / 6.6kV Power Conversion Systems, Transactions on Industrial Applications, IEEJ Transactions on Industrial Applications, Vol. 126 (3), pp. 211-217, 2006, IEEJ Summary of the Invention [Problem to be solved by the invention]

[0007] In a DAB converter, when attempting to achieve zero voltage switching while taking into account the dead time, there is a problem that the control law becomes complicated. An example is the technology disclosed in Non-Patent Document 1, and when attempting to truly achieve zero voltage switching over the entire range using the technology disclosed in Non-Patent Document 1, complicated control is unavoidable.

[0008] Therefore, an object of this disclosure is to provide an isolated converter and a control method thereof that can easily achieve zero voltage switching with simple control. [Means for solving the problem]

[0009] An isolated converter according to a first aspect of the disclosure includes a transformer having a primary winding and a secondary winding, a primary inverter unit connected to the primary winding and including a plurality of switching elements, a secondary inverter unit connected to the secondary winding and including a plurality of switching elements, and a control unit that controls the plurality of switching elements of the primary inverter unit and the plurality of switching elements of the secondary inverter unit to perform power conversion by the transformer by changing a phase difference between a primary voltage and a secondary voltage applied to the transformer, and the control unit reduces a duty ratio of an output voltage waveform of an inverter unit having a higher corrected input / output voltage, of the primary inverter unit and the secondary inverter unit, by a first reduction amount positively correlated with a duty ratio of an output voltage waveform of an inverter unit having a lower corrected input / output voltage, and by a second reduction amount positively correlated with a predetermined dead time, in accordance with a corrected input / output voltage ratio of the primary inverter unit and the secondary inverter unit corrected by a turns ratio of the primary winding and the secondary winding of the transformer.

[0010] The present invention can be realized not only as a power conversion device such as an isolated converter having such a characteristic processing unit, but also as a power conversion method having such characteristic processing steps, or as a program for causing a computer to execute such steps, or as a semiconductor integrated circuit that realizes part or all of the power conversion device, or as a power conversion system including the power conversion device. Effect of the Invention

[0011] As described above, according to this disclosure, it is possible to provide an isolated converter and a control method that can easily achieve zero voltage switching through simple control. [Brief description of the drawings]

[0012] [Figure 1] FIG. 1 is a block diagram showing a configuration of a power conversion device according to a first embodiment of the present disclosure. [Diagram 2] FIG. 2 is a circuit block diagram of a portion of the power conversion device shown in FIG. [Diagram 3] FIG. 3 is a diagram showing two-level voltages applied to a transformer and control signal waveforms of switching elements. [Figure 4] FIG. 4 is a diagram illustrating a functional configuration of the control unit illustrated in FIG. [Diagram 5] FIG. 5 is a diagram showing a functional configuration of the high voltage side duty calculation unit shown in FIG. [Figure 6] FIG. 6 is a block diagram showing a configuration of a power conversion device according to the second embodiment of this disclosure. [Figure 7] FIG. 7 is a diagram showing a voltage waveform applied to a transformer by the primary-side inverter shown in FIG. 6 and a control signal waveform of a switching waveform of the primary-side inverter. [Figure 8] FIG. 8 is a waveform diagram showing an example of zero voltage switching in a three-level-two-level isolated converter. [Figure 9] FIG. 9 is a waveform diagram showing another example of zero voltage switching in a 3-level-2-level isolated converter. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] [Description of the embodiments of the present disclosure] In the following description and drawings, the same parts are denoted by the same reference numerals. Therefore, detailed description thereof will not be repeated. Note that at least some of the embodiments described below may be combined in any manner.

[0014] (1) An isolated converter according to a first aspect of this disclosure includes a transformer having a primary winding and a secondary winding, a primary inverter unit connected to the primary winding and including a plurality of switching elements, a secondary inverter unit connected to the secondary winding and including a plurality of switching elements, and a control unit that controls the plurality of switching elements of the primary inverter unit and the plurality of switching elements of the secondary inverter unit to perform power conversion by the transformer by changing a phase difference between a primary voltage and a secondary voltage applied to the transformer, wherein the control unit reduces a duty ratio of an output voltage waveform of an inverter unit having a higher corrected input / output voltage, of the primary inverter unit and the secondary inverter unit, by a first reduction amount positively correlated with a duty ratio of an output voltage waveform of an inverter unit having a lower corrected input / output voltage, and by a second reduction amount positively correlated with a predetermined dead time, in accordance with a corrected input / output voltage ratio of the primary inverter unit and the secondary inverter unit corrected by a turns ratio of the primary winding and the secondary winding of the transformer.

[0015] According to this isolated converter, the duty ratio of the inverter section, which has a high input / output voltage after correction, is reduced by a first reduction amount and a second reduction amount. Compared to the conventional method, the reduction amount is larger by the second reduction amount. By using simple control, the zero voltage switching region can be expanded even if there are variations in circuit parameters or variations in pulse width during actual operation. As a result, by using simple control, zero voltage switching can be easily achieved.

[0016] (2) In the above (1), the first decrease amount may be positively correlated with the duty ratio of the output voltage waveform from the inverter unit having a low input / output voltage after the correction, and may be negatively correlated with the input / output voltage ratio after the correction.

[0017] It is known that the first reduction amount theoretically enables zero voltage switching. However, according to the isolated converter disclosed in this disclosure, not only the first reduction amount but also the second reduction amount is reduced from the duty ratio of the output voltage. As a result, zero voltage switching can be achieved more reliably than with the conventional technology.

[0018] (3) In the above (2), the first decrease amount may be determined by the product of a duty ratio of an output voltage waveform of one of the primary side inverter unit and the secondary side inverter unit, which has a lower input / output voltage after the correction, and a value obtained by subtracting the corrected input / output voltage ratio from a first constant greater than 1.

[0019] According to the insulating converter disclosed in this specification, even if the duty ratio of the output voltage waveform of the inverter unit with low input / output voltage after correction is arbitrarily set, the first decrease amount can be adjusted according to the duty ratio, thereby enabling zero voltage switching. As a result, zero voltage switching can be achieved more reliably than with the conventional technology.

[0020] (4) In any one of (1) to (3) above, the second decrease amount may be a value obtained by multiplying the dead time by a positive constant greater than 1.

[0021] The duty ratio of the output voltage is reduced by an amount of phase greater than the phase corresponding to the dead time. Since the duty ratio of the output voltage is reduced taking the dead time into consideration, zero voltage switching can be achieved more reliably and with simpler control than with conventional techniques.

[0022] (5) In any one of (1) to (3) above, of the primary side inverter unit and the secondary side inverter unit, the inverter unit having the higher input voltage after the correction may include a bridge circuit having three or more levels of output voltage, and the control unit may reduce the time during which the inverter unit having the higher input voltage after the correction maintains the output voltage with the largest absolute value by using the first reduction amount and the second reduction amount.

[0023] According to this configuration, zero voltage switching can be achieved with simple control in a multilevel DAB converter such as a 3-level-2-level DAB converter or a 3-level-3-level DAB converter.

[0024] (6) In any one of (1) to (3) above, each of the primary side inverter unit and the secondary side inverter unit may include a semiconductor bridge circuit, and the control unit may control, in each of the semiconductor bridge circuits, a duty ratio of an output voltage to the transformer by controlling a phase difference between two legs of the semiconductor bridge circuit.

[0025] According to this configuration, in a general isolated converter that transmits power by controlling a phase difference, zero voltage switching can be achieved with simple control.

[0026] (7) In the above (6), when the absolute value of the phase difference is equal to or greater than a threshold value, the control unit may further increase a duty ratio of an output voltage waveform of one of the primary side inverter unit and the secondary side inverter unit, which has a higher input power supply voltage after the correction, by an increase amount that is positively correlated with the value of the phase difference.

[0027] According to this configuration, in a general isolated converter that transmits power by controlling a phase difference, zero voltage switching can be achieved with simple control.

[0028] (8) In the above (7), the increase amount may be a difference between the value of the phase difference and the threshold value.

[0029] According to this configuration, in a general isolated converter that transmits power by controlling the phase difference, zero voltage switching can be achieved with simple control, and a decrease in the output power of the isolated converter can be prevented even when the phase difference becomes large.

[0030] (9) A control method for an isolated converter according to a second aspect of this disclosure includes: a transformer having a primary winding and a secondary winding; a primary inverter unit connected to the primary winding and including a plurality of switching elements; a secondary inverter unit connected to the secondary winding and including a plurality of switching elements; and a control unit that controls the plurality of switching elements of the primary inverter unit and the plurality of switching elements of the secondary inverter unit to change a phase difference between a primary voltage and a secondary voltage applied to the transformer, thereby performing power conversion by the transformer. the step of determining which of the primary inverter unit and the secondary inverter unit has a higher input / output voltage after correction in accordance with an input / output voltage ratio corrected by a turns ratio of the primary winding and the secondary winding of the transformer; and the step of reducing the duty ratio of an output voltage waveform of the inverter unit having a higher input / output voltage after correction by using a first reduction amount positively correlated with the duty ratio of an output voltage waveform of the inverter unit having a lower input / output voltage after correction and a second reduction amount positively correlated with a predetermined dead time.

[0031] According to this control method for an isolated converter, the duty ratio of an inverter unit having a high input / output voltage after correction is reduced by a first reduction amount and a second reduction amount. Compared to the conventional method, the reduction amount is larger by the second reduction amount. By using simple control, the zero voltage switching region can be expanded even if there are variations in circuit parameters or variations in pulse width during actual operation. As a result, zero voltage switching can be easily achieved by using simple control.

[0032] [Details of the embodiment of the present disclosure] Specific examples of an isolated converter and a control method according to an embodiment of the present disclosure will be described below with reference to the drawings. Note that the present disclosure is not limited to these examples, but is defined by the claims, and is intended to include all modifications within the meaning and scope of the claims.

[0033] 1. First embodiment FIG. 1 shows a schematic configuration of the entire power conversion device 50 according to the first embodiment of this disclosure. Referring to FIG. 1, the power conversion device 50 is connected between a storage battery 138, which is a DC power source, and a single-phase three-wire system (not shown). The power conversion device 50 includes a primary side inverter 130 connected to the storage battery 138, a secondary side inverter 134 connected to the system via a system-connection inverter (not shown) or connected to a DC bus, a transformer 132 connected between the primary side inverter 130 and the secondary side inverter 134, and a control unit 140 that controls a plurality of switches included in the primary side inverter 130 and the secondary side inverter 134 to operate the primary side inverter 130 and the secondary side inverter 134 to perform power conversion between the storage battery 138 and the system. The power conversion device 50 further includes a leakage inductance 136 that is arranged in a primary side winding of the transformer 132 as necessary.

[0034] The switches included in the primary inverter 130 and the secondary inverter 134 are all MOSFETs (Metal-Oxide-Semiconductor Field Effect Transistors). However, the switches are not limited to MOSFETs. The switches may be bipolar transistors such as IGBTs (Insulated Gate Bipolar Transistors).

[0035] 2, the primary inverter 130 is a two-level inverter that applies two levels of voltage to the primary winding of the transformer 132, and includes a primary full-bridge circuit 150 connected between a terminal pair connected to the storage battery 138 shown in FIG. 1 and the primary winding of the transformer 132. The primary full-bridge circuit 150 includes switches S1 and S2 that form a first leg, and switches S3 and S4 that form a second leg. These switches S1, S2, S3, and S4 are all controlled by a PWM (Pulse Width Modulation) signal from the control unit 140 shown in FIG. The primary inverter 130 includes a current sensor and a voltage sensor in addition to the primary full-bridge circuit 150. Outputs from these sensors are provided to the control unit 140 shown in FIG. 1.

[0036] The secondary-side inverter 134 is also a two-level inverter and includes a secondary-side full-bridge circuit 160 connected between the secondary winding of the transformer 132 and the system. The secondary-side full-bridge circuit 160 includes switches S5 and S6 forming a first leg, and switches S7 and S8 forming a second leg. These switches S5, S6, S7, and S8 are also controlled by a PWM signal from the control unit 140 shown in FIG. 1. The secondary-side inverter 134 further includes a current sensor and a voltage sensor. The outputs of these sensors are provided to the control unit 140 shown in FIG. 1.

[0037] 3, the relationship between the output voltage waveform 200 applied to the transformer 132 by the two-level inverter in this embodiment, for example, the primary side inverter 130, and the switching timing of the PWM signals applied to the switches S1, S2, S3, and S4 is shown. With reference to FIG. 3, the absolute value of the maximum voltage of the output voltage waveform 200 is assumed to be E. The switches S1 and S2 operate in a complementary manner. The same is true for the switches S3 and S4.

[0038] In order to prevent a pair of switches that operate complementarily from being turned on at the same time, a period in which all switches belonging to the same pair are turned off is inserted between the time when the first switch is turned off and the time when the second switch is turned on among the switches that make up the pair. This period is called dead time. In the waveforms of the control signals of each switch shown in FIG. 3, the parts indicated by diagonal lines at the ends represent the dead time. If the dead time is ignored, in a two-level inverter such as the primary side inverter 130 and the secondary side inverter 134 of this embodiment, the duty ratio of each switch is fixed to 50(%).

[0039] 3 is an example of an output voltage waveform of the primary inverter 130 or the secondary inverter 134, whichever has a higher output voltage in this embodiment. In the output voltage waveform 200, the difference between phase π and phase D is the amount of reduction Δ in the duty ratio, as described below. In the case of the lower output voltage, such a reduction in the duty ratio is not performed. A method for calculating the amount of reduction Δ in the duty ratio in this embodiment will be described later.

[0040] A DAB converter such as the power conversion device 50 has a transformer 132 connected to the output terminals of a primary inverter 130 and a secondary inverter 134. Power transmission in the DAB converter is performed by the phase difference between the output voltages of the primary inverter 130 and the secondary inverter 134. Here, the phase difference refers to the phase difference between the centers of the parts of the voltage waveforms with the largest absolute values. Therefore, the main parameter of the output voltage of each inverter is this phase difference. Hereinafter, this phase difference will be referred to as the phase difference φ.

[0041] Zero voltage switching in a DAB converter can be achieved when each switch is turned on. Zero voltage switching here means that the switch is turned on when a current flows through the reverse conducting diode of each switch or the output capacitance of each switch and the voltage applied to the switch is small. Therefore, the voltage applied to the switch does not need to be strictly zero.

[0042] Regarding the amount of reduction Δ in the duty ratio for realizing zero voltage switching in a two-level-two-level DAB converter as in this embodiment, the following formula is shown in Non-Patent Document 2.

[0043] Δ=π(1-m) Here, Δ indicates the amount of reduction in the voltage pulse output by the bridge circuit with the higher output voltage (the amount of reduction in the duty ratio), and m indicates the input power supply voltage ratio of the primary and secondary bridge circuits corrected in consideration of the turns ratio of transformer 132. In other words, if the power supply voltage of the primary bridge circuit is V1, the power supply voltage of the secondary bridge circuit is V2, and the turns ratio of transformer 132 is n, then the corrected input power supply voltage ratio m is calculated by the following formula.

[0044] m=V1 / nV2 (when V1≦nV2), or m=nV2 / V1 (when V1>nV2).

[0045] That is, the corrected input power supply voltage ratio m is equal to or less than 1. In this specification, V1 and nV2 in the above formula are referred to as corrected voltages.

[0046] According to the disclosure of Non-Patent Document 2, by controlling the switches using the reduction amount Δ calculated using the corrected input power supply voltage ratio m, it is possible to achieve zero voltage switching of all switches even at low output, compared to the case where the pulse width of each bridge circuit is fixed.

[0047] However, in the derivation of Δ in Non-Patent Document 2, the above-mentioned dead time is ignored. Therefore, there is a discrepancy between the conditions under which zero-voltage switching is possible in theory and in actual operation. In addition, Non-Patent Document 2 does not take into account variations in circuit parameters or variations in pulse widths in actual operation. Therefore, it is difficult to directly apply the disclosure of Non-Patent Document 2 to applications where such variations are unavoidable.

[0048] To solve these problems, in this embodiment, a wide zero voltage switching region can be achieved compared to the method of Non-Patent Document 2 by using simple control that takes into account the dead time and ensures a margin for variations in circuit parameters.

[0049] 4, the control unit 140 determines the phase difference φ by current feedback control that is widely used in DAB converters. * The amplifier includes a subtraction circuit 250 that subtracts a value obtained by feeding back the current value I output by the control unit 140 from the input of the amplifier, a PI (Proportional and Integral) gain unit 252 that receives the output of the subtraction circuit 250, and a phase difference conversion unit 254 that converts the output of the PI gain unit 252 into a phase difference φ.

[0050] The control unit 140 further includes a high-side duty calculation unit 256 that calculates the duty ratio of the high-side voltage side after the correction for the duty ratios D1 and D2 of the primary-side inverter 130 and the secondary-side inverter 134 using the phase difference φ output by the phase difference conversion unit 254 and the corrected input power supply voltage ratio m, using the duty ratio of the low-side voltage after the correction, and outputs the duty ratios D1 and D2, and a PWM circuit 258 that generates a PWM signal to control each switch of the primary-side inverter 130 and the secondary-side inverter 134 based on the phase difference φ output by the phase difference conversion unit 254 and the duty ratios D1 and D2 output by the high-side duty calculation unit 256, and applies the PWM signal to each switch of the primary-side inverter 130 and the secondary-side inverter 134. The calculation of the high-side duty ratio in the high-side duty calculation unit 256 will be described with reference to FIG. 5. The low-side duty ratio is determined by normal control, such as a fixed value. The duty ratio on the low voltage side can be determined by a simple method.

[0051] Fig. 5 shows details of the process in the high voltage side duty calculation unit 256. Fig. 5 shows a case where, among the corrected voltages, the voltage V1 of the primary side inverter 130 is higher than the voltage nV2 of the secondary side inverter 134. When the voltage nV2 of the secondary side inverter 134 is higher, D2 and D1 are interchanged in the configuration shown in Fig. 5.

[0052] Referring to FIG. 5, the high voltage side duty calculation unit 256 includes a Δ calculation unit 300 for receiving the corrected input power supply voltage ratio m and the duty ratio having the lower corrected voltage (in this example, duty ratio D2) and calculating the amount of decrease Δ of the duty ratio D1 according to the following formula:

[0053] Δ=D2×(1-m)+2×θdead Here, θdead is the dead time converted into a phase. The amount of phase reduction due to the dead time can be determined arbitrarily as long as it is greater than the phase corresponding to the dead time. In other words, although the coefficient of θdead in the above formula is set to 2, the value of this coefficient can be any value greater than 1.

[0054] The high voltage side duty calculation unit 256 further includes a judgment unit 302 that receives the phase difference φ from the phase difference conversion unit 254 and branches the processing flow depending on whether the absolute value of the phase difference φ is greater than the absolute value of a predetermined threshold value φa, a first calculation unit 304 that calculates the high voltage side duty ratio D1 by subtracting a decrease amount Δ from π when the judgment by the judgment unit 302 is positive (i.e., when the absolute value of the phase difference φ is greater than the absolute value of the predetermined threshold value φa), and a second calculation unit 306 that calculates the high voltage side duty ratio D1 by subtracting the decrease amount Δ from π and adding the absolute value of the difference between the phase difference φ and the threshold value φa when the judgment by the judgment unit 302 is negative (i.e., when the absolute value of the phase difference φ is equal to or less than the absolute value of the threshold value φa).

[0055] The reason for reducing the amount of decrease in the duty ratio D1 based on the value of the phase difference φ in this manner is to prevent the output power of the power conversion device 50 from being reduced by subtracting the above-mentioned amount of decrease Δ from the duty ratio D1 when the phase difference φ is large.

[0056] The method of calculating the amount of decrease Δ in the duty ratio D1 by the high voltage side duty calculation unit 256 as described above can be expressed by the following equation.

[0057] Δ=D2×(1-m)+2×θdead (when |φ|≦|φa|) Δ=D2×(1-m)+2×θdead-(φ-φa) (when |φ|>|φa|) The first term of the decrease amount Δ changes in a positive correlation with the duty ratio D2 with the lower corrected voltage. The second term of the decrease amount Δ changes in a positive correlation with the dead time. The first term of the decrease amount Δ also changes in a negative correlation with the corrected input power supply voltage ratio m. When it is determined that |φ|>|φa| by comparing the absolute value of the phase difference φ and the threshold value φa, the decrease amount Δ changes in a negative correlation with the value of φ. In other words, when |φ|>|φa|, the decrease amount Δ of the duty ratio D1 is smaller than when not so, and the decrease in the output voltage of the power conversion device 50 is suppressed.

[0058] According to the first embodiment described above, the duty ratio of the inverter with the higher corrected voltage (duty ratio D1 in the above example) is calculated based on the duty ratio of the inverter with the lower corrected voltage (duty ratio D2 in the above example) taking into account not only the corrected input / output power supply voltage ratio m but also the dead time. As a result, compared to the prior art, the zero voltage switching region can be expanded and variations in circuit parameters and the like can be dealt with. In addition, the control for this can be simple. As a result, an isolated converter and a control method that can easily achieve zero voltage switching with simple control can be provided.

[0059] 2. Second embodiment The power conversion device 50 according to the first embodiment is a 2-level-2-level DAB converter. However, this disclosure is not limited to such a converter and can be applied to a multi-level DAB converter having 3 or more levels. The second embodiment relates to a 3-level-2-level DAB converter.

[0060] Fig. 6 is a circuit block diagram of a portion of a power conversion device 350 according to a second embodiment of this disclosure, excluding a control unit. Referring to Fig. 6, the power conversion device 350 includes a three-level primary side inverter 360 connected to a DC power source such as a storage battery not shown in Fig. 6, a transformer 362 having a primary side winding connected to the primary side inverter 360, a two-level secondary side inverter 364 connected between a secondary side winding of the transformer 362 and a system not shown, and a control unit (not shown) that controls the primary side inverter 360 and the secondary side inverter 364. The primary side inverter 360 further includes a leakage inductor 366 arranged in the primary side winding between the transformer 362 and the primary side inverter 360 as necessary.

[0061] The primary inverter 360 includes a bridge circuit 380. The bridge circuit 380 includes switches S1 and S4 constituting a first leg, and switches S5 and S8 constituting a second leg. The primary inverter 360 further includes switches S2 and S3 connected between the connection point of the switches S1 and S4 and the neutral point, and switches S6 and S7 connected between the connection point of the switches S5 and S8 and the neutral point, in order to realize a three-level operation by the bridge circuit 380. The primary inverter 360 also includes current sensors and voltage sensors arranged at appropriate positions, similar to the primary inverter 130 in the first embodiment. The outputs of these sensors are provided to a control unit (not shown).

[0062] The secondary-side inverter 364 includes a bridge circuit 390. The bridge circuit 390 includes switches S9 and S10 that form a first leg, and switches S11 and S12 that form a second leg. The secondary-side inverter 364 also includes current sensors and voltage sensors that are appropriately arranged, similar to the secondary-side inverter 134 in the first embodiment. The outputs of these sensors are provided to a control unit (not shown).

[0063] FIG. 7 shows a waveform 400 of the output voltage of the primary side inverter 360 and the PWM waveforms driving switches S1 through S8 to achieve waveform 400.

[0064] A half cycle (from phase 0 to phase π) of waveform 400 includes sections of 0 voltage from the beginning to phase α and from phase π-α to phase π, sections of voltage E / 2 from phase α to phase β (α<β) and from phase π-β to phase π-α, and a section of voltage E from phase β to phase π-β. Of these, the section from phase β to phase π-β is the section where the absolute value of the voltage is maintained at a maximum.

[0065] In the PWM waveforms from switch S1 to switch S8 shown in the lower part of FIG. 7, the hatched portions indicate dead times.

[0066] In the power conversion device 350 according to this embodiment, the reduction amount Δ of the duty ratio of the output voltage having the higher input power supply voltage ratio after correction can be calculated in the same manner as in the first embodiment. However, when the inverter on the side where the duty ratio is reduced is a three-level inverter such as the primary side inverter 360, the duty ratio to be reduced is the part where the absolute value of the output voltage is the highest. In other words, when the primary side inverter 360 is the target of the reduction in the duty ratio, the part of the waveform 400 shown in FIG. 7 from phase β to phase π-β where the absolute value of the voltage is maintained at E is the region where the duty ratio is reduced. The duty ratio of the region where the absolute value of the voltage is E / 2 may be freely determined in consideration of other factors.

[0067] In the case of the power conversion device 350 consisting of a 3-level-2-level DAB converter as in this embodiment, whether or not zero voltage switching has been achieved can be determined as follows. This determination should normally be made based on the switch applied voltage when each switch is turned on. However, as described below, the feasibility of zero voltage switching can be easily determined based on the transformer current during switching.

[0068] 6, in this embodiment, the direction of the transformer current flowing from right to left through leakage inductor 366 is taken as positive. Then, the transformer current needs to be negative at the timing when the output voltage of primary-side inverter 360 becomes positive, and the transformer current needs to be positive at the timing when the output voltage on the secondary-side inverter 364 side changes from negative to positive.

[0069] For example, consider the case where the phase of the 3-level side is leading. In the waveform diagram shown in Figure 8, the transformer current is negative at the timing when the output voltage on the 3-level side changes from negative to positive. On the other hand, the transformer current is positive at the timing when the output voltage on the 2-level side changes from negative to positive. Therefore, if a waveform like that shown in Figure 8 is obtained, zero voltage switching has been achieved.

[0070] On the other hand, consider the case where the phase of the two-level side is leading. In the waveform diagram shown in Fig. 9, the transformer current is positive at the timing when the output voltage on the secondary side inverter 364 side changes from negative to positive. Also, the transformer current is negative at the timing when the output voltage on the primary side inverter 360 side changes from positive to negative. Therefore, if a waveform like that shown in Fig. 9 is obtained, zero voltage switching is achieved.

[0071] The conditional equation for achieving such zero voltage switching is obtained by circuit analysis. The duty ratio thus obtained is then subtracted from the duty ratio obtained by using the same method as that described in the first embodiment. However, when the target is a three-level inverter, the duty ratio during the period in which the absolute value of the voltage is maintained at the maximum value is the target for correction, as described above.

[0072] This embodiment also makes it possible to expand the zero voltage switching region and deal with variations in circuit parameters, etc., compared to the prior art. In addition, the control for this purpose can be simple. As a result, it is possible to provide an isolated converter and a control method that can easily achieve zero voltage switching through simple control.

[0073] It is apparent that the power conversion device 50 and the power conversion device 350 according to the first and second embodiments described above can also operate in both directions, and the above-mentioned effects can be obtained in either case.

[0074] Each process (each function) of the above-mentioned embodiment is realized by a processing circuit including one or more processors. The processing circuit may be configured by an integrated circuit in which one or more memories, various analog circuits, and various digital circuits are combined in addition to the one or more processors. The one or more memories store programs (instructions) that cause the one or more processors to execute each of the above processes. The one or more processors may execute each of the above processes according to the programs read from the one or more memories, or may execute each of the above processes according to a logic circuit designed in advance to execute each of the above processes. The processor may be various processors suitable for computer control, such as a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), a DSP (Digital Signal Processor), an FPGA (Field-Programmable Gate Array), an ASIC (Application Specific Integrated Circuit), and a DPU (Data Processing Unit).

[0075] The physically separated processors may cooperate with each other to execute the above processes. For example, the processors mounted on the physically separated computers may cooperate with each other via a network such as a LAN (Local Area Network), a WAN (Wide Area Network), or the Internet to execute the above processes.

[0076] The program may be installed into the memory from an external server device or the like via the network, or may be distributed in a state stored on a recording medium such as a CD-ROM (Read-Only Memory) (Compact Disc Read-Only Memory), a DVD-ROM (Digital Versatile Disc Read-Only Memory), or a semiconductor memory, and installed into the memory from the recording medium.

[0077] The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. The scope of the present disclosure is not indicated by the detailed description of the disclosure, but by the claims of the appended claims, and is intended to include all modifications within the scope and meaning equivalent to the wording of the claims. [Explanation of symbols]

[0078] 50, 350 Power converter 130, 360 Primary side inverter 132, 362 Trans 134, 364 Secondary side inverter 136 Inductance 138 Storage Battery 140 Control section 150 Primary side full bridge circuit 160 Secondary side full bridge circuit 200 Output voltage waveform 250 Subtraction Circuit 252 PI gain section 254 Phase difference conversion unit 256 High voltage side duty calculation section 258 PWM circuit 300 Δ calculation section 302 Judgment section 304 First Calculation Section 306 Second Calculation Section 366 Leakage Inductor 380, 390 Bridge circuit 400 waveforms

Claims

1. a transformer having a primary winding and a secondary winding; a primary inverter section connected to the primary winding and including a plurality of switching elements; a secondary inverter section connected to the secondary winding and including a plurality of switching elements; a control unit that controls the plurality of switching elements of the primary inverter unit and the plurality of switching elements of the secondary inverter unit to change a phase difference between a primary voltage and a secondary voltage applied to the transformer, thereby performing power conversion by the transformer, the control unit reduces a duty ratio of an output voltage waveform of an inverter unit having a higher corrected input / output voltage, of the primary side inverter unit and the secondary side inverter unit, by a first reduction amount positively correlated with a duty ratio of an output voltage waveform of an inverter unit having a lower corrected input / output voltage, and by a second reduction amount positively correlated with a predetermined dead time, in accordance with a corrected input / output voltage ratio between the primary side inverter unit and the secondary side inverter unit, corrected by a turns ratio between the primary side winding and the secondary side winding of the transformer.

2. 2. The isolated converter according to claim 1, wherein the first decrease amount has a positive correlation with the duty ratio of the output voltage waveform from the inverter unit having a low input / output voltage after the correction, and has a negative correlation with the input / output voltage ratio after the correction.

3. 3. The isolated converter according to claim 2, wherein the first reduction amount is determined by a product of a duty ratio of an output voltage waveform of an inverter unit, of the primary side inverter unit and the secondary side inverter unit, which has a lower input / output voltage after the correction, and a value obtained by subtracting the input / output voltage ratio after the correction from a first constant greater than 1.

4. 4. The isolated converter according to claim 1, wherein the second decrease amount is a value obtained by multiplying the dead time by a positive constant.

5. Of the primary side inverter unit and the secondary side inverter unit, the inverter unit having a higher input voltage after the correction includes a bridge circuit having an output voltage of three or more levels, 4. The isolated converter according to claim 1, wherein the control unit reduces a time during which the inverter unit having the higher post-correction input voltage maintains the output voltage with the largest absolute value, by using the first reduction amount and the second reduction amount.

6. each of the primary inverter unit and the secondary inverter unit includes a semiconductor bridge circuit; 4. The isolated converter according to claim 1, wherein the control unit controls a duty ratio of an output voltage to the transformer in each of the semiconductor bridge circuits by controlling a phase difference between two legs of the semiconductor bridge circuits.

7. 7. The isolated converter according to claim 6, wherein, when an absolute value of the phase difference is equal to or greater than a threshold value, the control unit further increases a duty ratio of an output voltage waveform of one of the primary side inverter unit and the secondary side inverter unit, which has a higher input power supply voltage after the correction, by an increase amount positively correlated with a value of the phase difference.

8. 8. The isolated converter of claim 7, wherein the increase is the difference between the value of the phase difference and the threshold value.

9. a transformer having a primary winding and a secondary winding; a primary inverter section connected to the primary winding and including a plurality of switching elements; a secondary inverter section connected to the secondary winding and including a plurality of switching elements; a control unit that controls the plurality of switching elements of the primary side inverter unit and the plurality of switching elements of the secondary side inverter unit to perform power conversion by the transformer by changing a phase difference between a primary side voltage and a secondary side voltage applied to the transformer, determining which of the primary-side inverter unit and the secondary-side inverter unit has a higher input / output voltage after correction in accordance with an input / output voltage ratio corrected based on a turns ratio of the primary winding and the secondary winding of the transformer; a step of reducing a duty ratio of an output voltage waveform of an inverter unit having a high input / output voltage after the correction by using a first reduction amount positively correlated with a duty ratio of an output voltage waveform of an inverter unit having a low input / output voltage after the correction, and a second reduction amount positively correlated with a predetermined dead time.

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